aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/gpio
diff options
context:
space:
mode:
authorY Vo <yvo@apm.com>2015-01-16 02:34:20 -0500
committerLinus Walleij <linus.walleij@linaro.org>2015-01-20 04:39:25 -0500
commit7a839e9a277d4a410a9b015d561ff09739bc0ff6 (patch)
tree760f11aebd5cf04fec879ba6cae7469cc3fb5da0 /Documentation/devicetree/bindings/gpio
parentb2b35e10892cb1253c93c582e6a3d7ad91ed9f3f (diff)
Documentation: gpio: Add APM X-Gene standby GPIO controller DTS binding
Documentation for APM X-Gene standby GPIO controller DTS binding. Signed-off-by: Y Vo <yvo@apm.com> [Some spelling and various fixes] Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt32
1 files changed, 32 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
new file mode 100644
index 000000000000..dae130060537
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-xgene-sb.txt
@@ -0,0 +1,32 @@
1APM X-Gene Standby GPIO controller bindings
2
3This is a gpio controller in the standby domain.
4
5There are 20 GPIO pins from 0..21. There is no GPIO_DS14 or GPIO_DS15,
6only GPIO_DS8..GPIO_DS13 support interrupts. The IRQ mapping
7is currently 1-to-1 on interrupts 0x28 thru 0x2d.
8
9Required properties:
10- compatible: "apm,xgene-gpio-sb" for the X-Gene Standby GPIO controller
11- reg: Physical base address and size of the controller's registers
12- #gpio-cells: Should be two.
13 - first cell is the pin number
14 - second cell is used to specify the gpio polarity:
15 0 = active high
16 1 = active low
17- gpio-controller: Marks the device node as a GPIO controller.
18- interrupts: Shall contain exactly 6 interrupts.
19
20Example:
21 sbgpio: sbgpio@17001000 {
22 compatible = "apm,xgene-gpio-sb";
23 reg = <0x0 0x17001000 0x0 0x400>;
24 #gpio-cells = <2>;
25 gpio-controller;
26 interrupts = <0x0 0x28 0x1>,
27 <0x0 0x29 0x1>,
28 <0x0 0x2a 0x1>,
29 <0x0 0x2b 0x1>,
30 <0x0 0x2c 0x1>,
31 <0x0 0x2d 0x1>;
32 };