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authorLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 16:00:56 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2012-12-11 16:00:56 -0500
commitb0885d01f9ab1274109c02942c881d598f939623 (patch)
tree8c0e33fa141f2732a5c8e0e2db8b457d5cd865f9 /Documentation/devicetree/bindings/gpio
parentbad73c5aa069f1f14cc07ce7bbae8d463635560c (diff)
parentfc13d5a5b17c657b7682c145d367dcb859c507d9 (diff)
Merge tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6
Pull GPIO updates from Grant Likely: "GPIO follow up patch and type change for v3.5 merge window Primarily device driver additions, features and bug fixes. Not much touching gpio common subsystem support. Should not be scary." * tag 'gpio-for-linus' of git://git.secretlab.ca/git/linux-2.6: (34 commits) gpio: Provide the STMPE GPIO driver with its own IRQ Domain gpio: add TS-5500 DIO blocks support gpio: pcf857x: use client->irq for gpio_to_irq() gpio: stmpe: Add DT support for stmpe gpio gpio: pl061 depends on ARM gpio/pl061: remove old comment gpio: SPEAr: add spi chipselect control driver gpio: gpio-max710x: Support device tree probing gpio: twl4030: Use only TWL4030_MODULE_LED for LED configuration gpio: tegra: read output value when gpio is set in direction_out gpio: pca953x: Add compatible strings to gpio-pca953x driver gpio: pca953x: Register an IRQ domain gpio: mvebu: Set free callback for gpio_chip gpio: tegra: Drop exporting static functions gpio: tegra: Staticize non-exported symbols gpio: tegra: fix suspend/resume apis gpio-pch: Set parent dev for gpio chip gpio: em: Fix build errors GPIO: clps711x: use platform_device_unregister in gpio_clps711x_init() gpio/tc3589x: convert to use the simple irqdomain ...
Diffstat (limited to 'Documentation/devicetree/bindings/gpio')
-rw-r--r--Documentation/devicetree/bindings/gpio/gpio-stmpe.txt18
-rw-r--r--Documentation/devicetree/bindings/gpio/spear_spics.txt50
2 files changed, 68 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt b/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt
new file mode 100644
index 000000000000..a0e4cf885213
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/gpio-stmpe.txt
@@ -0,0 +1,18 @@
1STMPE gpio
2----------
3
4Required properties:
5 - compatible: "st,stmpe-gpio"
6
7Optional properties:
8 - st,norequest-mask: bitmask specifying which GPIOs should _not_ be requestable
9 due to different usage (e.g. touch, keypad)
10
11Node name must be stmpe_gpio and should be child node of stmpe node to which it
12belongs.
13
14Example:
15 stmpe_gpio {
16 compatible = "st,stmpe-gpio";
17 st,norequest-mask = <0x20>; //gpio 5 can't be used
18 };
diff --git a/Documentation/devicetree/bindings/gpio/spear_spics.txt b/Documentation/devicetree/bindings/gpio/spear_spics.txt
new file mode 100644
index 000000000000..96c37eb15075
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpio/spear_spics.txt
@@ -0,0 +1,50 @@
1=== ST Microelectronics SPEAr SPI CS Driver ===
2
3SPEAr platform provides a provision to control chipselects of ARM PL022 Prime
4Cell spi controller through its system registers, which otherwise remains under
5PL022 control. If chipselect remain under PL022 control then they would be
6released as soon as transfer is over and TxFIFO becomes empty. This is not
7desired by some of the device protocols above spi which expect (multiple)
8transfers without releasing their chipselects.
9
10Chipselects can be controlled by software by turning them as GPIOs. SPEAr
11provides another interface through system registers through which software can
12directly control each PL022 chipselect. Hence, it is natural for SPEAr to export
13the control of this interface as gpio.
14
15Required properties:
16
17 * compatible: should be defined as "st,spear-spics-gpio"
18 * reg: mentioning address range of spics controller
19 * st-spics,peripcfg-reg: peripheral configuration register offset
20 * st-spics,sw-enable-bit: bit offset to enable sw control
21 * st-spics,cs-value-bit: bit offset to drive chipselect low or high
22 * st-spics,cs-enable-mask: chip select number bit mask
23 * st-spics,cs-enable-shift: chip select number program offset
24 * gpio-controller: Marks the device node as gpio controller
25 * #gpio-cells: should be 1 and will mention chip select number
26
27All the above bit offsets are within peripcfg register.
28
29Example:
30-------
31spics: spics@e0700000{
32 compatible = "st,spear-spics-gpio";
33 reg = <0xe0700000 0x1000>;
34 st-spics,peripcfg-reg = <0x3b0>;
35 st-spics,sw-enable-bit = <12>;
36 st-spics,cs-value-bit = <11>;
37 st-spics,cs-enable-mask = <3>;
38 st-spics,cs-enable-shift = <8>;
39 gpio-controller;
40 #gpio-cells = <2>;
41};
42
43
44spi0: spi@e0100000 {
45 status = "okay";
46 num-cs = <3>;
47 cs-gpios = <&gpio1 7 0>, <&spics 0>,
48 <&spics 1>;
49 ...
50}