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authorLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 01:50:46 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-11-12 01:50:46 -0500
commitc2d33069915d1f9b3b1dcc2199af11d4e072b037 (patch)
tree2664fd3c41c2f3223cfbb64793c2ddb8e9087ded /Documentation/devicetree/bindings/gpio/gpio-bcm-kona.txt
parent8a5dc585d50015af9c079ae2d182dc4c1cd22914 (diff)
parent993571273275bfecb5161806796eb368db234106 (diff)
Merge tag 'gpio-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio
Pull GPIO changes from Linus Walleij: "Here is the bulk of GPIO changes for the v3.13 development cycle. I've got ACKs for the things that affect other subsystems (or it's my own subsystem, like pinctrl). Most of that pertain to an attempt from my side to consolidate and get rid of custom GPIO implementations in the ARM tree. I will continue doing this. The main change this time is the new GPIO descriptor API, background for this can be found in Corbet's summary from this january in LWN: http://lwn.net/Articles/533632/ Summary: - Merged the GPIO descriptor API from Alexandre Courbot. This is a first step toward trying to get rid of the global GPIO numberspace for the future. - Add an API so that driver can flag that a certain GPIO line is being used by a irqchip backend for generating IRQs, so that we can enforce checks, like not allowing users to switch that line to an output at runtime, since this makes no sense. Implemented corresponding calls in a few select drivers. - ACPI GPIO cleanups, refactorings and switch to using the descriptor-based interface. - Support for the TPS80036 Palmas GPIO variant. - A new driver for the Broadcom Kona GPIO SoC IP block. - Device tree support for the PCF857x driver. - A set of ARM GPIO refactorings with the goal of getting rid of a bunch of custom GPIO implementations from the arch/arm/* tree: * Move the IOP GPIO driver to the GPIO subsystem and fix all users to use the gpiolib API for accessing GPIOs. Delete the old custom GPIO implementation. * Delete the unused custom PXA GPIO implemention. * Convert all users of the IXP4 custom GPIO implementation to use gpiolib and delete the custom implementation. * Delete the custom Gemini GPIO implementation, also completely unused. - Various cleanups and renamings" * tag 'gpio-v3.13-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (85 commits) gpio: gpio-mxs: Remove unneeded dt checks gpio: pl061: don't depend on CONFIG_ARM gpio: bcm-kona: add missing .owner to struct gpio_chip gpiolib: provide a declaration of seq_file in gpio/driver.h gpiolib: include gpio/consumer.h in of_gpio.h for desc_to_gpio() gpio: provide stubs for devres gpio functions gpiolib: devres: add missing headers gpiolib: make GPIO_DEVRES depend on GPIOLIB gpiolib: devres: fix devm_gpiod_get_index() gpiolib / ACPI: document the GPIO descriptor based interface gpiolib / ACPI: allow passing GPIOF_ACTIVE_LOW for GpioInt resources gpiolib / ACPI: add ACPI support for gpiod_get_index() gpiolib / ACPI: convert to gpiod interfaces gpiolib: add gpiod_get() and gpiod_put() functions gpiolib: port of_ functions to use gpiod gpiolib: export descriptor-based GPIO interface Fixup "MAINTAINERS: GPIO-INTEL-MID: add maintainer" gpio: bcm281xx: Don't print addresses of GPIO area in probe() gpio: tegra: use new gpio_lock_as_irq() API gpio: rcar: Include linux/of.h header ...
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1Broadcom Kona Family GPIO
2=========================
3
4This GPIO driver is used in the following Broadcom SoCs:
5 BCM11130, BCM11140, BCM11351, BCM28145, BCM28155
6
7The Broadcom GPIO Controller IP can be configured prior to synthesis to
8support up to 8 banks of 32 GPIOs where each bank has its own IRQ. The
9GPIO controller only supports edge, not level, triggering of interrupts.
10
11Required properties
12-------------------
13
14- compatible: "brcm,bcm11351-gpio", "brcm,kona-gpio"
15- reg: Physical base address and length of the controller's registers.
16- interrupts: The interrupt outputs from the controller. There is one GPIO
17 interrupt per GPIO bank. The number of interrupts listed depends on the
18 number of GPIO banks on the SoC. The interrupts must be ordered by bank,
19 starting with bank 0. There is always a 1:1 mapping between banks and
20 IRQs.
21- #gpio-cells: Should be <2>. The first cell is the pin number, the second
22 cell is used to specify optional parameters:
23 - bit 0 specifies polarity (0 for normal, 1 for inverted)
24 See also "gpio-specifier" in .../devicetree/bindings/gpio/gpio.txt.
25- #interrupt-cells: Should be <2>. The first cell is the GPIO number. The
26 second cell is used to specify flags. The following subset of flags is
27 supported:
28 - trigger type (bits[1:0]):
29 1 = low-to-high edge triggered.
30 2 = high-to-low edge triggered.
31 3 = low-to-high or high-to-low edge triggered
32 Valid values are 1, 2, 3
33 See also .../devicetree/bindings/interrupt-controller/interrupts.txt.
34- gpio-controller: Marks the device node as a GPIO controller.
35- interrupt-controller: Marks the device node as an interrupt controller.
36
37Example:
38 gpio: gpio@35003000 {
39 compatible = "brcm,bcm11351-gpio", "brcm,kona-gpio";
40 reg = <0x35003000 0x800>;
41 interrupts =
42 <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH
43 GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH
44 GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH
45 GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH
46 GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH
47 GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
48 #gpio-cells = <2>;
49 #interrupt-cells = <2>;
50 gpio-controller;
51 interrupt-controller;
52 };