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authorLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:24:48 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2013-02-26 12:24:48 -0500
commit5115f3c19d17851aaff5a857f55b4a019c908775 (patch)
tree0d02cf01e12e86365f4f5e3b234f986daef181a7 /Documentation/devicetree/bindings/dma/snps-dma.txt
parentc41b3810c09e60664433548c5218cc6ece6a8903 (diff)
parent17166a3b6e88b93189e6be5f7e1335a3cc4fa965 (diff)
Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dma
Pull slave-dmaengine updates from Vinod Koul: "This is fairly big pull by my standards as I had missed last merge window. So we have the support for device tree for slave-dmaengine, large updates to dw_dmac driver from Andy for reusing on different architectures. Along with this we have fixes on bunch of the drivers" Fix up trivial conflicts, usually due to #include line movement next to each other. * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (111 commits) Revert "ARM: SPEAr13xx: Pass DW DMAC platform data from DT" ARM: dts: pl330: Add #dma-cells for generic dma binding support DMA: PL330: Register the DMA controller with the generic DMA helpers DMA: PL330: Add xlate function DMA: PL330: Add new pl330 filter for DT case. dma: tegra20-apb-dma: remove unnecessary assignment edma: do not waste memory for dma_mask dma: coh901318: set residue only if dma is in progress dma: coh901318: avoid unbalanced locking dmaengine.h: remove redundant else keyword dma: of-dma: protect list write operation by spin_lock dmaengine: ste_dma40: do not remove descriptors for cyclic transfers dma: of-dma.c: fix memory leakage dw_dmac: apply default dma_mask if needed dmaengine: ioat - fix spare sparse complain dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.c ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDING dw_dmac: add support for Lynxpoint DMA controllers dw_dmac: return proper residue value dw_dmac: fill individual length of descriptor ...
Diffstat (limited to 'Documentation/devicetree/bindings/dma/snps-dma.txt')
-rw-r--r--Documentation/devicetree/bindings/dma/snps-dma.txt44
1 files changed, 44 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/snps-dma.txt b/Documentation/devicetree/bindings/dma/snps-dma.txt
index c0d85dbcada5..5bb3dfb6f1d8 100644
--- a/Documentation/devicetree/bindings/dma/snps-dma.txt
+++ b/Documentation/devicetree/bindings/dma/snps-dma.txt
@@ -6,6 +6,26 @@ Required properties:
6- interrupt-parent: Should be the phandle for the interrupt controller 6- interrupt-parent: Should be the phandle for the interrupt controller
7 that services interrupts for this device 7 that services interrupts for this device
8- interrupt: Should contain the DMAC interrupt number 8- interrupt: Should contain the DMAC interrupt number
9- nr_channels: Number of channels supported by hardware
10- is_private: The device channels should be marked as private and not for by the
11 general purpose DMA channel allocator. False if not passed.
12- chan_allocation_order: order of allocation of channel, 0 (default): ascending,
13 1: descending
14- chan_priority: priority of channels. 0 (default): increase from chan 0->n, 1:
15 increase from chan n->0
16- block_size: Maximum block size supported by the controller
17- nr_masters: Number of AHB masters supported by the controller
18- data_width: Maximum data width supported by hardware per AHB master
19 (0 - 8bits, 1 - 16bits, ..., 5 - 256bits)
20- slave_info:
21 - bus_id: name of this device channel, not just a device name since
22 devices may have more than one channel e.g. "foo_tx". For using the
23 dw_generic_filter(), slave drivers must pass exactly this string as
24 param to filter function.
25 - cfg_hi: Platform-specific initializer for the CFG_HI register
26 - cfg_lo: Platform-specific initializer for the CFG_LO register
27 - src_master: src master for transfers on allocated channel.
28 - dst_master: dest master for transfers on allocated channel.
9 29
10Example: 30Example:
11 31
@@ -14,4 +34,28 @@ Example:
14 reg = <0xfc000000 0x1000>; 34 reg = <0xfc000000 0x1000>;
15 interrupt-parent = <&vic1>; 35 interrupt-parent = <&vic1>;
16 interrupts = <12>; 36 interrupts = <12>;
37
38 nr_channels = <8>;
39 chan_allocation_order = <1>;
40 chan_priority = <1>;
41 block_size = <0xfff>;
42 nr_masters = <2>;
43 data_width = <3 3 0 0>;
44
45 slave_info {
46 uart0-tx {
47 bus_id = "uart0-tx";
48 cfg_hi = <0x4000>; /* 0x8 << 11 */
49 cfg_lo = <0>;
50 src_master = <0>;
51 dst_master = <1>;
52 };
53 spi0-tx {
54 bus_id = "spi0-tx";
55 cfg_hi = <0x2000>; /* 0x4 << 11 */
56 cfg_lo = <0>;
57 src_master = <0>;
58 dst_master = <0>;
59 };
60 };
17 }; 61 };