diff options
author | Kim Phillips <kim.phillips@freescale.com> | 2011-03-23 09:15:44 -0400 |
---|---|---|
committer | Herbert Xu <herbert@gondor.apana.org.au> | 2011-03-26 22:45:17 -0400 |
commit | 54e198d4c162b36ba864ecc658c829454074523f (patch) | |
tree | 8a919e4261ce39b34dffbd8d82eb234b8986f17a /Documentation/devicetree/bindings/crypto | |
parent | 8e8ec596e6c0144e2dd500a57ee23dde9684df46 (diff) |
crypto: caam - standardize device tree naming convention to utilize '-vX.Y'
Help clarify that the number trailing in compatible nomenclature
is the version number of the device, i.e., change:
"fsl,p4080-sec4.0", "fsl,sec4.0";
to:
"fsl,p4080-sec-v4.0", "fsl,sec-v4.0";
Signed-off-by: Kim Phillips <kim.phillips@freescale.com>
Cc: Kumar Gala <kumar.gala@freescale.com>
Cc: Steve Cornelius <sec@pobox.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'Documentation/devicetree/bindings/crypto')
-rw-r--r-- | Documentation/devicetree/bindings/crypto/fsl-sec4.txt | 68 |
1 files changed, 34 insertions, 34 deletions
diff --git a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt index fce16a85e2c5..568aa3cb5276 100644 --- a/Documentation/devicetree/bindings/crypto/fsl-sec4.txt +++ b/Documentation/devicetree/bindings/crypto/fsl-sec4.txt | |||
@@ -53,7 +53,7 @@ PROPERTIES | |||
53 | - compatible | 53 | - compatible |
54 | Usage: required | 54 | Usage: required |
55 | Value type: <string> | 55 | Value type: <string> |
56 | Definition: Must include "fsl,p4080-sec4.0","fsl,sec-4.0" | 56 | Definition: Must include "fsl,p4080-sec-v4.0","fsl,sec-v4.0" |
57 | 57 | ||
58 | - #address-cells | 58 | - #address-cells |
59 | Usage: required | 59 | Usage: required |
@@ -72,7 +72,7 @@ PROPERTIES | |||
72 | Usage: required | 72 | Usage: required |
73 | Value type: <prop-encoded-array> | 73 | Value type: <prop-encoded-array> |
74 | Definition: A standard property. Specifies the physical | 74 | Definition: A standard property. Specifies the physical |
75 | address and length of the SEC4.0 configuration registers. | 75 | address and length of the SEC4 configuration registers. |
76 | registers | 76 | registers |
77 | 77 | ||
78 | - ranges | 78 | - ranges |
@@ -105,7 +105,7 @@ PROPERTIES | |||
105 | 105 | ||
106 | EXAMPLE | 106 | EXAMPLE |
107 | crypto@300000 { | 107 | crypto@300000 { |
108 | compatible = "fsl,p4080-sec4.0", "fsl,sec4.0"; | 108 | compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; |
109 | #address-cells = <1>; | 109 | #address-cells = <1>; |
110 | #size-cells = <1>; | 110 | #size-cells = <1>; |
111 | reg = <0x300000 0x10000>; | 111 | reg = <0x300000 0x10000>; |
@@ -127,7 +127,7 @@ P4080 Job Ring (JR) Node | |||
127 | - compatible | 127 | - compatible |
128 | Usage: required | 128 | Usage: required |
129 | Value type: <string> | 129 | Value type: <string> |
130 | Definition: Must include "fsl,p4080-sec4.0-job-ring","fsl,sec4.0-job-ring" | 130 | Definition: Must include "fsl,p4080-sec-v4.0-job-ring","fsl,sec-v4.0-job-ring" |
131 | 131 | ||
132 | - reg | 132 | - reg |
133 | Usage: required | 133 | Usage: required |
@@ -163,8 +163,8 @@ P4080 Job Ring (JR) Node | |||
163 | 163 | ||
164 | EXAMPLE | 164 | EXAMPLE |
165 | jr@1000 { | 165 | jr@1000 { |
166 | compatible = "fsl,p4080-sec4.0-job-ring", | 166 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
167 | "fsl,sec4.0-job-ring"; | 167 | "fsl,sec-v4.0-job-ring"; |
168 | reg = <0x1000 0x1000>; | 168 | reg = <0x1000 0x1000>; |
169 | fsl,liodn = <0x081>; | 169 | fsl,liodn = <0x081>; |
170 | interrupt-parent = <&mpic>; | 170 | interrupt-parent = <&mpic>; |
@@ -186,7 +186,7 @@ P4080 Run Time Integrity Check (RTIC) Node | |||
186 | - compatible | 186 | - compatible |
187 | Usage: required | 187 | Usage: required |
188 | Value type: <string> | 188 | Value type: <string> |
189 | Definition: Must include "fsl,p4080-sec4.0-rtic","fsl,sec4.0-rtic". | 189 | Definition: Must include "fsl,p4080-sec-v4.0-rtic","fsl,sec-v4.0-rtic". |
190 | 190 | ||
191 | - #address-cells | 191 | - #address-cells |
192 | Usage: required | 192 | Usage: required |
@@ -219,8 +219,8 @@ P4080 Run Time Integrity Check (RTIC) Node | |||
219 | 219 | ||
220 | EXAMPLE | 220 | EXAMPLE |
221 | rtic@6000 { | 221 | rtic@6000 { |
222 | compatible = "fsl,p4080-sec4.0-rtic", | 222 | compatible = "fsl,p4080-sec-v4.0-rtic", |
223 | "fsl,sec4.0-rtic"; | 223 | "fsl,sec-v4.0-rtic"; |
224 | #address-cells = <1>; | 224 | #address-cells = <1>; |
225 | #size-cells = <1>; | 225 | #size-cells = <1>; |
226 | reg = <0x6000 0x100>; | 226 | reg = <0x6000 0x100>; |
@@ -238,7 +238,7 @@ P4080 Run Time Integrity Check (RTIC) Memory Node | |||
238 | - compatible | 238 | - compatible |
239 | Usage: required | 239 | Usage: required |
240 | Value type: <string> | 240 | Value type: <string> |
241 | Definition: Must include "fsl,p4080-sec4.0-rtic-memory","fsl,sec4.0-rtic-memory". | 241 | Definition: Must include "fsl,p4080-sec-v4.0-rtic-memory","fsl,sec-v4.0-rtic-memory". |
242 | 242 | ||
243 | - reg | 243 | - reg |
244 | Usage: required | 244 | Usage: required |
@@ -270,8 +270,8 @@ P4080 Run Time Integrity Check (RTIC) Memory Node | |||
270 | 270 | ||
271 | EXAMPLE | 271 | EXAMPLE |
272 | rtic-a@0 { | 272 | rtic-a@0 { |
273 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 273 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
274 | "fsl,sec4.0-rtic-memory"; | 274 | "fsl,sec-v4.0-rtic-memory"; |
275 | reg = <0x00 0x20 0x100 0x80>; | 275 | reg = <0x00 0x20 0x100 0x80>; |
276 | fsl,liodn = <0x03c>; | 276 | fsl,liodn = <0x03c>; |
277 | fsl,rtic-region = <0x12345678 0x12345678 0x12345678>; | 277 | fsl,rtic-region = <0x12345678 0x12345678 0x12345678>; |
@@ -288,7 +288,7 @@ P4080 Secure Non-Volatile Storage (SNVS) Node | |||
288 | - compatible | 288 | - compatible |
289 | Usage: required | 289 | Usage: required |
290 | Value type: <string> | 290 | Value type: <string> |
291 | Definition: Must include "fsl,p4080-sec4.0-mon", "fsl,sec4.0-mon". | 291 | Definition: Must include "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon". |
292 | 292 | ||
293 | - reg | 293 | - reg |
294 | Usage: required | 294 | Usage: required |
@@ -315,7 +315,7 @@ P4080 Secure Non-Volatile Storage (SNVS) Node | |||
315 | 315 | ||
316 | EXAMPLE | 316 | EXAMPLE |
317 | sec_mon@314000 { | 317 | sec_mon@314000 { |
318 | compatible = "fsl,p4080-sec4.0-mon", "fsl,sec4.0-mon"; | 318 | compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon"; |
319 | reg = <0x314000 0x1000>; | 319 | reg = <0x314000 0x1000>; |
320 | interrupt-parent = <&mpic>; | 320 | interrupt-parent = <&mpic>; |
321 | interrupts = <93 2>; | 321 | interrupts = <93 2>; |
@@ -325,7 +325,7 @@ EXAMPLE | |||
325 | FULL EXAMPLE | 325 | FULL EXAMPLE |
326 | 326 | ||
327 | crypto: crypto@300000 { | 327 | crypto: crypto@300000 { |
328 | compatible = "fsl,p4080-sec4.0", "fsl,sec4.0"; | 328 | compatible = "fsl,p4080-sec-v4.0", "fsl,sec-v4.0"; |
329 | #address-cells = <1>; | 329 | #address-cells = <1>; |
330 | #size-cells = <1>; | 330 | #size-cells = <1>; |
331 | reg = <0x300000 0x10000>; | 331 | reg = <0x300000 0x10000>; |
@@ -334,73 +334,73 @@ FULL EXAMPLE | |||
334 | interrupts = <92 2>; | 334 | interrupts = <92 2>; |
335 | 335 | ||
336 | sec_jr0: jr@1000 { | 336 | sec_jr0: jr@1000 { |
337 | compatible = "fsl,p4080-sec4.0-job-ring", | 337 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
338 | "fsl,sec4.0-job-ring"; | 338 | "fsl,sec-v4.0-job-ring"; |
339 | reg = <0x1000 0x1000>; | 339 | reg = <0x1000 0x1000>; |
340 | interrupt-parent = <&mpic>; | 340 | interrupt-parent = <&mpic>; |
341 | interrupts = <88 2>; | 341 | interrupts = <88 2>; |
342 | }; | 342 | }; |
343 | 343 | ||
344 | sec_jr1: jr@2000 { | 344 | sec_jr1: jr@2000 { |
345 | compatible = "fsl,p4080-sec4.0-job-ring", | 345 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
346 | "fsl,sec4.0-job-ring"; | 346 | "fsl,sec-v4.0-job-ring"; |
347 | reg = <0x2000 0x1000>; | 347 | reg = <0x2000 0x1000>; |
348 | interrupt-parent = <&mpic>; | 348 | interrupt-parent = <&mpic>; |
349 | interrupts = <89 2>; | 349 | interrupts = <89 2>; |
350 | }; | 350 | }; |
351 | 351 | ||
352 | sec_jr2: jr@3000 { | 352 | sec_jr2: jr@3000 { |
353 | compatible = "fsl,p4080-sec4.0-job-ring", | 353 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
354 | "fsl,sec4.0-job-ring"; | 354 | "fsl,sec-v4.0-job-ring"; |
355 | reg = <0x3000 0x1000>; | 355 | reg = <0x3000 0x1000>; |
356 | interrupt-parent = <&mpic>; | 356 | interrupt-parent = <&mpic>; |
357 | interrupts = <90 2>; | 357 | interrupts = <90 2>; |
358 | }; | 358 | }; |
359 | 359 | ||
360 | sec_jr3: jr@4000 { | 360 | sec_jr3: jr@4000 { |
361 | compatible = "fsl,p4080-sec4.0-job-ring", | 361 | compatible = "fsl,p4080-sec-v4.0-job-ring", |
362 | "fsl,sec4.0-job-ring"; | 362 | "fsl,sec-v4.0-job-ring"; |
363 | reg = <0x4000 0x1000>; | 363 | reg = <0x4000 0x1000>; |
364 | interrupt-parent = <&mpic>; | 364 | interrupt-parent = <&mpic>; |
365 | interrupts = <91 2>; | 365 | interrupts = <91 2>; |
366 | }; | 366 | }; |
367 | 367 | ||
368 | rtic@6000 { | 368 | rtic@6000 { |
369 | compatible = "fsl,p4080-sec4.0-rtic", | 369 | compatible = "fsl,p4080-sec-v4.0-rtic", |
370 | "fsl,sec4.0-rtic"; | 370 | "fsl,sec-v4.0-rtic"; |
371 | #address-cells = <1>; | 371 | #address-cells = <1>; |
372 | #size-cells = <1>; | 372 | #size-cells = <1>; |
373 | reg = <0x6000 0x100>; | 373 | reg = <0x6000 0x100>; |
374 | ranges = <0x0 0x6100 0xe00>; | 374 | ranges = <0x0 0x6100 0xe00>; |
375 | 375 | ||
376 | rtic_a: rtic-a@0 { | 376 | rtic_a: rtic-a@0 { |
377 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 377 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
378 | "fsl,sec4.0-rtic-memory"; | 378 | "fsl,sec-v4.0-rtic-memory"; |
379 | reg = <0x00 0x20 0x100 0x80>; | 379 | reg = <0x00 0x20 0x100 0x80>; |
380 | }; | 380 | }; |
381 | 381 | ||
382 | rtic_b: rtic-b@20 { | 382 | rtic_b: rtic-b@20 { |
383 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 383 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
384 | "fsl,sec4.0-rtic-memory"; | 384 | "fsl,sec-v4.0-rtic-memory"; |
385 | reg = <0x20 0x20 0x200 0x80>; | 385 | reg = <0x20 0x20 0x200 0x80>; |
386 | }; | 386 | }; |
387 | 387 | ||
388 | rtic_c: rtic-c@40 { | 388 | rtic_c: rtic-c@40 { |
389 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 389 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
390 | "fsl,sec4.0-rtic-memory"; | 390 | "fsl,sec-v4.0-rtic-memory"; |
391 | reg = <0x40 0x20 0x300 0x80>; | 391 | reg = <0x40 0x20 0x300 0x80>; |
392 | }; | 392 | }; |
393 | 393 | ||
394 | rtic_d: rtic-d@60 { | 394 | rtic_d: rtic-d@60 { |
395 | compatible = "fsl,p4080-sec4.0-rtic-memory", | 395 | compatible = "fsl,p4080-sec-v4.0-rtic-memory", |
396 | "fsl,sec4.0-rtic-memory"; | 396 | "fsl,sec-v4.0-rtic-memory"; |
397 | reg = <0x60 0x20 0x500 0x80>; | 397 | reg = <0x60 0x20 0x500 0x80>; |
398 | }; | 398 | }; |
399 | }; | 399 | }; |
400 | }; | 400 | }; |
401 | 401 | ||
402 | sec_mon: sec_mon@314000 { | 402 | sec_mon: sec_mon@314000 { |
403 | compatible = "fsl,p4080-sec4.0-mon", "fsl,sec4.0-mon"; | 403 | compatible = "fsl,p4080-sec-v4.0-mon", "fsl,sec-v4.0-mon"; |
404 | reg = <0x314000 0x1000>; | 404 | reg = <0x314000 0x1000>; |
405 | interrupt-parent = <&mpic>; | 405 | interrupt-parent = <&mpic>; |
406 | interrupts = <93 2>; | 406 | interrupts = <93 2>; |