diff options
author | Ludovic Desroches <ludovic.desroches@atmel.com> | 2012-06-20 10:13:30 -0400 |
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committer | Nicolas Ferre <nicolas.ferre@atmel.com> | 2012-07-02 08:26:58 -0400 |
commit | f8a073ee378b9893aee0749c3868a6ecfb0c1636 (patch) | |
tree | 7d51d97410bb03bc6ca8b431b3df8592b206b7f7 /Documentation/devicetree/bindings/arm/atmel-aic.txt | |
parent | c65739437045c351a2a0ddb834719b9d616d4d47 (diff) |
ARM: at91: add of irq priorities support
Add a third cell to define irq priority.
Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/atmel-aic.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/atmel-aic.txt | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/atmel-aic.txt b/Documentation/devicetree/bindings/arm/atmel-aic.txt index 1953b0c1b7c5..19078bf5cca8 100644 --- a/Documentation/devicetree/bindings/arm/atmel-aic.txt +++ b/Documentation/devicetree/bindings/arm/atmel-aic.txt | |||
@@ -4,7 +4,7 @@ Required properties: | |||
4 | - compatible: Should be "atmel,<chip>-aic" | 4 | - compatible: Should be "atmel,<chip>-aic" |
5 | - interrupt-controller: Identifies the node as an interrupt controller. | 5 | - interrupt-controller: Identifies the node as an interrupt controller. |
6 | - interrupt-parent: For single AIC system, it is an empty property. | 6 | - interrupt-parent: For single AIC system, it is an empty property. |
7 | - #interrupt-cells: The number of cells to define the interrupts. It sould be 2. | 7 | - #interrupt-cells: The number of cells to define the interrupts. It sould be 3. |
8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). | 8 | The first cell is the IRQ number (aka "Peripheral IDentifier" on datasheet). |
9 | The second cell is used to specify flags: | 9 | The second cell is used to specify flags: |
10 | bits[3:0] trigger type and level flags: | 10 | bits[3:0] trigger type and level flags: |
@@ -14,6 +14,8 @@ Required properties: | |||
14 | 8 = active low level-sensitive. | 14 | 8 = active low level-sensitive. |
15 | Valid combinations are 1, 2, 3, 4, 8. | 15 | Valid combinations are 1, 2, 3, 4, 8. |
16 | Default flag for internal sources should be set to 4 (active high). | 16 | Default flag for internal sources should be set to 4 (active high). |
17 | The third cell is used to specify the irq priority from 0 (lowest) to 7 | ||
18 | (highest). | ||
17 | - reg: Should contain AIC registers location and length | 19 | - reg: Should contain AIC registers location and length |
18 | - atmel,external-irqs: u32 array of external irqs. | 20 | - atmel,external-irqs: u32 array of external irqs. |
19 | 21 | ||
@@ -25,7 +27,7 @@ Examples: | |||
25 | compatible = "atmel,at91rm9200-aic"; | 27 | compatible = "atmel,at91rm9200-aic"; |
26 | interrupt-controller; | 28 | interrupt-controller; |
27 | interrupt-parent; | 29 | interrupt-parent; |
28 | #interrupt-cells = <2>; | 30 | #interrupt-cells = <3>; |
29 | reg = <0xfffff000 0x200>; | 31 | reg = <0xfffff000 0x200>; |
30 | }; | 32 | }; |
31 | 33 | ||
@@ -35,5 +37,5 @@ Examples: | |||
35 | dma: dma-controller@ffffec00 { | 37 | dma: dma-controller@ffffec00 { |
36 | compatible = "atmel,at91sam9g45-dma"; | 38 | compatible = "atmel,at91sam9g45-dma"; |
37 | reg = <0xffffec00 0x200>; | 39 | reg = <0xffffec00 0x200>; |
38 | interrupts = <21 4>; | 40 | interrupts = <21 4 5>; |
39 | }; | 41 | }; |