diff options
author | Mark Rutland <mark.rutland@arm.com> | 2012-11-20 06:44:15 -0500 |
---|---|---|
committer | Mark Rutland <mark.rutland@arm.com> | 2013-01-31 10:51:59 -0500 |
commit | c2b01e06a9c97cf21ad44b91b3280b0797839a62 (patch) | |
tree | 4961bcf42a0cb37b6ef96744051a3d673552ecc5 /Documentation/devicetree/bindings/arm/arch_timer.txt | |
parent | 1aee5d7a8120cbe3eca9180ef9276d75a4f51dd2 (diff) |
Documentation: Add ARMv8 to arch_timer devicetree
Currently the documentation for the arch_timer devicetree binding only
lists "arm,armv7-timer".
Add "arm,armv8-timer" to the list of compatible strings.
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Acked-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'Documentation/devicetree/bindings/arm/arch_timer.txt')
-rw-r--r-- | Documentation/devicetree/bindings/arm/arch_timer.txt | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/Documentation/devicetree/bindings/arm/arch_timer.txt b/Documentation/devicetree/bindings/arm/arch_timer.txt index 52478c83d0cc..20746e5abe6f 100644 --- a/Documentation/devicetree/bindings/arm/arch_timer.txt +++ b/Documentation/devicetree/bindings/arm/arch_timer.txt | |||
@@ -1,13 +1,14 @@ | |||
1 | * ARM architected timer | 1 | * ARM architected timer |
2 | 2 | ||
3 | ARM Cortex-A7 and Cortex-A15 have a per-core architected timer, which | 3 | ARM cores may have a per-core architected timer, which provides per-cpu timers. |
4 | provides per-cpu timers. | ||
5 | 4 | ||
6 | The timer is attached to a GIC to deliver its per-processor interrupts. | 5 | The timer is attached to a GIC to deliver its per-processor interrupts. |
7 | 6 | ||
8 | ** Timer node properties: | 7 | ** Timer node properties: |
9 | 8 | ||
10 | - compatible : Should at least contain "arm,armv7-timer". | 9 | - compatible : Should at least contain one of |
10 | "arm,armv7-timer" | ||
11 | "arm,armv8-timer" | ||
11 | 12 | ||
12 | - interrupts : Interrupt list for secure, non-secure, virtual and | 13 | - interrupts : Interrupt list for secure, non-secure, virtual and |
13 | hypervisor timers, in that order. | 14 | hypervisor timers, in that order. |