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authorJames Hogan <james.hogan@imgtec.com>2013-07-29 07:25:00 -0400
committerMike Turquette <mturquette@linaro.org>2013-08-19 15:27:17 -0400
commit71472c0c06cf9a3d1540762ea205654c584e3bc4 (patch)
tree22db34b3c7bc0d0053fcfac2c95d77adf09107de /Documentation/clk.txt
parent4935b22c46ea5e2dc44ef0b72db50741649eb3a4 (diff)
clk: add support for clock reparent on set_rate
Add core support to allow clock implementations to select the best parent clock when rounding a rate, e.g. the one which can provide the closest clock rate to that requested. This is by way of adding a new clock op, determine_rate(), which is like round_rate() but has an extra parameter to allow the clock implementation to optionally select a different parent clock. The core then takes care of reparenting the clock when setting the rate. The parent change takes place with the help of some new private data members. struct clk::new_parent specifies a clock's new parent (NULL indicates no change), and struct clk::new_child specifies a clock's new child (whose new_parent member points back to it). The purpose of these are to allow correct walking of the future tree for notifications prior to actually reparenting any clocks, specifically to skip child clocks who are being reparented to another clock (they will be notified via the new parent), and to include any new child clock. These pointers are set by clk_calc_subtree(), and the new_child pointer gets cleared when a child is actually reparented to avoid duplicate POST_RATE_CHANGE notifications. Each place where round_rate() is called, determine_rate() is checked first and called in preference. This restructures a few of the call sites to simplify the logic into if/else blocks. Signed-off-by: James Hogan <james.hogan@imgtec.com> Reviewed-by: Stephen Boyd <sboyd@codeaurora.org> Cc: Mike Turquette <mturquette@linaro.org> Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Mike Turquette <mturquette@linaro.org>
Diffstat (limited to 'Documentation/clk.txt')
-rw-r--r--Documentation/clk.txt46
1 files changed, 26 insertions, 20 deletions
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
index 6f68ba0d1e01..3aeb5c440442 100644
--- a/Documentation/clk.txt
+++ b/Documentation/clk.txt
@@ -70,6 +70,10 @@ the operations defined in clk.h:
70 unsigned long parent_rate); 70 unsigned long parent_rate);
71 long (*round_rate)(struct clk_hw *hw, unsigned long, 71 long (*round_rate)(struct clk_hw *hw, unsigned long,
72 unsigned long *); 72 unsigned long *);
73 long (*determine_rate)(struct clk_hw *hw,
74 unsigned long rate,
75 unsigned long *best_parent_rate,
76 struct clk **best_parent_clk);
73 int (*set_parent)(struct clk_hw *hw, u8 index); 77 int (*set_parent)(struct clk_hw *hw, u8 index);
74 u8 (*get_parent)(struct clk_hw *hw); 78 u8 (*get_parent)(struct clk_hw *hw);
75 int (*set_rate)(struct clk_hw *hw, unsigned long); 79 int (*set_rate)(struct clk_hw *hw, unsigned long);
@@ -179,26 +183,28 @@ mandatory, a cell marked as "n" implies that either including that
179callback is invalid or otherwise unnecessary. Empty cells are either 183callback is invalid or otherwise unnecessary. Empty cells are either
180optional or must be evaluated on a case-by-case basis. 184optional or must be evaluated on a case-by-case basis.
181 185
182 clock hardware characteristics 186 clock hardware characteristics
183 ----------------------------------------------------------- 187 -----------------------------------------------------------
184 | gate | change rate | single parent | multiplexer | root | 188 | gate | change rate | single parent | multiplexer | root |
185 |------|-------------|---------------|-------------|------| 189 |------|-------------|---------------|-------------|------|
186.prepare | | | | | | 190.prepare | | | | | |
187.unprepare | | | | | | 191.unprepare | | | | | |
188 | | | | | | 192 | | | | | |
189.enable | y | | | | | 193.enable | y | | | | |
190.disable | y | | | | | 194.disable | y | | | | |
191.is_enabled | y | | | | | 195.is_enabled | y | | | | |
192 | | | | | | 196 | | | | | |
193.recalc_rate | | y | | | | 197.recalc_rate | | y | | | |
194.round_rate | | y | | | | 198.round_rate | | y [1] | | | |
195.set_rate | | y | | | | 199.determine_rate | | y [1] | | | |
196 | | | | | | 200.set_rate | | y | | | |
197.set_parent | | | n | y | n | 201 | | | | | |
198.get_parent | | | n | y | n | 202.set_parent | | | n | y | n |
199 | | | | | | 203.get_parent | | | n | y | n |
200.init | | | | | | 204 | | | | | |
201 ----------------------------------------------------------- 205.init | | | | | |
206 -----------------------------------------------------------
207[1] either one of round_rate or determine_rate is required.
202 208
203Finally, register your clock at run-time with a hardware-specific 209Finally, register your clock at run-time with a hardware-specific
204registration function. This function simply populates struct clk_foo's 210registration function. This function simply populates struct clk_foo's