diff options
author | Dave Martin <dave.martin@linaro.org> | 2012-02-10 21:07:07 -0500 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2012-09-19 03:32:51 -0400 |
commit | 6a6d55c38c8b4ee77b50a33f03ea09e75b18bf82 (patch) | |
tree | 5aa95a02f40aabc081fef2d454baaa3009352163 /Documentation/arm | |
parent | 424e5994e63326a42012f003f1174f3c363c7b62 (diff) |
ARM: virt: Update documentation for hyp mode entry support
Document the possibility of the kernel being entered in HYP mode.
Signed-off-by: Dave Martin <dave.martin@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Diffstat (limited to 'Documentation/arm')
-rw-r--r-- | Documentation/arm/Booting | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/Documentation/arm/Booting b/Documentation/arm/Booting index a341d87d276e..0c1f475fdf36 100644 --- a/Documentation/arm/Booting +++ b/Documentation/arm/Booting | |||
@@ -154,13 +154,33 @@ In either case, the following conditions must be met: | |||
154 | 154 | ||
155 | - CPU mode | 155 | - CPU mode |
156 | All forms of interrupts must be disabled (IRQs and FIQs) | 156 | All forms of interrupts must be disabled (IRQs and FIQs) |
157 | The CPU must be in SVC mode. (A special exception exists for Angel) | 157 | |
158 | For CPUs which do not include the ARM virtualization extensions, the | ||
159 | CPU must be in SVC mode. (A special exception exists for Angel) | ||
160 | |||
161 | CPUs which include support for the virtualization extensions can be | ||
162 | entered in HYP mode in order to enable the kernel to make full use of | ||
163 | these extensions. This is the recommended boot method for such CPUs, | ||
164 | unless the virtualisations are already in use by a pre-installed | ||
165 | hypervisor. | ||
166 | |||
167 | If the kernel is not entered in HYP mode for any reason, it must be | ||
168 | entered in SVC mode. | ||
158 | 169 | ||
159 | - Caches, MMUs | 170 | - Caches, MMUs |
160 | The MMU must be off. | 171 | The MMU must be off. |
161 | Instruction cache may be on or off. | 172 | Instruction cache may be on or off. |
162 | Data cache must be off. | 173 | Data cache must be off. |
163 | 174 | ||
175 | If the kernel is entered in HYP mode, the above requirements apply to | ||
176 | the HYP mode configuration in addition to the ordinary PL1 (privileged | ||
177 | kernel modes) configuration. In addition, all traps into the | ||
178 | hypervisor must be disabled, and PL1 access must be granted for all | ||
179 | peripherals and CPU resources for which this is architecturally | ||
180 | possible. Except for entering in HYP mode, the system configuration | ||
181 | should be such that a kernel which does not include support for the | ||
182 | virtualization extensions can boot correctly without extra help. | ||
183 | |||
164 | - The boot loader is expected to call the kernel image by jumping | 184 | - The boot loader is expected to call the kernel image by jumping |
165 | directly to the first instruction of the kernel image. | 185 | directly to the first instruction of the kernel image. |
166 | 186 | ||