Merge commit 'v2.6.30-rc1' into sched/urgent

Merge reason: update to latest upstream to queue up fix

Signed-off-by: Ingo Molnar <mingo@elte.hu>

1 files changed, 8 insertions, 1 deletions

diff --git a/Documentation/arm/memory.txt b/Documentation/arm/memory.txt
index dc6045577a8b..43cb1004d35f 100644
--- a/Documentation/arm/memory.txt
+++ b/Documentation/arm/memory.txt
@@ -29,7 +29,14 @@ ffff0000	ffff0fff	CPU vector page.
                                 CPU supports vector relocation (control
                                 register V bit.)
 
-ffc00000        fffeffff        DMA memory mapping region.  Memory returned
+fffe0000        fffeffff        XScale cache flush area.  This is used
+                                in proc-xscale.S to flush the whole data
+                                cache.  Free for other usage on non-XScale.
+
+fff00000        fffdffff        Fixmap mapping region.  Addresses provided
+                                by fix_to_virt() will be located here.
+
+ffc00000        ffefffff        DMA memory mapping region.  Memory returned
                                 by the dma_alloc_xxx functions will be
                                 dynamically mapped here.