aboutsummaryrefslogtreecommitdiffstats
path: root/Documentation/arm/Samsung-S3C24XX
diff options
context:
space:
mode:
authorBen Dooks <ben-linux@fluff.org>2007-02-13 07:02:52 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2007-02-14 10:04:22 -0500
commit0c6022d453ecebdace0ce15434c7108e158149ca (patch)
tree153ce6dd661059601fa8591d36e0b81c6663566a /Documentation/arm/Samsung-S3C24XX
parentd2a76020e3a52c6370a7d603082b4cdb3db0703e (diff)
[ARM] 4177/1: S3C24XX: Add DMA channel allocation order
Allow the CPU code, and any board specific initialisation code to change the allocation order of the DMA channels, or stop a peripheral allocating any DMA at-all. This is due to the scarce mapping of DMA channels on some earlier S3C24XX cpus, where the selection changes depending on the channel in use. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'Documentation/arm/Samsung-S3C24XX')
-rw-r--r--Documentation/arm/Samsung-S3C24XX/DMA.txt46
1 files changed, 46 insertions, 0 deletions
diff --git a/Documentation/arm/Samsung-S3C24XX/DMA.txt b/Documentation/arm/Samsung-S3C24XX/DMA.txt
new file mode 100644
index 000000000000..37f4edcc5d87
--- /dev/null
+++ b/Documentation/arm/Samsung-S3C24XX/DMA.txt
@@ -0,0 +1,46 @@
1 S3C2410 DMA
2 ===========
3
4Introduction
5------------
6
7 The kernel provides an interface to manage DMA transfers
8 using the DMA channels in the cpu, so that the central
9 duty of managing channel mappings, and programming the
10 channel generators is in one place.
11
12
13DMA Channel Ordering
14--------------------
15
16 Many of the range do not have connections for the DMA
17 channels to all sources, which means that some devices
18 have a restricted number of channels that can be used.
19
20 To allow flexibilty for each cpu type and board, the
21 dma code can be given an dma ordering structure which
22 allows the order of channel search to be specified, as
23 well as allowing the prohibition of certain claims.
24
25 struct s3c24xx_dma_order has a list of channels, and
26 each channel within has a slot for a list of dma
27 channel numbers. The slots are searched in order, for
28 the presence of a dma channel number with DMA_CH_VALID
29 orred in.
30
31 If the order has the flag DMA_CH_NEVER set, then after
32 checking the channel list, the system will return no
33 found channel, thus denying the request.
34
35 A board support file can call s3c24xx_dma_order_set()
36 to register an complete ordering set. The routine will
37 copy the data, so the original can be discared with
38 __initdata.
39
40
41Authour
42-------
43
44Ben Dooks,
45Copyright (c) 2007 Ben Dooks, Simtec Electronics
46Licensed under the GPL v2