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authorAdrian Bunk <bunk@stusta.de>2006-06-30 12:23:39 -0400
committerAdrian Bunk <bunk@stusta.de>2006-06-30 12:23:39 -0400
commitfd245f00695cbcf0f8430f35841c216559d243df (patch)
tree20d1a5a98e5d626ce8215316b16c8cdf392995a7 /Documentation/arm/IXP4xx
parent0418726bb5c7b5a70c7e7e82e860d5979d0c78cf (diff)
typo fixes: disadvantadge -> disadvantage
Signed-off-by: Adrian Bunk <bunk@stusta.de>
Diffstat (limited to 'Documentation/arm/IXP4xx')
-rw-r--r--Documentation/arm/IXP4xx2
1 files changed, 1 insertions, 1 deletions
diff --git a/Documentation/arm/IXP4xx b/Documentation/arm/IXP4xx
index d4c6d3aa0c25..43edb4ecf27d 100644
--- a/Documentation/arm/IXP4xx
+++ b/Documentation/arm/IXP4xx
@@ -85,7 +85,7 @@ IXP4xx provides two methods of accessing PCI memory space:
852) If > 64MB of memory space is required, the IXP4xx can be 852) If > 64MB of memory space is required, the IXP4xx can be
86 configured to use indirect registers to access PCI This allows 86 configured to use indirect registers to access PCI This allows
87 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. 87 for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus.
88 The disadvantadge of this is that every PCI access requires 88 The disadvantage of this is that every PCI access requires
89 three local register accesses plus a spinlock, but in some 89 three local register accesses plus a spinlock, but in some
90 cases the performance hit is acceptable. In addition, you cannot 90 cases the performance hit is acceptable. In addition, you cannot
91 mmap() PCI devices in this case due to the indirect nature 91 mmap() PCI devices in this case due to the indirect nature