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authorpeter fuerst <post@pfrst.de>2009-05-17 17:49:45 -0400
committerRalf Baechle <ralf@linux-mips.org>2009-05-20 13:53:13 -0400
commit195d1a96ae5fdfbedb8dc4b97afee578921fa99e (patch)
treef4b258b69a1f1132d958ea23e6097e7b0609ad3d /Documentation/PCI/pcieaer-howto.txt
parent7e9e05cad94217498e4d9bd6ef7137b4e9e7ed64 (diff)
MIPS: IP28: Change to build with -mr10k-cache-barrier=store
Richard Sandiford's new code for inserting the cache-barriers, for GCC 4.3 and above and already incorporated in the current GCC-release, uses a slightly different option-syntax. Signed-off-by: peter fuerst <post@pfrst.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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