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authorDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
committerDan Williams <dan.j.williams@intel.com>2009-09-08 20:55:21 -0400
commitbbb20089a3275a19e475dbc21320c3742e3ca423 (patch)
tree216fdc1cbef450ca688135c5b8969169482d9a48 /Documentation/CodingStyle
parent3e48e656903e9fd8bc805c6a2c4264d7808d315b (diff)
parent657a77fa7284d8ae28dfa48f1dc5d919bf5b2843 (diff)
Merge branch 'dmaengine' into async-tx-next
Conflicts: crypto/async_tx/async_xor.c drivers/dma/ioat/dma_v2.h drivers/dma/ioat/pci.c drivers/md/raid5.c
Diffstat (limited to 'Documentation/CodingStyle')
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1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/CodingStyle b/Documentation/CodingStyle
index 72968cd5eaf3..8bb37237ebd2 100644
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@@ -698,8 +698,8 @@ very often is not. Abundant use of the inline keyword leads to a much bigger
698kernel, which in turn slows the system as a whole down, due to a bigger 698kernel, which in turn slows the system as a whole down, due to a bigger
699icache footprint for the CPU and simply because there is less memory 699icache footprint for the CPU and simply because there is less memory
700available for the pagecache. Just think about it; a pagecache miss causes a 700available for the pagecache. Just think about it; a pagecache miss causes a
701disk seek, which easily takes 5 miliseconds. There are a LOT of cpu cycles 701disk seek, which easily takes 5 milliseconds. There are a LOT of cpu cycles
702that can go into these 5 miliseconds. 702that can go into these 5 milliseconds.
703 703
704A reasonable rule of thumb is to not put inline at functions that have more 704A reasonable rule of thumb is to not put inline at functions that have more
705than 3 lines of code in them. An exception to this rule are the cases where 705than 3 lines of code in them. An exception to this rule are the cases where