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authorBarry Kasindorf <barry.kasindorf@amd.com>2007-12-18 12:05:58 -0500
committerIngo Molnar <mingo@elte.hu>2007-12-18 12:05:58 -0500
commitbd87f1f028ddaad45d4a9a3621dfe688c840ba41 (patch)
tree528336f9c84af3df2939df3ffa5e0411347e991d /CREDITS
parentc63a1190368771b8207d86c4217ae4afdf1cbd5e (diff)
oprofile: op_model_athlon.c support for AMD family 10h barcelona performance counters
This patch is for controlling the upper 32bits of the event ctrl msrs. This includes the upper 4 bits of the event select and the Guest Only and Host Only bits This patch is necessary to make Event Based Profiling work reliably on a Family 10h processor [akpm@linux-foundation.org: checkpatch.pl fixes] Signed-off-by: Barry Kasindorf <barry.kasindorf@amd.com> Signed-off-by: Robert Richter <robert.richter@amd.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
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