diff options
author | Andy Walls <awalls@radix.net> | 2010-01-03 21:28:18 -0500 |
---|---|---|
committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2010-02-26 13:10:30 -0500 |
commit | f05b7f5ee19de6de972020ea18e6c30b672d401b (patch) | |
tree | 7e51166d129f564784672186a7217b94cb75e770 | |
parent | a8073119d69d0b4aa8f445ed4d7d56b89b602708 (diff) |
V4L/DVB (13913): saa7127: Add support for generating SECAM output for the SAA712[89] chips
This change fixes up saa7127_s_std() generate SECAM out, if the user has
requested a 50 Hz video standard set that only contains a request for SECAM
standards and not PAL. Only the SAA712[89] chips can generate SECAM, the
SAA712[67] chips cannot.
I was unclear on the burst start and end values - I couldn't figure out
the units - so I left them the same as for the PAL systems.
A the video decoders on both a PVR-350 (SAA7115) and an HVR-1600 (CX23418)
identify the SECAM signal generated by a SAA7129 with this patch as SECAM.
Signed-off-by: Andy Walls <awalls@radix.net>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
-rw-r--r-- | drivers/media/video/saa7127.c | 47 |
1 files changed, 40 insertions, 7 deletions
diff --git a/drivers/media/video/saa7127.c b/drivers/media/video/saa7127.c index 2fe7a701b954..250ef84cf5ca 100644 --- a/drivers/media/video/saa7127.c +++ b/drivers/media/video/saa7127.c | |||
@@ -181,7 +181,7 @@ static const struct i2c_reg_value saa7127_init_config_common[] = { | |||
181 | #define SAA7127_60HZ_DAC_CONTROL 0x15 | 181 | #define SAA7127_60HZ_DAC_CONTROL 0x15 |
182 | static const struct i2c_reg_value saa7127_init_config_60hz[] = { | 182 | static const struct i2c_reg_value saa7127_init_config_60hz[] = { |
183 | { SAA7127_REG_BURST_START, 0x19 }, | 183 | { SAA7127_REG_BURST_START, 0x19 }, |
184 | /* BURST_END is also used as a chip ID in saa7127_detect_client */ | 184 | /* BURST_END is also used as a chip ID in saa7127_probe */ |
185 | { SAA7127_REG_BURST_END, 0x1d }, | 185 | { SAA7127_REG_BURST_END, 0x1d }, |
186 | { SAA7127_REG_CHROMA_PHASE, 0xa3 }, | 186 | { SAA7127_REG_CHROMA_PHASE, 0xa3 }, |
187 | { SAA7127_REG_GAINU, 0x98 }, | 187 | { SAA7127_REG_GAINU, 0x98 }, |
@@ -200,10 +200,10 @@ static const struct i2c_reg_value saa7127_init_config_60hz[] = { | |||
200 | { 0, 0 } | 200 | { 0, 0 } |
201 | }; | 201 | }; |
202 | 202 | ||
203 | #define SAA7127_50HZ_DAC_CONTROL 0x02 | 203 | #define SAA7127_50HZ_PAL_DAC_CONTROL 0x02 |
204 | static struct i2c_reg_value saa7127_init_config_50hz[] = { | 204 | static struct i2c_reg_value saa7127_init_config_50hz_pal[] = { |
205 | { SAA7127_REG_BURST_START, 0x21 }, | 205 | { SAA7127_REG_BURST_START, 0x21 }, |
206 | /* BURST_END is also used as a chip ID in saa7127_detect_client */ | 206 | /* BURST_END is also used as a chip ID in saa7127_probe */ |
207 | { SAA7127_REG_BURST_END, 0x1d }, | 207 | { SAA7127_REG_BURST_END, 0x1d }, |
208 | { SAA7127_REG_CHROMA_PHASE, 0x3f }, | 208 | { SAA7127_REG_CHROMA_PHASE, 0x3f }, |
209 | { SAA7127_REG_GAINU, 0x7d }, | 209 | { SAA7127_REG_GAINU, 0x7d }, |
@@ -222,6 +222,28 @@ static struct i2c_reg_value saa7127_init_config_50hz[] = { | |||
222 | { 0, 0 } | 222 | { 0, 0 } |
223 | }; | 223 | }; |
224 | 224 | ||
225 | #define SAA7127_50HZ_SECAM_DAC_CONTROL 0x08 | ||
226 | static struct i2c_reg_value saa7127_init_config_50hz_secam[] = { | ||
227 | { SAA7127_REG_BURST_START, 0x21 }, | ||
228 | /* BURST_END is also used as a chip ID in saa7127_probe */ | ||
229 | { SAA7127_REG_BURST_END, 0x1d }, | ||
230 | { SAA7127_REG_CHROMA_PHASE, 0x3f }, | ||
231 | { SAA7127_REG_GAINU, 0x6a }, | ||
232 | { SAA7127_REG_GAINV, 0x81 }, | ||
233 | { SAA7127_REG_BLACK_LEVEL, 0x33 }, | ||
234 | { SAA7127_REG_BLANKING_LEVEL, 0x35 }, | ||
235 | { SAA7127_REG_VBI_BLANKING, 0x35 }, | ||
236 | { SAA7127_REG_DAC_CONTROL, 0x08 }, | ||
237 | { SAA7127_REG_BURST_AMP, 0x2f }, | ||
238 | { SAA7127_REG_SUBC3, 0xb2 }, | ||
239 | { SAA7127_REG_SUBC2, 0x3b }, | ||
240 | { SAA7127_REG_SUBC1, 0xa3 }, | ||
241 | { SAA7127_REG_SUBC0, 0x28 }, | ||
242 | { SAA7127_REG_MULTI, 0x90 }, | ||
243 | { SAA7127_REG_CLOSED_CAPTION, 0x00 }, | ||
244 | { 0, 0 } | ||
245 | }; | ||
246 | |||
225 | /* | 247 | /* |
226 | ********************************************************************** | 248 | ********************************************************************** |
227 | * | 249 | * |
@@ -463,10 +485,21 @@ static int saa7127_set_std(struct v4l2_subdev *sd, v4l2_std_id std) | |||
463 | v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n"); | 485 | v4l2_dbg(1, debug, sd, "Selecting 60 Hz video Standard\n"); |
464 | inittab = saa7127_init_config_60hz; | 486 | inittab = saa7127_init_config_60hz; |
465 | state->reg_61 = SAA7127_60HZ_DAC_CONTROL; | 487 | state->reg_61 = SAA7127_60HZ_DAC_CONTROL; |
488 | |||
489 | } else if (state->ident == V4L2_IDENT_SAA7129 && | ||
490 | (std & V4L2_STD_SECAM) && | ||
491 | !(std & (V4L2_STD_625_50 & ~V4L2_STD_SECAM))) { | ||
492 | |||
493 | /* If and only if SECAM, with a SAA712[89] */ | ||
494 | v4l2_dbg(1, debug, sd, | ||
495 | "Selecting 50 Hz SECAM video Standard\n"); | ||
496 | inittab = saa7127_init_config_50hz_secam; | ||
497 | state->reg_61 = SAA7127_50HZ_SECAM_DAC_CONTROL; | ||
498 | |||
466 | } else { | 499 | } else { |
467 | v4l2_dbg(1, debug, sd, "Selecting 50 Hz video Standard\n"); | 500 | v4l2_dbg(1, debug, sd, "Selecting 50 Hz PAL video Standard\n"); |
468 | inittab = saa7127_init_config_50hz; | 501 | inittab = saa7127_init_config_50hz_pal; |
469 | state->reg_61 = SAA7127_50HZ_DAC_CONTROL; | 502 | state->reg_61 = SAA7127_50HZ_PAL_DAC_CONTROL; |
470 | } | 503 | } |
471 | 504 | ||
472 | /* Write Table */ | 505 | /* Write Table */ |