diff options
author | Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> | 2014-04-24 17:54:58 -0400 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-04-25 07:07:32 -0400 |
commit | c2f07fe64dc0da6d4ccc02d858695356bd685aeb (patch) | |
tree | 90016fd73c4038c0b2de98e92412fa6833b63174 | |
parent | 556d3f7f4d791cae54fd24ef28296e666f4c96a6 (diff) |
ARM: 8038/1: iwmmxt: explicitly check for supported architectures
iwmmxt.S requires special treatment of coprocessor access registers
for PJ4 and XScale-based CPUs. It only checks for CPU_PJ4 and drops
down to XScale-based treatment on all other architectures.
As some PJ4B also come with iWMMXt and also need PJ4 treatment,
rework the corresponding preprocessor directives to explicitly
check for supported architectures and fail on unsupported ones.
Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Tested-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Kevin Hilman <khilman@linaro.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
-rw-r--r-- | arch/arm/kernel/iwmmxt.S | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/kernel/iwmmxt.S b/arch/arm/kernel/iwmmxt.S index a08783823b32..2452dd1bef53 100644 --- a/arch/arm/kernel/iwmmxt.S +++ b/arch/arm/kernel/iwmmxt.S | |||
@@ -19,12 +19,16 @@ | |||
19 | #include <asm/thread_info.h> | 19 | #include <asm/thread_info.h> |
20 | #include <asm/asm-offsets.h> | 20 | #include <asm/asm-offsets.h> |
21 | 21 | ||
22 | #if defined(CONFIG_CPU_PJ4) | 22 | #if defined(CONFIG_CPU_PJ4) || defined(CONFIG_CPU_PJ4B) |
23 | #define PJ4(code...) code | 23 | #define PJ4(code...) code |
24 | #define XSC(code...) | 24 | #define XSC(code...) |
25 | #else | 25 | #elif defined(CONFIG_CPU_MOHAWK) || \ |
26 | defined(CONFIG_CPU_XSC3) || \ | ||
27 | defined(CONFIG_CPU_XSCALE) | ||
26 | #define PJ4(code...) | 28 | #define PJ4(code...) |
27 | #define XSC(code...) code | 29 | #define XSC(code...) code |
30 | #else | ||
31 | #error "Unsupported iWMMXt architecture" | ||
28 | #endif | 32 | #endif |
29 | 33 | ||
30 | #define MMX_WR0 (0x00) | 34 | #define MMX_WR0 (0x00) |