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authorAnton Vorontsov <avorontsov@mvista.com>2010-08-11 12:56:03 -0400
committerGrant Likely <grant.likely@secretlab.ca>2010-08-16 16:55:42 -0400
commitb9e0ba8114583b0462cfb18b4ca01fc82894c5c0 (patch)
treee67ae9f8bd9f42ef8ab12deca8b4ad754b97f819
parentda5cabf80e2433131bf0ed8993abc0f7ea618c73 (diff)
booting-without-of: Remove nonexistent chapters from TOC, fix numbering
Marvell and GPIO bindings live in their own files, so the TOC should not mention them. Also fix chapters numbering. Signed-off-by: Anton Vorontsov <avorontsov@mvista.com> Signed-off-by: Grant Likely <grant.likely@secretlab.ca>
-rw-r--r--Documentation/powerpc/booting-without-of.txt31
1 files changed, 2 insertions, 29 deletions
diff --git a/Documentation/powerpc/booting-without-of.txt b/Documentation/powerpc/booting-without-of.txt
index 568fa08e82e5..302db5da49b3 100644
--- a/Documentation/powerpc/booting-without-of.txt
+++ b/Documentation/powerpc/booting-without-of.txt
@@ -49,40 +49,13 @@ Table of Contents
49 f) MDIO on GPIOs 49 f) MDIO on GPIOs
50 g) SPI busses 50 g) SPI busses
51 51
52 VII - Marvell Discovery mv64[345]6x System Controller chips 52 VII - Specifying interrupt information for devices
53 1) The /system-controller node
54 2) Child nodes of /system-controller
55 a) Marvell Discovery MDIO bus
56 b) Marvell Discovery ethernet controller
57 c) Marvell Discovery PHY nodes
58 d) Marvell Discovery SDMA nodes
59 e) Marvell Discovery BRG nodes
60 f) Marvell Discovery CUNIT nodes
61 g) Marvell Discovery MPSCROUTING nodes
62 h) Marvell Discovery MPSCINTR nodes
63 i) Marvell Discovery MPSC nodes
64 j) Marvell Discovery Watch Dog Timer nodes
65 k) Marvell Discovery I2C nodes
66 l) Marvell Discovery PIC (Programmable Interrupt Controller) nodes
67 m) Marvell Discovery MPP (Multipurpose Pins) multiplexing nodes
68 n) Marvell Discovery GPP (General Purpose Pins) nodes
69 o) Marvell Discovery PCI host bridge node
70 p) Marvell Discovery CPU Error nodes
71 q) Marvell Discovery SRAM Controller nodes
72 r) Marvell Discovery PCI Error Handler nodes
73 s) Marvell Discovery Memory Controller nodes
74
75 VIII - Specifying interrupt information for devices
76 1) interrupts property 53 1) interrupts property
77 2) interrupt-parent property 54 2) interrupt-parent property
78 3) OpenPIC Interrupt Controllers 55 3) OpenPIC Interrupt Controllers
79 4) ISA Interrupt Controllers 56 4) ISA Interrupt Controllers
80 57
81 IX - Specifying GPIO information for devices 58 VIII - Specifying device power management information (sleep property)
82 1) gpios property
83 2) gpio-controller nodes
84
85 X - Specifying device power management information (sleep property)
86 59
87 Appendix A - Sample SOC node for MPC8540 60 Appendix A - Sample SOC node for MPC8540
88 61