diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2014-05-12 00:12:32 -0400 |
---|---|---|
committer | Ben Skeggs <bskeggs@redhat.com> | 2014-06-10 02:05:51 -0400 |
commit | 7dc351b3537b10db12b748defeecb135cee8f571 (patch) | |
tree | 233d0a1d1c7a1c89b811a1bfa30b1b072c51cd15 | |
parent | 964f85ec51c860c813858a9950c5eda9311410d5 (diff) |
drm/gk104/gpio: fix incorrect interrupt register usage
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r-- | drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c index 16b8c5bf5efa..8988621373b0 100644 --- a/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c +++ b/drivers/gpu/drm/nouveau/core/subdev/gpio/nve0.c | |||
@@ -44,7 +44,7 @@ nve0_gpio_intr(struct nouveau_subdev *subdev) | |||
44 | } | 44 | } |
45 | 45 | ||
46 | nv_wr32(priv, 0xdc00, intr0); | 46 | nv_wr32(priv, 0xdc00, intr0); |
47 | nv_wr32(priv, 0xdc88, intr1); | 47 | nv_wr32(priv, 0xdc80, intr1); |
48 | } | 48 | } |
49 | 49 | ||
50 | void | 50 | void |
@@ -52,8 +52,8 @@ nve0_gpio_intr_enable(struct nouveau_event *event, int line) | |||
52 | { | 52 | { |
53 | const u32 addr = line < 16 ? 0xdc00 : 0xdc80; | 53 | const u32 addr = line < 16 ? 0xdc00 : 0xdc80; |
54 | const u32 mask = 0x00010001 << (line & 0xf); | 54 | const u32 mask = 0x00010001 << (line & 0xf); |
55 | nv_wr32(event->priv, addr + 0x08, mask); | 55 | nv_wr32(event->priv, addr + 0x00, mask); |
56 | nv_mask(event->priv, addr + 0x00, mask, mask); | 56 | nv_mask(event->priv, addr + 0x08, mask, mask); |
57 | } | 57 | } |
58 | 58 | ||
59 | void | 59 | void |
@@ -61,8 +61,8 @@ nve0_gpio_intr_disable(struct nouveau_event *event, int line) | |||
61 | { | 61 | { |
62 | const u32 addr = line < 16 ? 0xdc00 : 0xdc80; | 62 | const u32 addr = line < 16 ? 0xdc00 : 0xdc80; |
63 | const u32 mask = 0x00010001 << (line & 0xf); | 63 | const u32 mask = 0x00010001 << (line & 0xf); |
64 | nv_wr32(event->priv, addr + 0x08, mask); | 64 | nv_mask(event->priv, addr + 0x08, mask, 0x00000000); |
65 | nv_mask(event->priv, addr + 0x00, mask, 0x00000000); | 65 | nv_wr32(event->priv, addr + 0x00, mask); |
66 | } | 66 | } |
67 | 67 | ||
68 | int | 68 | int |