diff options
author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-04-15 04:58:41 -0400 |
---|---|---|
committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2011-05-11 07:20:16 -0400 |
commit | 65c62bb953d216aaf0e22692e8e12e5c568a3b02 (patch) | |
tree | 2d86d4ac5f7acdbb2469a9ee3347cfc1f23f4ef2 | |
parent | 24c1ae4191e911caa08b31079d61ff4db319a101 (diff) |
OMAP: DSS2: DSI: fix CIO init and uninit
Use dsi_enable_scp_clk and dsi_disable_scp_clk in CIO init and uninit,
and improve the CIO init by adding a few status checks and error
handling.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
-rw-r--r-- | drivers/video/omap2/dss/dsi.c | 54 |
1 files changed, 29 insertions, 25 deletions
diff --git a/drivers/video/omap2/dss/dsi.c b/drivers/video/omap2/dss/dsi.c index 1198974c8892..f42196284443 100644 --- a/drivers/video/omap2/dss/dsi.c +++ b/drivers/video/omap2/dss/dsi.c | |||
@@ -1971,13 +1971,12 @@ static void dsi_cio_disable_lane_override(void) | |||
1971 | 1971 | ||
1972 | static int dsi_cio_init(struct omap_dss_device *dssdev) | 1972 | static int dsi_cio_init(struct omap_dss_device *dssdev) |
1973 | { | 1973 | { |
1974 | int r = 0; | 1974 | int r; |
1975 | u32 l; | 1975 | u32 l; |
1976 | 1976 | ||
1977 | DSSDBGF(); | 1977 | DSSDBGF(); |
1978 | 1978 | ||
1979 | if (dsi.ulps_enabled) | 1979 | dsi_enable_scp_clk(); |
1980 | DSSDBG("manual ulps exit\n"); | ||
1981 | 1980 | ||
1982 | /* A dummy read using the SCP interface to any DSIPHY register is | 1981 | /* A dummy read using the SCP interface to any DSIPHY register is |
1983 | * required after DSIPHY reset to complete the reset of the DSI complex | 1982 | * required after DSIPHY reset to complete the reset of the DSI complex |
@@ -1985,17 +1984,13 @@ static int dsi_cio_init(struct omap_dss_device *dssdev) | |||
1985 | dsi_read_reg(DSI_DSIPHY_CFG5); | 1984 | dsi_read_reg(DSI_DSIPHY_CFG5); |
1986 | 1985 | ||
1987 | if (wait_for_bit_change(DSI_DSIPHY_CFG5, 30, 1) != 1) { | 1986 | if (wait_for_bit_change(DSI_DSIPHY_CFG5, 30, 1) != 1) { |
1988 | DSSERR("ComplexIO PHY not coming out of reset.\n"); | 1987 | DSSERR("CIO SCP Clock domain not coming out of reset.\n"); |
1989 | r = -ENODEV; | 1988 | r = -EIO; |
1990 | goto err; | 1989 | goto err_scp_clk_dom; |
1991 | } | 1990 | } |
1992 | 1991 | ||
1993 | dsi_set_lane_config(dssdev); | 1992 | dsi_set_lane_config(dssdev); |
1994 | 1993 | ||
1995 | dsi_if_enable(true); | ||
1996 | dsi_if_enable(false); | ||
1997 | REG_FLD_MOD(DSI_CLK_CTRL, 1, 20, 20); /* LP_CLK_ENABLE */ | ||
1998 | |||
1999 | /* set TX STOP MODE timer to maximum for this operation */ | 1994 | /* set TX STOP MODE timer to maximum for this operation */ |
2000 | l = dsi_read_reg(DSI_TIMING1); | 1995 | l = dsi_read_reg(DSI_TIMING1); |
2001 | l = FLD_MOD(l, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */ | 1996 | l = FLD_MOD(l, 1, 15, 15); /* FORCE_TX_STOP_MODE_IO */ |
@@ -2005,6 +2000,8 @@ static int dsi_cio_init(struct omap_dss_device *dssdev) | |||
2005 | dsi_write_reg(DSI_TIMING1, l); | 2000 | dsi_write_reg(DSI_TIMING1, l); |
2006 | 2001 | ||
2007 | if (dsi.ulps_enabled) { | 2002 | if (dsi.ulps_enabled) { |
2003 | DSSDBG("manual ulps exit\n"); | ||
2004 | |||
2008 | /* ULPS is exited by Mark-1 state for 1ms, followed by | 2005 | /* ULPS is exited by Mark-1 state for 1ms, followed by |
2009 | * stop state. DSS HW cannot do this via the normal | 2006 | * stop state. DSS HW cannot do this via the normal |
2010 | * ULPS exit sequence, as after reset the DSS HW thinks | 2007 | * ULPS exit sequence, as after reset the DSS HW thinks |
@@ -2019,7 +2016,17 @@ static int dsi_cio_init(struct omap_dss_device *dssdev) | |||
2019 | 2016 | ||
2020 | r = dsi_cio_power(DSI_COMPLEXIO_POWER_ON); | 2017 | r = dsi_cio_power(DSI_COMPLEXIO_POWER_ON); |
2021 | if (r) | 2018 | if (r) |
2022 | goto err; | 2019 | goto err_cio_pwr; |
2020 | |||
2021 | if (wait_for_bit_change(DSI_COMPLEXIO_CFG1, 29, 1) != 1) { | ||
2022 | DSSERR("CIO PWR clock domain not coming out of reset.\n"); | ||
2023 | r = -ENODEV; | ||
2024 | goto err_cio_pwr_dom; | ||
2025 | } | ||
2026 | |||
2027 | dsi_if_enable(true); | ||
2028 | dsi_if_enable(false); | ||
2029 | REG_FLD_MOD(DSI_CLK_CTRL, 1, 20, 20); /* LP_CLK_ENABLE */ | ||
2023 | 2030 | ||
2024 | if (dsi.ulps_enabled) { | 2031 | if (dsi.ulps_enabled) { |
2025 | /* Keep Mark-1 state for 1ms (as per DSI spec) */ | 2032 | /* Keep Mark-1 state for 1ms (as per DSI spec) */ |
@@ -2035,24 +2042,28 @@ static int dsi_cio_init(struct omap_dss_device *dssdev) | |||
2035 | /* FORCE_TX_STOP_MODE_IO */ | 2042 | /* FORCE_TX_STOP_MODE_IO */ |
2036 | REG_FLD_MOD(DSI_TIMING1, 0, 15, 15); | 2043 | REG_FLD_MOD(DSI_TIMING1, 0, 15, 15); |
2037 | 2044 | ||
2038 | if (wait_for_bit_change(DSI_COMPLEXIO_CFG1, 29, 1) != 1) { | ||
2039 | DSSERR("ComplexIO not coming out of reset.\n"); | ||
2040 | r = -ENODEV; | ||
2041 | goto err; | ||
2042 | } | ||
2043 | |||
2044 | dsi_cio_timings(); | 2045 | dsi_cio_timings(); |
2045 | 2046 | ||
2046 | dsi.ulps_enabled = false; | 2047 | dsi.ulps_enabled = false; |
2047 | 2048 | ||
2048 | DSSDBG("CIO init done\n"); | 2049 | DSSDBG("CIO init done\n"); |
2049 | err: | 2050 | |
2051 | return 0; | ||
2052 | |||
2053 | err_cio_pwr_dom: | ||
2054 | dsi_cio_power(DSI_COMPLEXIO_POWER_OFF); | ||
2055 | err_cio_pwr: | ||
2056 | if (dsi.ulps_enabled) | ||
2057 | dsi_cio_disable_lane_override(); | ||
2058 | err_scp_clk_dom: | ||
2059 | dsi_disable_scp_clk(); | ||
2050 | return r; | 2060 | return r; |
2051 | } | 2061 | } |
2052 | 2062 | ||
2053 | static void dsi_cio_uninit(void) | 2063 | static void dsi_cio_uninit(void) |
2054 | { | 2064 | { |
2055 | dsi_cio_power(DSI_COMPLEXIO_POWER_OFF); | 2065 | dsi_cio_power(DSI_COMPLEXIO_POWER_OFF); |
2066 | dsi_disable_scp_clk(); | ||
2056 | } | 2067 | } |
2057 | 2068 | ||
2058 | static int _dsi_wait_reset(void) | 2069 | static int _dsi_wait_reset(void) |
@@ -3631,11 +3642,6 @@ static int dsi_display_init_dsi(struct omap_dss_device *dssdev) | |||
3631 | { | 3642 | { |
3632 | int r; | 3643 | int r; |
3633 | 3644 | ||
3634 | /* The SCPClk is required for both PLL and CIO registers on OMAP4 */ | ||
3635 | dsi_enable_scp_clk(); | ||
3636 | |||
3637 | _dsi_print_reset_status(); | ||
3638 | |||
3639 | r = dsi_pll_init(dssdev, true, true); | 3645 | r = dsi_pll_init(dssdev, true, true); |
3640 | if (r) | 3646 | if (r) |
3641 | goto err0; | 3647 | goto err0; |
@@ -3688,7 +3694,6 @@ err2: | |||
3688 | err1: | 3694 | err1: |
3689 | dsi_pll_uninit(true); | 3695 | dsi_pll_uninit(true); |
3690 | err0: | 3696 | err0: |
3691 | dsi_disable_scp_clk(); | ||
3692 | return r; | 3697 | return r; |
3693 | } | 3698 | } |
3694 | 3699 | ||
@@ -3709,7 +3714,6 @@ static void dsi_display_uninit_dsi(struct omap_dss_device *dssdev, | |||
3709 | dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK); | 3714 | dss_select_dsi_clk_source(OMAP_DSS_CLK_SRC_FCK); |
3710 | dsi_cio_uninit(); | 3715 | dsi_cio_uninit(); |
3711 | dsi_pll_uninit(disconnect_lanes); | 3716 | dsi_pll_uninit(disconnect_lanes); |
3712 | dsi_disable_scp_clk(); | ||
3713 | } | 3717 | } |
3714 | 3718 | ||
3715 | static int dsi_core_init(void) | 3719 | static int dsi_core_init(void) |