diff options
author | Guennadi Liakhovetski <g.liakhovetski@gmx.de> | 2010-12-29 03:12:29 -0500 |
---|---|---|
committer | Paul Mundt <lethal@linux-sh.org> | 2011-01-05 03:22:32 -0500 |
commit | 14bbb7c61557172e4482d4d97a5f56042a12b969 (patch) | |
tree | 12f2caed51ac9e3443ced751d53b01676c922847 | |
parent | 6fd465956e287f2bff8ff70ad4f27825dc3b468c (diff) |
fbdev: sh_mipi_dsi: use platform provided register layout and values
Different sh-mobile SoCs have variations in their MIPI DSI register layouts,
besides, different LCD panels require different configuration parameters. This
patch switches the driver to use platform-provided MIPI DSI parameters.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
-rw-r--r-- | drivers/video/sh_mipi_dsi.c | 16 |
1 files changed, 11 insertions, 5 deletions
diff --git a/drivers/video/sh_mipi_dsi.c b/drivers/video/sh_mipi_dsi.c index 23231279c387..24640c8458ab 100644 --- a/drivers/video/sh_mipi_dsi.c +++ b/drivers/video/sh_mipi_dsi.c | |||
@@ -150,8 +150,7 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi, | |||
150 | { | 150 | { |
151 | void __iomem *base = mipi->base; | 151 | void __iomem *base = mipi->base; |
152 | struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan; | 152 | struct sh_mobile_lcdc_chan_cfg *ch = pdata->lcd_chan; |
153 | u32 pctype, datatype, pixfmt; | 153 | u32 pctype, datatype, pixfmt, linelength, vmctr2 = 0x00e00000; |
154 | u32 linelength; | ||
155 | bool yuv; | 154 | bool yuv; |
156 | 155 | ||
157 | /* | 156 | /* |
@@ -308,17 +307,24 @@ static int __init sh_mipi_setup(struct sh_mipi *mipi, | |||
308 | */ | 307 | */ |
309 | iowrite32(0x00000006, mipi->linkbase + DTCTR); | 308 | iowrite32(0x00000006, mipi->linkbase + DTCTR); |
310 | /* VSYNC width = 2 (<< 17) */ | 309 | /* VSYNC width = 2 (<< 17) */ |
311 | iowrite32(0x00040000 | (pctype << 12) | datatype, | 310 | iowrite32((ch->lcd_cfg[0].vsync_len << pdata->vsynw_offset) | |
311 | (pdata->clksrc << 16) | (pctype << 12) | datatype, | ||
312 | mipi->linkbase + VMCTR1); | 312 | mipi->linkbase + VMCTR1); |
313 | |||
313 | /* | 314 | /* |
314 | * Non-burst mode with sync pulses: VSE and HSE are output, | 315 | * Non-burst mode with sync pulses: VSE and HSE are output, |
315 | * HSA period allowed, no commands in LP | 316 | * HSA period allowed, no commands in LP |
316 | */ | 317 | */ |
317 | iowrite32(0x00e00000, mipi->linkbase + VMCTR2); | 318 | if (pdata->flags & SH_MIPI_DSI_HSABM) |
319 | vmctr2 |= 0x20; | ||
320 | if (pdata->flags & SH_MIPI_DSI_HSPBM) | ||
321 | vmctr2 |= 0x10; | ||
322 | iowrite32(vmctr2, mipi->linkbase + VMCTR2); | ||
323 | |||
318 | /* | 324 | /* |
319 | * 0x660 = 1632 bytes per line (RGB24, 544 pixels: see | 325 | * 0x660 = 1632 bytes per line (RGB24, 544 pixels: see |
320 | * sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default | 326 | * sh_mobile_lcdc_info.ch[0].lcd_cfg[0].xres), HSALEN = 1 - default |
321 | * (unused, since VMCTR2[HSABM] = 0) | 327 | * (unused if VMCTR2[HSABM] = 0) |
322 | */ | 328 | */ |
323 | iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1); | 329 | iowrite32(1 | (linelength << 16), mipi->linkbase + VMLEN1); |
324 | 330 | ||