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authorLinus Torvalds <torvalds@linux-foundation.org>2008-01-28 16:52:50 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2008-01-28 16:52:50 -0500
commite189f3495c4e30fc84fc9241096edf3932e23439 (patch)
tree5916c89ace81537a02ae01869386ba6caafdab9c
parentf4798748dee00c807a63f5518f08b3df161e0f6d (diff)
parent6582d7b7376aa587d74b08c74457dc28abc1a9fa (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (197 commits) sh: add spi header and r2d platform data V3 sh: update r7780rp interrupt code sh: remove consistent alloc stuff from the machine vector sh: use declared coherent memory for dreamcast pci ethernet adapter sh: declared coherent memory support V2 sh: Add support for SDK7780 board. sh: constify function pointer tables sh: Kill off -traditional for linker script. cdrom: Add support for Sega Dreamcast GD-ROM. sh: Kill off hs7751rvoip reference from arch/sh/Kconfig. sh: Drop r7780rp_defconfig, use r7780mp_defconfig as kbuild default. sh: Kill off dead HS771RVoIP board support. sh: r7785rp: Fix up DECLARE_INTC_DESC() arg mismatch. sh: r7785rp: Hook up the rest of the HL7785 FPGA IRQ vectors. sh: r2d - enable sm501 usb host function sh: remove voyagergx sh: r2d - add lcd planel timings to sm501 platform data sh: Add OHCI and UDC platform devices for SH7720. sh: intc - remove default interrupt priority tables sh: Correct pte size mismatch for X2 TLB. ...
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-rw-r--r--include/asm-sh/mmu_context_64.h75
-rw-r--r--include/asm-sh/module.h4
-rw-r--r--include/asm-sh/page.h102
-rw-r--r--include/asm-sh/param.h6
-rw-r--r--include/asm-sh/pci.h5
-rw-r--r--include/asm-sh/pgtable.h518
-rw-r--r--include/asm-sh/pgtable_32.h474
-rw-r--r--include/asm-sh/pgtable_64.h (renamed from include/asm-sh64/pgtable.h)253
-rw-r--r--include/asm-sh/posix_types.h129
-rw-r--r--include/asm-sh/posix_types_32.h122
-rw-r--r--include/asm-sh/posix_types_64.h (renamed from include/asm-sh64/posix_types.h)0
-rw-r--r--include/asm-sh/processor.h260
-rw-r--r--include/asm-sh/processor_32.h215
-rw-r--r--include/asm-sh/processor_64.h (renamed from include/asm-sh64/processor.h)78
-rw-r--r--include/asm-sh/ptrace.h28
-rw-r--r--include/asm-sh/r7780rp.h33
-rw-r--r--include/asm-sh/rtc.h2
-rw-r--r--include/asm-sh/scatterlist.h2
-rw-r--r--include/asm-sh/sdk7780.h81
-rw-r--r--include/asm-sh/sections.h1
-rw-r--r--include/asm-sh/sigcontext.h16
-rw-r--r--include/asm-sh/spi.h13
-rw-r--r--include/asm-sh/stat.h63
-rw-r--r--include/asm-sh/string.h136
-rw-r--r--include/asm-sh/string_32.h131
-rw-r--r--include/asm-sh/string_64.h (renamed from include/asm-sh64/string.h)18
-rw-r--r--include/asm-sh/system.h173
-rw-r--r--include/asm-sh/system_32.h99
-rw-r--r--include/asm-sh/system_64.h40
-rw-r--r--include/asm-sh/thread_info.h8
-rw-r--r--include/asm-sh/tlb.h10
-rw-r--r--include/asm-sh/tlb_64.h (renamed from include/asm-sh64/tlb.h)45
-rw-r--r--include/asm-sh/types.h6
-rw-r--r--include/asm-sh/uaccess.h564
-rw-r--r--include/asm-sh/uaccess_32.h510
-rw-r--r--include/asm-sh/uaccess_64.h (renamed from include/asm-sh64/uaccess.h)28
-rw-r--r--include/asm-sh/unistd.h379
-rw-r--r--include/asm-sh/unistd_32.h376
-rw-r--r--include/asm-sh/unistd_64.h (renamed from include/asm-sh64/unistd.h)18
-rw-r--r--include/asm-sh/user.h7
-rw-r--r--include/asm-sh/voyagergx.h341
-rw-r--r--include/asm-sh64/Kbuild1
-rw-r--r--include/asm-sh64/a.out.h38
-rw-r--r--include/asm-sh64/atomic.h158
-rw-r--r--include/asm-sh64/auxvec.h4
-rw-r--r--include/asm-sh64/bitops.h155
-rw-r--r--include/asm-sh64/bug.h19
-rw-r--r--include/asm-sh64/bugs.h38
-rw-r--r--include/asm-sh64/byteorder.h49
-rw-r--r--include/asm-sh64/cayman.h20
-rw-r--r--include/asm-sh64/cpumask.h6
-rw-r--r--include/asm-sh64/cputime.h6
-rw-r--r--include/asm-sh64/current.h28
-rw-r--r--include/asm-sh64/delay.h11
-rw-r--r--include/asm-sh64/device.h7
-rw-r--r--include/asm-sh64/div64.h6
-rw-r--r--include/asm-sh64/dma-mapping.h194
-rw-r--r--include/asm-sh64/dma.h41
-rw-r--r--include/asm-sh64/elf.h107
-rw-r--r--include/asm-sh64/emergency-restart.h6
-rw-r--r--include/asm-sh64/errno.h6
-rw-r--r--include/asm-sh64/fb.h19
-rw-r--r--include/asm-sh64/fcntl.h1
-rw-r--r--include/asm-sh64/futex.h6
-rw-r--r--include/asm-sh64/gpio.h8
-rw-r--r--include/asm-sh64/hardirq.h18
-rw-r--r--include/asm-sh64/hardware.h22
-rw-r--r--include/asm-sh64/hw_irq.h15
-rw-r--r--include/asm-sh64/ide.h29
-rw-r--r--include/asm-sh64/io.h196
-rw-r--r--include/asm-sh64/ioctl.h1
-rw-r--r--include/asm-sh64/ioctls.h116
-rw-r--r--include/asm-sh64/ipcbuf.h40
-rw-r--r--include/asm-sh64/irq_regs.h1
-rw-r--r--include/asm-sh64/kdebug.h1
-rw-r--r--include/asm-sh64/keyboard.h70
-rw-r--r--include/asm-sh64/kmap_types.h7
-rw-r--r--include/asm-sh64/linkage.h7
-rw-r--r--include/asm-sh64/local.h7
-rw-r--r--include/asm-sh64/mc146818rtc.h7
-rw-r--r--include/asm-sh64/mman.h6
-rw-r--r--include/asm-sh64/mmu.h7
-rw-r--r--include/asm-sh64/mmu_context.h208
-rw-r--r--include/asm-sh64/module.h20
-rw-r--r--include/asm-sh64/msgbuf.h42
-rw-r--r--include/asm-sh64/mutex.h9
-rw-r--r--include/asm-sh64/namei.h24
-rw-r--r--include/asm-sh64/page.h119
-rw-r--r--include/asm-sh64/param.h42
-rw-r--r--include/asm-sh64/pci.h102
-rw-r--r--include/asm-sh64/percpu.h6
-rw-r--r--include/asm-sh64/pgalloc.h125
-rw-r--r--include/asm-sh64/platform.h64
-rw-r--r--include/asm-sh64/poll.h8
-rw-r--r--include/asm-sh64/ptrace.h35
-rw-r--r--include/asm-sh64/resource.h6
-rw-r--r--include/asm-sh64/scatterlist.h37
-rw-r--r--include/asm-sh64/sci.h1
-rw-r--r--include/asm-sh64/sections.h7
-rw-r--r--include/asm-sh64/segment.h6
-rw-r--r--include/asm-sh64/semaphore-helper.h101
-rw-r--r--include/asm-sh64/semaphore.h119
-rw-r--r--include/asm-sh64/sembuf.h36
-rw-r--r--include/asm-sh64/serial.h31
-rw-r--r--include/asm-sh64/setup.h22
-rw-r--r--include/asm-sh64/shmbuf.h53
-rw-r--r--include/asm-sh64/shmparam.h12
-rw-r--r--include/asm-sh64/sigcontext.h30
-rw-r--r--include/asm-sh64/siginfo.h6
-rw-r--r--include/asm-sh64/signal.h159
-rw-r--r--include/asm-sh64/smp.h15
-rw-r--r--include/asm-sh64/socket.h6
-rw-r--r--include/asm-sh64/sockios.h25
-rw-r--r--include/asm-sh64/spinlock.h17
-rw-r--r--include/asm-sh64/stat.h88
-rw-r--r--include/asm-sh64/statfs.h6
-rw-r--r--include/asm-sh64/system.h190
-rw-r--r--include/asm-sh64/termbits.h6
-rw-r--r--include/asm-sh64/termios.h99
-rw-r--r--include/asm-sh64/thread_info.h91
-rw-r--r--include/asm-sh64/timex.h31
-rw-r--r--include/asm-sh64/tlbflush.h27
-rw-r--r--include/asm-sh64/topology.h6
-rw-r--r--include/asm-sh64/types.h74
-rw-r--r--include/asm-sh64/ucontext.h23
-rw-r--r--include/asm-sh64/unaligned.h17
-rw-r--r--include/asm-sh64/user.h70
-rw-r--r--init/Kconfig2
-rw-r--r--mm/Kconfig2
418 files changed, 13143 insertions, 18451 deletions
diff --git a/Makefile b/Makefile
index 189d8ef416e6..6d419f67939c 100644
--- a/Makefile
+++ b/Makefile
@@ -169,7 +169,7 @@ SUBARCH := $(shell uname -m | sed -e s/i.86/i386/ -e s/sun4u/sparc64/ \
169 -e s/arm.*/arm/ -e s/sa110/arm/ \ 169 -e s/arm.*/arm/ -e s/sa110/arm/ \
170 -e s/s390x/s390/ -e s/parisc64/parisc/ \ 170 -e s/s390x/s390/ -e s/parisc64/parisc/ \
171 -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \ 171 -e s/ppc.*/powerpc/ -e s/mips.*/mips/ \
172 -e s/sh[234].*/sh/ ) 172 -e s/sh.*/sh/ )
173 173
174# Cross compiling and selecting different set of gcc/bin-utils 174# Cross compiling and selecting different set of gcc/bin-utils
175# --------------------------------------------------------------------------- 175# ---------------------------------------------------------------------------
diff --git a/arch/sh/Kconfig b/arch/sh/Kconfig
index 496d635f89b2..1cd9c8fd927d 100644
--- a/arch/sh/Kconfig
+++ b/arch/sh/Kconfig
@@ -6,8 +6,7 @@
6mainmenu "Linux/SuperH Kernel Configuration" 6mainmenu "Linux/SuperH Kernel Configuration"
7 7
8config SUPERH 8config SUPERH
9 bool 9 def_bool y
10 default y
11 select EMBEDDED 10 select EMBEDDED
12 help 11 help
13 The SuperH is a RISC processor targeted for use in embedded systems 12 The SuperH is a RISC processor targeted for use in embedded systems
@@ -15,36 +14,36 @@ config SUPERH
15 gaming console. The SuperH port has a home page at 14 gaming console. The SuperH port has a home page at
16 <http://www.linux-sh.org/>. 15 <http://www.linux-sh.org/>.
17 16
17config SUPERH32
18 def_bool !SUPERH64
19
20config SUPERH64
21 def_bool y if CPU_SH5
22
18config RWSEM_GENERIC_SPINLOCK 23config RWSEM_GENERIC_SPINLOCK
19 bool 24 def_bool y
20 default y
21 25
22config RWSEM_XCHGADD_ALGORITHM 26config RWSEM_XCHGADD_ALGORITHM
23 bool 27 bool
24 28
25config GENERIC_BUG 29config GENERIC_BUG
26 def_bool y 30 def_bool y
27 depends on BUG 31 depends on BUG && SUPERH32
28 32
29config GENERIC_FIND_NEXT_BIT 33config GENERIC_FIND_NEXT_BIT
30 bool 34 def_bool y
31 default y
32 35
33config GENERIC_HWEIGHT 36config GENERIC_HWEIGHT
34 bool 37 def_bool y
35 default y
36 38
37config GENERIC_HARDIRQS 39config GENERIC_HARDIRQS
38 bool 40 def_bool y
39 default y
40 41
41config GENERIC_IRQ_PROBE 42config GENERIC_IRQ_PROBE
42 bool 43 def_bool y
43 default y
44 44
45config GENERIC_CALIBRATE_DELAY 45config GENERIC_CALIBRATE_DELAY
46 bool 46 def_bool y
47 default y
48 47
49config GENERIC_IOMAP 48config GENERIC_IOMAP
50 bool 49 bool
@@ -75,20 +74,16 @@ config ARCH_MAY_HAVE_PC_FDC
75 bool 74 bool
76 75
77config STACKTRACE_SUPPORT 76config STACKTRACE_SUPPORT
78 bool 77 def_bool y
79 default y
80 78
81config LOCKDEP_SUPPORT 79config LOCKDEP_SUPPORT
82 bool 80 def_bool y
83 default y
84 81
85config ARCH_HAS_ILOG2_U32 82config ARCH_HAS_ILOG2_U32
86 bool 83 def_bool n
87 default n
88 84
89config ARCH_HAS_ILOG2_U64 85config ARCH_HAS_ILOG2_U64
90 bool 86 def_bool n
91 default n
92 87
93config ARCH_NO_VIRT_TO_BUS 88config ARCH_NO_VIRT_TO_BUS
94 def_bool y 89 def_bool y
@@ -97,110 +92,234 @@ source "init/Kconfig"
97 92
98menu "System type" 93menu "System type"
99 94
100source "arch/sh/mm/Kconfig" 95#
96# Processor families
97#
98config CPU_SH2
99 bool
101 100
102menu "Processor features" 101config CPU_SH2A
102 bool
103 select CPU_SH2
104
105config CPU_SH3
106 bool
107 select CPU_HAS_INTEVT
108 select CPU_HAS_SR_RB
109
110config CPU_SH4
111 bool
112 select CPU_HAS_INTEVT
113 select CPU_HAS_SR_RB
114 select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
115 select CPU_HAS_FPU if !CPU_SH4AL_DSP
116
117config CPU_SH4A
118 bool
119 select CPU_SH4
120
121config CPU_SH4AL_DSP
122 bool
123 select CPU_SH4A
124 select CPU_HAS_DSP
125
126config CPU_SH5
127 bool
128 select CPU_HAS_FPU
129
130config CPU_SHX2
131 bool
132
133config CPU_SHX3
134 bool
103 135
104choice 136choice
105 prompt "Endianess selection" 137 prompt "Processor sub-type selection"
106 default CPU_LITTLE_ENDIAN
107 help
108 Some SuperH machines can be configured for either little or big
109 endian byte order. These modes require different kernels.
110 138
111config CPU_LITTLE_ENDIAN 139#
112 bool "Little Endian" 140# Processor subtypes
141#
113 142
114config CPU_BIG_ENDIAN 143# SH-2 Processor Support
115 bool "Big Endian"
116 144
117endchoice 145config CPU_SUBTYPE_SH7619
146 bool "Support SH7619 processor"
147 select CPU_SH2
148
149# SH-2A Processor Support
150
151config CPU_SUBTYPE_SH7203
152 bool "Support SH7203 processor"
153 select CPU_SH2A
154 select CPU_HAS_FPU
155
156config CPU_SUBTYPE_SH7206
157 bool "Support SH7206 processor"
158 select CPU_SH2A
118 159
119config SH_FPU 160config CPU_SUBTYPE_SH7263
120 bool "FPU support" 161 bool "Support SH7263 processor"
121 depends on CPU_HAS_FPU 162 select CPU_SH2A
122 default y 163 select CPU_HAS_FPU
164
165# SH-3 Processor Support
166
167config CPU_SUBTYPE_SH7705
168 bool "Support SH7705 processor"
169 select CPU_SH3
170
171config CPU_SUBTYPE_SH7706
172 bool "Support SH7706 processor"
173 select CPU_SH3
123 help 174 help
124 Selecting this option will enable support for SH processors that 175 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
125 have FPU units (ie, SH77xx).
126 176
127 This option must be set in order to enable the FPU. 177config CPU_SUBTYPE_SH7707
178 bool "Support SH7707 processor"
179 select CPU_SH3
180 help
181 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
128 182
129config SH_FPU_EMU 183config CPU_SUBTYPE_SH7708
130 bool "FPU emulation support" 184 bool "Support SH7708 processor"
131 depends on !SH_FPU && EXPERIMENTAL 185 select CPU_SH3
132 default n
133 help 186 help
134 Selecting this option will enable support for software FPU emulation. 187 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
135 Most SH-3 users will want to say Y here, whereas most SH-4 users will 188 if you have a 100 Mhz SH-3 HD6417708R CPU.
136 want to say N.
137 189
138config SH_DSP 190config CPU_SUBTYPE_SH7709
139 bool "DSP support" 191 bool "Support SH7709 processor"
140 depends on CPU_HAS_DSP 192 select CPU_SH3
141 default y
142 help 193 help
143 Selecting this option will enable support for SH processors that 194 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
144 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
145 195
146 This option must be set in order to enable the DSP. 196config CPU_SUBTYPE_SH7710
197 bool "Support SH7710 processor"
198 select CPU_SH3
199 select CPU_HAS_DSP
200 help
201 Select SH7710 if you have a SH3-DSP SH7710 CPU.
147 202
148config SH_ADC 203config CPU_SUBTYPE_SH7712
149 bool "ADC support" 204 bool "Support SH7712 processor"
150 depends on CPU_SH3 205 select CPU_SH3
151 default y 206 select CPU_HAS_DSP
152 help 207 help
153 Selecting this option will allow the Linux kernel to use SH3 on-chip 208 Select SH7712 if you have a SH3-DSP SH7712 CPU.
154 ADC module.
155 209
156 If unsure, say N. 210config CPU_SUBTYPE_SH7720
211 bool "Support SH7720 processor"
212 select CPU_SH3
213 select CPU_HAS_DSP
214 help
215 Select SH7720 if you have a SH3-DSP SH7720 CPU.
157 216
158config SH_STORE_QUEUES 217config CPU_SUBTYPE_SH7721
159 bool "Support for Store Queues" 218 bool "Support SH7721 processor"
160 depends on CPU_SH4 219 select CPU_SH3
220 select CPU_HAS_DSP
161 help 221 help
162 Selecting this option will enable an in-kernel API for manipulating 222 Select SH7721 if you have a SH3-DSP SH7721 CPU.
163 the store queues integrated in the SH-4 processors.
164 223
165config SPECULATIVE_EXECUTION 224# SH-4 Processor Support
166 bool "Speculative subroutine return" 225
167 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL 226config CPU_SUBTYPE_SH7750
227 bool "Support SH7750 processor"
228 select CPU_SH4
168 help 229 help
169 This enables support for a speculative instruction fetch for 230 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
170 subroutine return. There are various pitfalls associated with
171 this, as outlined in the SH7780 hardware manual.
172 231
173 If unsure, say N. 232config CPU_SUBTYPE_SH7091
233 bool "Support SH7091 processor"
234 select CPU_SH4
235 help
236 Select SH7091 if you have an SH-4 based Sega device (such as
237 the Dreamcast, Naomi, and Naomi 2).
174 238
175config CPU_HAS_INTEVT 239config CPU_SUBTYPE_SH7750R
176 bool 240 bool "Support SH7750R processor"
241 select CPU_SH4
177 242
178config CPU_HAS_MASKREG_IRQ 243config CPU_SUBTYPE_SH7750S
179 bool 244 bool "Support SH7750S processor"
245 select CPU_SH4
180 246
181config CPU_HAS_IPR_IRQ 247config CPU_SUBTYPE_SH7751
182 bool 248 bool "Support SH7751 processor"
249 select CPU_SH4
250 help
251 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
252 or if you have a HD6417751R CPU.
183 253
184config CPU_HAS_SR_RB 254config CPU_SUBTYPE_SH7751R
185 bool 255 bool "Support SH7751R processor"
256 select CPU_SH4
257
258config CPU_SUBTYPE_SH7760
259 bool "Support SH7760 processor"
260 select CPU_SH4
261
262config CPU_SUBTYPE_SH4_202
263 bool "Support SH4-202 processor"
264 select CPU_SH4
265
266# SH-4A Processor Support
267
268config CPU_SUBTYPE_SH7763
269 bool "Support SH7763 processor"
270 select CPU_SH4A
186 help 271 help
187 This will enable the use of SR.RB register bank usage. Processors 272 Select SH7763 if you have a SH4A SH7763(R5S77631) CPU.
188 that are lacking this bit must have another method in place for
189 accomplishing what is taken care of by the banked registers.
190 273
191 See <file:Documentation/sh/register-banks.txt> for further 274config CPU_SUBTYPE_SH7770
192 information on SR.RB and register banking in the kernel in general. 275 bool "Support SH7770 processor"
276 select CPU_SH4A
193 277
194config CPU_HAS_PTEA 278config CPU_SUBTYPE_SH7780
195 bool 279 bool "Support SH7780 processor"
280 select CPU_SH4A
196 281
197config CPU_HAS_DSP 282config CPU_SUBTYPE_SH7785
198 bool 283 bool "Support SH7785 processor"
284 select CPU_SH4A
285 select CPU_SHX2
286 select ARCH_SPARSEMEM_ENABLE
287 select SYS_SUPPORTS_NUMA
199 288
200config CPU_HAS_FPU 289config CPU_SUBTYPE_SHX3
201 bool 290 bool "Support SH-X3 processor"
291 select CPU_SH4A
292 select CPU_SHX3
293 select ARCH_SPARSEMEM_ENABLE
294 select SYS_SUPPORTS_NUMA
295 select SYS_SUPPORTS_SMP
202 296
203endmenu 297# SH4AL-DSP Processor Support
298
299config CPU_SUBTYPE_SH7343
300 bool "Support SH7343 processor"
301 select CPU_SH4AL_DSP
302
303config CPU_SUBTYPE_SH7722
304 bool "Support SH7722 processor"
305 select CPU_SH4AL_DSP
306 select CPU_SHX2
307 select ARCH_SPARSEMEM_ENABLE
308 select SYS_SUPPORTS_NUMA
309
310# SH-5 Processor Support
311
312config CPU_SUBTYPE_SH5_101
313 bool "Support SH5-101 processor"
314 select CPU_SH5
315
316config CPU_SUBTYPE_SH5_103
317 bool "Support SH5-103 processor"
318
319endchoice
320
321source "arch/sh/mm/Kconfig"
322source "arch/sh/Kconfig.cpu"
204 323
205menu "Board support" 324menu "Board support"
206 325
@@ -321,13 +440,6 @@ config SH_SECUREEDGE5410
321 This includes both the OEM SecureEdge products as well as the 440 This includes both the OEM SecureEdge products as well as the
322 SME product line. 441 SME product line.
323 442
324config SH_HS7751RVOIP
325 bool "HS7751RVOIP"
326 depends on CPU_SUBTYPE_SH7751R
327 help
328 Select HS7751RVOIP if configuring for a Renesas Technology
329 Sales VoIP board.
330
331config SH_7710VOIPGW 443config SH_7710VOIPGW
332 bool "SH7710-VOIP-GW" 444 bool "SH7710-VOIP-GW"
333 depends on CPU_SUBTYPE_SH7710 445 depends on CPU_SUBTYPE_SH7710
@@ -343,6 +455,14 @@ config SH_RTS7751R2D
343 Select RTS7751R2D if configuring for a Renesas Technology 455 Select RTS7751R2D if configuring for a Renesas Technology
344 Sales SH-Graphics board. 456 Sales SH-Graphics board.
345 457
458config SH_SDK7780
459 bool "SDK7780R3"
460 depends on CPU_SUBTYPE_SH7780
461 select SYS_SUPPORTS_PCI
462 help
463 Select SDK7780 if configuring for a Renesas SH7780 SDK7780R3
464 evaluation board.
465
346config SH_HIGHLANDER 466config SH_HIGHLANDER
347 bool "Highlander" 467 bool "Highlander"
348 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 468 depends on CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785
@@ -399,41 +519,47 @@ config SH_MAGIC_PANEL_R2
399 help 519 help
400 Select Magic Panel R2 if configuring for Magic Panel R2. 520 Select Magic Panel R2 if configuring for Magic Panel R2.
401 521
522config SH_CAYMAN
523 bool "Hitachi Cayman"
524 depends on CPU_SUBTYPE_SH5_101 || CPU_SUBTYPE_SH5_103
525 select SYS_SUPPORTS_PCI
526
402endmenu 527endmenu
403 528
404source "arch/sh/boards/renesas/hs7751rvoip/Kconfig"
405source "arch/sh/boards/renesas/rts7751r2d/Kconfig" 529source "arch/sh/boards/renesas/rts7751r2d/Kconfig"
406source "arch/sh/boards/renesas/r7780rp/Kconfig" 530source "arch/sh/boards/renesas/r7780rp/Kconfig"
531source "arch/sh/boards/renesas/sdk7780/Kconfig"
407source "arch/sh/boards/magicpanelr2/Kconfig" 532source "arch/sh/boards/magicpanelr2/Kconfig"
408 533
409menu "Timer and clock configuration" 534menu "Timer and clock configuration"
410 535
411config SH_TMU 536config SH_TMU
412 bool "TMU timer support" 537 def_bool y
538 prompt "TMU timer support"
413 depends on CPU_SH3 || CPU_SH4 539 depends on CPU_SH3 || CPU_SH4
414 select GENERIC_TIME 540 select GENERIC_TIME
415 select GENERIC_CLOCKEVENTS 541 select GENERIC_CLOCKEVENTS
416 default y
417 help 542 help
418 This enables the use of the TMU as the system timer. 543 This enables the use of the TMU as the system timer.
419 544
420config SH_CMT 545config SH_CMT
421 bool "CMT timer support" 546 def_bool y
547 prompt "CMT timer support"
422 depends on CPU_SH2 548 depends on CPU_SH2
423 default y
424 help 549 help
425 This enables the use of the CMT as the system timer. 550 This enables the use of the CMT as the system timer.
426 551
427config SH_MTU2 552config SH_MTU2
428 bool "MTU2 timer support" 553 def_bool n
554 prompt "MTU2 timer support"
429 depends on CPU_SH2A 555 depends on CPU_SH2A
430 default n
431 help 556 help
432 This enables the use of the MTU2 as the system timer. 557 This enables the use of the MTU2 as the system timer.
433 558
434config SH_TIMER_IRQ 559config SH_TIMER_IRQ
435 int 560 int
436 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 561 default "28" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785 || \
562 CPU_SUBTYPE_SH7763
437 default "86" if CPU_SUBTYPE_SH7619 563 default "86" if CPU_SUBTYPE_SH7619
438 default "140" if CPU_SUBTYPE_SH7206 564 default "140" if CPU_SUBTYPE_SH7206
439 default "16" 565 default "16"
@@ -445,7 +571,8 @@ config SH_PCLK_FREQ
445 default "32000000" if CPU_SUBTYPE_SH7722 571 default "32000000" if CPU_SUBTYPE_SH7722
446 default "33333333" if CPU_SUBTYPE_SH7770 || \ 572 default "33333333" if CPU_SUBTYPE_SH7770 || \
447 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \ 573 CPU_SUBTYPE_SH7760 || CPU_SUBTYPE_SH7705 || \
448 CPU_SUBTYPE_SH7206 574 CPU_SUBTYPE_SH7203 || CPU_SUBTYPE_SH7206 || \
575 CPU_SUBTYPE_SH7263
449 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R 576 default "60000000" if CPU_SUBTYPE_SH7751 || CPU_SUBTYPE_SH7751R
450 default "66000000" if CPU_SUBTYPE_SH4_202 577 default "66000000" if CPU_SUBTYPE_SH4_202
451 default "50000000" 578 default "50000000"
@@ -456,7 +583,7 @@ config SH_PCLK_FREQ
456 583
457config SH_CLK_MD 584config SH_CLK_MD
458 int "CPU Mode Pin Setting" 585 int "CPU Mode Pin Setting"
459 depends on CPU_SUBTYPE_SH7619 || CPU_SUBTYPE_SH7206 586 depends on CPU_SH2
460 default 6 if CPU_SUBTYPE_SH7206 587 default 6 if CPU_SUBTYPE_SH7206
461 default 5 if CPU_SUBTYPE_SH7619 588 default 5 if CPU_SUBTYPE_SH7619
462 default 0 589 default 0
@@ -490,9 +617,8 @@ source "arch/sh/drivers/Kconfig"
490endmenu 617endmenu
491 618
492config ISA_DMA_API 619config ISA_DMA_API
493 bool 620 def_bool y
494 depends on SH_MPC1211 621 depends on SH_MPC1211
495 default y
496 622
497menu "Kernel features" 623menu "Kernel features"
498 624
@@ -570,7 +696,7 @@ source "kernel/Kconfig.preempt"
570 696
571config GUSA 697config GUSA
572 def_bool y 698 def_bool y
573 depends on !SMP 699 depends on !SMP && SUPERH32
574 help 700 help
575 This enables support for gUSA (general UserSpace Atomicity). 701 This enables support for gUSA (general UserSpace Atomicity).
576 This is the default implementation for both UP and non-ll/sc 702 This is the default implementation for both UP and non-ll/sc
@@ -582,6 +708,16 @@ config GUSA
582 This should only be disabled for special cases where alternate 708 This should only be disabled for special cases where alternate
583 atomicity implementations exist. 709 atomicity implementations exist.
584 710
711config GUSA_RB
712 bool "Implement atomic operations by roll-back (gRB) (EXPERIMENTAL)"
713 depends on GUSA && CPU_SH3 || (CPU_SH4 && !CPU_SH4A)
714 help
715 Enabling this option will allow the kernel to implement some
716 atomic operations using a software implemention of load-locked/
717 store-conditional (LLSC). On machines which do not have hardware
718 LLSC, this should be more efficient than the other alternative of
719 disabling insterrupts around the atomic sequence.
720
585endmenu 721endmenu
586 722
587menu "Boot options" 723menu "Boot options"
diff --git a/arch/sh/Kconfig.cpu b/arch/sh/Kconfig.cpu
new file mode 100644
index 000000000000..d850184d0694
--- /dev/null
+++ b/arch/sh/Kconfig.cpu
@@ -0,0 +1,115 @@
1menu "Processor features"
2
3choice
4 prompt "Endianess selection"
5 default CPU_LITTLE_ENDIAN
6 help
7 Some SuperH machines can be configured for either little or big
8 endian byte order. These modes require different kernels.
9
10config CPU_LITTLE_ENDIAN
11 bool "Little Endian"
12
13config CPU_BIG_ENDIAN
14 bool "Big Endian"
15
16endchoice
17
18config SH_FPU
19 def_bool y
20 prompt "FPU support"
21 depends on CPU_HAS_FPU
22 help
23 Selecting this option will enable support for SH processors that
24 have FPU units (ie, SH77xx).
25
26 This option must be set in order to enable the FPU.
27
28config SH64_FPU_DENORM_FLUSH
29 bool "Flush floating point denorms to zero"
30 depends on SH_FPU && SUPERH64
31
32config SH_FPU_EMU
33 def_bool n
34 prompt "FPU emulation support"
35 depends on !SH_FPU && EXPERIMENTAL
36 help
37 Selecting this option will enable support for software FPU emulation.
38 Most SH-3 users will want to say Y here, whereas most SH-4 users will
39 want to say N.
40
41config SH_DSP
42 def_bool y
43 prompt "DSP support"
44 depends on CPU_HAS_DSP
45 help
46 Selecting this option will enable support for SH processors that
47 have DSP units (ie, SH2-DSP, SH3-DSP, and SH4AL-DSP).
48
49 This option must be set in order to enable the DSP.
50
51config SH_ADC
52 def_bool y
53 prompt "ADC support"
54 depends on CPU_SH3
55 help
56 Selecting this option will allow the Linux kernel to use SH3 on-chip
57 ADC module.
58
59 If unsure, say N.
60
61config SH_STORE_QUEUES
62 bool "Support for Store Queues"
63 depends on CPU_SH4
64 help
65 Selecting this option will enable an in-kernel API for manipulating
66 the store queues integrated in the SH-4 processors.
67
68config SPECULATIVE_EXECUTION
69 bool "Speculative subroutine return"
70 depends on CPU_SUBTYPE_SH7780 && EXPERIMENTAL
71 help
72 This enables support for a speculative instruction fetch for
73 subroutine return. There are various pitfalls associated with
74 this, as outlined in the SH7780 hardware manual.
75
76 If unsure, say N.
77
78config SH64_USER_MISALIGNED_FIXUP
79 def_bool y
80 prompt "Fixup misaligned loads/stores occurring in user mode"
81 depends on SUPERH64
82
83config SH64_ID2815_WORKAROUND
84 bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
85 depends on CPU_SUBTYPE_SH5_101
86
87config CPU_HAS_INTEVT
88 bool
89
90config CPU_HAS_MASKREG_IRQ
91 bool
92
93config CPU_HAS_IPR_IRQ
94 bool
95
96config CPU_HAS_SR_RB
97 bool
98 help
99 This will enable the use of SR.RB register bank usage. Processors
100 that are lacking this bit must have another method in place for
101 accomplishing what is taken care of by the banked registers.
102
103 See <file:Documentation/sh/register-banks.txt> for further
104 information on SR.RB and register banking in the kernel in general.
105
106config CPU_HAS_PTEA
107 bool
108
109config CPU_HAS_DSP
110 bool
111
112config CPU_HAS_FPU
113 bool
114
115endmenu
diff --git a/arch/sh/Kconfig.debug b/arch/sh/Kconfig.debug
index 722da6851f56..f7c716166ce8 100644
--- a/arch/sh/Kconfig.debug
+++ b/arch/sh/Kconfig.debug
@@ -1,8 +1,7 @@
1menu "Kernel hacking" 1menu "Kernel hacking"
2 2
3config TRACE_IRQFLAGS_SUPPORT 3config TRACE_IRQFLAGS_SUPPORT
4 bool 4 def_bool y
5 default y
6 5
7source "lib/Kconfig.debug" 6source "lib/Kconfig.debug"
8 7
@@ -30,12 +29,13 @@ config EARLY_SCIF_CONSOLE
30config EARLY_SCIF_CONSOLE_PORT 29config EARLY_SCIF_CONSOLE_PORT
31 hex 30 hex
32 depends on EARLY_SCIF_CONSOLE 31 depends on EARLY_SCIF_CONSOLE
33 default "0xffe00000" if CPU_SUBTYPE_SH7780 32 default "0xffe00000" if CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7763
34 default "0xffea0000" if CPU_SUBTYPE_SH7785 33 default "0xffea0000" if CPU_SUBTYPE_SH7785
35 default "0xfffe9800" if CPU_SUBTYPE_SH7206 34 default "0xfffe8000" if CPU_SUBTYPE_SH7203
35 default "0xfffe9800" if CPU_SUBTYPE_SH7206 || CPU_SUBTYPE_SH7263
36 default "0xf8420000" if CPU_SUBTYPE_SH7619 36 default "0xf8420000" if CPU_SUBTYPE_SH7619
37 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705 37 default "0xa4400000" if CPU_SUBTYPE_SH7712 || CPU_SUBTYPE_SH7705
38 default "0xa4430000" if CPU_SUBTYPE_SH7720 38 default "0xa4430000" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
39 default "0xffc30000" if CPU_SUBTYPE_SHX3 39 default "0xffc30000" if CPU_SUBTYPE_SHX3
40 default "0xffe80000" if CPU_SH4 40 default "0xffe80000" if CPU_SH4
41 default "0x00000000" 41 default "0x00000000"
@@ -62,7 +62,7 @@ config DEBUG_BOOTMEM
62 62
63config DEBUG_STACKOVERFLOW 63config DEBUG_STACKOVERFLOW
64 bool "Check for stack overflows" 64 bool "Check for stack overflows"
65 depends on DEBUG_KERNEL 65 depends on DEBUG_KERNEL && SUPERH32
66 help 66 help
67 This option will cause messages to be printed if free stack space 67 This option will cause messages to be printed if free stack space
68 drops below a certain limit. 68 drops below a certain limit.
@@ -88,7 +88,7 @@ config 4KSTACKS
88 88
89config IRQSTACKS 89config IRQSTACKS
90 bool "Use separate kernel stacks when processing interrupts" 90 bool "Use separate kernel stacks when processing interrupts"
91 depends on DEBUG_KERNEL 91 depends on DEBUG_KERNEL && SUPERH32
92 help 92 help
93 If you say Y here the kernel will use separate kernel stacks 93 If you say Y here the kernel will use separate kernel stacks
94 for handling hard and soft interrupts. This can help avoid 94 for handling hard and soft interrupts. This can help avoid
@@ -119,19 +119,19 @@ config COMPILE_OPTIONS
119 depends on MORE_COMPILE_OPTIONS 119 depends on MORE_COMPILE_OPTIONS
120 120
121config KGDB_NMI 121config KGDB_NMI
122 bool "Enter KGDB on NMI" 122 def_bool n
123 default n 123 prompt "Enter KGDB on NMI"
124 124
125config SH_KGDB_CONSOLE 125config SH_KGDB_CONSOLE
126 bool "Console messages through GDB" 126 def_bool n
127 prompt "Console messages through GDB"
127 depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y 128 depends on !SERIAL_SH_SCI_CONSOLE && SERIAL_SH_SCI=y
128 select SERIAL_CORE_CONSOLE 129 select SERIAL_CORE_CONSOLE
129 default n
130 130
131config KGDB_SYSRQ 131config KGDB_SYSRQ
132 bool "Allow SysRq 'G' to enter KGDB" 132 def_bool y
133 prompt "Allow SysRq 'G' to enter KGDB"
133 depends on MAGIC_SYSRQ 134 depends on MAGIC_SYSRQ
134 default y
135 135
136comment "Serial port setup" 136comment "Serial port setup"
137 137
@@ -174,4 +174,29 @@ endchoice
174 174
175endmenu 175endmenu
176 176
177if SUPERH64
178
179config SH64_PROC_ASIDS
180 bool "Debug: report ASIDs through /proc/asids"
181 depends on PROC_FS
182
183config SH64_SR_WATCH
184 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
185
186config POOR_MANS_STRACE
187 bool "Debug: enable rudimentary strace facility"
188 help
189 This option allows system calls to be traced to the console. It also
190 aids in detecting kernel stack underflow. It is useful for debugging
191 early-userland problems (e.g. init incurring fatal exceptions.)
192
193config SH_ALPHANUMERIC
194 bool "Enable debug outputs to on-board alphanumeric display"
195 depends on SH_CAYMAN
196
197config SH_NO_BSS_INIT
198 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
199
200endif
201
177endmenu 202endmenu
diff --git a/arch/sh/Makefile b/arch/sh/Makefile
index e189fae8b60c..17fc36186bf4 100644
--- a/arch/sh/Makefile
+++ b/arch/sh/Makefile
@@ -1,17 +1,13 @@
1# $Id: Makefile,v 1.35 2004/04/15 03:39:20 sugioka Exp $
2# 1#
3# This file is subject to the terms and conditions of the GNU General Public 2# arch/sh/Makefile
4# License. See the file "COPYING" in the main directory of this archive
5# for more details.
6# 3#
7# Copyright (C) 1999 Kaz Kojima 4# Copyright (C) 1999 Kaz Kojima
8# Copyright (C) 2002, 2003, 2004 Paul Mundt 5# Copyright (C) 2002, 2003, 2004 Paul Mundt
9# Copyright (C) 2002 M. R. Brown 6# Copyright (C) 2002 M. R. Brown
10# 7#
11# This file is included by the global makefile so that you can add your own 8# This file is subject to the terms and conditions of the GNU General Public
12# architecture-specific flags and dependencies. Remember to do have actions 9# License. See the file "COPYING" in the main directory of this archive
13# for "archclean" and "archdep" for cleaning up and making dependencies for 10# for more details.
14# this architecture
15# 11#
16isa-y := any 12isa-y := any
17isa-$(CONFIG_SH_DSP) := sh 13isa-$(CONFIG_SH_DSP) := sh
@@ -21,13 +17,9 @@ isa-$(CONFIG_CPU_SH3) := sh3
21isa-$(CONFIG_CPU_SH4) := sh4 17isa-$(CONFIG_CPU_SH4) := sh4
22isa-$(CONFIG_CPU_SH4A) := sh4a 18isa-$(CONFIG_CPU_SH4A) := sh4a
23isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al 19isa-$(CONFIG_CPU_SH4AL_DSP) := sh4al
24 20isa-$(CONFIG_CPU_SH5) := shmedia
25isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp 21isa-$(CONFIG_SH_DSP) := $(isa-y)-dsp
26 22
27ifndef CONFIG_MMU
28isa-y := $(isa-y)-nommu
29endif
30
31ifndef CONFIG_SH_DSP 23ifndef CONFIG_SH_DSP
32ifndef CONFIG_SH_FPU 24ifndef CONFIG_SH_FPU
33isa-y := $(isa-y)-nofpu 25isa-y := $(isa-y)-nofpu
@@ -44,6 +36,7 @@ cflags-$(CONFIG_CPU_SH4) := $(call cc-option,-m4,) \
44 $(call cc-option,-mno-implicit-fp,-m4-nofpu) 36 $(call cc-option,-mno-implicit-fp,-m4-nofpu)
45cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \ 37cflags-$(CONFIG_CPU_SH4A) += $(call cc-option,-m4a,) \
46 $(call cc-option,-m4a-nofpu,) 38 $(call cc-option,-m4a-nofpu,)
39cflags-$(CONFIG_CPU_SH5) := $(call cc-option,-m5-32media-nofpu,)
47 40
48cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb 41cflags-$(CONFIG_CPU_BIG_ENDIAN) += -mb
49cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml 42cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += -ml
@@ -66,22 +59,27 @@ cflags-y += $(isaflags-y) -ffreestanding
66cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \ 59cflags-$(CONFIG_MORE_COMPILE_OPTIONS) += \
67 $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g') 60 $(shell echo $(CONFIG_COMPILE_OPTIONS) | sed -e 's/"//g')
68 61
69OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment -R .stab -R .stabstr -S 62OBJCOPYFLAGS := -O binary -R .note -R .note.gnu.build-id -R .comment \
63 -R .stab -R .stabstr -S
70 64
71# 65# Give the various platforms the opportunity to set default image types
72# arch/sh/defconfig doesn't reflect any real hardware, and as such should 66defaultimage-$(CONFIG_SUPERH32) := zImage
73# never be used by anyone. Use a board-specific defconfig that has a
74# reasonable chance of being current instead.
75#
76KBUILD_DEFCONFIG := r7780rp_defconfig
77 67
78KBUILD_IMAGE := arch/sh/boot/zImage 68# Set some sensible Kbuild defaults
69KBUILD_DEFCONFIG := r7780mp_defconfig
70KBUILD_IMAGE := $(defaultimage-y)
79 71
80# 72#
81# Choosing incompatible machines durings configuration will result in 73# Choosing incompatible machines durings configuration will result in
82# error messages during linking. 74# error messages during linking.
83# 75#
84LDFLAGS_vmlinux += -e _stext 76ifdef CONFIG_SUPERH32
77LDFLAGS_vmlinux += -e _stext
78else
79LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_PAGE_OFFSET) \
80 --defsym phys_stext_shmedia=phys_stext+1 \
81 -e phys_stext_shmedia
82endif
85 83
86ifdef CONFIG_CPU_LITTLE_ENDIAN 84ifdef CONFIG_CPU_LITTLE_ENDIAN
87LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64' 85LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64'
@@ -94,7 +92,9 @@ endif
94KBUILD_CFLAGS += -pipe $(cflags-y) 92KBUILD_CFLAGS += -pipe $(cflags-y)
95KBUILD_AFLAGS += $(cflags-y) 93KBUILD_AFLAGS += $(cflags-y)
96 94
97head-y := arch/sh/kernel/head.o arch/sh/kernel/init_task.o 95head-y := arch/sh/kernel/init_task.o
96head-$(CONFIG_SUPERH32) += arch/sh/kernel/head_32.o
97head-$(CONFIG_SUPERH64) += arch/sh/kernel/head_64.o
98 98
99LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name) 99LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
100 100
@@ -112,11 +112,11 @@ machdir-$(CONFIG_SH_DREAMCAST) += dreamcast
112machdir-$(CONFIG_SH_MPC1211) += mpc1211 112machdir-$(CONFIG_SH_MPC1211) += mpc1211
113machdir-$(CONFIG_SH_SH03) += sh03 113machdir-$(CONFIG_SH_SH03) += sh03
114machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear 114machdir-$(CONFIG_SH_SECUREEDGE5410) += snapgear
115machdir-$(CONFIG_SH_HS7751RVOIP) += renesas/hs7751rvoip
116machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d 115machdir-$(CONFIG_SH_RTS7751R2D) += renesas/rts7751r2d
117machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh 116machdir-$(CONFIG_SH_7751_SYSTEMH) += renesas/systemh
118machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705 117machdir-$(CONFIG_SH_EDOSK7705) += renesas/edosk7705
119machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp 118machdir-$(CONFIG_SH_HIGHLANDER) += renesas/r7780rp
119machdir-$(CONFIG_SH_SDK7780) += renesas/sdk7780
120machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw 120machdir-$(CONFIG_SH_7710VOIPGW) += renesas/sh7710voipgw
121machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto 121machdir-$(CONFIG_SH_X3PROTO) += renesas/x3proto
122machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev 122machdir-$(CONFIG_SH_SH4202_MICRODEV) += superh/microdev
@@ -127,6 +127,7 @@ machdir-$(CONFIG_SH_7206_SOLUTION_ENGINE) += se/7206
127machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619 127machdir-$(CONFIG_SH_7619_SOLUTION_ENGINE) += se/7619
128machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2 128machdir-$(CONFIG_SH_LBOX_RE2) += lboxre2
129machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2 129machdir-$(CONFIG_SH_MAGIC_PANEL_R2) += magicpanelr2
130machdir-$(CONFIG_SH_CAYMAN) += cayman
130 131
131incdir-y := $(notdir $(machdir-y)) 132incdir-y := $(notdir $(machdir-y))
132 133
@@ -137,22 +138,22 @@ endif
137 138
138# Companion chips 139# Companion chips
139core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/ 140core-$(CONFIG_HD6446X_SERIES) += arch/sh/cchips/hd6446x/
140core-$(CONFIG_MFD_SM501) += arch/sh/cchips/voyagergx/
141 141
142cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2 142cpuincdir-$(CONFIG_CPU_SH2) := cpu-sh2
143cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a 143cpuincdir-$(CONFIG_CPU_SH2A) := cpu-sh2a
144cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3 144cpuincdir-$(CONFIG_CPU_SH3) := cpu-sh3
145cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4 145cpuincdir-$(CONFIG_CPU_SH4) := cpu-sh4
146cpuincdir-$(CONFIG_CPU_SH5) := cpu-sh5
146 147
147libs-y := arch/sh/lib/ $(libs-y) $(LIBGCC) 148libs-$(CONFIG_SUPERH32) := arch/sh/lib/ $(libs-y)
149libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y)
150libs-y += $(LIBGCC)
148 151
149drivers-y += arch/sh/drivers/ 152drivers-y += arch/sh/drivers/
150drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/ 153drivers-$(CONFIG_OPROFILE) += arch/sh/oprofile/
151 154
152boot := arch/sh/boot 155boot := arch/sh/boot
153 156
154CPPFLAGS_vmlinux.lds := -traditional
155
156incdir-prefix := $(srctree)/include/asm-sh/ 157incdir-prefix := $(srctree)/include/asm-sh/
157 158
158# Update machine arch and proc symlinks if something which affects 159# Update machine arch and proc symlinks if something which affects
@@ -196,29 +197,61 @@ include/asm-sh/.mach: $(wildcard include/config/sh/*.h) \
196 done 197 done
197 @touch $@ 198 @touch $@
198 199
199archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools
200
201PHONY += maketools FORCE 200PHONY += maketools FORCE
201
202maketools: include/linux/version.h FORCE 202maketools: include/linux/version.h FORCE
203 $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h 203 $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h
204 204
205all: zImage 205all: $(KBUILD_IMAGE)
206 206
207zImage uImage uImage.srec vmlinux.srec: vmlinux 207zImage uImage uImage.srec vmlinux.srec: vmlinux
208 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@ 208 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
209 209
210compressed: zImage 210compressed: zImage
211 211
212archprepare: include/asm-sh/.cpu include/asm-sh/.mach maketools \
213 arch/sh/lib64/syscalltab.h
214
212archclean: 215archclean:
213 $(Q)$(MAKE) $(clean)=$(boot) 216 $(Q)$(MAKE) $(clean)=$(boot)
214 217
215CLEAN_FILES += include/asm-sh/machtypes.h \
216 include/asm-sh/cpu include/asm-sh/.cpu \
217 include/asm-sh/mach include/asm-sh/.mach
218
219define archhelp 218define archhelp
220 @echo '* zImage - Compressed kernel image' 219 @echo '* zImage - Compressed kernel image'
221 @echo ' vmlinux.srec - Create an ELF S-record' 220 @echo ' vmlinux.srec - Create an ELF S-record'
222 @echo ' uImage - Create a bootable image for U-Boot' 221 @echo ' uImage - Create a bootable image for U-Boot'
223 @echo ' uImage.srec - Create an S-record for U-Boot' 222 @echo ' uImage.srec - Create an S-record for U-Boot'
224endef 223endef
224
225define filechk_gen-syscalltab
226 (set -e; \
227 echo "/*"; \
228 echo " * DO NOT MODIFY."; \
229 echo " *"; \
230 echo " * This file was generated by arch/sh/Makefile"; \
231 echo " * Any changes will be reverted at build time."; \
232 echo " */"; \
233 echo ""; \
234 echo "#ifndef __SYSCALLTAB_H"; \
235 echo "#define __SYSCALLTAB_H"; \
236 echo ""; \
237 echo "#include <linux/kernel.h>"; \
238 echo ""; \
239 echo "struct syscall_info {"; \
240 echo " const char *name;"; \
241 echo "} syscall_info_table[] = {"; \
242 sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \
243 s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \
244 echo "};"; \
245 echo ""; \
246 echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)";\
247 echo ""; \
248 echo "#endif /* __SYSCALLTAB_H */" )
249endef
250
251arch/sh/lib64/syscalltab.h: arch/sh/kernel/syscalls_64.S
252 $(call filechk,gen-syscalltab)
253
254CLEAN_FILES += arch/sh/lib64/syscalltab.h \
255 include/asm-sh/machtypes.h \
256 include/asm-sh/cpu include/asm-sh/.cpu \
257 include/asm-sh/mach include/asm-sh/.mach
diff --git a/arch/sh/boards/cayman/Makefile b/arch/sh/boards/cayman/Makefile
new file mode 100644
index 000000000000..489a8f867368
--- /dev/null
+++ b/arch/sh/boards/cayman/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Hitachi Cayman specific parts of the kernel
3#
4obj-y := setup.o irq.o
5obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh64/mach-cayman/irq.c b/arch/sh/boards/cayman/irq.c
index aaad36d37d1f..30ec7bebfaf1 100644
--- a/arch/sh64/mach-cayman/irq.c
+++ b/arch/sh/boards/cayman/irq.c
@@ -1,24 +1,26 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/irq_cayman.c
7 *
8 * SH-5 Cayman Interrupt Support
9 * 3 *
10 * This file handles the board specific parts of the Cayman interrupt system 4 * This file handles the board specific parts of the Cayman interrupt system
11 * 5 *
12 * Copyright (C) 2002 Stuart Menefy 6 * Copyright (C) 2002 Stuart Menefy
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
13 */ 11 */
14 12#include <linux/io.h>
15#include <asm/irq.h>
16#include <asm/page.h>
17#include <asm/io.h>
18#include <linux/irq.h> 13#include <linux/irq.h>
19#include <linux/interrupt.h> 14#include <linux/interrupt.h>
20#include <linux/signal.h> 15#include <linux/signal.h>
21#include <asm/cayman.h> 16#include <asm/cpu/irq.h>
17#include <asm/page.h>
18
19/* Setup for the SMSC FDC37C935 / LAN91C100FD */
20#define SMSC_IRQ IRQ_IRL1
21
22/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
23#define PCI2_IRQ IRQ_IRL3
22 24
23unsigned long epld_virt; 25unsigned long epld_virt;
24 26
diff --git a/arch/sh64/mach-cayman/led.c b/arch/sh/boards/cayman/led.c
index b4e122fd9502..a808eac4ecd6 100644
--- a/arch/sh64/mach-cayman/led.c
+++ b/arch/sh/boards/cayman/led.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/mach-cayman/led.c 2 * arch/sh/boards/cayman/led.c
3 * 3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com> 4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * 5 *
diff --git a/arch/sh64/mach-cayman/setup.c b/arch/sh/boards/cayman/setup.c
index 726c520d7eb9..8c9fa472d8f5 100644
--- a/arch/sh64/mach-cayman/setup.c
+++ b/arch/sh/boards/cayman/setup.c
@@ -1,28 +1,19 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mach-cayman/setup.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-cayman/setup.c
7 * 3 *
8 * SH5 Cayman support 4 * SH5 Cayman support
9 * 5 *
10 * This file handles the architecture-dependent parts of initialization 6 * Copyright (C) 2002 David J. Mckay & Benedict Gaster
7 * Copyright (C) 2003 - 2007 Paul Mundt
11 * 8 *
12 * Copyright David J. Mckay. 9 * This file is subject to the terms and conditions of the GNU General Public
13 * Needs major work! 10 * License. See the file "COPYING" in the main directory of this archive
14 * 11 * for more details.
15 * benedict.gaster@superh.com: 3rd May 2002
16 * Added support for ramdisk, removing statically linked romfs at the same time.
17 *
18 * lethal@linux-sh.org: 15th May 2003
19 * Use the generic procfs cpuinfo interface, just return a valid board name.
20 */ 12 */
21#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/io.h>
22#include <linux/kernel.h> 15#include <linux/kernel.h>
23#include <asm/platform.h> 16#include <asm/cpu/irq.h>
24#include <asm/irq.h>
25#include <asm/io.h>
26 17
27/* 18/*
28 * Platform Dependent Interrupt Priorities. 19 * Platform Dependent Interrupt Priorities.
@@ -96,42 +87,6 @@
96 87
97unsigned long smsc_superio_virt; 88unsigned long smsc_superio_virt;
98 89
99/*
100 * Platform dependent structures: maps and parms block.
101 */
102struct resource io_resources[] = {
103 /* To be updated with external devices */
104};
105
106struct resource kram_resources[] = {
107 /* These must be last in the array */
108 { .name = "Kernel code", .start = 0, .end = 0 },
109 /* These must be last in the array */
110 { .name = "Kernel data", .start = 0, .end = 0 }
111};
112
113struct resource xram_resources[] = {
114 /* To be updated with external devices */
115};
116
117struct resource rom_resources[] = {
118 /* To be updated with external devices */
119};
120
121struct sh64_platform platform_parms = {
122 .readonly_rootfs = 1,
123 .initial_root_dev = 0x0100,
124 .loader_type = 1,
125 .io_res_p = io_resources,
126 .io_res_count = ARRAY_SIZE(io_resources),
127 .kram_res_p = kram_resources,
128 .kram_res_count = ARRAY_SIZE(kram_resources),
129 .xram_res_p = xram_resources,
130 .xram_res_count = ARRAY_SIZE(xram_resources),
131 .rom_res_p = rom_resources,
132 .rom_res_count = ARRAY_SIZE(rom_resources),
133};
134
135int platform_int_priority[NR_INTC_IRQS] = { 90int platform_int_priority[NR_INTC_IRQS] = {
136 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */ 91 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
137 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */ 92 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
@@ -210,30 +165,23 @@ static int __init smsc_superio_setup(void)
210 165
211 return 0; 166 return 0;
212} 167}
213
214/* This is grotty, but, because kernel is always referenced on the link line
215 * before any devices, this is safe.
216 */
217__initcall(smsc_superio_setup); 168__initcall(smsc_superio_setup);
218 169
219void __init platform_setup(void) 170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
220{
221 /* Cayman platform leaves the decision to head.S, for now */
222 platform_parms.fpu_flags = fpu_in_use;
223}
224
225void __init platform_monitor(void)
226{ 171{
227 /* Nothing yet .. */ 172 if (port < 0x400) {
228} 173 extern unsigned long smsc_superio_virt;
174 return (void __iomem *)((port << 2) | smsc_superio_virt);
175 }
229 176
230void __init platform_reserve(void) 177 return (void __iomem *)port;
231{
232 /* Nothing yet .. */
233} 178}
234 179
235const char *get_system_type(void) 180extern void init_cayman_irq(void);
236{
237 return "Hitachi Cayman";
238}
239 181
182static struct sh_machine_vector mv_cayman __initmv = {
183 .mv_name = "Hitachi Cayman",
184 .mv_nr_irqs = 64,
185 .mv_ioport_map = cayman_ioport_map,
186 .mv_init_irq = init_cayman_irq,
187};
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index 5bf01f86c20c..9d0673a9092a 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -136,7 +136,7 @@ int systemasic_irq_demux(int irq)
136 emr = EMR_BASE + (level << 4) + (level << 2); 136 emr = EMR_BASE + (level << 4) + (level << 2);
137 esr = ESR_BASE + (level << 2); 137 esr = ESR_BASE + (level << 2);
138 138
139 /* Mask the ESR to filter any spurious, unwanted interrtupts */ 139 /* Mask the ESR to filter any spurious, unwanted interrupts */
140 status = inl(esr); 140 status = inl(esr);
141 status &= inl(emr); 141 status &= inl(emr);
142 142
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
index 8799df6e866a..2581c8cd5df7 100644
--- a/arch/sh/boards/dreamcast/setup.c
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -33,9 +33,6 @@ extern void aica_time_init(void);
33extern int gapspci_init(void); 33extern int gapspci_init(void);
34extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
35 35
36void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
37int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
38
39static void __init dreamcast_setup(char **cmdline_p) 36static void __init dreamcast_setup(char **cmdline_p)
40{ 37{
41 int i; 38 int i;
@@ -64,9 +61,4 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
64 .mv_name = "Sega Dreamcast", 61 .mv_name = "Sega Dreamcast",
65 .mv_setup = dreamcast_setup, 62 .mv_setup = dreamcast_setup,
66 .mv_irq_demux = systemasic_irq_demux, 63 .mv_irq_demux = systemasic_irq_demux,
67
68#ifdef CONFIG_PCI
69 .mv_consistent_alloc = dreamcast_consistent_alloc,
70 .mv_consistent_free = dreamcast_consistent_free,
71#endif
72}; 64};
diff --git a/arch/sh/boards/landisk/gio.c b/arch/sh/boards/landisk/gio.c
index a37643d002b2..17025080db35 100644
--- a/arch/sh/boards/landisk/gio.c
+++ b/arch/sh/boards/landisk/gio.c
@@ -121,7 +121,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp,
121 return 0; 121 return 0;
122} 122}
123 123
124static struct file_operations gio_fops = { 124static const struct file_operations gio_fops = {
125 .owner = THIS_MODULE, 125 .owner = THIS_MODULE,
126 .open = gio_open, /* open */ 126 .open = gio_open, /* open */
127 .release = gio_close, /* release */ 127 .release = gio_close, /* release */
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Kconfig b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
deleted file mode 100644
index 1743be477be5..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
1if SH_HS7751RVOIP
2
3menu "HS7751RVoIP options"
4
5config HS7751RVOIP_CODEC
6 bool "Support VoIP Codec section"
7 help
8 Selecting this option will support CODEC section.
9
10endmenu
11
12endif
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile
deleted file mode 100644
index e626377c55ee..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the HS7751RVoIP specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_PCI) += pci.o
8
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
deleted file mode 100644
index bb9aa0d62852..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ /dev/null
@@ -1,283 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for Renesas Technology sales HS7751RVoIP
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_hs7751rvoip.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18#include <asm/hs7751rvoip.h>
19#include <asm/addrspace.h>
20
21extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
22extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
23
24/*
25 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
26 * of the 7751R processor, and has a SuperIO accessible via the PCI.
27 * The board also includes a PCMCIA controller on its memory bus,
28 * like the other Solution Engine boards.
29 */
30
31#define CODEC_IO_BASE 0x1000
32#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
33
34static inline unsigned long port2adr(unsigned int port)
35{
36 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
37 if (port == 0x3f6)
38 return ((unsigned long)area5_io16_base + 0x0c);
39 else
40 return ((unsigned long)area5_io16_base + 0x800 +
41 ((port-0x1f0) << 1));
42 else
43 maybebadio((unsigned long)port);
44 return port;
45}
46
47/* The 7751R HS7751RVoIP seems to have everything hooked */
48/* up pretty normally (nothing on high-bytes only...) so this */
49/* shouldn't be needed */
50static inline int shifted_port(unsigned long port)
51{
52 /* For IDE registers, value is not shifted */
53 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
54 return 0;
55 else
56 return 1;
57}
58
59#if defined(CONFIG_HS7751RVOIP_CODEC)
60#define codec_port(port) \
61 ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
62#else
63#define codec_port(port) (0)
64#endif
65
66/*
67 * General outline: remap really low stuff [eventually] to SuperIO,
68 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
69 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
70 * should be way beyond the window, and is used w/o translation for
71 * compatibility.
72 */
73unsigned char hs7751rvoip_inb(unsigned long port)
74{
75 if (PXSEG(port))
76 return ctrl_inb(port);
77 else if (codec_port(port))
78 return ctrl_inb(CODEC_IOMAP(port));
79 else if (is_pci_ioaddr(port) || shifted_port(port))
80 return ctrl_inb(pci_ioaddr(port));
81 else
82 return ctrl_inw(port2adr(port)) & 0xff;
83}
84
85unsigned char hs7751rvoip_inb_p(unsigned long port)
86{
87 unsigned char v;
88
89 if (PXSEG(port))
90 v = ctrl_inb(port);
91 else if (codec_port(port))
92 v = ctrl_inb(CODEC_IOMAP(port));
93 else if (is_pci_ioaddr(port) || shifted_port(port))
94 v = ctrl_inb(pci_ioaddr(port));
95 else
96 v = ctrl_inw(port2adr(port)) & 0xff;
97 ctrl_delay();
98 return v;
99}
100
101unsigned short hs7751rvoip_inw(unsigned long port)
102{
103 if (PXSEG(port))
104 return ctrl_inw(port);
105 else if (is_pci_ioaddr(port) || shifted_port(port))
106 return ctrl_inw(pci_ioaddr(port));
107 else
108 maybebadio(port);
109 return 0;
110}
111
112unsigned int hs7751rvoip_inl(unsigned long port)
113{
114 if (PXSEG(port))
115 return ctrl_inl(port);
116 else if (is_pci_ioaddr(port) || shifted_port(port))
117 return ctrl_inl(pci_ioaddr(port));
118 else
119 maybebadio(port);
120 return 0;
121}
122
123void hs7751rvoip_outb(unsigned char value, unsigned long port)
124{
125
126 if (PXSEG(port))
127 ctrl_outb(value, port);
128 else if (codec_port(port))
129 ctrl_outb(value, CODEC_IOMAP(port));
130 else if (is_pci_ioaddr(port) || shifted_port(port))
131 ctrl_outb(value, pci_ioaddr(port));
132 else
133 ctrl_outb(value, port2adr(port));
134}
135
136void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
137{
138 if (PXSEG(port))
139 ctrl_outb(value, port);
140 else if (codec_port(port))
141 ctrl_outb(value, CODEC_IOMAP(port));
142 else if (is_pci_ioaddr(port) || shifted_port(port))
143 ctrl_outb(value, pci_ioaddr(port));
144 else
145 ctrl_outw(value, port2adr(port));
146
147 ctrl_delay();
148}
149
150void hs7751rvoip_outw(unsigned short value, unsigned long port)
151{
152 if (PXSEG(port))
153 ctrl_outw(value, port);
154 else if (is_pci_ioaddr(port) || shifted_port(port))
155 ctrl_outw(value, pci_ioaddr(port));
156 else
157 maybebadio(port);
158}
159
160void hs7751rvoip_outl(unsigned int value, unsigned long port)
161{
162 if (PXSEG(port))
163 ctrl_outl(value, port);
164 else if (is_pci_ioaddr(port) || shifted_port(port))
165 ctrl_outl(value, pci_ioaddr(port));
166 else
167 maybebadio(port);
168}
169
170void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
171{
172 u8 *buf = addr;
173
174 if (PXSEG(port))
175 while (count--)
176 *buf++ = ctrl_inb(port);
177 else if (codec_port(port))
178 while (count--)
179 *buf++ = ctrl_inb(CODEC_IOMAP(port));
180 else if (is_pci_ioaddr(port) || shifted_port(port)) {
181 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
182
183 while (count--)
184 *buf++ = *bp;
185 } else {
186 volatile u16 *p = (volatile u16 *)port2adr(port);
187
188 while (count--)
189 *buf++ = *p & 0xff;
190 }
191}
192
193void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
194{
195 volatile u16 *p;
196 u16 *buf = addr;
197
198 if (PXSEG(port))
199 p = (volatile u16 *)port;
200 else if (is_pci_ioaddr(port) || shifted_port(port))
201 p = (volatile u16 *)pci_ioaddr(port);
202 else
203 p = (volatile u16 *)port2adr(port);
204 while (count--)
205 *buf++ = *p;
206}
207
208void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
209{
210
211 if (is_pci_ioaddr(port) || shifted_port(port)) {
212 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
213 u32 *buf = addr;
214
215 while (count--)
216 *buf++ = *p;
217 } else
218 maybebadio(port);
219}
220
221void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
222{
223 const u8 *buf = addr;
224
225 if (PXSEG(port))
226 while (count--)
227 ctrl_outb(*buf++, port);
228 else if (codec_port(port))
229 while (count--)
230 ctrl_outb(*buf++, CODEC_IOMAP(port));
231 else if (is_pci_ioaddr(port) || shifted_port(port)) {
232 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
233
234 while (count--)
235 *bp = *buf++;
236 } else {
237 volatile u16 *p = (volatile u16 *)port2adr(port);
238
239 while (count--)
240 *p = *buf++;
241 }
242}
243
244void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
245{
246 volatile u16 *p;
247 const u16 *buf = addr;
248
249 if (PXSEG(port))
250 p = (volatile u16 *)port;
251 else if (is_pci_ioaddr(port) || shifted_port(port))
252 p = (volatile u16 *)pci_ioaddr(port);
253 else
254 p = (volatile u16 *)port2adr(port);
255
256 while (count--)
257 *p = *buf++;
258}
259
260void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
261{
262 const u32 *buf = addr;
263
264 if (is_pci_ioaddr(port) || shifted_port(port)) {
265 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
266
267 while (count--)
268 *p = *buf++;
269 } else
270 maybebadio(port);
271}
272
273void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
274{
275 if (PXSEG(port))
276 return (void __iomem *)port;
277 else if (unlikely(codec_port(port) && (size == 1)))
278 return (void __iomem *)CODEC_IOMAP(port);
279 else if (is_pci_ioaddr(port))
280 return (void __iomem *)pci_ioaddr(port);
281
282 return (void __iomem *)port2adr(port);
283}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
deleted file mode 100644
index e55c6686b21f..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003.
11 */
12
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <linux/interrupt.h>
16#include <asm/io.h>
17#include <asm/irq.h>
18#include <asm/hs7751rvoip.h>
19
20static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
21
22static void enable_hs7751rvoip_irq(unsigned int irq);
23static void disable_hs7751rvoip_irq(unsigned int irq);
24
25/* shutdown is same as "disable" */
26#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq
27
28static void ack_hs7751rvoip_irq(unsigned int irq);
29static void end_hs7751rvoip_irq(unsigned int irq);
30
31static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
32{
33 enable_hs7751rvoip_irq(irq);
34 return 0; /* never anything pending */
35}
36
37static void disable_hs7751rvoip_irq(unsigned int irq)
38{
39 unsigned short val;
40 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
41
42 /* Set the priority in IPR to 0 */
43 val = ctrl_inw(IRLCNTR3);
44 val &= mask;
45 ctrl_outw(val, IRLCNTR3);
46}
47
48static void enable_hs7751rvoip_irq(unsigned int irq)
49{
50 unsigned short val;
51 unsigned short value = (0x0001 << mask_pos[irq]);
52
53 /* Set priority in IPR back to original value */
54 val = ctrl_inw(IRLCNTR3);
55 val |= value;
56 ctrl_outw(val, IRLCNTR3);
57}
58
59static void ack_hs7751rvoip_irq(unsigned int irq)
60{
61 disable_hs7751rvoip_irq(irq);
62}
63
64static void end_hs7751rvoip_irq(unsigned int irq)
65{
66 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
67 enable_hs7751rvoip_irq(irq);
68}
69
70static struct hw_interrupt_type hs7751rvoip_irq_type = {
71 .typename = "HS7751RVoIP IRQ",
72 .startup = startup_hs7751rvoip_irq,
73 .shutdown = shutdown_hs7751rvoip_irq,
74 .enable = enable_hs7751rvoip_irq,
75 .disable = disable_hs7751rvoip_irq,
76 .ack = ack_hs7751rvoip_irq,
77 .end = end_hs7751rvoip_irq,
78};
79
80static void make_hs7751rvoip_irq(unsigned int irq)
81{
82 disable_irq_nosync(irq);
83 irq_desc[irq].chip = &hs7751rvoip_irq_type;
84 disable_hs7751rvoip_irq(irq);
85}
86
87/*
88 * Initialize IRQ setting
89 */
90void __init init_hs7751rvoip_IRQ(void)
91{
92 int i;
93
94 /* IRL0=ON HOOK1
95 * IRL1=OFF HOOK1
96 * IRL2=ON HOOK2
97 * IRL3=OFF HOOK2
98 * IRL4=Ringing Detection
99 * IRL5=CODEC
100 * IRL6=Ethernet
101 * IRL7=Ethernet Hub
102 * IRL8=USB Communication
103 * IRL9=USB Connection
104 * IRL10=USB DMA
105 * IRL11=CF Card
106 * IRL12=PCMCIA
107 * IRL13=PCI Slot
108 */
109 ctrl_outw(0x9876, IRLCNTR1);
110 ctrl_outw(0xdcba, IRLCNTR2);
111 ctrl_outw(0x0050, IRLCNTR4);
112 ctrl_outw(0x4321, IRLCNTR5);
113
114 for (i=0; i<14; i++)
115 make_hs7751rvoip_irq(i);
116}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c
deleted file mode 100644
index 1c0ddee30d21..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/pci.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/pci.c
3 *
4 * Author: Ian DaSilva (idasilva@mvista.com)
5 *
6 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Renesas SH7751R HS7751RVoIP board
12 */
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/module.h>
20
21#include <asm/io.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23#include <asm/hs7751rvoip/hs7751rvoip.h>
24
25#define PCIMCR_MRSET_OFF 0xBFFFFFFF
26#define PCIMCR_RFSH_OFF 0xFFFFFFFB
27
28/*
29 * Only long word accesses of the PCIC's internal local registers and the
30 * configuration registers from the CPU is supported.
31 */
32#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
33#define PCIC_READ(x) readl(PCI_REG(x))
34
35/*
36 * Description: This function sets up and initializes the pcic, sets
37 * up the BARS, maps the DRAM into the address space etc, etc.
38 */
39int __init pcibios_init_platform(void)
40{
41 unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
42 unsigned short bcr2, bcr3;
43
44 /*
45 * Initialize the slave bus controller on the pcic. The values used
46 * here should not be hardcoded, but they should be taken from the bsc
47 * on the processor, to make this function as generic as possible.
48 * (i.e. Another sbc may usr different SDRAM timing settings -- in order
49 * for the pcic to work, its settings need to be exactly the same.)
50 */
51 bcr1 = (*(volatile unsigned long *)(SH7751_BCR1));
52 bcr2 = (*(volatile unsigned short *)(SH7751_BCR2));
53 bcr3 = (*(volatile unsigned short *)(SH7751_BCR3));
54 wcr1 = (*(volatile unsigned long *)(SH7751_WCR1));
55 wcr2 = (*(volatile unsigned long *)(SH7751_WCR2));
56 wcr3 = (*(volatile unsigned long *)(SH7751_WCR3));
57 mcr = (*(volatile unsigned long *)(SH7751_MCR));
58
59 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
60 (*(volatile unsigned long *)(SH7751_BCR1)) = bcr1;
61
62 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
63 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
64 PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
65 PCIC_WRITE(SH7751_PCIBCR3, bcr3); /* PCIC BCR3 */
66 PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
67 PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
68 PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
69 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
70 PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
71
72 /* Enable all interrupts, so we know what to fix */
73 PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
74 PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
75
76 /* Set up standard PCI config registers */
77 PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */
78 PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
79 PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
80 PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */
81 PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
82 PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
83 PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */
84 PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
85 PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */
86 PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
87
88 /* Now turn it on... */
89 PCIC_WRITE(SH7751_PCICR, 0xa5000001);
90
91 /*
92 * Set PCIMBR and PCIIOBR here, assuming a single window
93 * (16M MEM, 256K IO) is enough. If a larger space is
94 * needed, the readx/writex and inx/outx functions will
95 * have to do more (e.g. setting registers for each call).
96 */
97
98 /*
99 * Set the MBR so PCI address is one-to-one with window,
100 * meaning all calls go straight through... use ifdef to
101 * catch erroneous assumption.
102 */
103 BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
104
105 PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
106
107 /* Set IOBR for window containing area specified in pci.h */
108 PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
109
110 /* All done, may as well say so... */
111 printk("SH7751R PCI: Finished initialization of the PCI controller\n");
112
113 return 1;
114}
115
116int __init pcibios_map_platform_irq(u8 slot, u8 pin)
117{
118 switch (slot) {
119 case 0: return IRQ_PCISLOT; /* PCI Extend slot */
120 case 1: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
121 case 2: return IRQ_PCIETH; /* Realtek Ethernet controller */
122 case 3: return IRQ_PCIHUB; /* Realtek Ethernet Hub controller */
123 default:
124 printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
125 return -1;
126 }
127}
128
129static struct resource sh7751_io_resource = {
130 .name = "SH7751_IO",
131 .start = 0x4000,
132 .end = 0x4000 + SH7751_PCI_IO_SIZE - 1,
133 .flags = IORESOURCE_IO
134};
135
136static struct resource sh7751_mem_resource = {
137 .name = "SH7751_mem",
138 .start = SH7751_PCI_MEMORY_BASE,
139 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
140 .flags = IORESOURCE_MEM
141};
142
143extern struct pci_ops sh7751_pci_ops;
144
145struct pci_channel board_pci_channels[] = {
146 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
147 { NULL, NULL, NULL, 0, 0 },
148};
149EXPORT_SYMBOL(board_pci_channels);
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
deleted file mode 100644
index c05625975f2c..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/setup.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * Renesas Technology Sales HS7751RVoIP Support.
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Modified for HS7751RVoIP by
7 * Atom Create Engineering Co., Ltd. 2002.
8 * Lineo uSolutions, Inc. 2003.
9 */
10#include <linux/init.h>
11#include <linux/irq.h>
12#include <linux/mm.h>
13#include <linux/pm.h>
14#include <asm/hs7751rvoip.h>
15#include <asm/io.h>
16#include <asm/machvec.h>
17
18static void hs7751rvoip_power_off(void)
19{
20 ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR);
21}
22
23void *area5_io8_base;
24void *area6_io8_base;
25void *area5_io16_base;
26void *area6_io16_base;
27
28static int __init hs7751rvoip_cf_init(void)
29{
30 pgprot_t prot;
31 unsigned long paddrbase;
32
33 /* open I/O area window */
34 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
35 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
36 area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
37 if (!area5_io16_base) {
38 printk("allocate_cf_area : can't open CF I/O window!\n");
39 return -ENOMEM;
40 }
41
42 /* XXX : do we need attribute and common-memory area also? */
43
44 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
45#if defined(CONFIG_HS7751RVOIP_CODEC)
46 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
47#else
48 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
49#endif
50 area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
51 if (!area6_io8_base) {
52 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
53 return -ENOMEM;
54 }
55 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
56 area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
57 if (!area6_io16_base) {
58 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
59 return -ENOMEM;
60 }
61
62 return 0;
63}
64device_initcall(hs7751rvoip_cf_init);
65
66/*
67 * Initialize the board
68 */
69static void __init hs7751rvoip_setup(char **cmdline_p)
70{
71 ctrl_outb(0xf0, PA_OUTPORTR);
72 pm_power_off = hs7751rvoip_power_off;
73
74 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
75}
76
77static struct sh_machine_vector mv_hs7751rvoip __initmv = {
78 .mv_name = "HS7751RVoIP",
79 .mv_setup = hs7751rvoip_setup,
80 .mv_nr_irqs = 72,
81
82 .mv_inb = hs7751rvoip_inb,
83 .mv_inw = hs7751rvoip_inw,
84 .mv_inl = hs7751rvoip_inl,
85 .mv_outb = hs7751rvoip_outb,
86 .mv_outw = hs7751rvoip_outw,
87 .mv_outl = hs7751rvoip_outl,
88
89 .mv_inb_p = hs7751rvoip_inb_p,
90 .mv_inw_p = hs7751rvoip_inw,
91 .mv_inl_p = hs7751rvoip_inl,
92 .mv_outb_p = hs7751rvoip_outb_p,
93 .mv_outw_p = hs7751rvoip_outw,
94 .mv_outl_p = hs7751rvoip_outl,
95
96 .mv_insb = hs7751rvoip_insb,
97 .mv_insw = hs7751rvoip_insw,
98 .mv_insl = hs7751rvoip_insl,
99 .mv_outsb = hs7751rvoip_outsb,
100 .mv_outsw = hs7751rvoip_outsw,
101 .mv_outsl = hs7751rvoip_outsl,
102
103 .mv_init_irq = init_hs7751rvoip_IRQ,
104 .mv_ioport_map = hs7751rvoip_ioport_map,
105};
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
index dd26182fbf58..20a10080b11f 100644
--- a/arch/sh/boards/renesas/r7780rp/Makefile
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -3,7 +3,7 @@
3# 3#
4irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o 4irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o
5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o 5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
6irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o 6irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o
7obj-y := setup.o $(irqinit-y) 7obj-y := setup.o $(irqinit-y)
8 8
9ifneq ($(CONFIG_SH_R7785RP),y) 9ifneq ($(CONFIG_SH_R7785RP),y)
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 59b47fe061f9..1f8f073f27be 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -47,7 +47,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
47}; 47};
48 48
49static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, 49static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
50 NULL, NULL, mask_registers, NULL, NULL); 50 NULL, mask_registers, NULL, NULL);
51 51
52unsigned char * __init highlander_init_irq_r7780mp(void) 52unsigned char * __init highlander_init_irq_r7780mp(void)
53{ 53{
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index fa4a534cade9..bd34048ed0e1 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -3,21 +3,65 @@
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2006 Paul Mundt
6 * Copyright (C) 2008 Magnus Damm
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 10 * for more details.
10 */ 11 */
11#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h>
12#include <linux/io.h> 14#include <linux/io.h>
13#include <asm/r7780rp.h> 15#include <asm/r7780rp.h>
14 16
17enum {
18 UNUSED = 0,
19
20 /* board specific interrupt sources */
21
22 AX88796, /* Ethernet controller */
23 PSW, /* Push Switch */
24 CF, /* Compact Flash */
25
26 PCI_A,
27 PCI_B,
28 PCI_C,
29 PCI_D,
30};
31
32static struct intc_vect vectors[] __initdata = {
33 INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */
34 INTC_IRQ(PCI_B, 66),
35 INTC_IRQ(PCI_C, 67),
36 INTC_IRQ(PCI_D, 68),
37 INTC_IRQ(CF, IRQ_CF),
38 INTC_IRQ(PSW, IRQ_PSW),
39 INTC_IRQ(AX88796, IRQ_AX88796),
40};
41
42static struct intc_mask_reg mask_registers[] __initdata = {
43 { 0xa5000000, 0, 16, /* IRLMSK */
44 { PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0,
45 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
46};
47
48static unsigned char irl2irq[HL_NR_IRL] __initdata = {
49 65, 66, 67, 68,
50 IRQ_CF, 0, 0, 0,
51 0, 0, 0, 0,
52 IRQ_AX88796, IRQ_PSW
53};
54
55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
56 NULL, mask_registers, NULL, NULL);
57
15unsigned char * __init highlander_init_irq_r7780rp(void) 58unsigned char * __init highlander_init_irq_r7780rp(void)
16{ 59{
17 int i; 60 if (ctrl_inw(0xa5000600)) {
18 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
19 for (i = 0; i < 15; i++) 62 register_intc_controller(&intc_desc);
20 make_r7780rp_irq(i); 63 return irl2irq;
64 }
21 65
22 return NULL; 66 return NULL;
23} 67}
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index b2c6a84673bd..bf7ec107fbc6 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -2,7 +2,7 @@
2 * Renesas Solutions Highlander R7785RP Support. 2 * Renesas Solutions Highlander R7785RP Support.
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2006 - 2008 Paul Mundt
6 * Copyright (C) 2007 Magnus Damm 6 * Copyright (C) 2007 Magnus Damm
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -17,31 +17,52 @@
17enum { 17enum {
18 UNUSED = 0, 18 UNUSED = 0,
19 19
20 /* board specific interrupt sources */ 20 /* FPGA specific interrupt sources */
21 AX88796, /* Ethernet controller */ 21 CF, /* Compact Flash */
22 CF, /* Compact Flash */ 22 SMBUS, /* SMBUS */
23 TP, /* Touch panel */
24 RTC, /* RTC Alarm */
25 TH_ALERT, /* Temperature sensor */
26 AX88796, /* Ethernet controller */
27
28 /* external bus connector */
29 EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7,
23}; 30};
24 31
25static struct intc_vect vectors[] __initdata = { 32static struct intc_vect vectors[] __initdata = {
26 INTC_IRQ(CF, IRQ_CF), 33 INTC_IRQ(CF, IRQ_CF),
34 INTC_IRQ(SMBUS, IRQ_SMBUS),
35 INTC_IRQ(TP, IRQ_TP),
36 INTC_IRQ(RTC, IRQ_RTC),
37 INTC_IRQ(TH_ALERT, IRQ_TH_ALERT),
38
39 INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1),
40 INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3),
41
42 INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
43 INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7),
44
27 INTC_IRQ(AX88796, IRQ_AX88796), 45 INTC_IRQ(AX88796, IRQ_AX88796),
28}; 46};
29 47
30static struct intc_mask_reg mask_registers[] __initdata = { 48static struct intc_mask_reg mask_registers[] __initdata = {
31 { 0xa4000010, 0, 16, /* IRLMCR1 */ 49 { 0xa4000010, 0, 16, /* IRLMCR1 */
32 { 0, 0, 0, 0, CF, AX88796, 0, 0, 50 { 0, 0, 0, 0, CF, AX88796, SMBUS, TP,
33 0, 0, 0, 0, 0, 0, 0, 0 } }, 51 RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
52 { 0xa4000012, 0, 16, /* IRLMCR2 */
53 { 0, 0, 0, 0, 0, 0, 0, 0,
54 EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } },
34}; 55};
35 56
36static unsigned char irl2irq[HL_NR_IRL] __initdata = { 57static unsigned char irl2irq[HL_NR_IRL] __initdata = {
37 0, IRQ_CF, 0, 0, 58 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5,
38 0, 0, 0, 0, 59 IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP,
39 0, 0, IRQ_AX88796, 0, 60 IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0,
40 0, 0, 0, 61 IRQ_EXT1, IRQ_EXT2, IRQ_EXT3,
41}; 62};
42 63
43static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
44 NULL, NULL, mask_registers, NULL, NULL); 65 NULL, mask_registers, NULL, NULL);
45 66
46unsigned char * __init highlander_init_irq_r7785rp(void) 67unsigned char * __init highlander_init_irq_r7785rp(void)
47{ 68{
@@ -58,7 +79,7 @@ unsigned char * __init highlander_init_irq_r7785rp(void)
58 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
59 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
60 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
61 ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */ 82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */
62 83
63 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
64 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
deleted file mode 100644
index e0b8eb52f376..000000000000
--- a/arch/sh/boards/renesas/r7780rp/irq.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Renesas Solutions Highlander R7780RP-1 Support.
3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <asm/r7780rp.h>
16
17#ifdef CONFIG_SH_R7780RP
18static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
19#elif defined(CONFIG_SH_R7780MP)
20static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
21#elif defined(CONFIG_SH_R7785RP)
22static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2};
23#endif
24
25static void enable_r7780rp_irq(unsigned int irq)
26{
27 /* Set priority in IPR back to original value */
28 ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
29}
30
31static void disable_r7780rp_irq(unsigned int irq)
32{
33 /* Set the priority in IPR to 0 */
34 ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
35 IRLCNTR1);
36}
37
38static struct irq_chip r7780rp_irq_chip __read_mostly = {
39 .name = "R7780RP",
40 .mask = disable_r7780rp_irq,
41 .unmask = enable_r7780rp_irq,
42 .mask_ack = disable_r7780rp_irq,
43};
44
45void make_r7780rp_irq(unsigned int irq)
46{
47 disable_irq_nosync(irq);
48 set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip,
49 handle_level_irq, "level");
50 enable_r7780rp_irq(irq);
51}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index 0fdc0bc19145..a43b47726f54 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -179,9 +179,11 @@ static struct platform_device ax88796_device = {
179static struct platform_device *r7780rp_devices[] __initdata = { 179static struct platform_device *r7780rp_devices[] __initdata = {
180 &r8a66597_usb_host_device, 180 &r8a66597_usb_host_device,
181 &m66592_usb_peripheral_device, 181 &m66592_usb_peripheral_device,
182 &cf_ide_device,
183 &heartbeat_device, 182 &heartbeat_device,
183#ifndef CONFIG_SH_R7780RP
184 &cf_ide_device,
184 &ax88796_device, 185 &ax88796_device,
186#endif
185}; 187};
186 188
187static int __init r7780rp_devices_setup(void) 189static int __init r7780rp_devices_setup(void)
@@ -316,9 +318,9 @@ void __init highlander_init_irq(void)
316 break; 318 break;
317#endif 319#endif
318#ifdef CONFIG_SH_R7780RP 320#ifdef CONFIG_SH_R7780RP
319 highlander_init_irq_r7780rp(); 321 ucp = highlander_init_irq_r7780rp();
320 ucp = irl2irq; 322 if (ucp)
321 break; 323 break;
322#endif 324#endif
323 } while (0); 325 } while (0);
324 326
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 7cc2813adfe4..8e49f6e51247 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -13,7 +13,6 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/voyagergx.h>
17#include <asm/rts7751r2d.h> 16#include <asm/rts7751r2d.h>
18 17
19#define R2D_NR_IRL 13 18#define R2D_NR_IRL 13
@@ -71,7 +70,7 @@ static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
71}; 70};
72 71
73static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1, 72static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
74 NULL, NULL, mask_registers_r2d_1, NULL, NULL); 73 NULL, mask_registers_r2d_1, NULL, NULL);
75 74
76#endif /* CONFIG_RTS7751R2D_1 */ 75#endif /* CONFIG_RTS7751R2D_1 */
77 76
@@ -109,7 +108,7 @@ static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
109}; 108};
110 109
111static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus, 110static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
112 NULL, NULL, mask_registers_r2d_plus, NULL, NULL); 111 NULL, mask_registers_r2d_plus, NULL, NULL);
113 112
114#endif /* CONFIG_RTS7751R2D_PLUS */ 113#endif /* CONFIG_RTS7751R2D_PLUS */
115 114
@@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void)
153 } 152 }
154 153
155 register_intc_controller(d); 154 register_intc_controller(d);
156#ifdef CONFIG_MFD_SM501
157 setup_voyagergx_irq();
158#endif
159} 155}
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 8125d20fdbd8..3452b072adde 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -13,34 +13,15 @@
13#include <linux/pata_platform.h> 13#include <linux/pata_platform.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/sm501.h> 15#include <linux/sm501.h>
16#include <linux/sm501-regs.h>
16#include <linux/pm.h> 17#include <linux/pm.h>
18#include <linux/fb.h>
19#include <linux/spi/spi.h>
20#include <linux/spi/spi_bitbang.h>
17#include <asm/machvec.h> 21#include <asm/machvec.h>
18#include <asm/rts7751r2d.h> 22#include <asm/rts7751r2d.h>
19#include <asm/voyagergx.h>
20#include <asm/io.h> 23#include <asm/io.h>
21 24#include <asm/spi.h>
22static void __init voyagergx_serial_init(void)
23{
24 unsigned long val;
25
26 /*
27 * GPIO Control
28 */
29 val = readl((void __iomem *)GPIO_MUX_HIGH);
30 val |= 0x00001fe0;
31 writel(val, (void __iomem *)GPIO_MUX_HIGH);
32
33 /*
34 * Power Mode Gate
35 */
36 val = readl((void __iomem *)POWER_MODE0_GATE);
37 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
38 writel(val, (void __iomem *)POWER_MODE0_GATE);
39
40 val = readl((void __iomem *)POWER_MODE1_GATE);
41 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
42 writel(val, (void __iomem *)POWER_MODE1_GATE);
43}
44 25
45static struct resource cf_ide_resources[] = { 26static struct resource cf_ide_resources[] = {
46 [0] = { 27 [0] = {
@@ -75,6 +56,43 @@ static struct platform_device cf_ide_device = {
75 }, 56 },
76}; 57};
77 58
59static struct spi_board_info spi_bus[] = {
60 {
61 .modalias = "rtc-r9701",
62 .max_speed_hz = 1000000,
63 .mode = SPI_MODE_3,
64 },
65};
66
67static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
68{
69 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
70 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE);
71}
72
73static struct sh_spi_info spi_info = {
74 .num_chipselect = 1,
75 .chip_select = r2d_chip_select,
76};
77
78static struct resource spi_sh_sci_resources[] = {
79 {
80 .start = 0xffe00000,
81 .end = 0xffe0001f,
82 .flags = IORESOURCE_MEM,
83 },
84};
85
86static struct platform_device spi_sh_sci_device = {
87 .name = "spi_sh_sci",
88 .id = -1,
89 .num_resources = ARRAY_SIZE(spi_sh_sci_resources),
90 .resource = spi_sh_sci_resources,
91 .dev = {
92 .platform_data = &spi_info,
93 },
94};
95
78static struct resource heartbeat_resources[] = { 96static struct resource heartbeat_resources[] = {
79 [0] = { 97 [0] = {
80 .start = PA_OUTPORT, 98 .start = PA_OUTPORT,
@@ -93,11 +111,11 @@ static struct platform_device heartbeat_device = {
93#ifdef CONFIG_MFD_SM501 111#ifdef CONFIG_MFD_SM501
94static struct plat_serial8250_port uart_platform_data[] = { 112static struct plat_serial8250_port uart_platform_data[] = {
95 { 113 {
96 .membase = (void __iomem *)VOYAGER_UART_BASE, 114 .membase = (void __iomem *)0xb3e30000,
97 .mapbase = VOYAGER_UART_BASE, 115 .mapbase = 0xb3e30000,
98 .iotype = UPIO_MEM, 116 .iotype = UPIO_MEM,
99 .irq = IRQ_SM501_U0, 117 .irq = IRQ_VOYAGER,
100 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 118 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
101 .regshift = 2, 119 .regshift = 2,
102 .uartclk = (9600 * 16), 120 .uartclk = (9600 * 16),
103 }, 121 },
@@ -124,14 +142,67 @@ static struct resource sm501_resources[] = {
124 .flags = IORESOURCE_MEM, 142 .flags = IORESOURCE_MEM,
125 }, 143 },
126 [2] = { 144 [2] = {
127 .start = IRQ_SM501_CV, 145 .start = IRQ_VOYAGER,
128 .flags = IORESOURCE_IRQ, 146 .flags = IORESOURCE_IRQ,
129 }, 147 },
130}; 148};
131 149
150static struct fb_videomode sm501_default_mode = {
151 .pixclock = 35714,
152 .xres = 640,
153 .yres = 480,
154 .left_margin = 105,
155 .right_margin = 50,
156 .upper_margin = 35,
157 .lower_margin = 0,
158 .hsync_len = 96,
159 .vsync_len = 2,
160 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
161};
162
163static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
164 .def_bpp = 16,
165 .def_mode = &sm501_default_mode,
166 .flags = SM501FB_FLAG_USE_INIT_MODE |
167 SM501FB_FLAG_USE_HWCURSOR |
168 SM501FB_FLAG_USE_HWACCEL |
169 SM501FB_FLAG_DISABLE_AT_EXIT,
170};
171
172static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
173 .flags = (SM501FB_FLAG_USE_INIT_MODE |
174 SM501FB_FLAG_USE_HWCURSOR |
175 SM501FB_FLAG_USE_HWACCEL |
176 SM501FB_FLAG_DISABLE_AT_EXIT),
177
178};
179
180static struct sm501_platdata_fb sm501_fb_pdata = {
181 .fb_route = SM501_FB_OWN,
182 .fb_crt = &sm501_pdata_fbsub_crt,
183 .fb_pnl = &sm501_pdata_fbsub_pnl,
184 .flags = SM501_FBPD_SWAP_FB_ENDIAN,
185};
186
187static struct sm501_initdata sm501_initdata = {
188 .gpio_high = {
189 .set = 0x00001fe0,
190 .mask = 0x0,
191 },
192 .devices = SM501_USE_USB_HOST,
193};
194
195static struct sm501_platdata sm501_platform_data = {
196 .init = &sm501_initdata,
197 .fb = &sm501_fb_pdata,
198};
199
132static struct platform_device sm501_device = { 200static struct platform_device sm501_device = {
133 .name = "sm501", 201 .name = "sm501",
134 .id = -1, 202 .id = -1,
203 .dev = {
204 .platform_data = &sm501_platform_data,
205 },
135 .num_resources = ARRAY_SIZE(sm501_resources), 206 .num_resources = ARRAY_SIZE(sm501_resources),
136 .resource = sm501_resources, 207 .resource = sm501_resources,
137}; 208};
@@ -145,10 +216,12 @@ static struct platform_device *rts7751r2d_devices[] __initdata = {
145#endif 216#endif
146 &cf_ide_device, 217 &cf_ide_device,
147 &heartbeat_device, 218 &heartbeat_device,
219 &spi_sh_sci_device,
148}; 220};
149 221
150static int __init rts7751r2d_devices_setup(void) 222static int __init rts7751r2d_devices_setup(void)
151{ 223{
224 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
152 return platform_add_devices(rts7751r2d_devices, 225 return platform_add_devices(rts7751r2d_devices,
153 ARRAY_SIZE(rts7751r2d_devices)); 226 ARRAY_SIZE(rts7751r2d_devices));
154} 227}
@@ -192,6 +265,7 @@ u8 rts7751r2d_readb(void __iomem *addr)
192 */ 265 */
193static void __init rts7751r2d_setup(char **cmdline_p) 266static void __init rts7751r2d_setup(char **cmdline_p)
194{ 267{
268 void __iomem *sm501_reg;
195 u16 ver = ctrl_inw(PA_VERREG); 269 u16 ver = ctrl_inw(PA_VERREG);
196 270
197 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 271 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
@@ -202,7 +276,30 @@ static void __init rts7751r2d_setup(char **cmdline_p)
202 ctrl_outw(0x0000, PA_OUTPORT); 276 ctrl_outw(0x0000, PA_OUTPORT);
203 pm_power_off = rts7751r2d_power_off; 277 pm_power_off = rts7751r2d_power_off;
204 278
205 voyagergx_serial_init(); 279 /* sm501 dram configuration:
280 * ColSizeX = 11 - External Memory Column Size: 256 words.
281 * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
282 * RstX = 1 - External Memory Reset: Normal.
283 * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
284 * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
285 * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
286 * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
287 * Rst = 1 - Internal Memory Reset: Normal.
288 * RA = 1 - Internal Memory Remain in Active State: Do not remain.
289 */
290
291 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
292 writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
293
294 /*
295 * Power Mode Gate - Enable UART0
296 */
297
298 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
299 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
300
301 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
302 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
206} 303}
207 304
208/* 305/*
@@ -215,8 +312,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
215 .mv_irq_demux = rts7751r2d_irq_demux, 312 .mv_irq_demux = rts7751r2d_irq_demux,
216 .mv_writeb = rts7751r2d_writeb, 313 .mv_writeb = rts7751r2d_writeb,
217 .mv_readb = rts7751r2d_readb, 314 .mv_readb = rts7751r2d_readb,
218#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
219 .mv_consistent_alloc = voyagergx_consistent_alloc,
220 .mv_consistent_free = voyagergx_consistent_free,
221#endif
222}; 315};
diff --git a/arch/sh/boards/renesas/sdk7780/Kconfig b/arch/sh/boards/renesas/sdk7780/Kconfig
new file mode 100644
index 000000000000..e4f5b6985be1
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/Kconfig
@@ -0,0 +1,23 @@
1if SH_SDK7780
2
3choice
4 prompt "SDK7780 options"
5 default SH_SDK7780_BASE
6
7config SH_SDK7780_STANDALONE
8 bool "SDK7780 board support"
9 depends on CPU_SUBTYPE_SH7780
10 help
11 Selecting this option will enable support for the
12 standalone version of the SDK7780. If in doubt, say Y.
13
14config SH_SDK7780_BASE
15 bool "SDK7780 with base-board support"
16 depends on CPU_SUBTYPE_SH7780
17 help
18 Selecting this option will enable support for the expansion
19 baseboard devices. If in doubt, say Y.
20
21endchoice
22
23endif
diff --git a/arch/sh/boards/renesas/sdk7780/Makefile b/arch/sh/boards/renesas/sdk7780/Makefile
new file mode 100644
index 000000000000..3d8f0befc35d
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the SDK7780 specific parts of the kernel
3#
4obj-y := setup.o irq.o
5
diff --git a/arch/sh/boards/renesas/sdk7780/irq.c b/arch/sh/boards/renesas/sdk7780/irq.c
new file mode 100644
index 000000000000..87cdc578f6ff
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/irq.c
@@ -0,0 +1,46 @@
1/*
2 * linux/arch/sh/boards/renesas/sdk7780/irq.c
3 *
4 * Renesas Technology Europe SDK7780 Support.
5 *
6 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/io.h>
15#include <asm/sdk7780.h>
16
17enum {
18 UNUSED = 0,
19 /* board specific interrupt sources */
20 SMC91C111, /* Ethernet controller */
21};
22
23static struct intc_vect fpga_vectors[] __initdata = {
24 INTC_IRQ(SMC91C111, IRQ_ETHERNET),
25};
26
27static struct intc_mask_reg fpga_mask_registers[] __initdata = {
28 { 0, FPGA_IRQ0MR, 16,
29 { 0, 0, 0, 0, 0, 0, 0, 0,
30 0, 0, 0, SMC91C111, 0, 0, 0, 0 } },
31};
32
33static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors,
34 NULL, fpga_mask_registers, NULL, NULL);
35
36void __init init_sdk7780_IRQ(void)
37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44
45 register_intc_controller(&fpga_intc_desc);
46}
diff --git a/arch/sh/boards/renesas/sdk7780/setup.c b/arch/sh/boards/renesas/sdk7780/setup.c
new file mode 100644
index 000000000000..5df32f201870
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/setup.c
@@ -0,0 +1,109 @@
1/*
2 * arch/sh/boards/renesas/sdk7780/setup.c
3 *
4 * Renesas Solutions SH7780 SDK Support
5 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/platform_device.h>
14#include <linux/pata_platform.h>
15#include <asm/machvec.h>
16#include <asm/sdk7780.h>
17#include <asm/heartbeat.h>
18#include <asm/io.h>
19#include <asm/addrspace.h>
20
21#define GPIO_PECR 0xFFEA0008
22
23//* Heartbeat */
24static struct heartbeat_data heartbeat_data = {
25 .regsize = 16,
26};
27
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44};
45
46/* SMC91x */
47static struct resource smc91x_eth_resources[] = {
48 [0] = {
49 .name = "smc91x-regs" ,
50 .start = PA_LAN + 0x300,
51 .end = PA_LAN + 0x300 + 0x10 ,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_ETHERNET,
56 .end = IRQ_ETHERNET,
57 .flags = IORESOURCE_IRQ,
58 },
59};
60
61static struct platform_device smc91x_eth_device = {
62 .name = "smc91x",
63 .id = 0,
64 .dev = {
65 .dma_mask = NULL, /* don't use dma */
66 .coherent_dma_mask = 0xffffffff,
67 },
68 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
69 .resource = smc91x_eth_resources,
70};
71
72static struct platform_device *sdk7780_devices[] __initdata = {
73 &heartbeat_device,
74 &smc91x_eth_device,
75};
76
77static int __init sdk7780_devices_setup(void)
78{
79 return platform_add_devices(sdk7780_devices,
80 ARRAY_SIZE(sdk7780_devices));
81}
82device_initcall(sdk7780_devices_setup);
83
84static void __init sdk7780_setup(char **cmdline_p)
85{
86 u16 ver = ctrl_inw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER);
88
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), "
91 "FPGA version: %d (revision %d), datestamp : %d\n",
92 (ver >> 12) & 0xf, (ver >> 8) & 0xf,
93 (ver >> 4) & 0xf, ver & 0xf,
94 dateStamp);
95
96 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR);
98}
99
100/*
101 * The Machine Vector
102 */
103static struct sh_machine_vector mv_se7780 __initmv = {
104 .mv_name = "Renesas SDK7780-R3" ,
105 .mv_setup = sdk7780_setup,
106 .mv_nr_irqs = 111,
107 .mv_init_irq = init_sdk7780_IRQ,
108};
109
diff --git a/arch/sh/boot/Makefile b/arch/sh/boot/Makefile
index 1b0f5be01d10..59f552c13349 100644
--- a/arch/sh/boot/Makefile
+++ b/arch/sh/boot/Makefile
@@ -35,17 +35,28 @@ $(obj)/compressed/vmlinux: FORCE
35KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%8x" \ 35KERNEL_LOAD := $(shell /bin/bash -c 'printf "0x%8x" \
36 $$[$(CONFIG_PAGE_OFFSET) + \ 36 $$[$(CONFIG_PAGE_OFFSET) + \
37 $(CONFIG_MEMORY_START) + \ 37 $(CONFIG_MEMORY_START) + \
38 $(CONFIG_ZERO_PAGE_OFFSET)]')
39
40KERNEL_ENTRY := $(shell /bin/bash -c 'printf "0x%8x" \
41 $$[$(CONFIG_PAGE_OFFSET) + \
42 $(CONFIG_MEMORY_START) + \
38 $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]') 43 $(CONFIG_ZERO_PAGE_OFFSET)+0x1000]')
39 44
40quiet_cmd_uimage = UIMAGE $@ 45quiet_cmd_uimage = UIMAGE $@
41 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \ 46 cmd_uimage = $(CONFIG_SHELL) $(MKIMAGE) -A sh -O linux -T kernel \
42 -C none -a $(KERNEL_LOAD) -e $(KERNEL_LOAD) \ 47 -C none -a $(KERNEL_LOAD) -e $(KERNEL_ENTRY) \
43 -n 'Linux-$(KERNELRELEASE)' -d $< $@ 48 -n 'Linux-$(KERNELRELEASE)' -d $< $@
44 49
45$(obj)/uImage: $(obj)/zImage FORCE 50$(obj)/uImage: $(obj)/vmlinux.bin.gz FORCE
46 $(call if_changed,uimage) 51 $(call if_changed,uimage)
47 @echo ' Image $@ is ready' 52 @echo ' Image $@ is ready'
48 53
54$(obj)/vmlinux.bin: vmlinux FORCE
55 $(call if_changed,objcopy)
56
57$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
58 $(call if_changed,gzip)
59
49OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec 60OBJCOPYFLAGS_vmlinux.srec := -I binary -O srec
50$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux 61$(obj)/vmlinux.srec: $(obj)/compressed/vmlinux
51 $(call if_changed,objcopy) 62 $(call if_changed,objcopy)
@@ -54,4 +65,5 @@ OBJCOPYFLAGS_uImage.srec := -I binary -O srec
54$(obj)/uImage.srec: $(obj)/uImage 65$(obj)/uImage.srec: $(obj)/uImage
55 $(call if_changed,objcopy) 66 $(call if_changed,objcopy)
56 67
57clean-files += uImage uImage.srec vmlinux.srec 68clean-files += uImage uImage.srec vmlinux.srec \
69 vmlinux.bin vmlinux.bin.gz
diff --git a/arch/sh/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile
index 906a13f82fe0..efb01dc3c8c3 100644
--- a/arch/sh/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile
@@ -1,43 +1,5 @@
1# 1ifeq ($(CONFIG_SUPERH32),y)
2# linux/arch/sh/boot/compressed/Makefile 2include ${srctree}/arch/sh/boot/compressed/Makefile_32
3# 3else
4# create a compressed vmlinux image from the original vmlinux 4include ${srctree}/arch/sh/boot/compressed/Makefile_64
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz head.o misc.o piggy.o
8EXTRA_AFLAGS := -traditional
9
10OBJECTS = $(obj)/head.o $(obj)/misc.o
11
12ifdef CONFIG_SH_STANDARD_BIOS
13OBJECTS += $(obj)/../../kernel/sh_bios.o
14endif 5endif
15
16#
17# IMAGE_OFFSET is the load offset of the compression loader
18#
19IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
20 $$[$(CONFIG_PAGE_OFFSET) + \
21 $(CONFIG_MEMORY_START) + \
22 $(CONFIG_BOOT_LINK_OFFSET)]')
23
24LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
25
26LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
27
28
29$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
30 $(call if_changed,ld)
31 @:
32
33$(obj)/vmlinux.bin: vmlinux FORCE
34 $(call if_changed,objcopy)
35
36$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
37 $(call if_changed,gzip)
38
39LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T
40OBJCOPYFLAGS += -R .empty_zero_page
41
42$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
43 $(call if_changed,ld)
diff --git a/arch/sh/boot/compressed/Makefile_32 b/arch/sh/boot/compressed/Makefile_32
new file mode 100644
index 000000000000..6ac8d4a4ed1d
--- /dev/null
+++ b/arch/sh/boot/compressed/Makefile_32
@@ -0,0 +1,43 @@
1#
2# linux/arch/sh/boot/compressed/Makefile
3#
4# create a compressed vmlinux image from the original vmlinux
5#
6
7targets := vmlinux vmlinux.bin vmlinux.bin.gz \
8 head_32.o misc_32.o piggy.o
9EXTRA_AFLAGS := -traditional
10
11OBJECTS = $(obj)/head_32.o $(obj)/misc_32.o
12
13ifdef CONFIG_SH_STANDARD_BIOS
14OBJECTS += $(obj)/../../kernel/sh_bios.o
15endif
16
17#
18# IMAGE_OFFSET is the load offset of the compression loader
19#
20IMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
21 $$[$(CONFIG_PAGE_OFFSET) + \
22 $(CONFIG_MEMORY_START) + \
23 $(CONFIG_BOOT_LINK_OFFSET)]')
24
25LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
26
27LDFLAGS_vmlinux := -Ttext $(IMAGE_OFFSET) -e startup -T $(obj)/../../kernel/vmlinux.lds
28
29$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o $(LIBGCC) FORCE
30 $(call if_changed,ld)
31 @:
32
33$(obj)/vmlinux.bin: vmlinux FORCE
34 $(call if_changed,objcopy)
35
36$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
37 $(call if_changed,gzip)
38
39LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh-linux -T
40OBJCOPYFLAGS += -R .empty_zero_page
41
42$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
43 $(call if_changed,ld)
diff --git a/arch/sh64/boot/compressed/Makefile b/arch/sh/boot/compressed/Makefile_64
index 9cd216718856..4334f2b86d8f 100644
--- a/arch/sh64/boot/compressed/Makefile
+++ b/arch/sh/boot/compressed/Makefile_64
@@ -1,32 +1,32 @@
1# 1#
2# linux/arch/sh64/boot/compressed/Makefile 2# arch/sh/boot/compressed/Makefile_64
3# 3#
4# This file is subject to the terms and conditions of the GNU General Public 4# create a compressed vmlinux image from the original vmlinux
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7# 5#
8# Copyright (C) 2002 Stuart Menefy 6# Copyright (C) 2002 Stuart Menefy
9# Copyright (C) 2004 Paul Mundt 7# Copyright (C) 2004 Paul Mundt
10# 8#
11# create a compressed vmlinux image from the original vmlinux 9# This file is subject to the terms and conditions of the GNU General Public
10# License. See the file "COPYING" in the main directory of this archive
11# for more details.
12# 12#
13 13
14targets := vmlinux vmlinux.bin vmlinux.bin.gz \ 14targets := vmlinux vmlinux.bin vmlinux.bin.gz \
15 head.o misc.o cache.o piggy.o vmlinux.lds 15 head_64.o misc_64.o cache.o piggy.o
16
17EXTRA_AFLAGS := -traditional 16EXTRA_AFLAGS := -traditional
18 17
19OBJECTS := $(obj)/head.o $(obj)/misc.o $(obj)/cache.o 18OBJECTS := $(obj)/vmlinux_64.lds $(obj)/head_64.o $(obj)/misc_64.o \
19 $(obj)/cache.o
20 20
21# 21#
22# ZIMAGE_OFFSET is the load offset of the compression loader 22# ZIMAGE_OFFSET is the load offset of the compression loader
23# (4M for the kernel plus 64K for this loader) 23# (4M for the kernel plus 64K for this loader)
24# 24#
25ZIMAGE_OFFSET = $(shell printf "0x%8x" $$[$(CONFIG_MEMORY_START)+0x400000+0x10000]) 25ZIMAGE_OFFSET := $(shell /bin/bash -c 'printf "0x%08x" \
26 $$[$(CONFIG_PAGE_OFFSET)+0x400000+0x10000]')
26 27
27LDFLAGS_vmlinux := -Ttext $(ZIMAGE_OFFSET) -e startup \ 28LDFLAGS_vmlinux := -Ttext $(ZIMAGE_OFFSET) -e startup \
28 -T $(obj)/../../kernel/vmlinux.lds \ 29 -T $(obj)/../../kernel/vmlinux.lds
29 --no-warn-mismatch
30 30
31$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE 31$(obj)/vmlinux: $(OBJECTS) $(obj)/piggy.o FORCE
32 $(call if_changed,ld) 32 $(call if_changed,ld)
@@ -41,6 +41,5 @@ $(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
41LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T 41LDFLAGS_piggy.o := -r --format binary --oformat elf32-sh64-linux -T
42OBJCOPYFLAGS += -R .empty_zero_page 42OBJCOPYFLAGS += -R .empty_zero_page
43 43
44$(obj)/piggy.o: $(obj)/vmlinux.lds $(obj)/vmlinux.bin.gz FORCE 44$(obj)/piggy.o: $(obj)/vmlinux.scr $(obj)/vmlinux.bin.gz FORCE
45 $(call if_changed,ld) 45 $(call if_changed,ld)
46
diff --git a/arch/sh/boot/compressed/cache.c b/arch/sh/boot/compressed/cache.c
new file mode 100644
index 000000000000..e27fc74f228c
--- /dev/null
+++ b/arch/sh/boot/compressed/cache.c
@@ -0,0 +1,12 @@
1int cache_control(unsigned int command)
2{
3 volatile unsigned int *p = (volatile unsigned int *) 0x80000000;
4 int i;
5
6 for (i = 0; i < (32 * 1024); i += 32) {
7 (void)*p;
8 p += (32 / sizeof (int));
9 }
10
11 return 0;
12}
diff --git a/arch/sh/boot/compressed/head.S b/arch/sh/boot/compressed/head_32.S
index a8399b013729..a8399b013729 100644
--- a/arch/sh/boot/compressed/head.S
+++ b/arch/sh/boot/compressed/head_32.S
diff --git a/arch/sh64/boot/compressed/head.S b/arch/sh/boot/compressed/head_64.S
index 82040b1a29cf..1d4ecbfc767c 100644
--- a/arch/sh64/boot/compressed/head.S
+++ b/arch/sh/boot/compressed/head_64.S
@@ -13,11 +13,10 @@
13 * Modification for compressed loader: 13 * Modification for compressed loader:
14 * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com) 14 * Copyright (C) 2002 Stuart Menefy (stuart.menefy@st.com)
15 */ 15 */
16
17#include <linux/linkage.h> 16#include <linux/linkage.h>
18#include <asm/registers.h>
19#include <asm/cache.h> 17#include <asm/cache.h>
20#include <asm/mmu_context.h> 18#include <asm/cpu/mmu_context.h>
19#include <asm/cpu/registers.h>
21 20
22/* 21/*
23 * Fixed TLB entries to identity map the beginning of RAM 22 * Fixed TLB entries to identity map the beginning of RAM
@@ -51,14 +50,14 @@ startup:
51 * uninitialized target registers. 50 * uninitialized target registers.
52 * This must be executed before the first branch. 51 * This must be executed before the first branch.
53 */ 52 */
54 ptabs/u ZERO, tr0 53 ptabs/u r63, tr0
55 ptabs/u ZERO, tr1 54 ptabs/u r63, tr1
56 ptabs/u ZERO, tr2 55 ptabs/u r63, tr2
57 ptabs/u ZERO, tr3 56 ptabs/u r63, tr3
58 ptabs/u ZERO, tr4 57 ptabs/u r63, tr4
59 ptabs/u ZERO, tr5 58 ptabs/u r63, tr5
60 ptabs/u ZERO, tr6 59 ptabs/u r63, tr6
61 ptabs/u ZERO, tr7 60 ptabs/u r63, tr7
62 synci 61 synci
63 62
64 /* 63 /*
@@ -69,7 +68,7 @@ startup:
69 pta 1f, tr1 68 pta 1f, tr1
70 movi ITLB_FIXED, r21 69 movi ITLB_FIXED, r21
71 movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 70 movi ITLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
721: putcfg r21, 0, ZERO /* Clear MMUIR[n].PTEH.V */ 711: putcfg r21, 0, r63 /* Clear MMUIR[n].PTEH.V */
73 addi r21, TLB_STEP, r21 72 addi r21, TLB_STEP, r21
74 bne r21, r22, tr1 73 bne r21, r22, tr1
75 74
@@ -77,7 +76,7 @@ startup:
77 pta 1f, tr1 76 pta 1f, tr1
78 movi DTLB_FIXED, r21 77 movi DTLB_FIXED, r21
79 movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22 78 movi DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP, r22
801: putcfg r21, 0, ZERO /* Clear MMUDR[n].PTEH.V */ 791: putcfg r21, 0, r63 /* Clear MMUDR[n].PTEH.V */
81 addi r21, TLB_STEP, r21 80 addi r21, TLB_STEP, r21
82 bne r21, r22, tr1 81 bne r21, r22, tr1
83 82
@@ -133,7 +132,7 @@ startup:
133 pt 1f, tr1 132 pt 1f, tr1
134 movi datalabel __bss_start, r22 133 movi datalabel __bss_start, r22
135 movi datalabel _end, r23 134 movi datalabel _end, r23
1361: st.l r22, 0, ZERO 1351: st.l r22, 0, r63
137 addi r22, 4, r22 136 addi r22, 4, r22
138 bne r22, r23, tr1 137 bne r22, r23, tr1
139 138
@@ -161,4 +160,4 @@ startup:
161 160
162 /* Shouldn't return here, but just in case, loop forever */ 161 /* Shouldn't return here, but just in case, loop forever */
163 pt 1f, tr0 162 pt 1f, tr0
1641: blink tr0, ZERO 1631: blink tr0, r63
diff --git a/arch/sh/boot/compressed/misc.c b/arch/sh/boot/compressed/misc_32.c
index df65e305acf7..adcea31e663e 100644
--- a/arch/sh/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc_32.c
@@ -230,7 +230,10 @@ long* stack_start = &user_stack[STACK_SIZE];
230void decompress_kernel(void) 230void decompress_kernel(void)
231{ 231{
232 output_data = 0; 232 output_data = 0;
233 output_ptr = P2SEGADDR((unsigned long)&_text+PAGE_SIZE); 233 output_ptr = PHYSADDR((unsigned long)&_text+PAGE_SIZE);
234#ifdef CONFIG_29BIT
235 output_ptr |= P2SEG;
236#endif
234 free_mem_ptr = (unsigned long)&_end; 237 free_mem_ptr = (unsigned long)&_end;
235 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE; 238 free_mem_end_ptr = free_mem_ptr + HEAP_SIZE;
236 239
diff --git a/arch/sh64/boot/compressed/misc.c b/arch/sh/boot/compressed/misc_64.c
index aea00c53ce29..a006ef89b9dd 100644
--- a/arch/sh64/boot/compressed/misc.c
+++ b/arch/sh/boot/compressed/misc_64.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/boot/compressed/misc.c 2 * arch/sh/boot/compressed/misc_64.c
3 * 3 *
4 * This is a collection of several routines from gzip-1.0.3 4 * This is a collection of several routines from gzip-1.0.3
5 * adapted for Linux. 5 * adapted for Linux.
diff --git a/arch/sh64/boot/compressed/vmlinux.lds.S b/arch/sh/boot/compressed/vmlinux_64.lds
index 59c2ef4aeda5..59c2ef4aeda5 100644
--- a/arch/sh64/boot/compressed/vmlinux.lds.S
+++ b/arch/sh/boot/compressed/vmlinux_64.lds
diff --git a/arch/sh/cchips/voyagergx/Makefile b/arch/sh/cchips/voyagergx/Makefile
deleted file mode 100644
index f73963cb3744..000000000000
--- a/arch/sh/cchips/voyagergx/Makefile
+++ /dev/null
@@ -1,9 +0,0 @@
1#
2# Makefile for VoyagerGX
3#
4
5obj-y := irq.o setup.o
6
7obj-$(CONFIG_USB_OHCI_HCD) += consistent.o
8
9EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/cchips/voyagergx/consistent.c b/arch/sh/cchips/voyagergx/consistent.c
deleted file mode 100644
index 07e8b9c5a531..000000000000
--- a/arch/sh/cchips/voyagergx/consistent.c
+++ /dev/null
@@ -1,121 +0,0 @@
1/*
2 * arch/sh/cchips/voyagergx/consistent.c
3 *
4 * Copyright (C) 2004 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/mm.h>
11#include <linux/dma-mapping.h>
12#include <linux/slab.h>
13#include <linux/list.h>
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <asm/io.h>
18
19
20struct voya_alloc_entry {
21 struct list_head list;
22 unsigned long ofs;
23 unsigned long len;
24};
25
26static DEFINE_SPINLOCK(voya_list_lock);
27static LIST_HEAD(voya_alloc_list);
28
29#define OHCI_SRAM_START 0xb0000000
30#define OHCI_HCCA_SIZE 0x100
31#define OHCI_SRAM_SIZE 0x10000
32
33#define VOYAGER_OHCI_NAME "voyager-ohci"
34
35void *voyagergx_consistent_alloc(struct device *dev, size_t size,
36 dma_addr_t *handle, gfp_t flag)
37{
38 struct list_head *list = &voya_alloc_list;
39 struct voya_alloc_entry *entry;
40 unsigned long start, end;
41 unsigned long flags;
42
43 /*
44 * The SM501 contains an integrated 8051 with its own SRAM.
45 * Devices within the cchip can all hook into the 8051 SRAM.
46 * We presently use this for the OHCI.
47 *
48 * Everything else goes through consistent_alloc().
49 */
50 if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
51 return NULL;
52
53 start = OHCI_SRAM_START + OHCI_HCCA_SIZE;
54
55 entry = kmalloc(sizeof(struct voya_alloc_entry), GFP_ATOMIC);
56 if (!entry)
57 return ERR_PTR(-ENOMEM);
58
59 entry->len = (size + 15) & ~15;
60
61 /*
62 * The basis for this allocator is dwmw2's malloc.. the
63 * Matrox allocator :-)
64 */
65 spin_lock_irqsave(&voya_list_lock, flags);
66 list_for_each(list, &voya_alloc_list) {
67 struct voya_alloc_entry *p;
68
69 p = list_entry(list, struct voya_alloc_entry, list);
70
71 if (p->ofs - start >= size)
72 goto out;
73
74 start = p->ofs + p->len;
75 }
76
77 end = start + (OHCI_SRAM_SIZE - OHCI_HCCA_SIZE);
78 list = &voya_alloc_list;
79
80 if (end - start >= size) {
81out:
82 entry->ofs = start;
83 list_add_tail(&entry->list, list);
84 spin_unlock_irqrestore(&voya_list_lock, flags);
85
86 *handle = start;
87 return (void *)start;
88 }
89
90 kfree(entry);
91 spin_unlock_irqrestore(&voya_list_lock, flags);
92
93 return ERR_PTR(-EINVAL);
94}
95
96int voyagergx_consistent_free(struct device *dev, size_t size,
97 void *vaddr, dma_addr_t handle)
98{
99 struct voya_alloc_entry *entry;
100 unsigned long flags;
101
102 if (!dev || strcmp(dev->driver->name, VOYAGER_OHCI_NAME))
103 return -EINVAL;
104
105 spin_lock_irqsave(&voya_list_lock, flags);
106 list_for_each_entry(entry, &voya_alloc_list, list) {
107 if (entry->ofs != handle)
108 continue;
109
110 list_del(&entry->list);
111 kfree(entry);
112
113 break;
114 }
115 spin_unlock_irqrestore(&voya_list_lock, flags);
116
117 return 0;
118}
119
120EXPORT_SYMBOL(voyagergx_consistent_alloc);
121EXPORT_SYMBOL(voyagergx_consistent_free);
diff --git a/arch/sh/cchips/voyagergx/irq.c b/arch/sh/cchips/voyagergx/irq.c
deleted file mode 100644
index ade303876841..000000000000
--- a/arch/sh/cchips/voyagergx/irq.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/* -------------------------------------------------------------------- */
2/* setup_voyagergx.c: */
3/* -------------------------------------------------------------------- */
4/* This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17
18 Copyright 2003 (c) Lineo uSolutions,Inc.
19*/
20#include <linux/interrupt.h>
21#include <linux/init.h>
22#include <linux/io.h>
23#include <asm/voyagergx.h>
24#include <asm/rts7751r2d.h>
25
26enum {
27 UNUSED = 0,
28
29 /* voyager specific interrupt sources */
30 UP, G54, G53, G52, G51, G50, G49, G48,
31 I2C, PW, DMA, PCI, I2S, AC, US,
32 U1, U0, CV, MC, S1, S0,
33 UH, TWOD, ZD, PV, CI,
34};
35
36static struct intc_vect vectors[] __initdata = {
37 INTC_IRQ(UP, IRQ_SM501_UP), INTC_IRQ(G54, IRQ_SM501_G54),
38 INTC_IRQ(G53, IRQ_SM501_G53), INTC_IRQ(G52, IRQ_SM501_G52),
39 INTC_IRQ(G51, IRQ_SM501_G51), INTC_IRQ(G50, IRQ_SM501_G50),
40 INTC_IRQ(G49, IRQ_SM501_G49), INTC_IRQ(G48, IRQ_SM501_G48),
41 INTC_IRQ(I2C, IRQ_SM501_I2C), INTC_IRQ(PW, IRQ_SM501_PW),
42 INTC_IRQ(DMA, IRQ_SM501_DMA), INTC_IRQ(PCI, IRQ_SM501_PCI),
43 INTC_IRQ(I2S, IRQ_SM501_I2S), INTC_IRQ(AC, IRQ_SM501_AC),
44 INTC_IRQ(US, IRQ_SM501_US), INTC_IRQ(U1, IRQ_SM501_U1),
45 INTC_IRQ(U0, IRQ_SM501_U0), INTC_IRQ(CV, IRQ_SM501_CV),
46 INTC_IRQ(MC, IRQ_SM501_MC), INTC_IRQ(S1, IRQ_SM501_S1),
47 INTC_IRQ(S0, IRQ_SM501_S0), INTC_IRQ(UH, IRQ_SM501_UH),
48 INTC_IRQ(TWOD, IRQ_SM501_2D), INTC_IRQ(ZD, IRQ_SM501_ZD),
49 INTC_IRQ(PV, IRQ_SM501_PV), INTC_IRQ(CI, IRQ_SM501_CI),
50};
51
52static struct intc_mask_reg mask_registers[] __initdata = {
53 { VOYAGER_INT_MASK, 0, 32, /* "Interrupt Mask", MMIO_base + 0x30 */
54 { UP, G54, G53, G52, G51, G50, G49, G48,
55 I2C, PW, 0, DMA, PCI, I2S, AC, US,
56 0, 0, U1, U0, CV, MC, S1, S0,
57 0, UH, 0, 0, TWOD, ZD, PV, CI } },
58};
59
60static DECLARE_INTC_DESC(intc_desc, "voyagergx", vectors,
61 NULL, NULL, mask_registers, NULL, NULL);
62
63static unsigned int voyagergx_stat2irq[32] = {
64 IRQ_SM501_CI, IRQ_SM501_PV, IRQ_SM501_ZD, IRQ_SM501_2D,
65 0, 0, IRQ_SM501_UH, 0,
66 IRQ_SM501_S0, IRQ_SM501_S1, IRQ_SM501_MC, IRQ_SM501_CV,
67 IRQ_SM501_U0, IRQ_SM501_U1, 0, 0,
68 IRQ_SM501_US, IRQ_SM501_AC, IRQ_SM501_I2S, IRQ_SM501_PCI,
69 IRQ_SM501_DMA, 0, IRQ_SM501_PW, IRQ_SM501_I2C,
70 IRQ_SM501_G48, IRQ_SM501_G49, IRQ_SM501_G50, IRQ_SM501_G51,
71 IRQ_SM501_G52, IRQ_SM501_G53, IRQ_SM501_G54, IRQ_SM501_UP
72};
73
74static void voyagergx_irq_demux(unsigned int irq, struct irq_desc *desc)
75{
76 unsigned long intv = ctrl_inl(INT_STATUS);
77 struct irq_desc *ext_desc;
78 unsigned int ext_irq;
79 unsigned int k = 0;
80
81 while (intv) {
82 ext_irq = voyagergx_stat2irq[k];
83 if (ext_irq && (intv & 1)) {
84 ext_desc = irq_desc + ext_irq;
85 handle_level_irq(ext_irq, ext_desc);
86 }
87 intv >>= 1;
88 k++;
89 }
90}
91
92void __init setup_voyagergx_irq(void)
93{
94 printk(KERN_INFO "VoyagerGX on irq %d (mapped into %d to %d)\n",
95 IRQ_VOYAGER,
96 VOYAGER_IRQ_BASE,
97 VOYAGER_IRQ_BASE + VOYAGER_IRQ_NUM - 1);
98
99 register_intc_controller(&intc_desc);
100 set_irq_chained_handler(IRQ_VOYAGER, voyagergx_irq_demux);
101}
diff --git a/arch/sh/cchips/voyagergx/setup.c b/arch/sh/cchips/voyagergx/setup.c
deleted file mode 100644
index 33f03027c193..000000000000
--- a/arch/sh/cchips/voyagergx/setup.c
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * arch/sh/cchips/voyagergx/setup.c
3 *
4 * Setup routines for VoyagerGX cchip.
5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/init.h>
14#include <linux/module.h>
15#include <asm/io.h>
16#include <asm/voyagergx.h>
17
18static int __init setup_voyagergx(void)
19{
20 unsigned long val;
21
22 val = readl((void __iomem *)DRAM_CTRL);
23 val |= (DRAM_CTRL_CPU_COLUMN_SIZE_256 |
24 DRAM_CTRL_CPU_ACTIVE_PRECHARGE |
25 DRAM_CTRL_CPU_RESET |
26 DRAM_CTRL_REFRESH_COMMAND |
27 DRAM_CTRL_BLOCK_WRITE_TIME |
28 DRAM_CTRL_BLOCK_WRITE_PRECHARGE |
29 DRAM_CTRL_ACTIVE_PRECHARGE |
30 DRAM_CTRL_RESET |
31 DRAM_CTRL_REMAIN_ACTIVE);
32 writel(val, (void __iomem *)DRAM_CTRL);
33
34 return 0;
35}
36
37module_init(setup_voyagergx);
diff --git a/arch/sh64/configs/cayman_defconfig b/arch/sh/configs/cayman_defconfig
index 75552bb01405..a05b278d72f5 100644
--- a/arch/sh64/configs/cayman_defconfig
+++ b/arch/sh/configs/cayman_defconfig
@@ -1,18 +1,22 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc1 3# Linux kernel version: 2.6.24-rc3
4# Fri Nov 2 14:35:27 2007 4# Fri Nov 23 14:15:55 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7# CONFIG_SUPERH32 is not set
7CONFIG_SUPERH64=y 8CONFIG_SUPERH64=y
8CONFIG_MMU=y
9CONFIG_QUICKLIST=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y 9CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y 10CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y 11CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y 12CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y 13CONFIG_GENERIC_IRQ_PROBE=y
14CONFIG_GENERIC_CALIBRATE_DELAY=y
15# CONFIG_GENERIC_TIME is not set
16# CONFIG_GENERIC_CLOCKEVENTS is not set
17CONFIG_SYS_SUPPORTS_PCI=y
18CONFIG_STACKTRACE_SUPPORT=y
19CONFIG_LOCKDEP_SUPPORT=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set 20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set 21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y 22CONFIG_ARCH_NO_VIRT_TO_BUS=y
@@ -33,6 +37,7 @@ CONFIG_POSIX_MQUEUE=y
33# CONFIG_BSD_PROCESS_ACCT is not set 37# CONFIG_BSD_PROCESS_ACCT is not set
34# CONFIG_TASKSTATS is not set 38# CONFIG_TASKSTATS is not set
35# CONFIG_USER_NS is not set 39# CONFIG_USER_NS is not set
40# CONFIG_PID_NS is not set
36# CONFIG_AUDIT is not set 41# CONFIG_AUDIT is not set
37# CONFIG_IKCONFIG is not set 42# CONFIG_IKCONFIG is not set
38CONFIG_LOG_BUF_SHIFT=14 43CONFIG_LOG_BUF_SHIFT=14
@@ -45,7 +50,7 @@ CONFIG_SYSFS_DEPRECATED=y
45# CONFIG_BLK_DEV_INITRD is not set 50# CONFIG_BLK_DEV_INITRD is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set 51# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SYSCTL=y 52CONFIG_SYSCTL=y
48# CONFIG_EMBEDDED is not set 53CONFIG_EMBEDDED=y
49CONFIG_UID16=y 54CONFIG_UID16=y
50CONFIG_SYSCTL_SYSCALL=y 55CONFIG_SYSCTL_SYSCALL=y
51CONFIG_KALLSYMS=y 56CONFIG_KALLSYMS=y
@@ -97,73 +102,153 @@ CONFIG_DEFAULT_IOSCHED="cfq"
97# 102#
98# System type 103# System type
99# 104#
100# CONFIG_SH_SIMULATOR is not set
101CONFIG_SH_CAYMAN=y
102# CONFIG_SH_HARP is not set
103CONFIG_CPU_SH5=y 105CONFIG_CPU_SH5=y
106# CONFIG_CPU_SUBTYPE_SH7619 is not set
107# CONFIG_CPU_SUBTYPE_SH7206 is not set
108# CONFIG_CPU_SUBTYPE_SH7705 is not set
109# CONFIG_CPU_SUBTYPE_SH7706 is not set
110# CONFIG_CPU_SUBTYPE_SH7707 is not set
111# CONFIG_CPU_SUBTYPE_SH7708 is not set
112# CONFIG_CPU_SUBTYPE_SH7709 is not set
113# CONFIG_CPU_SUBTYPE_SH7710 is not set
114# CONFIG_CPU_SUBTYPE_SH7712 is not set
115# CONFIG_CPU_SUBTYPE_SH7720 is not set
116# CONFIG_CPU_SUBTYPE_SH7750 is not set
117# CONFIG_CPU_SUBTYPE_SH7091 is not set
118# CONFIG_CPU_SUBTYPE_SH7750R is not set
119# CONFIG_CPU_SUBTYPE_SH7750S is not set
120# CONFIG_CPU_SUBTYPE_SH7751 is not set
121# CONFIG_CPU_SUBTYPE_SH7751R is not set
122# CONFIG_CPU_SUBTYPE_SH7760 is not set
123# CONFIG_CPU_SUBTYPE_SH4_202 is not set
124# CONFIG_CPU_SUBTYPE_SH7770 is not set
125# CONFIG_CPU_SUBTYPE_SH7780 is not set
126# CONFIG_CPU_SUBTYPE_SH7785 is not set
127# CONFIG_CPU_SUBTYPE_SHX3 is not set
128# CONFIG_CPU_SUBTYPE_SH7343 is not set
129# CONFIG_CPU_SUBTYPE_SH7722 is not set
104CONFIG_CPU_SUBTYPE_SH5_101=y 130CONFIG_CPU_SUBTYPE_SH5_101=y
105# CONFIG_CPU_SUBTYPE_SH5_103 is not set 131# CONFIG_CPU_SUBTYPE_SH5_103 is not set
106CONFIG_LITTLE_ENDIAN=y 132
107# CONFIG_BIG_ENDIAN is not set 133#
108CONFIG_SH_FPU=y 134# Memory management options
109# CONFIG_SH64_FPU_DENORM_FLUSH is not set 135#
110CONFIG_SH64_PGTABLE_2_LEVEL=y 136CONFIG_QUICKLIST=y
111# CONFIG_SH64_PGTABLE_3_LEVEL is not set 137CONFIG_MMU=y
138CONFIG_PAGE_OFFSET=0x20000000
139CONFIG_MEMORY_START=0x80000000
140CONFIG_MEMORY_SIZE=0x00400000
141CONFIG_32BIT=y
142CONFIG_ARCH_FLATMEM_ENABLE=y
143CONFIG_ARCH_SPARSEMEM_ENABLE=y
144CONFIG_ARCH_SPARSEMEM_DEFAULT=y
145CONFIG_MAX_ACTIVE_REGIONS=1
146CONFIG_ARCH_POPULATES_NODE_MAP=y
147CONFIG_ARCH_SELECT_MEMORY_MODEL=y
148CONFIG_PAGE_SIZE_4KB=y
149# CONFIG_PAGE_SIZE_8KB is not set
150# CONFIG_PAGE_SIZE_64KB is not set
112CONFIG_HUGETLB_PAGE_SIZE_64K=y 151CONFIG_HUGETLB_PAGE_SIZE_64K=y
152# CONFIG_HUGETLB_PAGE_SIZE_256K is not set
113# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set 153# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
154# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
155# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
114# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set 156# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
157CONFIG_SELECT_MEMORY_MODEL=y
158CONFIG_FLATMEM_MANUAL=y
159# CONFIG_DISCONTIGMEM_MANUAL is not set
160# CONFIG_SPARSEMEM_MANUAL is not set
161CONFIG_FLATMEM=y
162CONFIG_FLAT_NODE_MEM_MAP=y
163CONFIG_SPARSEMEM_STATIC=y
164# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
165CONFIG_SPLIT_PTLOCK_CPUS=4
166CONFIG_RESOURCES_64BIT=y
167CONFIG_ZONE_DMA_FLAG=0
168CONFIG_NR_QUICK=2
169
170#
171# Cache configuration
172#
173# CONFIG_SH_DIRECT_MAPPED is not set
174# CONFIG_CACHE_WRITEBACK is not set
175# CONFIG_CACHE_WRITETHROUGH is not set
176CONFIG_CACHE_OFF=y
177
178#
179# Processor features
180#
181CONFIG_CPU_LITTLE_ENDIAN=y
182# CONFIG_CPU_BIG_ENDIAN is not set
183CONFIG_SH_FPU=y
184# CONFIG_SH64_FPU_DENORM_FLUSH is not set
115CONFIG_SH64_USER_MISALIGNED_FIXUP=y 185CONFIG_SH64_USER_MISALIGNED_FIXUP=y
186CONFIG_SH64_ID2815_WORKAROUND=y
187CONFIG_CPU_HAS_FPU=y
116 188
117# 189#
118# Memory options 190# Board support
119# 191#
120CONFIG_CACHED_MEMORY_OFFSET=0x20000000 192CONFIG_SH_CAYMAN=y
121CONFIG_MEMORY_START=0x80000000
122CONFIG_MEMORY_SIZE_IN_MB=128
123 193
124# 194#
125# Cache options 195# Timer and clock configuration
126# 196#
127CONFIG_DCACHE_WRITE_BACK=y 197CONFIG_SH_TIMER_IRQ=16
128# CONFIG_DCACHE_WRITE_THROUGH is not set 198CONFIG_SH_PCLK_FREQ=50000000
129# CONFIG_DCACHE_DISABLED is not set 199# CONFIG_TICK_ONESHOT is not set
130# CONFIG_ICACHE_DISABLED is not set
131CONFIG_PCIDEVICE_MEMORY_START=C0000000
132CONFIG_DEVICE_MEMORY_START=E0000000
133CONFIG_FLASH_MEMORY_START=0x00000000
134CONFIG_PCI_BLOCK_START=0x40000000
135 200
136# 201#
137# CPU Subtype specific options 202# CPU Frequency scaling
203#
204# CONFIG_CPU_FREQ is not set
205
206#
207# DMA support
138# 208#
139CONFIG_SH64_ID2815_WORKAROUND=y
140 209
141# 210#
142# Misc options 211# Companion Chips
212#
213
214#
215# Additional SuperH Device Drivers
143# 216#
144CONFIG_HEARTBEAT=y 217CONFIG_HEARTBEAT=y
145CONFIG_HDSP253_LED=y 218# CONFIG_PUSH_SWITCH is not set
146# CONFIG_SH_DMA is not set 219
220#
221# Kernel features
222#
223# CONFIG_HZ_100 is not set
224CONFIG_HZ_250=y
225# CONFIG_HZ_300 is not set
226# CONFIG_HZ_1000 is not set
227CONFIG_HZ=250
228# CONFIG_KEXEC is not set
229# CONFIG_CRASH_DUMP is not set
230# CONFIG_PREEMPT_NONE is not set
231# CONFIG_PREEMPT_VOLUNTARY is not set
147CONFIG_PREEMPT=y 232CONFIG_PREEMPT=y
148CONFIG_SELECT_MEMORY_MODEL=y 233CONFIG_PREEMPT_BKL=y
149CONFIG_FLATMEM_MANUAL=y 234CONFIG_GUSA=y
150# CONFIG_DISCONTIGMEM_MANUAL is not set 235
151# CONFIG_SPARSEMEM_MANUAL is not set 236#
152CONFIG_FLATMEM=y 237# Boot options
153CONFIG_FLAT_NODE_MEM_MAP=y 238#
154# CONFIG_SPARSEMEM_STATIC is not set 239CONFIG_ZERO_PAGE_OFFSET=0x00001000
155# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 240CONFIG_BOOT_LINK_OFFSET=0x00800000
156CONFIG_SPLIT_PTLOCK_CPUS=4 241# CONFIG_CMDLINE_BOOL is not set
157# CONFIG_RESOURCES_64BIT is not set
158CONFIG_ZONE_DMA_FLAG=0
159CONFIG_NR_QUICK=1
160 242
161# 243#
162# Bus options (PCI, PCMCIA, EISA, MCA, ISA) 244# Bus options
163# 245#
164CONFIG_PCI=y 246CONFIG_PCI=y
165CONFIG_SH_PCIDMA_NONCOHERENT=y 247CONFIG_SH_PCIDMA_NONCOHERENT=y
248CONFIG_PCI_AUTO=y
249CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
166# CONFIG_ARCH_SUPPORTS_MSI is not set 250# CONFIG_ARCH_SUPPORTS_MSI is not set
251CONFIG_PCI_LEGACY=y
167# CONFIG_PCI_DEBUG is not set 252# CONFIG_PCI_DEBUG is not set
168# CONFIG_PCCARD is not set 253# CONFIG_PCCARD is not set
169# CONFIG_HOTPLUG_PCI is not set 254# CONFIG_HOTPLUG_PCI is not set
@@ -354,11 +439,7 @@ CONFIG_SCSI_LOWLEVEL=y
354# CONFIG_SCSI_INITIO is not set 439# CONFIG_SCSI_INITIO is not set
355# CONFIG_SCSI_INIA100 is not set 440# CONFIG_SCSI_INIA100 is not set
356# CONFIG_SCSI_STEX is not set 441# CONFIG_SCSI_STEX is not set
357CONFIG_SCSI_SYM53C8XX_2=y 442# CONFIG_SCSI_SYM53C8XX_2 is not set
358CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
359CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
360CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
361CONFIG_SCSI_SYM53C8XX_MMIO=y
362# CONFIG_SCSI_QLOGIC_1280 is not set 443# CONFIG_SCSI_QLOGIC_1280 is not set
363# CONFIG_SCSI_QLA_FC is not set 444# CONFIG_SCSI_QLA_FC is not set
364# CONFIG_SCSI_QLA_ISCSI is not set 445# CONFIG_SCSI_QLA_ISCSI is not set
@@ -391,6 +472,7 @@ CONFIG_NETDEVICES=y
391# CONFIG_PHYLIB is not set 472# CONFIG_PHYLIB is not set
392CONFIG_NET_ETHERNET=y 473CONFIG_NET_ETHERNET=y
393# CONFIG_MII is not set 474# CONFIG_MII is not set
475# CONFIG_AX88796 is not set
394# CONFIG_STNIC is not set 476# CONFIG_STNIC is not set
395# CONFIG_HAPPYMEAL is not set 477# CONFIG_HAPPYMEAL is not set
396# CONFIG_SUNGEM is not set 478# CONFIG_SUNGEM is not set
@@ -398,40 +480,14 @@ CONFIG_NET_ETHERNET=y
398# CONFIG_NET_VENDOR_3COM is not set 480# CONFIG_NET_VENDOR_3COM is not set
399# CONFIG_SMC91X is not set 481# CONFIG_SMC91X is not set
400# CONFIG_SMC911X is not set 482# CONFIG_SMC911X is not set
401CONFIG_NET_TULIP=y 483# CONFIG_NET_TULIP is not set
402# CONFIG_DE2104X is not set
403CONFIG_TULIP=y
404# CONFIG_TULIP_MWI is not set
405# CONFIG_TULIP_MMIO is not set
406# CONFIG_TULIP_NAPI is not set
407# CONFIG_DE4X5 is not set
408# CONFIG_WINBOND_840 is not set
409# CONFIG_DM9102 is not set
410# CONFIG_ULI526X is not set
411# CONFIG_HP100 is not set 484# CONFIG_HP100 is not set
412# CONFIG_IBM_NEW_EMAC_ZMII is not set 485# CONFIG_IBM_NEW_EMAC_ZMII is not set
413# CONFIG_IBM_NEW_EMAC_RGMII is not set 486# CONFIG_IBM_NEW_EMAC_RGMII is not set
414# CONFIG_IBM_NEW_EMAC_TAH is not set 487# CONFIG_IBM_NEW_EMAC_TAH is not set
415# CONFIG_IBM_NEW_EMAC_EMAC4 is not set 488# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
416CONFIG_NET_PCI=y 489# CONFIG_NET_PCI is not set
417# CONFIG_PCNET32 is not set
418# CONFIG_AMD8111_ETH is not set
419# CONFIG_ADAPTEC_STARFIRE is not set
420# CONFIG_B44 is not set 490# CONFIG_B44 is not set
421# CONFIG_FORCEDETH is not set
422# CONFIG_EEPRO100 is not set
423# CONFIG_E100 is not set
424# CONFIG_FEALNX is not set
425# CONFIG_NATSEMI is not set
426# CONFIG_NE2K_PCI is not set
427# CONFIG_8139CP is not set
428# CONFIG_8139TOO is not set
429# CONFIG_SIS900 is not set
430# CONFIG_EPIC100 is not set
431# CONFIG_SUNDANCE is not set
432# CONFIG_TLAN is not set
433# CONFIG_VIA_RHINE is not set
434# CONFIG_SC92031 is not set
435CONFIG_NETDEV_1000=y 491CONFIG_NETDEV_1000=y
436# CONFIG_ACENIC is not set 492# CONFIG_ACENIC is not set
437# CONFIG_DL2K is not set 493# CONFIG_DL2K is not set
@@ -492,7 +548,7 @@ CONFIG_INPUT=y
492# Userland interfaces 548# Userland interfaces
493# 549#
494CONFIG_INPUT_MOUSEDEV=y 550CONFIG_INPUT_MOUSEDEV=y
495CONFIG_INPUT_MOUSEDEV_PSAUX=y 551# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
496CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 552CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
497CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 553CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
498# CONFIG_INPUT_JOYDEV is not set 554# CONFIG_INPUT_JOYDEV is not set
@@ -502,24 +558,8 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
502# 558#
503# Input Device Drivers 559# Input Device Drivers
504# 560#
505CONFIG_INPUT_KEYBOARD=y 561# CONFIG_INPUT_KEYBOARD is not set
506CONFIG_KEYBOARD_ATKBD=y 562# CONFIG_INPUT_MOUSE is not set
507# CONFIG_KEYBOARD_SUNKBD is not set
508# CONFIG_KEYBOARD_LKKBD is not set
509# CONFIG_KEYBOARD_XTKBD is not set
510# CONFIG_KEYBOARD_NEWTON is not set
511# CONFIG_KEYBOARD_STOWAWAY is not set
512CONFIG_INPUT_MOUSE=y
513CONFIG_MOUSE_PS2=y
514CONFIG_MOUSE_PS2_ALPS=y
515CONFIG_MOUSE_PS2_LOGIPS2PP=y
516CONFIG_MOUSE_PS2_SYNAPTICS=y
517CONFIG_MOUSE_PS2_LIFEBOOK=y
518CONFIG_MOUSE_PS2_TRACKPOINT=y
519# CONFIG_MOUSE_PS2_TOUCHKIT is not set
520# CONFIG_MOUSE_SERIAL is not set
521# CONFIG_MOUSE_APPLETOUCH is not set
522# CONFIG_MOUSE_VSXXXAA is not set
523# CONFIG_INPUT_JOYSTICK is not set 563# CONFIG_INPUT_JOYSTICK is not set
524# CONFIG_INPUT_TABLET is not set 564# CONFIG_INPUT_TABLET is not set
525# CONFIG_INPUT_TOUCHSCREEN is not set 565# CONFIG_INPUT_TOUCHSCREEN is not set
@@ -528,12 +568,7 @@ CONFIG_MOUSE_PS2_TRACKPOINT=y
528# 568#
529# Hardware I/O ports 569# Hardware I/O ports
530# 570#
531CONFIG_SERIO=y 571# CONFIG_SERIO is not set
532CONFIG_SERIO_I8042=y
533CONFIG_SERIO_SERPORT=y
534# CONFIG_SERIO_PCIPS2 is not set
535CONFIG_SERIO_LIBPS2=y
536# CONFIG_SERIO_RAW is not set
537# CONFIG_GAMEPORT is not set 572# CONFIG_GAMEPORT is not set
538 573
539# 574#
@@ -553,11 +588,7 @@ CONFIG_HW_CONSOLE=y
553# 588#
554# Non-8250 serial port support 589# Non-8250 serial port support
555# 590#
556CONFIG_SERIAL_SH_SCI=y 591# CONFIG_SERIAL_SH_SCI is not set
557CONFIG_SERIAL_SH_SCI_NR_UARTS=2
558CONFIG_SERIAL_SH_SCI_CONSOLE=y
559CONFIG_SERIAL_CORE=y
560CONFIG_SERIAL_CORE_CONSOLE=y
561# CONFIG_SERIAL_JSM is not set 592# CONFIG_SERIAL_JSM is not set
562CONFIG_UNIX98_PTYS=y 593CONFIG_UNIX98_PTYS=y
563CONFIG_LEGACY_PTYS=y 594CONFIG_LEGACY_PTYS=y
@@ -642,6 +673,7 @@ CONFIG_HWMON=y
642# CONFIG_SENSORS_ADT7470 is not set 673# CONFIG_SENSORS_ADT7470 is not set
643# CONFIG_SENSORS_ATXP1 is not set 674# CONFIG_SENSORS_ATXP1 is not set
644# CONFIG_SENSORS_DS1621 is not set 675# CONFIG_SENSORS_DS1621 is not set
676# CONFIG_SENSORS_I5K_AMB is not set
645# CONFIG_SENSORS_F71805F is not set 677# CONFIG_SENSORS_F71805F is not set
646# CONFIG_SENSORS_F71882FG is not set 678# CONFIG_SENSORS_F71882FG is not set
647# CONFIG_SENSORS_F75375S is not set 679# CONFIG_SENSORS_F75375S is not set
@@ -832,9 +864,9 @@ CONFIG_VIDEO_OUTPUT_CONTROL=y
832CONFIG_FB=y 864CONFIG_FB=y
833CONFIG_FIRMWARE_EDID=y 865CONFIG_FIRMWARE_EDID=y
834# CONFIG_FB_DDC is not set 866# CONFIG_FB_DDC is not set
835CONFIG_FB_CFB_FILLRECT=y 867# CONFIG_FB_CFB_FILLRECT is not set
836CONFIG_FB_CFB_COPYAREA=y 868# CONFIG_FB_CFB_COPYAREA is not set
837CONFIG_FB_CFB_IMAGEBLIT=y 869# CONFIG_FB_CFB_IMAGEBLIT is not set
838# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set 870# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
839# CONFIG_FB_SYS_FILLRECT is not set 871# CONFIG_FB_SYS_FILLRECT is not set
840# CONFIG_FB_SYS_COPYAREA is not set 872# CONFIG_FB_SYS_COPYAREA is not set
@@ -866,7 +898,7 @@ CONFIG_FB_MODE_HELPERS=y
866# CONFIG_FB_SAVAGE is not set 898# CONFIG_FB_SAVAGE is not set
867# CONFIG_FB_SIS is not set 899# CONFIG_FB_SIS is not set
868# CONFIG_FB_NEOMAGIC is not set 900# CONFIG_FB_NEOMAGIC is not set
869CONFIG_FB_KYRO=y 901# CONFIG_FB_KYRO is not set
870# CONFIG_FB_3DFX is not set 902# CONFIG_FB_3DFX is not set
871# CONFIG_FB_VOODOO1 is not set 903# CONFIG_FB_VOODOO1 is not set
872# CONFIG_FB_VT8623 is not set 904# CONFIG_FB_VT8623 is not set
@@ -1062,6 +1094,7 @@ CONFIG_INSTRUMENTATION=y
1062# 1094#
1063# Kernel hacking 1095# Kernel hacking
1064# 1096#
1097CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1065# CONFIG_PRINTK_TIME is not set 1098# CONFIG_PRINTK_TIME is not set
1066CONFIG_ENABLE_WARN_DEPRECATED=y 1099CONFIG_ENABLE_WARN_DEPRECATED=y
1067CONFIG_ENABLE_MUST_CHECK=y 1100CONFIG_ENABLE_MUST_CHECK=y
@@ -1076,10 +1109,14 @@ CONFIG_SCHED_DEBUG=y
1076CONFIG_SCHEDSTATS=y 1109CONFIG_SCHEDSTATS=y
1077# CONFIG_TIMER_STATS is not set 1110# CONFIG_TIMER_STATS is not set
1078# CONFIG_DEBUG_SLAB is not set 1111# CONFIG_DEBUG_SLAB is not set
1112CONFIG_DEBUG_PREEMPT=y
1079# CONFIG_DEBUG_RT_MUTEXES is not set 1113# CONFIG_DEBUG_RT_MUTEXES is not set
1080# CONFIG_RT_MUTEX_TESTER is not set 1114# CONFIG_RT_MUTEX_TESTER is not set
1081# CONFIG_DEBUG_SPINLOCK is not set 1115# CONFIG_DEBUG_SPINLOCK is not set
1082# CONFIG_DEBUG_MUTEXES is not set 1116# CONFIG_DEBUG_MUTEXES is not set
1117# CONFIG_DEBUG_LOCK_ALLOC is not set
1118# CONFIG_PROVE_LOCKING is not set
1119# CONFIG_LOCK_STAT is not set
1083# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1120# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1084# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1121# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1085# CONFIG_DEBUG_KOBJECT is not set 1122# CONFIG_DEBUG_KOBJECT is not set
@@ -1094,8 +1131,11 @@ CONFIG_FORCED_INLINING=y
1094# CONFIG_RCU_TORTURE_TEST is not set 1131# CONFIG_RCU_TORTURE_TEST is not set
1095# CONFIG_FAULT_INJECTION is not set 1132# CONFIG_FAULT_INJECTION is not set
1096# CONFIG_SAMPLES is not set 1133# CONFIG_SAMPLES is not set
1097# CONFIG_EARLY_PRINTK is not set 1134# CONFIG_SH_STANDARD_BIOS is not set
1098CONFIG_SH64_PROC_TLB=y 1135# CONFIG_EARLY_SCIF_CONSOLE is not set
1136# CONFIG_DEBUG_BOOTMEM is not set
1137# CONFIG_DEBUG_STACK_USAGE is not set
1138# CONFIG_4KSTACKS is not set
1099CONFIG_SH64_PROC_ASIDS=y 1139CONFIG_SH64_PROC_ASIDS=y
1100CONFIG_SH64_SR_WATCH=y 1140CONFIG_SH64_SR_WATCH=y
1101# CONFIG_POOR_MANS_STRACE is not set 1141# CONFIG_POOR_MANS_STRACE is not set
diff --git a/arch/sh/configs/hs7751rvoip_defconfig b/arch/sh/configs/hs7751rvoip_defconfig
deleted file mode 100644
index 5d9da5a02759..000000000000
--- a/arch/sh/configs/hs7751rvoip_defconfig
+++ /dev/null
@@ -1,908 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.18
4# Tue Oct 3 13:04:52 2006
5#
6CONFIG_SUPERH=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_FIND_NEXT_BIT=y
9CONFIG_GENERIC_HWEIGHT=y
10CONFIG_GENERIC_HARDIRQS=y
11CONFIG_GENERIC_IRQ_PROBE=y
12CONFIG_GENERIC_CALIBRATE_DELAY=y
13CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
14
15#
16# Code maturity level options
17#
18CONFIG_EXPERIMENTAL=y
19CONFIG_BROKEN_ON_SMP=y
20CONFIG_LOCK_KERNEL=y
21CONFIG_INIT_ENV_ARG_LIMIT=32
22
23#
24# General setup
25#
26CONFIG_LOCALVERSION=""
27CONFIG_LOCALVERSION_AUTO=y
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30# CONFIG_IPC_NS is not set
31CONFIG_POSIX_MQUEUE=y
32CONFIG_BSD_PROCESS_ACCT=y
33# CONFIG_BSD_PROCESS_ACCT_V3 is not set
34# CONFIG_TASKSTATS is not set
35# CONFIG_UTS_NS is not set
36# CONFIG_AUDIT is not set
37# CONFIG_IKCONFIG is not set
38# CONFIG_RELAY is not set
39CONFIG_INITRAMFS_SOURCE=""
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SYSCTL=y
42CONFIG_EMBEDDED=y
43CONFIG_UID16=y
44# CONFIG_SYSCTL_SYSCALL is not set
45# CONFIG_KALLSYMS is not set
46CONFIG_HOTPLUG=y
47CONFIG_PRINTK=y
48CONFIG_BUG=y
49CONFIG_ELF_CORE=y
50CONFIG_BASE_FULL=y
51CONFIG_FUTEX=y
52CONFIG_EPOLL=y
53CONFIG_SHMEM=y
54CONFIG_SLAB=y
55CONFIG_VM_EVENT_COUNTERS=y
56CONFIG_RT_MUTEXES=y
57# CONFIG_TINY_SHMEM is not set
58CONFIG_BASE_SMALL=0
59# CONFIG_SLOB is not set
60
61#
62# Loadable module support
63#
64CONFIG_MODULES=y
65CONFIG_MODULE_UNLOAD=y
66# CONFIG_MODULE_FORCE_UNLOAD is not set
67# CONFIG_MODVERSIONS is not set
68# CONFIG_MODULE_SRCVERSION_ALL is not set
69CONFIG_KMOD=y
70
71#
72# Block layer
73#
74CONFIG_BLOCK=y
75# CONFIG_LBD is not set
76# CONFIG_BLK_DEV_IO_TRACE is not set
77# CONFIG_LSF is not set
78
79#
80# IO Schedulers
81#
82CONFIG_IOSCHED_NOOP=y
83CONFIG_IOSCHED_AS=y
84CONFIG_IOSCHED_DEADLINE=y
85CONFIG_IOSCHED_CFQ=y
86CONFIG_DEFAULT_AS=y
87# CONFIG_DEFAULT_DEADLINE is not set
88# CONFIG_DEFAULT_CFQ is not set
89# CONFIG_DEFAULT_NOOP is not set
90CONFIG_DEFAULT_IOSCHED="anticipatory"
91
92#
93# System type
94#
95# CONFIG_SH_SOLUTION_ENGINE is not set
96# CONFIG_SH_7751_SOLUTION_ENGINE is not set
97# CONFIG_SH_7300_SOLUTION_ENGINE is not set
98# CONFIG_SH_7343_SOLUTION_ENGINE is not set
99# CONFIG_SH_73180_SOLUTION_ENGINE is not set
100# CONFIG_SH_7751_SYSTEMH is not set
101# CONFIG_SH_HP6XX is not set
102# CONFIG_SH_EC3104 is not set
103# CONFIG_SH_SATURN is not set
104# CONFIG_SH_DREAMCAST is not set
105# CONFIG_SH_BIGSUR is not set
106# CONFIG_SH_MPC1211 is not set
107# CONFIG_SH_SH03 is not set
108# CONFIG_SH_SECUREEDGE5410 is not set
109CONFIG_SH_HS7751RVOIP=y
110# CONFIG_SH_7710VOIPGW is not set
111# CONFIG_SH_RTS7751R2D is not set
112# CONFIG_SH_R7780RP is not set
113# CONFIG_SH_EDOSK7705 is not set
114# CONFIG_SH_SH4202_MICRODEV is not set
115# CONFIG_SH_LANDISK is not set
116# CONFIG_SH_TITAN is not set
117# CONFIG_SH_SHMIN is not set
118# CONFIG_SH_UNKNOWN is not set
119
120#
121# Processor selection
122#
123CONFIG_CPU_SH4=y
124
125#
126# SH-2 Processor Support
127#
128# CONFIG_CPU_SUBTYPE_SH7604 is not set
129
130#
131# SH-3 Processor Support
132#
133# CONFIG_CPU_SUBTYPE_SH7300 is not set
134# CONFIG_CPU_SUBTYPE_SH7705 is not set
135# CONFIG_CPU_SUBTYPE_SH7706 is not set
136# CONFIG_CPU_SUBTYPE_SH7707 is not set
137# CONFIG_CPU_SUBTYPE_SH7708 is not set
138# CONFIG_CPU_SUBTYPE_SH7709 is not set
139# CONFIG_CPU_SUBTYPE_SH7710 is not set
140
141#
142# SH-4 Processor Support
143#
144# CONFIG_CPU_SUBTYPE_SH7750 is not set
145# CONFIG_CPU_SUBTYPE_SH7091 is not set
146# CONFIG_CPU_SUBTYPE_SH7750R is not set
147# CONFIG_CPU_SUBTYPE_SH7750S is not set
148# CONFIG_CPU_SUBTYPE_SH7751 is not set
149CONFIG_CPU_SUBTYPE_SH7751R=y
150# CONFIG_CPU_SUBTYPE_SH7760 is not set
151# CONFIG_CPU_SUBTYPE_SH4_202 is not set
152
153#
154# ST40 Processor Support
155#
156# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
157# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
158
159#
160# SH-4A Processor Support
161#
162# CONFIG_CPU_SUBTYPE_SH7770 is not set
163# CONFIG_CPU_SUBTYPE_SH7780 is not set
164
165#
166# SH4AL-DSP Processor Support
167#
168# CONFIG_CPU_SUBTYPE_SH73180 is not set
169# CONFIG_CPU_SUBTYPE_SH7343 is not set
170
171#
172# Memory management options
173#
174CONFIG_MMU=y
175CONFIG_PAGE_OFFSET=0x80000000
176CONFIG_MEMORY_START=0x0c000000
177CONFIG_MEMORY_SIZE=0x04000000
178CONFIG_VSYSCALL=y
179CONFIG_SELECT_MEMORY_MODEL=y
180CONFIG_FLATMEM_MANUAL=y
181# CONFIG_DISCONTIGMEM_MANUAL is not set
182# CONFIG_SPARSEMEM_MANUAL is not set
183CONFIG_FLATMEM=y
184CONFIG_FLAT_NODE_MEM_MAP=y
185# CONFIG_SPARSEMEM_STATIC is not set
186CONFIG_SPLIT_PTLOCK_CPUS=4
187# CONFIG_RESOURCES_64BIT is not set
188
189#
190# Cache configuration
191#
192# CONFIG_SH_DIRECT_MAPPED is not set
193# CONFIG_SH_WRITETHROUGH is not set
194# CONFIG_SH_OCRAM is not set
195
196#
197# Processor features
198#
199CONFIG_CPU_LITTLE_ENDIAN=y
200CONFIG_SH_FPU=y
201# CONFIG_SH_DSP is not set
202# CONFIG_SH_STORE_QUEUES is not set
203CONFIG_CPU_HAS_INTEVT=y
204CONFIG_CPU_HAS_SR_RB=y
205
206#
207# Timer support
208#
209CONFIG_SH_TMU=y
210
211#
212# HS7751RVoIP options
213#
214CONFIG_HS7751RVOIP_CODEC=y
215CONFIG_SH_PCLK_FREQ=60000000
216
217#
218# CPU Frequency scaling
219#
220# CONFIG_CPU_FREQ is not set
221
222#
223# DMA support
224#
225# CONFIG_SH_DMA is not set
226
227#
228# Companion Chips
229#
230# CONFIG_HD6446X_SERIES is not set
231
232#
233# Kernel features
234#
235# CONFIG_HZ_100 is not set
236CONFIG_HZ_250=y
237# CONFIG_HZ_1000 is not set
238CONFIG_HZ=250
239# CONFIG_KEXEC is not set
240# CONFIG_SMP is not set
241# CONFIG_PREEMPT_NONE is not set
242# CONFIG_PREEMPT_VOLUNTARY is not set
243CONFIG_PREEMPT=y
244CONFIG_PREEMPT_BKL=y
245
246#
247# Boot options
248#
249CONFIG_ZERO_PAGE_OFFSET=0x00001000
250CONFIG_BOOT_LINK_OFFSET=0x00800000
251# CONFIG_UBC_WAKEUP is not set
252CONFIG_CMDLINE_BOOL=y
253CONFIG_CMDLINE="mem=64M console=ttySC1,115200 root=/dev/hda1"
254
255#
256# Bus options
257#
258# CONFIG_PCI is not set
259
260#
261# PCCARD (PCMCIA/CardBus) support
262#
263# CONFIG_PCCARD is not set
264
265#
266# PCI Hotplug Support
267#
268
269#
270# Executable file formats
271#
272CONFIG_BINFMT_ELF=y
273# CONFIG_BINFMT_FLAT is not set
274# CONFIG_BINFMT_MISC is not set
275
276#
277# Power management options (EXPERIMENTAL)
278#
279# CONFIG_PM is not set
280
281#
282# Networking
283#
284CONFIG_NET=y
285
286#
287# Networking options
288#
289# CONFIG_NETDEBUG is not set
290CONFIG_PACKET=y
291CONFIG_PACKET_MMAP=y
292CONFIG_UNIX=y
293CONFIG_XFRM=y
294# CONFIG_XFRM_USER is not set
295# CONFIG_XFRM_SUB_POLICY is not set
296# CONFIG_NET_KEY is not set
297CONFIG_INET=y
298CONFIG_IP_MULTICAST=y
299CONFIG_IP_ADVANCED_ROUTER=y
300CONFIG_ASK_IP_FIB_HASH=y
301# CONFIG_IP_FIB_TRIE is not set
302CONFIG_IP_FIB_HASH=y
303# CONFIG_IP_MULTIPLE_TABLES is not set
304# CONFIG_IP_ROUTE_MULTIPATH is not set
305# CONFIG_IP_ROUTE_VERBOSE is not set
306# CONFIG_IP_PNP is not set
307# CONFIG_NET_IPIP is not set
308# CONFIG_NET_IPGRE is not set
309# CONFIG_IP_MROUTE is not set
310# CONFIG_ARPD is not set
311# CONFIG_SYN_COOKIES is not set
312# CONFIG_INET_AH is not set
313# CONFIG_INET_ESP is not set
314# CONFIG_INET_IPCOMP is not set
315# CONFIG_INET_XFRM_TUNNEL is not set
316# CONFIG_INET_TUNNEL is not set
317CONFIG_INET_XFRM_MODE_TRANSPORT=y
318CONFIG_INET_XFRM_MODE_TUNNEL=y
319CONFIG_INET_DIAG=y
320CONFIG_INET_TCP_DIAG=y
321# CONFIG_TCP_CONG_ADVANCED is not set
322CONFIG_TCP_CONG_CUBIC=y
323CONFIG_DEFAULT_TCP_CONG="cubic"
324# CONFIG_IPV6 is not set
325# CONFIG_INET6_XFRM_TUNNEL is not set
326# CONFIG_INET6_TUNNEL is not set
327# CONFIG_NETWORK_SECMARK is not set
328# CONFIG_NETFILTER is not set
329
330#
331# DCCP Configuration (EXPERIMENTAL)
332#
333# CONFIG_IP_DCCP is not set
334
335#
336# SCTP Configuration (EXPERIMENTAL)
337#
338# CONFIG_IP_SCTP is not set
339
340#
341# TIPC Configuration (EXPERIMENTAL)
342#
343# CONFIG_TIPC is not set
344# CONFIG_ATM is not set
345# CONFIG_BRIDGE is not set
346# CONFIG_VLAN_8021Q is not set
347# CONFIG_DECNET is not set
348# CONFIG_LLC2 is not set
349# CONFIG_IPX is not set
350# CONFIG_ATALK is not set
351# CONFIG_X25 is not set
352# CONFIG_LAPB is not set
353# CONFIG_ECONET is not set
354# CONFIG_WAN_ROUTER is not set
355
356#
357# QoS and/or fair queueing
358#
359# CONFIG_NET_SCHED is not set
360
361#
362# Network testing
363#
364# CONFIG_NET_PKTGEN is not set
365# CONFIG_HAMRADIO is not set
366# CONFIG_IRDA is not set
367# CONFIG_BT is not set
368# CONFIG_IEEE80211 is not set
369
370#
371# Device Drivers
372#
373
374#
375# Generic Driver Options
376#
377CONFIG_STANDALONE=y
378CONFIG_PREVENT_FIRMWARE_BUILD=y
379CONFIG_FW_LOADER=m
380# CONFIG_SYS_HYPERVISOR is not set
381
382#
383# Connector - unified userspace <-> kernelspace linker
384#
385# CONFIG_CONNECTOR is not set
386
387#
388# Memory Technology Devices (MTD)
389#
390# CONFIG_MTD is not set
391
392#
393# Parallel port support
394#
395# CONFIG_PARPORT is not set
396
397#
398# Plug and Play support
399#
400
401#
402# Block devices
403#
404# CONFIG_BLK_DEV_COW_COMMON is not set
405# CONFIG_BLK_DEV_LOOP is not set
406# CONFIG_BLK_DEV_NBD is not set
407# CONFIG_BLK_DEV_RAM is not set
408# CONFIG_BLK_DEV_INITRD is not set
409# CONFIG_CDROM_PKTCDVD is not set
410# CONFIG_ATA_OVER_ETH is not set
411
412#
413# ATA/ATAPI/MFM/RLL support
414#
415CONFIG_IDE=y
416CONFIG_IDE_MAX_HWIFS=1
417CONFIG_BLK_DEV_IDE=y
418
419#
420# Please see Documentation/ide.txt for help/info on IDE drives
421#
422# CONFIG_BLK_DEV_IDE_SATA is not set
423CONFIG_BLK_DEV_IDEDISK=y
424# CONFIG_IDEDISK_MULTI_MODE is not set
425# CONFIG_BLK_DEV_IDECD is not set
426# CONFIG_BLK_DEV_IDETAPE is not set
427# CONFIG_BLK_DEV_IDEFLOPPY is not set
428# CONFIG_IDE_TASK_IOCTL is not set
429
430#
431# IDE chipset support/bugfixes
432#
433CONFIG_IDE_GENERIC=y
434# CONFIG_IDE_ARM is not set
435# CONFIG_BLK_DEV_IDEDMA is not set
436# CONFIG_IDEDMA_AUTO is not set
437# CONFIG_BLK_DEV_HD is not set
438
439#
440# SCSI device support
441#
442# CONFIG_RAID_ATTRS is not set
443# CONFIG_SCSI is not set
444# CONFIG_SCSI_NETLINK is not set
445
446#
447# Serial ATA (prod) and Parallel ATA (experimental) drivers
448#
449# CONFIG_ATA is not set
450
451#
452# Multi-device support (RAID and LVM)
453#
454# CONFIG_MD is not set
455
456#
457# Fusion MPT device support
458#
459# CONFIG_FUSION is not set
460
461#
462# IEEE 1394 (FireWire) support
463#
464
465#
466# I2O device support
467#
468
469#
470# Network device support
471#
472CONFIG_NETDEVICES=y
473# CONFIG_DUMMY is not set
474# CONFIG_BONDING is not set
475# CONFIG_EQUALIZER is not set
476# CONFIG_TUN is not set
477
478#
479# PHY device support
480#
481# CONFIG_PHYLIB is not set
482
483#
484# Ethernet (10 or 100Mbit)
485#
486CONFIG_NET_ETHERNET=y
487CONFIG_MII=y
488# CONFIG_STNIC is not set
489# CONFIG_SMC91X is not set
490
491#
492# Ethernet (1000 Mbit)
493#
494
495#
496# Ethernet (10000 Mbit)
497#
498
499#
500# Token Ring devices
501#
502
503#
504# Wireless LAN (non-hamradio)
505#
506# CONFIG_NET_RADIO is not set
507
508#
509# Wan interfaces
510#
511# CONFIG_WAN is not set
512# CONFIG_PPP is not set
513# CONFIG_SLIP is not set
514# CONFIG_SHAPER is not set
515# CONFIG_NETCONSOLE is not set
516# CONFIG_NETPOLL is not set
517# CONFIG_NET_POLL_CONTROLLER is not set
518
519#
520# ISDN subsystem
521#
522# CONFIG_ISDN is not set
523
524#
525# Telephony Support
526#
527# CONFIG_PHONE is not set
528
529#
530# Input device support
531#
532CONFIG_INPUT=y
533# CONFIG_INPUT_FF_MEMLESS is not set
534
535#
536# Userland interfaces
537#
538# CONFIG_INPUT_MOUSEDEV is not set
539# CONFIG_INPUT_JOYDEV is not set
540# CONFIG_INPUT_TSDEV is not set
541# CONFIG_INPUT_EVDEV is not set
542# CONFIG_INPUT_EVBUG is not set
543
544#
545# Input Device Drivers
546#
547# CONFIG_INPUT_KEYBOARD is not set
548# CONFIG_INPUT_MOUSE is not set
549# CONFIG_INPUT_JOYSTICK is not set
550# CONFIG_INPUT_TOUCHSCREEN is not set
551# CONFIG_INPUT_MISC is not set
552
553#
554# Hardware I/O ports
555#
556CONFIG_SERIO=y
557CONFIG_SERIO_I8042=y
558CONFIG_SERIO_SERPORT=y
559# CONFIG_SERIO_LIBPS2 is not set
560# CONFIG_SERIO_RAW is not set
561# CONFIG_GAMEPORT is not set
562
563#
564# Character devices
565#
566# CONFIG_VT is not set
567# CONFIG_SERIAL_NONSTANDARD is not set
568
569#
570# Serial drivers
571#
572# CONFIG_SERIAL_8250 is not set
573
574#
575# Non-8250 serial port support
576#
577CONFIG_SERIAL_SH_SCI=y
578CONFIG_SERIAL_SH_SCI_NR_UARTS=2
579CONFIG_SERIAL_SH_SCI_CONSOLE=y
580CONFIG_SERIAL_CORE=y
581CONFIG_SERIAL_CORE_CONSOLE=y
582CONFIG_UNIX98_PTYS=y
583# CONFIG_LEGACY_PTYS is not set
584
585#
586# IPMI
587#
588# CONFIG_IPMI_HANDLER is not set
589
590#
591# Watchdog Cards
592#
593# CONFIG_WATCHDOG is not set
594CONFIG_HW_RANDOM=y
595# CONFIG_GEN_RTC is not set
596# CONFIG_DTLK is not set
597# CONFIG_R3964 is not set
598
599#
600# Ftape, the floppy tape device driver
601#
602# CONFIG_RAW_DRIVER is not set
603
604#
605# TPM devices
606#
607# CONFIG_TCG_TPM is not set
608# CONFIG_TELCLOCK is not set
609
610#
611# I2C support
612#
613# CONFIG_I2C is not set
614
615#
616# SPI support
617#
618# CONFIG_SPI is not set
619# CONFIG_SPI_MASTER is not set
620
621#
622# Dallas's 1-wire bus
623#
624
625#
626# Hardware Monitoring support
627#
628CONFIG_HWMON=y
629# CONFIG_HWMON_VID is not set
630# CONFIG_SENSORS_ABITUGURU is not set
631# CONFIG_SENSORS_F71805F is not set
632# CONFIG_SENSORS_VT1211 is not set
633# CONFIG_HWMON_DEBUG_CHIP is not set
634
635#
636# Misc devices
637#
638
639#
640# Multimedia devices
641#
642# CONFIG_VIDEO_DEV is not set
643CONFIG_VIDEO_V4L2=y
644
645#
646# Digital Video Broadcasting Devices
647#
648# CONFIG_DVB is not set
649
650#
651# Graphics support
652#
653CONFIG_FIRMWARE_EDID=y
654# CONFIG_FB is not set
655# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
656
657#
658# Sound
659#
660# CONFIG_SOUND is not set
661
662#
663# USB support
664#
665# CONFIG_USB_ARCH_HAS_HCD is not set
666# CONFIG_USB_ARCH_HAS_OHCI is not set
667# CONFIG_USB_ARCH_HAS_EHCI is not set
668
669#
670# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
671#
672
673#
674# USB Gadget Support
675#
676# CONFIG_USB_GADGET is not set
677
678#
679# MMC/SD Card support
680#
681# CONFIG_MMC is not set
682
683#
684# LED devices
685#
686# CONFIG_NEW_LEDS is not set
687
688#
689# LED drivers
690#
691
692#
693# LED Triggers
694#
695
696#
697# InfiniBand support
698#
699
700#
701# EDAC - error detection and reporting (RAS) (EXPERIMENTAL)
702#
703
704#
705# Real Time Clock
706#
707# CONFIG_RTC_CLASS is not set
708
709#
710# DMA Engine support
711#
712# CONFIG_DMA_ENGINE is not set
713
714#
715# DMA Clients
716#
717
718#
719# DMA Devices
720#
721
722#
723# File systems
724#
725CONFIG_EXT2_FS=y
726# CONFIG_EXT2_FS_XATTR is not set
727# CONFIG_EXT2_FS_XIP is not set
728# CONFIG_EXT3_FS is not set
729# CONFIG_REISERFS_FS is not set
730# CONFIG_JFS_FS is not set
731# CONFIG_FS_POSIX_ACL is not set
732# CONFIG_XFS_FS is not set
733# CONFIG_OCFS2_FS is not set
734# CONFIG_MINIX_FS is not set
735# CONFIG_ROMFS_FS is not set
736CONFIG_INOTIFY=y
737CONFIG_INOTIFY_USER=y
738# CONFIG_QUOTA is not set
739CONFIG_DNOTIFY=y
740# CONFIG_AUTOFS_FS is not set
741# CONFIG_AUTOFS4_FS is not set
742# CONFIG_FUSE_FS is not set
743
744#
745# CD-ROM/DVD Filesystems
746#
747# CONFIG_ISO9660_FS is not set
748# CONFIG_UDF_FS is not set
749
750#
751# DOS/FAT/NT Filesystems
752#
753# CONFIG_MSDOS_FS is not set
754# CONFIG_VFAT_FS is not set
755# CONFIG_NTFS_FS is not set
756
757#
758# Pseudo filesystems
759#
760CONFIG_PROC_FS=y
761CONFIG_PROC_KCORE=y
762CONFIG_PROC_SYSCTL=y
763CONFIG_SYSFS=y
764CONFIG_TMPFS=y
765# CONFIG_TMPFS_POSIX_ACL is not set
766# CONFIG_HUGETLBFS is not set
767# CONFIG_HUGETLB_PAGE is not set
768CONFIG_RAMFS=y
769# CONFIG_CONFIGFS_FS is not set
770
771#
772# Miscellaneous filesystems
773#
774# CONFIG_ADFS_FS is not set
775# CONFIG_AFFS_FS is not set
776# CONFIG_HFS_FS is not set
777# CONFIG_HFSPLUS_FS is not set
778# CONFIG_BEFS_FS is not set
779# CONFIG_BFS_FS is not set
780# CONFIG_EFS_FS is not set
781# CONFIG_CRAMFS is not set
782# CONFIG_VXFS_FS is not set
783# CONFIG_HPFS_FS is not set
784# CONFIG_QNX4FS_FS is not set
785# CONFIG_SYSV_FS is not set
786# CONFIG_UFS_FS is not set
787
788#
789# Network File Systems
790#
791CONFIG_NFS_FS=y
792CONFIG_NFS_V3=y
793# CONFIG_NFS_V3_ACL is not set
794CONFIG_NFS_V4=y
795CONFIG_NFS_DIRECTIO=y
796# CONFIG_NFSD is not set
797CONFIG_LOCKD=y
798CONFIG_LOCKD_V4=y
799CONFIG_NFS_COMMON=y
800CONFIG_SUNRPC=y
801CONFIG_SUNRPC_GSS=y
802CONFIG_RPCSEC_GSS_KRB5=y
803# CONFIG_RPCSEC_GSS_SPKM3 is not set
804# CONFIG_SMB_FS is not set
805# CONFIG_CIFS is not set
806# CONFIG_NCP_FS is not set
807# CONFIG_CODA_FS is not set
808# CONFIG_AFS_FS is not set
809# CONFIG_9P_FS is not set
810
811#
812# Partition Types
813#
814CONFIG_PARTITION_ADVANCED=y
815# CONFIG_ACORN_PARTITION is not set
816# CONFIG_OSF_PARTITION is not set
817# CONFIG_AMIGA_PARTITION is not set
818# CONFIG_ATARI_PARTITION is not set
819# CONFIG_MAC_PARTITION is not set
820CONFIG_MSDOS_PARTITION=y
821# CONFIG_BSD_DISKLABEL is not set
822# CONFIG_MINIX_SUBPARTITION is not set
823# CONFIG_SOLARIS_X86_PARTITION is not set
824# CONFIG_UNIXWARE_DISKLABEL is not set
825# CONFIG_LDM_PARTITION is not set
826# CONFIG_SGI_PARTITION is not set
827# CONFIG_ULTRIX_PARTITION is not set
828# CONFIG_SUN_PARTITION is not set
829# CONFIG_KARMA_PARTITION is not set
830# CONFIG_EFI_PARTITION is not set
831
832#
833# Native Language Support
834#
835# CONFIG_NLS is not set
836
837#
838# Profiling support
839#
840# CONFIG_PROFILING is not set
841
842#
843# Kernel hacking
844#
845# CONFIG_PRINTK_TIME is not set
846CONFIG_ENABLE_MUST_CHECK=y
847# CONFIG_MAGIC_SYSRQ is not set
848# CONFIG_UNUSED_SYMBOLS is not set
849# CONFIG_DEBUG_KERNEL is not set
850CONFIG_LOG_BUF_SHIFT=14
851# CONFIG_DEBUG_BUGVERBOSE is not set
852# CONFIG_DEBUG_FS is not set
853# CONFIG_SH_STANDARD_BIOS is not set
854# CONFIG_EARLY_SCIF_CONSOLE is not set
855# CONFIG_KGDB is not set
856
857#
858# Security options
859#
860# CONFIG_KEYS is not set
861# CONFIG_SECURITY is not set
862
863#
864# Cryptographic options
865#
866CONFIG_CRYPTO=y
867CONFIG_CRYPTO_ALGAPI=y
868CONFIG_CRYPTO_BLKCIPHER=m
869CONFIG_CRYPTO_MANAGER=m
870# CONFIG_CRYPTO_HMAC is not set
871# CONFIG_CRYPTO_NULL is not set
872# CONFIG_CRYPTO_MD4 is not set
873CONFIG_CRYPTO_MD5=y
874# CONFIG_CRYPTO_SHA1 is not set
875# CONFIG_CRYPTO_SHA256 is not set
876# CONFIG_CRYPTO_SHA512 is not set
877# CONFIG_CRYPTO_WP512 is not set
878# CONFIG_CRYPTO_TGR192 is not set
879CONFIG_CRYPTO_ECB=m
880CONFIG_CRYPTO_CBC=m
881CONFIG_CRYPTO_DES=y
882# CONFIG_CRYPTO_BLOWFISH is not set
883# CONFIG_CRYPTO_TWOFISH is not set
884# CONFIG_CRYPTO_SERPENT is not set
885# CONFIG_CRYPTO_AES is not set
886# CONFIG_CRYPTO_CAST5 is not set
887# CONFIG_CRYPTO_CAST6 is not set
888# CONFIG_CRYPTO_TEA is not set
889# CONFIG_CRYPTO_ARC4 is not set
890# CONFIG_CRYPTO_KHAZAD is not set
891# CONFIG_CRYPTO_ANUBIS is not set
892# CONFIG_CRYPTO_DEFLATE is not set
893# CONFIG_CRYPTO_MICHAEL_MIC is not set
894# CONFIG_CRYPTO_CRC32C is not set
895# CONFIG_CRYPTO_TEST is not set
896
897#
898# Hardware crypto devices
899#
900
901#
902# Library routines
903#
904# CONFIG_CRC_CCITT is not set
905# CONFIG_CRC16 is not set
906CONFIG_CRC32=y
907# CONFIG_LIBCRC32C is not set
908CONFIG_PLIST=y
diff --git a/arch/sh/configs/r7785rp_defconfig b/arch/sh/configs/r7785rp_defconfig
index 2e43a2a971a9..0dc1ce7b9349 100644
--- a/arch/sh/configs/r7785rp_defconfig
+++ b/arch/sh/configs/r7785rp_defconfig
@@ -1,9 +1,10 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc2 3# Linux kernel version: 2.6.24-rc3
4# Tue Nov 13 20:34:57 2007 4# Fri Nov 23 14:03:57 2007
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 8CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y 9CONFIG_GENERIC_BUG=y
9CONFIG_GENERIC_FIND_NEXT_BIT=y 10CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -39,6 +40,7 @@ CONFIG_BSD_PROCESS_ACCT=y
39# CONFIG_BSD_PROCESS_ACCT_V3 is not set 40# CONFIG_BSD_PROCESS_ACCT_V3 is not set
40# CONFIG_TASKSTATS is not set 41# CONFIG_TASKSTATS is not set
41# CONFIG_USER_NS is not set 42# CONFIG_USER_NS is not set
43# CONFIG_PID_NS is not set
42# CONFIG_AUDIT is not set 44# CONFIG_AUDIT is not set
43CONFIG_IKCONFIG=y 45CONFIG_IKCONFIG=y
44CONFIG_IKCONFIG_PROC=y 46CONFIG_IKCONFIG_PROC=y
@@ -130,6 +132,8 @@ CONFIG_CPU_SUBTYPE_SH7785=y
130# CONFIG_CPU_SUBTYPE_SHX3 is not set 132# CONFIG_CPU_SUBTYPE_SHX3 is not set
131# CONFIG_CPU_SUBTYPE_SH7343 is not set 133# CONFIG_CPU_SUBTYPE_SH7343 is not set
132# CONFIG_CPU_SUBTYPE_SH7722 is not set 134# CONFIG_CPU_SUBTYPE_SH7722 is not set
135# CONFIG_CPU_SUBTYPE_SH5_101 is not set
136# CONFIG_CPU_SUBTYPE_SH5_103 is not set
133 137
134# 138#
135# Memory management options 139# Memory management options
@@ -139,7 +143,8 @@ CONFIG_MMU=y
139CONFIG_PAGE_OFFSET=0x80000000 143CONFIG_PAGE_OFFSET=0x80000000
140CONFIG_MEMORY_START=0x08000000 144CONFIG_MEMORY_START=0x08000000
141CONFIG_MEMORY_SIZE=0x08000000 145CONFIG_MEMORY_SIZE=0x08000000
142# CONFIG_32BIT is not set 146CONFIG_29BIT=y
147# CONFIG_PMB is not set
143# CONFIG_X2TLB is not set 148# CONFIG_X2TLB is not set
144CONFIG_VSYSCALL=y 149CONFIG_VSYSCALL=y
145# CONFIG_NUMA is not set 150# CONFIG_NUMA is not set
@@ -158,6 +163,7 @@ CONFIG_PAGE_SIZE_4KB=y
158CONFIG_HUGETLB_PAGE_SIZE_1MB=y 163CONFIG_HUGETLB_PAGE_SIZE_1MB=y
159# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set 164# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
160# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set 165# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
166# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
161CONFIG_SELECT_MEMORY_MODEL=y 167CONFIG_SELECT_MEMORY_MODEL=y
162# CONFIG_FLATMEM_MANUAL is not set 168# CONFIG_FLATMEM_MANUAL is not set
163# CONFIG_DISCONTIGMEM_MANUAL is not set 169# CONFIG_DISCONTIGMEM_MANUAL is not set
@@ -701,6 +707,7 @@ CONFIG_DEVPORT=y
701# CONFIG_POWER_SUPPLY is not set 707# CONFIG_POWER_SUPPLY is not set
702CONFIG_HWMON=y 708CONFIG_HWMON=y
703# CONFIG_HWMON_VID is not set 709# CONFIG_HWMON_VID is not set
710# CONFIG_SENSORS_I5K_AMB is not set
704# CONFIG_SENSORS_F71805F is not set 711# CONFIG_SENSORS_F71805F is not set
705# CONFIG_SENSORS_F71882FG is not set 712# CONFIG_SENSORS_F71882FG is not set
706# CONFIG_SENSORS_IT87 is not set 713# CONFIG_SENSORS_IT87 is not set
diff --git a/arch/sh/configs/r7780rp_defconfig b/arch/sh/configs/sdk7780_defconfig
index 12cc01910cf8..bb9bcd6591ab 100644
--- a/arch/sh/configs/r7780rp_defconfig
+++ b/arch/sh/configs/sdk7780_defconfig
@@ -1,9 +1,10 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.21-rc7 3# Linux kernel version: 2.6.24-rc7
4# Tue May 1 12:28:39 2007 4# Tue Jan 22 11:34:03 2008
5# 5#
6CONFIG_SUPERH=y 6CONFIG_SUPERH=y
7CONFIG_SUPERH32=y
7CONFIG_RWSEM_GENERIC_SPINLOCK=y 8CONFIG_RWSEM_GENERIC_SPINLOCK=y
8CONFIG_GENERIC_BUG=y 9CONFIG_GENERIC_BUG=y
9CONFIG_GENERIC_FIND_NEXT_BIT=y 10CONFIG_GENERIC_FIND_NEXT_BIT=y
@@ -11,149 +12,107 @@ CONFIG_GENERIC_HWEIGHT=y
11CONFIG_GENERIC_HARDIRQS=y 12CONFIG_GENERIC_HARDIRQS=y
12CONFIG_GENERIC_IRQ_PROBE=y 13CONFIG_GENERIC_IRQ_PROBE=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y 14CONFIG_GENERIC_CALIBRATE_DELAY=y
14# CONFIG_GENERIC_TIME is not set 15CONFIG_GENERIC_TIME=y
16CONFIG_GENERIC_CLOCKEVENTS=y
17CONFIG_SYS_SUPPORTS_PCI=y
15CONFIG_STACKTRACE_SUPPORT=y 18CONFIG_STACKTRACE_SUPPORT=y
16CONFIG_LOCKDEP_SUPPORT=y 19CONFIG_LOCKDEP_SUPPORT=y
17# CONFIG_ARCH_HAS_ILOG2_U32 is not set 20# CONFIG_ARCH_HAS_ILOG2_U32 is not set
18# CONFIG_ARCH_HAS_ILOG2_U64 is not set 21# CONFIG_ARCH_HAS_ILOG2_U64 is not set
22CONFIG_ARCH_NO_VIRT_TO_BUS=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" 23CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20 24
21# 25#
22# Code maturity level options 26# General setup
23# 27#
24CONFIG_EXPERIMENTAL=y 28CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y 29CONFIG_BROKEN_ON_SMP=y
26CONFIG_LOCK_KERNEL=y 30CONFIG_LOCK_KERNEL=y
27CONFIG_INIT_ENV_ARG_LIMIT=32 31CONFIG_INIT_ENV_ARG_LIMIT=32
28 32CONFIG_LOCALVERSION="_SDK7780"
29#
30# General setup
31#
32CONFIG_LOCALVERSION=""
33CONFIG_LOCALVERSION_AUTO=y 33CONFIG_LOCALVERSION_AUTO=y
34CONFIG_SWAP=y 34CONFIG_SWAP=y
35CONFIG_SYSVIPC=y 35CONFIG_SYSVIPC=y
36# CONFIG_IPC_NS is not set
37CONFIG_SYSVIPC_SYSCTL=y 36CONFIG_SYSVIPC_SYSCTL=y
38# CONFIG_POSIX_MQUEUE is not set 37CONFIG_POSIX_MQUEUE=y
39CONFIG_BSD_PROCESS_ACCT=y 38CONFIG_BSD_PROCESS_ACCT=y
40# CONFIG_BSD_PROCESS_ACCT_V3 is not set 39# CONFIG_BSD_PROCESS_ACCT_V3 is not set
41# CONFIG_TASKSTATS is not set 40# CONFIG_TASKSTATS is not set
42# CONFIG_UTS_NS is not set 41# CONFIG_USER_NS is not set
42# CONFIG_PID_NS is not set
43# CONFIG_AUDIT is not set 43# CONFIG_AUDIT is not set
44CONFIG_IKCONFIG=y 44CONFIG_IKCONFIG=y
45CONFIG_IKCONFIG_PROC=y 45CONFIG_IKCONFIG_PROC=y
46# CONFIG_SYSFS_DEPRECATED is not set 46CONFIG_LOG_BUF_SHIFT=18
47# CONFIG_RELAY is not set 47# CONFIG_CGROUPS is not set
48CONFIG_FAIR_GROUP_SCHED=y
49CONFIG_FAIR_USER_SCHED=y
50# CONFIG_FAIR_CGROUP_SCHED is not set
51CONFIG_SYSFS_DEPRECATED=y
52CONFIG_RELAY=y
48# CONFIG_BLK_DEV_INITRD is not set 53# CONFIG_BLK_DEV_INITRD is not set
49CONFIG_CC_OPTIMIZE_FOR_SIZE=y 54CONFIG_CC_OPTIMIZE_FOR_SIZE=y
50CONFIG_SYSCTL=y 55CONFIG_SYSCTL=y
51CONFIG_EMBEDDED=y 56CONFIG_EMBEDDED=y
52CONFIG_UID16=y 57CONFIG_UID16=y
53# CONFIG_SYSCTL_SYSCALL is not set 58CONFIG_SYSCTL_SYSCALL=y
54CONFIG_KALLSYMS=y 59CONFIG_KALLSYMS=y
55# CONFIG_KALLSYMS_ALL is not set 60CONFIG_KALLSYMS_ALL=y
56# CONFIG_KALLSYMS_EXTRA_PASS is not set 61# CONFIG_KALLSYMS_EXTRA_PASS is not set
57CONFIG_HOTPLUG=y 62CONFIG_HOTPLUG=y
58CONFIG_PRINTK=y 63CONFIG_PRINTK=y
59CONFIG_BUG=y 64CONFIG_BUG=y
60CONFIG_ELF_CORE=y 65CONFIG_ELF_CORE=y
61CONFIG_BASE_FULL=y 66CONFIG_BASE_FULL=y
62# CONFIG_FUTEX is not set 67CONFIG_FUTEX=y
63# CONFIG_EPOLL is not set 68CONFIG_ANON_INODES=y
69CONFIG_EPOLL=y
70CONFIG_SIGNALFD=y
71CONFIG_EVENTFD=y
64CONFIG_SHMEM=y 72CONFIG_SHMEM=y
65CONFIG_SLAB=y
66CONFIG_VM_EVENT_COUNTERS=y 73CONFIG_VM_EVENT_COUNTERS=y
74CONFIG_SLUB_DEBUG=y
75# CONFIG_SLAB is not set
76CONFIG_SLUB=y
77# CONFIG_SLOB is not set
78CONFIG_SLABINFO=y
79CONFIG_RT_MUTEXES=y
67# CONFIG_TINY_SHMEM is not set 80# CONFIG_TINY_SHMEM is not set
68CONFIG_BASE_SMALL=0 81CONFIG_BASE_SMALL=0
69# CONFIG_SLOB is not set
70
71#
72# Loadable module support
73#
74CONFIG_MODULES=y 82CONFIG_MODULES=y
75CONFIG_MODULE_UNLOAD=y 83CONFIG_MODULE_UNLOAD=y
76# CONFIG_MODULE_FORCE_UNLOAD is not set 84CONFIG_MODULE_FORCE_UNLOAD=y
77# CONFIG_MODVERSIONS is not set 85# CONFIG_MODVERSIONS is not set
78# CONFIG_MODULE_SRCVERSION_ALL is not set 86# CONFIG_MODULE_SRCVERSION_ALL is not set
79CONFIG_KMOD=y 87CONFIG_KMOD=y
80
81#
82# Block layer
83#
84CONFIG_BLOCK=y 88CONFIG_BLOCK=y
85# CONFIG_LBD is not set 89CONFIG_LBD=y
86# CONFIG_BLK_DEV_IO_TRACE is not set 90# CONFIG_BLK_DEV_IO_TRACE is not set
87# CONFIG_LSF is not set 91# CONFIG_LSF is not set
92# CONFIG_BLK_DEV_BSG is not set
88 93
89# 94#
90# IO Schedulers 95# IO Schedulers
91# 96#
92CONFIG_IOSCHED_NOOP=y 97CONFIG_IOSCHED_NOOP=y
93# CONFIG_IOSCHED_AS is not set 98CONFIG_IOSCHED_AS=y
94# CONFIG_IOSCHED_DEADLINE is not set 99CONFIG_IOSCHED_DEADLINE=y
95# CONFIG_IOSCHED_CFQ is not set 100CONFIG_IOSCHED_CFQ=y
96# CONFIG_DEFAULT_AS is not set 101CONFIG_DEFAULT_AS=y
97# CONFIG_DEFAULT_DEADLINE is not set 102# CONFIG_DEFAULT_DEADLINE is not set
98# CONFIG_DEFAULT_CFQ is not set 103# CONFIG_DEFAULT_CFQ is not set
99CONFIG_DEFAULT_NOOP=y 104# CONFIG_DEFAULT_NOOP is not set
100CONFIG_DEFAULT_IOSCHED="noop" 105CONFIG_DEFAULT_IOSCHED="anticipatory"
101 106
102# 107#
103# System type 108# System type
104# 109#
105# CONFIG_SH_SOLUTION_ENGINE is not set
106# CONFIG_SH_7722_SOLUTION_ENGINE is not set
107# CONFIG_SH_7751_SOLUTION_ENGINE is not set
108# CONFIG_SH_7780_SOLUTION_ENGINE is not set
109# CONFIG_SH_7300_SOLUTION_ENGINE is not set
110# CONFIG_SH_7343_SOLUTION_ENGINE is not set
111# CONFIG_SH_73180_SOLUTION_ENGINE is not set
112# CONFIG_SH_7751_SYSTEMH is not set
113# CONFIG_SH_HP6XX is not set
114# CONFIG_SH_SATURN is not set
115# CONFIG_SH_DREAMCAST is not set
116# CONFIG_SH_MPC1211 is not set
117# CONFIG_SH_SH03 is not set
118# CONFIG_SH_SECUREEDGE5410 is not set
119# CONFIG_SH_HS7751RVOIP is not set
120# CONFIG_SH_7710VOIPGW is not set
121# CONFIG_SH_RTS7751R2D is not set
122CONFIG_SH_HIGHLANDER=y
123# CONFIG_SH_EDOSK7705 is not set
124# CONFIG_SH_SH4202_MICRODEV is not set
125# CONFIG_SH_LANDISK is not set
126# CONFIG_SH_TITAN is not set
127# CONFIG_SH_SHMIN is not set
128# CONFIG_SH_7206_SOLUTION_ENGINE is not set
129# CONFIG_SH_7619_SOLUTION_ENGINE is not set
130# CONFIG_SH_LBOX_RE2 is not set
131# CONFIG_SH_UNKNOWN is not set
132CONFIG_SH_R7780RP=y
133# CONFIG_SH_R7780MP is not set
134# CONFIG_SH_R7785RP is not set
135
136#
137# Processor selection
138#
139CONFIG_CPU_SH4=y 110CONFIG_CPU_SH4=y
140CONFIG_CPU_SH4A=y 111CONFIG_CPU_SH4A=y
141
142#
143# SH-2 Processor Support
144#
145# CONFIG_CPU_SUBTYPE_SH7604 is not set
146# CONFIG_CPU_SUBTYPE_SH7619 is not set 112# CONFIG_CPU_SUBTYPE_SH7619 is not set
147 113# CONFIG_CPU_SUBTYPE_SH7203 is not set
148#
149# SH-2A Processor Support
150#
151# CONFIG_CPU_SUBTYPE_SH7206 is not set 114# CONFIG_CPU_SUBTYPE_SH7206 is not set
152 115# CONFIG_CPU_SUBTYPE_SH7263 is not set
153#
154# SH-3 Processor Support
155#
156# CONFIG_CPU_SUBTYPE_SH7300 is not set
157# CONFIG_CPU_SUBTYPE_SH7705 is not set 116# CONFIG_CPU_SUBTYPE_SH7705 is not set
158# CONFIG_CPU_SUBTYPE_SH7706 is not set 117# CONFIG_CPU_SUBTYPE_SH7706 is not set
159# CONFIG_CPU_SUBTYPE_SH7707 is not set 118# CONFIG_CPU_SUBTYPE_SH7707 is not set
@@ -161,10 +120,8 @@ CONFIG_CPU_SH4A=y
161# CONFIG_CPU_SUBTYPE_SH7709 is not set 120# CONFIG_CPU_SUBTYPE_SH7709 is not set
162# CONFIG_CPU_SUBTYPE_SH7710 is not set 121# CONFIG_CPU_SUBTYPE_SH7710 is not set
163# CONFIG_CPU_SUBTYPE_SH7712 is not set 122# CONFIG_CPU_SUBTYPE_SH7712 is not set
164 123# CONFIG_CPU_SUBTYPE_SH7720 is not set
165# 124# CONFIG_CPU_SUBTYPE_SH7721 is not set
166# SH-4 Processor Support
167#
168# CONFIG_CPU_SUBTYPE_SH7750 is not set 125# CONFIG_CPU_SUBTYPE_SH7750 is not set
169# CONFIG_CPU_SUBTYPE_SH7091 is not set 126# CONFIG_CPU_SUBTYPE_SH7091 is not set
170# CONFIG_CPU_SUBTYPE_SH7750R is not set 127# CONFIG_CPU_SUBTYPE_SH7750R is not set
@@ -173,38 +130,33 @@ CONFIG_CPU_SH4A=y
173# CONFIG_CPU_SUBTYPE_SH7751R is not set 130# CONFIG_CPU_SUBTYPE_SH7751R is not set
174# CONFIG_CPU_SUBTYPE_SH7760 is not set 131# CONFIG_CPU_SUBTYPE_SH7760 is not set
175# CONFIG_CPU_SUBTYPE_SH4_202 is not set 132# CONFIG_CPU_SUBTYPE_SH4_202 is not set
176 133# CONFIG_CPU_SUBTYPE_SH7763 is not set
177#
178# ST40 Processor Support
179#
180# CONFIG_CPU_SUBTYPE_ST40STB1 is not set
181# CONFIG_CPU_SUBTYPE_ST40GX1 is not set
182
183#
184# SH-4A Processor Support
185#
186# CONFIG_CPU_SUBTYPE_SH7770 is not set 134# CONFIG_CPU_SUBTYPE_SH7770 is not set
187CONFIG_CPU_SUBTYPE_SH7780=y 135CONFIG_CPU_SUBTYPE_SH7780=y
188# CONFIG_CPU_SUBTYPE_SH7785 is not set 136# CONFIG_CPU_SUBTYPE_SH7785 is not set
189 137# CONFIG_CPU_SUBTYPE_SHX3 is not set
190#
191# SH4AL-DSP Processor Support
192#
193# CONFIG_CPU_SUBTYPE_SH73180 is not set
194# CONFIG_CPU_SUBTYPE_SH7343 is not set 138# CONFIG_CPU_SUBTYPE_SH7343 is not set
195# CONFIG_CPU_SUBTYPE_SH7722 is not set 139# CONFIG_CPU_SUBTYPE_SH7722 is not set
140# CONFIG_CPU_SUBTYPE_SH5_101 is not set
141# CONFIG_CPU_SUBTYPE_SH5_103 is not set
196 142
197# 143#
198# Memory management options 144# Memory management options
199# 145#
146CONFIG_QUICKLIST=y
200CONFIG_MMU=y 147CONFIG_MMU=y
201CONFIG_PAGE_OFFSET=0x80000000 148CONFIG_PAGE_OFFSET=0x80000000
202CONFIG_MEMORY_START=0x08000000 149CONFIG_MEMORY_START=0x08000000
203CONFIG_MEMORY_SIZE=0x08000000 150CONFIG_MEMORY_SIZE=0x08000000
204# CONFIG_32BIT is not set 151CONFIG_29BIT=y
152# CONFIG_PMB is not set
205CONFIG_VSYSCALL=y 153CONFIG_VSYSCALL=y
206CONFIG_ARCH_FLATMEM_ENABLE=y 154CONFIG_ARCH_FLATMEM_ENABLE=y
155CONFIG_ARCH_SPARSEMEM_ENABLE=y
156CONFIG_ARCH_SPARSEMEM_DEFAULT=y
157CONFIG_MAX_ACTIVE_REGIONS=1
207CONFIG_ARCH_POPULATES_NODE_MAP=y 158CONFIG_ARCH_POPULATES_NODE_MAP=y
159CONFIG_ARCH_SELECT_MEMORY_MODEL=y
208CONFIG_PAGE_SIZE_4KB=y 160CONFIG_PAGE_SIZE_4KB=y
209# CONFIG_PAGE_SIZE_8KB is not set 161# CONFIG_PAGE_SIZE_8KB is not set
210# CONFIG_PAGE_SIZE_64KB is not set 162# CONFIG_PAGE_SIZE_64KB is not set
@@ -213,23 +165,27 @@ CONFIG_HUGETLB_PAGE_SIZE_64K=y
213# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set 165# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
214# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set 166# CONFIG_HUGETLB_PAGE_SIZE_4MB is not set
215# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set 167# CONFIG_HUGETLB_PAGE_SIZE_64MB is not set
168# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
216CONFIG_SELECT_MEMORY_MODEL=y 169CONFIG_SELECT_MEMORY_MODEL=y
217CONFIG_FLATMEM_MANUAL=y 170CONFIG_FLATMEM_MANUAL=y
218# CONFIG_DISCONTIGMEM_MANUAL is not set 171# CONFIG_DISCONTIGMEM_MANUAL is not set
219# CONFIG_SPARSEMEM_MANUAL is not set 172# CONFIG_SPARSEMEM_MANUAL is not set
220CONFIG_FLATMEM=y 173CONFIG_FLATMEM=y
221CONFIG_FLAT_NODE_MEM_MAP=y 174CONFIG_FLAT_NODE_MEM_MAP=y
222# CONFIG_SPARSEMEM_STATIC is not set 175CONFIG_SPARSEMEM_STATIC=y
176# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
223CONFIG_SPLIT_PTLOCK_CPUS=4 177CONFIG_SPLIT_PTLOCK_CPUS=4
224# CONFIG_RESOURCES_64BIT is not set 178CONFIG_RESOURCES_64BIT=y
225CONFIG_ZONE_DMA_FLAG=0 179CONFIG_ZONE_DMA_FLAG=0
180CONFIG_NR_QUICK=2
226 181
227# 182#
228# Cache configuration 183# Cache configuration
229# 184#
230# CONFIG_SH_DIRECT_MAPPED is not set 185# CONFIG_SH_DIRECT_MAPPED is not set
231# CONFIG_SH_WRITETHROUGH is not set 186CONFIG_CACHE_WRITEBACK=y
232# CONFIG_SH_OCRAM is not set 187# CONFIG_CACHE_WRITETHROUGH is not set
188# CONFIG_CACHE_OFF is not set
233 189
234# 190#
235# Processor features 191# Processor features
@@ -237,20 +193,31 @@ CONFIG_ZONE_DMA_FLAG=0
237CONFIG_CPU_LITTLE_ENDIAN=y 193CONFIG_CPU_LITTLE_ENDIAN=y
238# CONFIG_CPU_BIG_ENDIAN is not set 194# CONFIG_CPU_BIG_ENDIAN is not set
239CONFIG_SH_FPU=y 195CONFIG_SH_FPU=y
240# CONFIG_SH_DSP is not set
241CONFIG_SH_STORE_QUEUES=y 196CONFIG_SH_STORE_QUEUES=y
242CONFIG_SPECULATIVE_EXECUTION=y 197# CONFIG_SPECULATIVE_EXECUTION is not set
243CONFIG_CPU_HAS_INTEVT=y 198CONFIG_CPU_HAS_INTEVT=y
244CONFIG_CPU_HAS_INTC_IRQ=y
245CONFIG_CPU_HAS_SR_RB=y 199CONFIG_CPU_HAS_SR_RB=y
200CONFIG_CPU_HAS_FPU=y
201
202#
203# Board support
204#
205# CONFIG_SH_7780_SOLUTION_ENGINE is not set
206CONFIG_SH_SDK7780=y
207# CONFIG_SH_HIGHLANDER is not set
208# CONFIG_SH_SDK7780_STANDALONE is not set
209CONFIG_SH_SDK7780_BASE=y
246 210
247# 211#
248# Timer and clock configuration 212# Timer and clock configuration
249# 213#
250CONFIG_SH_TMU=y 214CONFIG_SH_TMU=y
251CONFIG_SH_TIMER_IRQ=28 215CONFIG_SH_TIMER_IRQ=28
252CONFIG_NO_IDLE_HZ=y 216CONFIG_SH_PCLK_FREQ=33333333
253CONFIG_SH_PCLK_FREQ=32000000 217CONFIG_TICK_ONESHOT=y
218# CONFIG_NO_HZ is not set
219CONFIG_HIGH_RES_TIMERS=y
220CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
254 221
255# 222#
256# CPU Frequency scaling 223# CPU Frequency scaling
@@ -260,18 +227,20 @@ CONFIG_SH_PCLK_FREQ=32000000
260# 227#
261# DMA support 228# DMA support
262# 229#
263# CONFIG_SH_DMA is not set 230CONFIG_SH_DMA_API=y
231CONFIG_SH_DMA=y
232CONFIG_NR_ONCHIP_DMA_CHANNELS=12
233# CONFIG_NR_DMA_CHANNELS_BOOL is not set
264 234
265# 235#
266# Companion Chips 236# Companion Chips
267# 237#
268# CONFIG_HD6446X_SERIES is not set
269 238
270# 239#
271# Additional SuperH Device Drivers 240# Additional SuperH Device Drivers
272# 241#
273# CONFIG_HEARTBEAT is not set 242CONFIG_HEARTBEAT=y
274CONFIG_PUSH_SWITCH=y 243# CONFIG_PUSH_SWITCH is not set
275 244
276# 245#
277# Kernel features 246# Kernel features
@@ -281,22 +250,21 @@ CONFIG_HZ_250=y
281# CONFIG_HZ_300 is not set 250# CONFIG_HZ_300 is not set
282# CONFIG_HZ_1000 is not set 251# CONFIG_HZ_1000 is not set
283CONFIG_HZ=250 252CONFIG_HZ=250
284CONFIG_KEXEC=y 253# CONFIG_KEXEC is not set
285# CONFIG_CRASH_DUMP is not set 254# CONFIG_CRASH_DUMP is not set
286# CONFIG_SMP is not set
287# CONFIG_PREEMPT_NONE is not set 255# CONFIG_PREEMPT_NONE is not set
288# CONFIG_PREEMPT_VOLUNTARY is not set 256# CONFIG_PREEMPT_VOLUNTARY is not set
289CONFIG_PREEMPT=y 257CONFIG_PREEMPT=y
290CONFIG_PREEMPT_BKL=y 258CONFIG_PREEMPT_BKL=y
259CONFIG_GUSA=y
291 260
292# 261#
293# Boot options 262# Boot options
294# 263#
295CONFIG_ZERO_PAGE_OFFSET=0x00001000 264CONFIG_ZERO_PAGE_OFFSET=0x00001000
296CONFIG_BOOT_LINK_OFFSET=0x00800000 265CONFIG_BOOT_LINK_OFFSET=0x01800000
297# CONFIG_UBC_WAKEUP is not set
298CONFIG_CMDLINE_BOOL=y 266CONFIG_CMDLINE_BOOL=y
299CONFIG_CMDLINE="mem=128M console=ttySC0,115200 root=/dev/sda1" 267CONFIG_CMDLINE="mem=128M console=tty0 console=ttySC0,115200 ip=bootp root=/dev/nfs nfsroot=192.168.0.1:/home/rootfs"
300 268
301# 269#
302# Bus options 270# Bus options
@@ -305,31 +273,40 @@ CONFIG_PCI=y
305CONFIG_SH_PCIDMA_NONCOHERENT=y 273CONFIG_SH_PCIDMA_NONCOHERENT=y
306CONFIG_PCI_AUTO=y 274CONFIG_PCI_AUTO=y
307CONFIG_PCI_AUTO_UPDATE_RESOURCES=y 275CONFIG_PCI_AUTO_UPDATE_RESOURCES=y
308# CONFIG_PCI_DEBUG is not set 276# CONFIG_ARCH_SUPPORTS_MSI is not set
309 277# CONFIG_PCI_LEGACY is not set
310# 278CONFIG_PCI_DEBUG=y
311# PCCARD (PCMCIA/CardBus) support 279CONFIG_PCCARD=y
312# 280# CONFIG_PCMCIA_DEBUG is not set
313# CONFIG_PCCARD is not set 281CONFIG_PCMCIA=y
314 282CONFIG_PCMCIA_LOAD_CIS=y
315# 283CONFIG_PCMCIA_IOCTL=y
316# PCI Hotplug Support 284CONFIG_CARDBUS=y
317# 285
318# CONFIG_HOTPLUG_PCI is not set 286#
287# PC-card bridges
288#
289CONFIG_YENTA=y
290CONFIG_YENTA_O2=y
291CONFIG_YENTA_RICOH=y
292CONFIG_YENTA_TI=y
293CONFIG_YENTA_ENE_TUNE=y
294CONFIG_YENTA_TOSHIBA=y
295# CONFIG_PD6729 is not set
296# CONFIG_I82092 is not set
297CONFIG_PCCARD_NONSTATIC=y
298CONFIG_HOTPLUG_PCI=y
299# CONFIG_HOTPLUG_PCI_FAKE is not set
300# CONFIG_HOTPLUG_PCI_CPCI is not set
301# CONFIG_HOTPLUG_PCI_SHPC is not set
319 302
320# 303#
321# Executable file formats 304# Executable file formats
322# 305#
323CONFIG_BINFMT_ELF=y 306CONFIG_BINFMT_ELF=y
324# CONFIG_BINFMT_FLAT is not set
325# CONFIG_BINFMT_MISC is not set 307# CONFIG_BINFMT_MISC is not set
326 308
327# 309#
328# Power management options (EXPERIMENTAL)
329#
330# CONFIG_PM is not set
331
332#
333# Networking 310# Networking
334# 311#
335CONFIG_NET=y 312CONFIG_NET=y
@@ -337,7 +314,6 @@ CONFIG_NET=y
337# 314#
338# Networking options 315# Networking options
339# 316#
340# CONFIG_NETDEBUG is not set
341CONFIG_PACKET=y 317CONFIG_PACKET=y
342# CONFIG_PACKET_MMAP is not set 318# CONFIG_PACKET_MMAP is not set
343CONFIG_UNIX=y 319CONFIG_UNIX=y
@@ -347,7 +323,7 @@ CONFIG_XFRM=y
347# CONFIG_XFRM_MIGRATE is not set 323# CONFIG_XFRM_MIGRATE is not set
348# CONFIG_NET_KEY is not set 324# CONFIG_NET_KEY is not set
349CONFIG_INET=y 325CONFIG_INET=y
350# CONFIG_IP_MULTICAST is not set 326CONFIG_IP_MULTICAST=y
351CONFIG_IP_ADVANCED_ROUTER=y 327CONFIG_IP_ADVANCED_ROUTER=y
352CONFIG_ASK_IP_FIB_HASH=y 328CONFIG_ASK_IP_FIB_HASH=y
353# CONFIG_IP_FIB_TRIE is not set 329# CONFIG_IP_FIB_TRIE is not set
@@ -356,52 +332,55 @@ CONFIG_IP_FIB_HASH=y
356# CONFIG_IP_ROUTE_MULTIPATH is not set 332# CONFIG_IP_ROUTE_MULTIPATH is not set
357# CONFIG_IP_ROUTE_VERBOSE is not set 333# CONFIG_IP_ROUTE_VERBOSE is not set
358CONFIG_IP_PNP=y 334CONFIG_IP_PNP=y
359CONFIG_IP_PNP_DHCP=y 335# CONFIG_IP_PNP_DHCP is not set
360# CONFIG_IP_PNP_BOOTP is not set 336CONFIG_IP_PNP_BOOTP=y
361# CONFIG_IP_PNP_RARP is not set 337# CONFIG_IP_PNP_RARP is not set
362# CONFIG_NET_IPIP is not set 338# CONFIG_NET_IPIP is not set
363# CONFIG_NET_IPGRE is not set 339# CONFIG_NET_IPGRE is not set
340# CONFIG_IP_MROUTE is not set
364# CONFIG_ARPD is not set 341# CONFIG_ARPD is not set
365# CONFIG_SYN_COOKIES is not set 342# CONFIG_SYN_COOKIES is not set
366# CONFIG_INET_AH is not set 343# CONFIG_INET_AH is not set
367# CONFIG_INET_ESP is not set 344# CONFIG_INET_ESP is not set
368# CONFIG_INET_IPCOMP is not set 345# CONFIG_INET_IPCOMP is not set
369# CONFIG_INET_XFRM_TUNNEL is not set 346# CONFIG_INET_XFRM_TUNNEL is not set
370# CONFIG_INET_TUNNEL is not set 347CONFIG_INET_TUNNEL=y
371CONFIG_INET_XFRM_MODE_TRANSPORT=y 348CONFIG_INET_XFRM_MODE_TRANSPORT=y
372CONFIG_INET_XFRM_MODE_TUNNEL=y 349CONFIG_INET_XFRM_MODE_TUNNEL=y
373CONFIG_INET_XFRM_MODE_BEET=y 350# CONFIG_INET_XFRM_MODE_BEET is not set
351# CONFIG_INET_LRO is not set
374CONFIG_INET_DIAG=y 352CONFIG_INET_DIAG=y
375CONFIG_INET_TCP_DIAG=y 353CONFIG_INET_TCP_DIAG=y
376# CONFIG_TCP_CONG_ADVANCED is not set 354# CONFIG_TCP_CONG_ADVANCED is not set
377CONFIG_TCP_CONG_CUBIC=y 355CONFIG_TCP_CONG_CUBIC=y
378CONFIG_DEFAULT_TCP_CONG="cubic" 356CONFIG_DEFAULT_TCP_CONG="cubic"
379# CONFIG_TCP_MD5SIG is not set 357# CONFIG_TCP_MD5SIG is not set
380# CONFIG_IPV6 is not set 358CONFIG_IPV6=y
359# CONFIG_IPV6_PRIVACY is not set
360# CONFIG_IPV6_ROUTER_PREF is not set
361# CONFIG_IPV6_OPTIMISTIC_DAD is not set
362# CONFIG_INET6_AH is not set
363# CONFIG_INET6_ESP is not set
364# CONFIG_INET6_IPCOMP is not set
365# CONFIG_IPV6_MIP6 is not set
381# CONFIG_INET6_XFRM_TUNNEL is not set 366# CONFIG_INET6_XFRM_TUNNEL is not set
382# CONFIG_INET6_TUNNEL is not set 367# CONFIG_INET6_TUNNEL is not set
368CONFIG_INET6_XFRM_MODE_TRANSPORT=y
369CONFIG_INET6_XFRM_MODE_TUNNEL=y
370# CONFIG_INET6_XFRM_MODE_BEET is not set
371# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
372CONFIG_IPV6_SIT=y
373# CONFIG_IPV6_TUNNEL is not set
374# CONFIG_IPV6_MULTIPLE_TABLES is not set
383# CONFIG_NETWORK_SECMARK is not set 375# CONFIG_NETWORK_SECMARK is not set
384# CONFIG_NETFILTER is not set 376# CONFIG_NETFILTER is not set
385
386#
387# DCCP Configuration (EXPERIMENTAL)
388#
389# CONFIG_IP_DCCP is not set 377# CONFIG_IP_DCCP is not set
390
391#
392# SCTP Configuration (EXPERIMENTAL)
393#
394# CONFIG_IP_SCTP is not set 378# CONFIG_IP_SCTP is not set
395
396#
397# TIPC Configuration (EXPERIMENTAL)
398#
399# CONFIG_TIPC is not set 379# CONFIG_TIPC is not set
400# CONFIG_ATM is not set 380# CONFIG_ATM is not set
401CONFIG_BRIDGE=m 381# CONFIG_BRIDGE is not set
402# CONFIG_VLAN_8021Q is not set 382# CONFIG_VLAN_8021Q is not set
403# CONFIG_DECNET is not set 383# CONFIG_DECNET is not set
404CONFIG_LLC=m
405# CONFIG_LLC2 is not set 384# CONFIG_LLC2 is not set
406# CONFIG_IPX is not set 385# CONFIG_IPX is not set
407# CONFIG_ATALK is not set 386# CONFIG_ATALK is not set
@@ -409,11 +388,39 @@ CONFIG_LLC=m
409# CONFIG_LAPB is not set 388# CONFIG_LAPB is not set
410# CONFIG_ECONET is not set 389# CONFIG_ECONET is not set
411# CONFIG_WAN_ROUTER is not set 390# CONFIG_WAN_ROUTER is not set
391CONFIG_NET_SCHED=y
392
393#
394# Queueing/Scheduling
395#
396# CONFIG_NET_SCH_CBQ is not set
397# CONFIG_NET_SCH_HTB is not set
398# CONFIG_NET_SCH_HFSC is not set
399# CONFIG_NET_SCH_PRIO is not set
400# CONFIG_NET_SCH_RR is not set
401# CONFIG_NET_SCH_RED is not set
402# CONFIG_NET_SCH_SFQ is not set
403# CONFIG_NET_SCH_TEQL is not set
404# CONFIG_NET_SCH_TBF is not set
405# CONFIG_NET_SCH_GRED is not set
406# CONFIG_NET_SCH_DSMARK is not set
407# CONFIG_NET_SCH_NETEM is not set
408# CONFIG_NET_SCH_INGRESS is not set
412 409
413# 410#
414# QoS and/or fair queueing 411# Classification
415# 412#
416# CONFIG_NET_SCHED is not set 413# CONFIG_NET_CLS_BASIC is not set
414# CONFIG_NET_CLS_TCINDEX is not set
415# CONFIG_NET_CLS_ROUTE4 is not set
416# CONFIG_NET_CLS_FW is not set
417# CONFIG_NET_CLS_U32 is not set
418# CONFIG_NET_CLS_RSVP is not set
419# CONFIG_NET_CLS_RSVP6 is not set
420# CONFIG_NET_EMATCH is not set
421# CONFIG_NET_CLS_ACT is not set
422# CONFIG_NET_CLS_POLICE is not set
423CONFIG_NET_SCH_FIFO=y
417 424
418# 425#
419# Network testing 426# Network testing
@@ -422,8 +429,17 @@ CONFIG_LLC=m
422# CONFIG_HAMRADIO is not set 429# CONFIG_HAMRADIO is not set
423# CONFIG_IRDA is not set 430# CONFIG_IRDA is not set
424# CONFIG_BT is not set 431# CONFIG_BT is not set
432# CONFIG_AF_RXRPC is not set
433
434#
435# Wireless
436#
437# CONFIG_CFG80211 is not set
438# CONFIG_WIRELESS_EXT is not set
439# CONFIG_MAC80211 is not set
425# CONFIG_IEEE80211 is not set 440# CONFIG_IEEE80211 is not set
426CONFIG_WIRELESS_EXT=y 441# CONFIG_RFKILL is not set
442# CONFIG_NET_9P is not set
427 443
428# 444#
429# Device Drivers 445# Device Drivers
@@ -432,69 +448,108 @@ CONFIG_WIRELESS_EXT=y
432# 448#
433# Generic Driver Options 449# Generic Driver Options
434# 450#
451CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
435CONFIG_STANDALONE=y 452CONFIG_STANDALONE=y
436CONFIG_PREVENT_FIRMWARE_BUILD=y 453CONFIG_PREVENT_FIRMWARE_BUILD=y
437CONFIG_FW_LOADER=m 454CONFIG_FW_LOADER=y
438# CONFIG_DEBUG_DRIVER is not set 455# CONFIG_DEBUG_DRIVER is not set
439# CONFIG_DEBUG_DEVRES is not set 456# CONFIG_DEBUG_DEVRES is not set
440# CONFIG_SYS_HYPERVISOR is not set 457# CONFIG_SYS_HYPERVISOR is not set
441
442#
443# Connector - unified userspace <-> kernelspace linker
444#
445# CONFIG_CONNECTOR is not set 458# CONFIG_CONNECTOR is not set
446
447#
448# Memory Technology Devices (MTD)
449#
450# CONFIG_MTD is not set 459# CONFIG_MTD is not set
451 460CONFIG_PARPORT=y
452# 461# CONFIG_PARPORT_PC is not set
453# Parallel port support 462# CONFIG_PARPORT_GSC is not set
454# 463# CONFIG_PARPORT_AX88796 is not set
455# CONFIG_PARPORT is not set 464# CONFIG_PARPORT_1284 is not set
456 465CONFIG_BLK_DEV=y
457#
458# Plug and Play support
459#
460# CONFIG_PNPACPI is not set
461
462#
463# Block devices
464#
465# CONFIG_BLK_CPQ_DA is not set
466# CONFIG_BLK_CPQ_CISS_DA is not set 466# CONFIG_BLK_CPQ_CISS_DA is not set
467# CONFIG_BLK_DEV_DAC960 is not set 467# CONFIG_BLK_DEV_DAC960 is not set
468# CONFIG_BLK_DEV_UMEM is not set 468# CONFIG_BLK_DEV_UMEM is not set
469# CONFIG_BLK_DEV_COW_COMMON is not set 469# CONFIG_BLK_DEV_COW_COMMON is not set
470# CONFIG_BLK_DEV_LOOP is not set 470CONFIG_BLK_DEV_LOOP=y
471# CONFIG_BLK_DEV_CRYPTOLOOP is not set
471# CONFIG_BLK_DEV_NBD is not set 472# CONFIG_BLK_DEV_NBD is not set
472# CONFIG_BLK_DEV_SX8 is not set 473# CONFIG_BLK_DEV_SX8 is not set
474# CONFIG_BLK_DEV_UB is not set
473CONFIG_BLK_DEV_RAM=y 475CONFIG_BLK_DEV_RAM=y
474CONFIG_BLK_DEV_RAM_COUNT=16 476CONFIG_BLK_DEV_RAM_COUNT=16
475CONFIG_BLK_DEV_RAM_SIZE=4096 477CONFIG_BLK_DEV_RAM_SIZE=4096
476CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 478CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
477# CONFIG_CDROM_PKTCDVD is not set 479# CONFIG_CDROM_PKTCDVD is not set
478# CONFIG_ATA_OVER_ETH is not set 480# CONFIG_ATA_OVER_ETH is not set
479 481# CONFIG_MISC_DEVICES is not set
480# 482CONFIG_IDE=y
481# Misc devices 483CONFIG_IDE_MAX_HWIFS=4
482# 484CONFIG_BLK_DEV_IDE=y
483# CONFIG_SGI_IOC4 is not set 485
484# CONFIG_TIFM_CORE is not set 486#
485 487# Please see Documentation/ide.txt for help/info on IDE drives
486# 488#
487# ATA/ATAPI/MFM/RLL support 489# CONFIG_BLK_DEV_IDE_SATA is not set
488# 490CONFIG_BLK_DEV_IDEDISK=y
489# CONFIG_IDE is not set 491CONFIG_IDEDISK_MULTI_MODE=y
492# CONFIG_BLK_DEV_IDECS is not set
493# CONFIG_BLK_DEV_DELKIN is not set
494CONFIG_BLK_DEV_IDECD=y
495# CONFIG_BLK_DEV_IDETAPE is not set
496# CONFIG_BLK_DEV_IDEFLOPPY is not set
497# CONFIG_BLK_DEV_IDESCSI is not set
498# CONFIG_IDE_TASK_IOCTL is not set
499CONFIG_IDE_PROC_FS=y
500
501#
502# IDE chipset support/bugfixes
503#
504CONFIG_IDE_GENERIC=y
505CONFIG_BLK_DEV_PLATFORM=y
506
507#
508# PCI IDE chipsets support
509#
510CONFIG_BLK_DEV_IDEPCI=y
511# CONFIG_IDEPCI_SHARE_IRQ is not set
512CONFIG_IDEPCI_PCIBUS_ORDER=y
513# CONFIG_BLK_DEV_OFFBOARD is not set
514CONFIG_BLK_DEV_GENERIC=y
515# CONFIG_BLK_DEV_OPTI621 is not set
516# CONFIG_BLK_DEV_AEC62XX is not set
517# CONFIG_BLK_DEV_ALI15X3 is not set
518# CONFIG_BLK_DEV_AMD74XX is not set
519# CONFIG_BLK_DEV_CMD64X is not set
520# CONFIG_BLK_DEV_TRIFLEX is not set
521# CONFIG_BLK_DEV_CY82C693 is not set
522# CONFIG_BLK_DEV_CS5520 is not set
523# CONFIG_BLK_DEV_CS5530 is not set
524# CONFIG_BLK_DEV_HPT34X is not set
525# CONFIG_BLK_DEV_HPT366 is not set
526# CONFIG_BLK_DEV_JMICRON is not set
527# CONFIG_BLK_DEV_SC1200 is not set
528# CONFIG_BLK_DEV_PIIX is not set
529# CONFIG_BLK_DEV_IT8213 is not set
530# CONFIG_BLK_DEV_IT821X is not set
531# CONFIG_BLK_DEV_NS87415 is not set
532# CONFIG_BLK_DEV_PDC202XX_OLD is not set
533# CONFIG_BLK_DEV_PDC202XX_NEW is not set
534# CONFIG_BLK_DEV_SVWKS is not set
535# CONFIG_BLK_DEV_SIIMAGE is not set
536# CONFIG_BLK_DEV_SLC90E66 is not set
537# CONFIG_BLK_DEV_TRM290 is not set
538# CONFIG_BLK_DEV_VIA82CXXX is not set
539# CONFIG_BLK_DEV_TC86C001 is not set
540# CONFIG_IDE_ARM is not set
541# CONFIG_BLK_DEV_IDEDMA is not set
542# CONFIG_IDE_ARCH_OBSOLETE_INIT is not set
543# CONFIG_BLK_DEV_HD is not set
490 544
491# 545#
492# SCSI device support 546# SCSI device support
493# 547#
494# CONFIG_RAID_ATTRS is not set 548# CONFIG_RAID_ATTRS is not set
495CONFIG_SCSI=y 549CONFIG_SCSI=y
550CONFIG_SCSI_DMA=y
496# CONFIG_SCSI_TGT is not set 551# CONFIG_SCSI_TGT is not set
497# CONFIG_SCSI_NETLINK is not set 552CONFIG_SCSI_NETLINK=y
498CONFIG_SCSI_PROC_FS=y 553CONFIG_SCSI_PROC_FS=y
499 554
500# 555#
@@ -503,8 +558,9 @@ CONFIG_SCSI_PROC_FS=y
503CONFIG_BLK_DEV_SD=y 558CONFIG_BLK_DEV_SD=y
504# CONFIG_CHR_DEV_ST is not set 559# CONFIG_CHR_DEV_ST is not set
505# CONFIG_CHR_DEV_OSST is not set 560# CONFIG_CHR_DEV_OSST is not set
506# CONFIG_BLK_DEV_SR is not set 561CONFIG_BLK_DEV_SR=y
507CONFIG_CHR_DEV_SG=m 562# CONFIG_BLK_DEV_SR_VENDOR is not set
563CONFIG_CHR_DEV_SG=y
508# CONFIG_CHR_DEV_SCH is not set 564# CONFIG_CHR_DEV_SCH is not set
509 565
510# 566#
@@ -514,19 +570,17 @@ CONFIG_CHR_DEV_SG=m
514# CONFIG_SCSI_CONSTANTS is not set 570# CONFIG_SCSI_CONSTANTS is not set
515# CONFIG_SCSI_LOGGING is not set 571# CONFIG_SCSI_LOGGING is not set
516# CONFIG_SCSI_SCAN_ASYNC is not set 572# CONFIG_SCSI_SCAN_ASYNC is not set
573CONFIG_SCSI_WAIT_SCAN=m
517 574
518# 575#
519# SCSI Transports 576# SCSI Transports
520# 577#
521# CONFIG_SCSI_SPI_ATTRS is not set 578CONFIG_SCSI_SPI_ATTRS=y
522# CONFIG_SCSI_FC_ATTRS is not set 579CONFIG_SCSI_FC_ATTRS=y
523# CONFIG_SCSI_ISCSI_ATTRS is not set 580# CONFIG_SCSI_ISCSI_ATTRS is not set
524# CONFIG_SCSI_SAS_ATTRS is not set
525# CONFIG_SCSI_SAS_LIBSAS is not set 581# CONFIG_SCSI_SAS_LIBSAS is not set
526 582# CONFIG_SCSI_SRP_ATTRS is not set
527# 583CONFIG_SCSI_LOWLEVEL=y
528# SCSI low-level drivers
529#
530# CONFIG_ISCSI_TCP is not set 584# CONFIG_ISCSI_TCP is not set
531# CONFIG_BLK_DEV_3W_XXXX_RAID is not set 585# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
532# CONFIG_SCSI_3W_9XXX is not set 586# CONFIG_SCSI_3W_9XXX is not set
@@ -536,7 +590,6 @@ CONFIG_CHR_DEV_SG=m
536# CONFIG_SCSI_AIC7XXX_OLD is not set 590# CONFIG_SCSI_AIC7XXX_OLD is not set
537# CONFIG_SCSI_AIC79XX is not set 591# CONFIG_SCSI_AIC79XX is not set
538# CONFIG_SCSI_AIC94XX is not set 592# CONFIG_SCSI_AIC94XX is not set
539# CONFIG_SCSI_DPT_I2O is not set
540# CONFIG_SCSI_ARCMSR is not set 593# CONFIG_SCSI_ARCMSR is not set
541# CONFIG_MEGARAID_NEWGEN is not set 594# CONFIG_MEGARAID_NEWGEN is not set
542# CONFIG_MEGARAID_LEGACY is not set 595# CONFIG_MEGARAID_LEGACY is not set
@@ -559,10 +612,7 @@ CONFIG_CHR_DEV_SG=m
559# CONFIG_SCSI_NSP32 is not set 612# CONFIG_SCSI_NSP32 is not set
560# CONFIG_SCSI_DEBUG is not set 613# CONFIG_SCSI_DEBUG is not set
561# CONFIG_SCSI_SRP is not set 614# CONFIG_SCSI_SRP is not set
562 615# CONFIG_SCSI_LOWLEVEL_PCMCIA is not set
563#
564# Serial ATA (prod) and Parallel ATA (experimental) drivers
565#
566CONFIG_ATA=y 616CONFIG_ATA=y
567# CONFIG_ATA_NONSTANDARD is not set 617# CONFIG_ATA_NONSTANDARD is not set
568# CONFIG_SATA_AHCI is not set 618# CONFIG_SATA_AHCI is not set
@@ -574,7 +624,7 @@ CONFIG_ATA=y
574# CONFIG_SATA_QSTOR is not set 624# CONFIG_SATA_QSTOR is not set
575# CONFIG_SATA_PROMISE is not set 625# CONFIG_SATA_PROMISE is not set
576# CONFIG_SATA_SX4 is not set 626# CONFIG_SATA_SX4 is not set
577CONFIG_SATA_SIL=y 627# CONFIG_SATA_SIL is not set
578# CONFIG_SATA_SIL24 is not set 628# CONFIG_SATA_SIL24 is not set
579# CONFIG_SATA_SIS is not set 629# CONFIG_SATA_SIS is not set
580# CONFIG_SATA_ULI is not set 630# CONFIG_SATA_ULI is not set
@@ -585,6 +635,7 @@ CONFIG_SATA_SIL=y
585# CONFIG_PATA_AMD is not set 635# CONFIG_PATA_AMD is not set
586# CONFIG_PATA_ARTOP is not set 636# CONFIG_PATA_ARTOP is not set
587# CONFIG_PATA_ATIIXP is not set 637# CONFIG_PATA_ATIIXP is not set
638# CONFIG_PATA_CMD640_PCI is not set
588# CONFIG_PATA_CMD64X is not set 639# CONFIG_PATA_CMD64X is not set
589# CONFIG_PATA_CS5520 is not set 640# CONFIG_PATA_CS5520 is not set
590# CONFIG_PATA_CS5530 is not set 641# CONFIG_PATA_CS5530 is not set
@@ -604,8 +655,10 @@ CONFIG_SATA_SIL=y
604# CONFIG_PATA_OLDPIIX is not set 655# CONFIG_PATA_OLDPIIX is not set
605# CONFIG_PATA_NETCELL is not set 656# CONFIG_PATA_NETCELL is not set
606# CONFIG_PATA_NS87410 is not set 657# CONFIG_PATA_NS87410 is not set
658# CONFIG_PATA_NS87415 is not set
607# CONFIG_PATA_OPTI is not set 659# CONFIG_PATA_OPTI is not set
608# CONFIG_PATA_OPTIDMA is not set 660# CONFIG_PATA_OPTIDMA is not set
661# CONFIG_PATA_PCMCIA is not set
609# CONFIG_PATA_PDC_OLD is not set 662# CONFIG_PATA_PDC_OLD is not set
610# CONFIG_PATA_RADISYS is not set 663# CONFIG_PATA_RADISYS is not set
611# CONFIG_PATA_RZ1000 is not set 664# CONFIG_PATA_RZ1000 is not set
@@ -616,185 +669,87 @@ CONFIG_SATA_SIL=y
616# CONFIG_PATA_SIS is not set 669# CONFIG_PATA_SIS is not set
617# CONFIG_PATA_VIA is not set 670# CONFIG_PATA_VIA is not set
618# CONFIG_PATA_WINBOND is not set 671# CONFIG_PATA_WINBOND is not set
619CONFIG_PATA_PLATFORM=y 672# CONFIG_PATA_PLATFORM is not set
620 673CONFIG_MD=y
621# 674# CONFIG_BLK_DEV_MD is not set
622# Multi-device support (RAID and LVM) 675CONFIG_BLK_DEV_DM=y
623# 676# CONFIG_DM_DEBUG is not set
624# CONFIG_MD is not set 677# CONFIG_DM_CRYPT is not set
625 678# CONFIG_DM_SNAPSHOT is not set
626# 679# CONFIG_DM_MIRROR is not set
627# Fusion MPT device support 680# CONFIG_DM_ZERO is not set
628# 681# CONFIG_DM_MULTIPATH is not set
682# CONFIG_DM_DELAY is not set
683# CONFIG_DM_UEVENT is not set
629# CONFIG_FUSION is not set 684# CONFIG_FUSION is not set
630# CONFIG_FUSION_SPI is not set
631# CONFIG_FUSION_FC is not set
632# CONFIG_FUSION_SAS is not set
633 685
634# 686#
635# IEEE 1394 (FireWire) support 687# IEEE 1394 (FireWire) support
636# 688#
689# CONFIG_FIREWIRE is not set
637# CONFIG_IEEE1394 is not set 690# CONFIG_IEEE1394 is not set
638
639#
640# I2O device support
641#
642# CONFIG_I2O is not set 691# CONFIG_I2O is not set
643
644#
645# Network device support
646#
647CONFIG_NETDEVICES=y 692CONFIG_NETDEVICES=y
693# CONFIG_NETDEVICES_MULTIQUEUE is not set
648# CONFIG_DUMMY is not set 694# CONFIG_DUMMY is not set
649# CONFIG_BONDING is not set 695# CONFIG_BONDING is not set
696# CONFIG_MACVLAN is not set
650# CONFIG_EQUALIZER is not set 697# CONFIG_EQUALIZER is not set
651# CONFIG_TUN is not set 698# CONFIG_TUN is not set
652 699# CONFIG_VETH is not set
653#
654# ARCnet devices
655#
656# CONFIG_ARCNET is not set 700# CONFIG_ARCNET is not set
657
658#
659# PHY device support
660#
661# CONFIG_PHYLIB is not set 701# CONFIG_PHYLIB is not set
662
663#
664# Ethernet (10 or 100Mbit)
665#
666CONFIG_NET_ETHERNET=y 702CONFIG_NET_ETHERNET=y
667CONFIG_MII=y 703CONFIG_MII=y
704# CONFIG_AX88796 is not set
668# CONFIG_STNIC is not set 705# CONFIG_STNIC is not set
669# CONFIG_HAPPYMEAL is not set 706# CONFIG_HAPPYMEAL is not set
670# CONFIG_SUNGEM is not set 707# CONFIG_SUNGEM is not set
671# CONFIG_CASSINI is not set 708# CONFIG_CASSINI is not set
672# CONFIG_NET_VENDOR_3COM is not set 709# CONFIG_NET_VENDOR_3COM is not set
673# CONFIG_SMC91X is not set 710CONFIG_SMC91X=y
674
675#
676# Tulip family network device support
677#
678# CONFIG_NET_TULIP is not set 711# CONFIG_NET_TULIP is not set
679# CONFIG_HP100 is not set 712# CONFIG_HP100 is not set
680CONFIG_NET_PCI=y 713# CONFIG_IBM_NEW_EMAC_ZMII is not set
681CONFIG_PCNET32=m 714# CONFIG_IBM_NEW_EMAC_RGMII is not set
682# CONFIG_PCNET32_NAPI is not set 715# CONFIG_IBM_NEW_EMAC_TAH is not set
683# CONFIG_AMD8111_ETH is not set 716# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
684# CONFIG_ADAPTEC_STARFIRE is not set 717# CONFIG_NET_PCI is not set
685# CONFIG_B44 is not set 718# CONFIG_B44 is not set
686# CONFIG_FORCEDETH is not set 719# CONFIG_NET_POCKET is not set
687# CONFIG_DGRS is not set 720# CONFIG_NETDEV_1000 is not set
688# CONFIG_EEPRO100 is not set 721# CONFIG_NETDEV_10000 is not set
689# CONFIG_E100 is not set
690# CONFIG_FEALNX is not set
691# CONFIG_NATSEMI is not set
692# CONFIG_NE2K_PCI is not set
693CONFIG_8139CP=m
694CONFIG_8139TOO=m
695# CONFIG_8139TOO_PIO is not set
696# CONFIG_8139TOO_TUNE_TWISTER is not set
697CONFIG_8139TOO_8129=y
698# CONFIG_8139_OLD_RX_RESET is not set
699# CONFIG_SIS900 is not set
700# CONFIG_EPIC100 is not set
701# CONFIG_SUNDANCE is not set
702# CONFIG_TLAN is not set
703CONFIG_VIA_RHINE=m
704CONFIG_VIA_RHINE_MMIO=y
705# CONFIG_VIA_RHINE_NAPI is not set
706# CONFIG_SC92031 is not set
707
708#
709# Ethernet (1000 Mbit)
710#
711# CONFIG_ACENIC is not set
712# CONFIG_DL2K is not set
713CONFIG_E1000=m
714# CONFIG_E1000_NAPI is not set
715# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
716# CONFIG_NS83820 is not set
717# CONFIG_HAMACHI is not set
718# CONFIG_YELLOWFIN is not set
719CONFIG_R8169=y
720# CONFIG_R8169_NAPI is not set
721# CONFIG_SIS190 is not set
722# CONFIG_SKGE is not set
723# CONFIG_SKY2 is not set
724# CONFIG_SK98LIN is not set
725# CONFIG_VIA_VELOCITY is not set
726# CONFIG_TIGON3 is not set
727# CONFIG_BNX2 is not set
728# CONFIG_QLA3XXX is not set
729# CONFIG_ATL1 is not set
730
731#
732# Ethernet (10000 Mbit)
733#
734# CONFIG_CHELSIO_T1 is not set
735# CONFIG_CHELSIO_T3 is not set
736# CONFIG_IXGB is not set
737# CONFIG_S2IO is not set
738# CONFIG_MYRI10GE is not set
739# CONFIG_NETXEN_NIC is not set
740
741#
742# Token Ring devices
743#
744# CONFIG_TR is not set 722# CONFIG_TR is not set
745 723
746# 724#
747# Wireless LAN (non-hamradio) 725# Wireless LAN
748#
749CONFIG_NET_RADIO=y
750# CONFIG_NET_WIRELESS_RTNETLINK is not set
751
752#
753# Obsolete Wireless cards support (pre-802.11)
754#
755# CONFIG_STRIP is not set
756
757#
758# Wireless 802.11b ISA/PCI cards support
759#
760# CONFIG_IPW2100 is not set
761# CONFIG_IPW2200 is not set
762CONFIG_HERMES=m
763# CONFIG_PLX_HERMES is not set
764# CONFIG_TMD_HERMES is not set
765# CONFIG_NORTEL_HERMES is not set
766# CONFIG_PCI_HERMES is not set
767# CONFIG_ATMEL is not set
768
769#
770# Prism GT/Duette 802.11(a/b/g) PCI/Cardbus support
771# 726#
772CONFIG_PRISM54=m 727# CONFIG_WLAN_PRE80211 is not set
773# CONFIG_HOSTAP is not set 728# CONFIG_WLAN_80211 is not set
774CONFIG_NET_WIRELESS=y
775 729
776# 730#
777# Wan interfaces 731# USB Network Adapters
778# 732#
733# CONFIG_USB_CATC is not set
734# CONFIG_USB_KAWETH is not set
735# CONFIG_USB_PEGASUS is not set
736# CONFIG_USB_RTL8150 is not set
737# CONFIG_USB_USBNET is not set
738# CONFIG_NET_PCMCIA is not set
779# CONFIG_WAN is not set 739# CONFIG_WAN is not set
780# CONFIG_FDDI is not set 740# CONFIG_FDDI is not set
781# CONFIG_HIPPI is not set 741# CONFIG_HIPPI is not set
742# CONFIG_PLIP is not set
782# CONFIG_PPP is not set 743# CONFIG_PPP is not set
783# CONFIG_SLIP is not set 744# CONFIG_SLIP is not set
784# CONFIG_NET_FC is not set 745# CONFIG_NET_FC is not set
785# CONFIG_SHAPER is not set 746# CONFIG_SHAPER is not set
786# CONFIG_NETCONSOLE is not set 747CONFIG_NETCONSOLE=y
787# CONFIG_NETPOLL is not set 748# CONFIG_NETCONSOLE_DYNAMIC is not set
788# CONFIG_NET_POLL_CONTROLLER is not set 749CONFIG_NETPOLL=y
789 750# CONFIG_NETPOLL_TRAP is not set
790# 751CONFIG_NET_POLL_CONTROLLER=y
791# ISDN subsystem
792#
793# CONFIG_ISDN is not set 752# CONFIG_ISDN is not set
794
795#
796# Telephony Support
797#
798# CONFIG_PHONE is not set 753# CONFIG_PHONE is not set
799 754
800# 755#
@@ -802,17 +757,17 @@ CONFIG_NET_WIRELESS=y
802# 757#
803CONFIG_INPUT=y 758CONFIG_INPUT=y
804# CONFIG_INPUT_FF_MEMLESS is not set 759# CONFIG_INPUT_FF_MEMLESS is not set
760# CONFIG_INPUT_POLLDEV is not set
805 761
806# 762#
807# Userland interfaces 763# Userland interfaces
808# 764#
809CONFIG_INPUT_MOUSEDEV=y 765CONFIG_INPUT_MOUSEDEV=y
810# CONFIG_INPUT_MOUSEDEV_PSAUX is not set 766CONFIG_INPUT_MOUSEDEV_PSAUX=y
811CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 767CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
812CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 768CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
813# CONFIG_INPUT_JOYDEV is not set 769# CONFIG_INPUT_JOYDEV is not set
814# CONFIG_INPUT_TSDEV is not set 770CONFIG_INPUT_EVDEV=y
815# CONFIG_INPUT_EVDEV is not set
816# CONFIG_INPUT_EVBUG is not set 771# CONFIG_INPUT_EVBUG is not set
817 772
818# 773#
@@ -825,8 +780,19 @@ CONFIG_KEYBOARD_ATKBD=y
825# CONFIG_KEYBOARD_XTKBD is not set 780# CONFIG_KEYBOARD_XTKBD is not set
826# CONFIG_KEYBOARD_NEWTON is not set 781# CONFIG_KEYBOARD_NEWTON is not set
827# CONFIG_KEYBOARD_STOWAWAY is not set 782# CONFIG_KEYBOARD_STOWAWAY is not set
828# CONFIG_INPUT_MOUSE is not set 783CONFIG_INPUT_MOUSE=y
784CONFIG_MOUSE_PS2=y
785CONFIG_MOUSE_PS2_ALPS=y
786CONFIG_MOUSE_PS2_LOGIPS2PP=y
787CONFIG_MOUSE_PS2_SYNAPTICS=y
788CONFIG_MOUSE_PS2_LIFEBOOK=y
789CONFIG_MOUSE_PS2_TRACKPOINT=y
790# CONFIG_MOUSE_PS2_TOUCHKIT is not set
791# CONFIG_MOUSE_SERIAL is not set
792# CONFIG_MOUSE_APPLETOUCH is not set
793# CONFIG_MOUSE_VSXXXAA is not set
829# CONFIG_INPUT_JOYSTICK is not set 794# CONFIG_INPUT_JOYSTICK is not set
795# CONFIG_INPUT_TABLET is not set
830# CONFIG_INPUT_TOUCHSCREEN is not set 796# CONFIG_INPUT_TOUCHSCREEN is not set
831# CONFIG_INPUT_MISC is not set 797# CONFIG_INPUT_MISC is not set
832 798
@@ -836,6 +802,7 @@ CONFIG_KEYBOARD_ATKBD=y
836CONFIG_SERIO=y 802CONFIG_SERIO=y
837# CONFIG_SERIO_I8042 is not set 803# CONFIG_SERIO_I8042 is not set
838# CONFIG_SERIO_SERPORT is not set 804# CONFIG_SERIO_SERPORT is not set
805# CONFIG_SERIO_PARKBD is not set
839# CONFIG_SERIO_PCIPS2 is not set 806# CONFIG_SERIO_PCIPS2 is not set
840CONFIG_SERIO_LIBPS2=y 807CONFIG_SERIO_LIBPS2=y
841# CONFIG_SERIO_RAW is not set 808# CONFIG_SERIO_RAW is not set
@@ -844,7 +811,10 @@ CONFIG_SERIO_LIBPS2=y
844# 811#
845# Character devices 812# Character devices
846# 813#
847# CONFIG_VT is not set 814CONFIG_VT=y
815CONFIG_VT_CONSOLE=y
816CONFIG_HW_CONSOLE=y
817# CONFIG_VT_HW_CONSOLE_BINDING is not set
848# CONFIG_SERIAL_NONSTANDARD is not set 818# CONFIG_SERIAL_NONSTANDARD is not set
849 819
850# 820#
@@ -864,32 +834,22 @@ CONFIG_SERIAL_CORE_CONSOLE=y
864CONFIG_UNIX98_PTYS=y 834CONFIG_UNIX98_PTYS=y
865CONFIG_LEGACY_PTYS=y 835CONFIG_LEGACY_PTYS=y
866CONFIG_LEGACY_PTY_COUNT=256 836CONFIG_LEGACY_PTY_COUNT=256
867 837# CONFIG_PRINTER is not set
868# 838# CONFIG_PPDEV is not set
869# IPMI
870#
871# CONFIG_IPMI_HANDLER is not set 839# CONFIG_IPMI_HANDLER is not set
872
873#
874# Watchdog Cards
875#
876# CONFIG_WATCHDOG is not set
877CONFIG_HW_RANDOM=y 840CONFIG_HW_RANDOM=y
878# CONFIG_GEN_RTC is not set
879# CONFIG_DTLK is not set
880# CONFIG_R3964 is not set 841# CONFIG_R3964 is not set
881# CONFIG_APPLICOM is not set 842# CONFIG_APPLICOM is not set
882# CONFIG_DRM is not set
883# CONFIG_RAW_DRIVER is not set
884 843
885# 844#
886# TPM devices 845# PCMCIA character devices
887# 846#
847# CONFIG_SYNCLINK_CS is not set
848# CONFIG_CARDMAN_4000 is not set
849# CONFIG_CARDMAN_4040 is not set
850# CONFIG_RAW_DRIVER is not set
888# CONFIG_TCG_TPM is not set 851# CONFIG_TCG_TPM is not set
889 852CONFIG_DEVPORT=y
890#
891# I2C support
892#
893# CONFIG_I2C is not set 853# CONFIG_I2C is not set
894 854
895# 855#
@@ -897,22 +857,27 @@ CONFIG_HW_RANDOM=y
897# 857#
898# CONFIG_SPI is not set 858# CONFIG_SPI is not set
899# CONFIG_SPI_MASTER is not set 859# CONFIG_SPI_MASTER is not set
900
901#
902# Dallas's 1-wire bus
903#
904# CONFIG_W1 is not set 860# CONFIG_W1 is not set
861CONFIG_POWER_SUPPLY=y
862# CONFIG_POWER_SUPPLY_DEBUG is not set
863# CONFIG_PDA_POWER is not set
864# CONFIG_BATTERY_DS2760 is not set
865# CONFIG_HWMON is not set
866# CONFIG_WATCHDOG is not set
905 867
906# 868#
907# Hardware Monitoring support 869# Sonics Silicon Backplane
908# 870#
909CONFIG_HWMON=y 871CONFIG_SSB_POSSIBLE=y
910# CONFIG_HWMON_VID is not set 872CONFIG_SSB=y
911# CONFIG_SENSORS_ABITUGURU is not set 873CONFIG_SSB_PCIHOST_POSSIBLE=y
912# CONFIG_SENSORS_F71805F is not set 874CONFIG_SSB_PCIHOST=y
913# CONFIG_SENSORS_PC87427 is not set 875CONFIG_SSB_PCMCIAHOST_POSSIBLE=y
914# CONFIG_SENSORS_VT1211 is not set 876# CONFIG_SSB_PCMCIAHOST is not set
915# CONFIG_HWMON_DEBUG_CHIP is not set 877# CONFIG_SSB_SILENT is not set
878# CONFIG_SSB_DEBUG is not set
879CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
880CONFIG_SSB_DRIVER_PCICORE=y
916 881
917# 882#
918# Multifunction device drivers 883# Multifunction device drivers
@@ -923,22 +888,93 @@ CONFIG_HWMON=y
923# Multimedia devices 888# Multimedia devices
924# 889#
925# CONFIG_VIDEO_DEV is not set 890# CONFIG_VIDEO_DEV is not set
891# CONFIG_DVB_CORE is not set
892# CONFIG_DAB is not set
893
894#
895# Graphics support
896#
897# CONFIG_DRM is not set
898# CONFIG_VGASTATE is not set
899# CONFIG_VIDEO_OUTPUT_CONTROL is not set
900CONFIG_FB=y
901# CONFIG_FIRMWARE_EDID is not set
902# CONFIG_FB_DDC is not set
903# CONFIG_FB_CFB_FILLRECT is not set
904# CONFIG_FB_CFB_COPYAREA is not set
905# CONFIG_FB_CFB_IMAGEBLIT is not set
906# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
907# CONFIG_FB_SYS_FILLRECT is not set
908# CONFIG_FB_SYS_COPYAREA is not set
909# CONFIG_FB_SYS_IMAGEBLIT is not set
910# CONFIG_FB_SYS_FOPS is not set
911CONFIG_FB_DEFERRED_IO=y
912# CONFIG_FB_SVGALIB is not set
913# CONFIG_FB_MACMODES is not set
914# CONFIG_FB_BACKLIGHT is not set
915# CONFIG_FB_MODE_HELPERS is not set
916# CONFIG_FB_TILEBLITTING is not set
917
918#
919# Frame buffer hardware drivers
920#
921# CONFIG_FB_CIRRUS is not set
922# CONFIG_FB_PM2 is not set
923# CONFIG_FB_CYBER2000 is not set
924# CONFIG_FB_ASILIANT is not set
925# CONFIG_FB_IMSTT is not set
926# CONFIG_FB_S1D13XXX is not set
927# CONFIG_FB_NVIDIA is not set
928# CONFIG_FB_RIVA is not set
929# CONFIG_FB_MATROX is not set
930# CONFIG_FB_RADEON is not set
931# CONFIG_FB_ATY128 is not set
932# CONFIG_FB_ATY is not set
933# CONFIG_FB_S3 is not set
934# CONFIG_FB_SAVAGE is not set
935# CONFIG_FB_SIS is not set
936# CONFIG_FB_NEOMAGIC is not set
937# CONFIG_FB_KYRO is not set
938# CONFIG_FB_3DFX is not set
939# CONFIG_FB_VOODOO1 is not set
940# CONFIG_FB_VT8623 is not set
941# CONFIG_FB_TRIDENT is not set
942# CONFIG_FB_ARK is not set
943# CONFIG_FB_PM3 is not set
944# CONFIG_FB_VIRTUAL is not set
945# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
926 946
927# 947#
928# Digital Video Broadcasting Devices 948# Display device support
929# 949#
930# CONFIG_DVB is not set 950CONFIG_DISPLAY_SUPPORT=y
931 951
932# 952#
933# Graphics support 953# Display hardware drivers
934# 954#
935# CONFIG_BACKLIGHT_LCD_SUPPORT is not set 955
936# CONFIG_FB is not set 956#
957# Console display driver support
958#
959CONFIG_DUMMY_CONSOLE=y
960CONFIG_FRAMEBUFFER_CONSOLE=y
961CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
962# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
963# CONFIG_FONTS is not set
964CONFIG_FONT_8x8=y
965CONFIG_FONT_8x16=y
966CONFIG_LOGO=y
967CONFIG_LOGO_LINUX_MONO=y
968CONFIG_LOGO_LINUX_VGA16=y
969CONFIG_LOGO_LINUX_CLUT224=y
970CONFIG_LOGO_SUPERH_MONO=y
971CONFIG_LOGO_SUPERH_VGA16=y
972CONFIG_LOGO_SUPERH_CLUT224=y
937 973
938# 974#
939# Sound 975# Sound
940# 976#
941CONFIG_SOUND=m 977CONFIG_SOUND=y
942 978
943# 979#
944# Advanced Linux Sound Architecture 980# Advanced Linux Sound Architecture
@@ -948,126 +984,162 @@ CONFIG_SOUND=m
948# 984#
949# Open Sound System 985# Open Sound System
950# 986#
951CONFIG_SOUND_PRIME=m 987CONFIG_SOUND_PRIME=y
952# CONFIG_OBSOLETE_OSS is not set
953# CONFIG_SOUND_BT878 is not set
954# CONFIG_SOUND_ICH is not set
955# CONFIG_SOUND_TRIDENT is not set 988# CONFIG_SOUND_TRIDENT is not set
956# CONFIG_SOUND_MSNDCLAS is not set 989# CONFIG_SOUND_MSNDCLAS is not set
957# CONFIG_SOUND_MSNDPIN is not set 990# CONFIG_SOUND_MSNDPIN is not set
958# CONFIG_SOUND_VIA82CXXX is not set 991CONFIG_HID_SUPPORT=y
959
960#
961# HID Devices
962#
963CONFIG_HID=y 992CONFIG_HID=y
964# CONFIG_HID_DEBUG is not set 993# CONFIG_HID_DEBUG is not set
994# CONFIG_HIDRAW is not set
965 995
966# 996#
967# USB support 997# USB Input Devices
968# 998#
999CONFIG_USB_HID=y
1000# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1001# CONFIG_HID_FF is not set
1002# CONFIG_USB_HIDDEV is not set
1003CONFIG_USB_SUPPORT=y
969CONFIG_USB_ARCH_HAS_HCD=y 1004CONFIG_USB_ARCH_HAS_HCD=y
970CONFIG_USB_ARCH_HAS_OHCI=y 1005CONFIG_USB_ARCH_HAS_OHCI=y
971CONFIG_USB_ARCH_HAS_EHCI=y 1006CONFIG_USB_ARCH_HAS_EHCI=y
972# CONFIG_USB is not set 1007CONFIG_USB=y
1008CONFIG_USB_DEBUG=y
973 1009
974# 1010#
975# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 1011# Miscellaneous USB options
976# 1012#
1013CONFIG_USB_DEVICEFS=y
1014# CONFIG_USB_DEVICE_CLASS is not set
1015# CONFIG_USB_DYNAMIC_MINORS is not set
1016# CONFIG_USB_OTG is not set
977 1017
978# 1018#
979# USB Gadget Support 1019# USB Host Controller Drivers
980#
981# CONFIG_USB_GADGET is not set
982
983#
984# MMC/SD Card support
985#
986# CONFIG_MMC is not set
987
988#
989# LED devices
990# 1020#
991# CONFIG_NEW_LEDS is not set 1021CONFIG_USB_EHCI_HCD=y
1022# CONFIG_USB_EHCI_SPLIT_ISO is not set
1023# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
1024# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1025# CONFIG_USB_ISP116X_HCD is not set
1026# CONFIG_USB_OHCI_HCD is not set
1027# CONFIG_USB_UHCI_HCD is not set
1028# CONFIG_USB_SL811_HCD is not set
1029# CONFIG_USB_R8A66597_HCD is not set
992 1030
993# 1031#
994# LED drivers 1032# USB Device Class drivers
995# 1033#
1034# CONFIG_USB_ACM is not set
1035CONFIG_USB_PRINTER=y
996 1036
997# 1037#
998# LED Triggers 1038# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
999# 1039#
1000 1040
1001# 1041#
1002# InfiniBand support 1042# may also be needed; see USB_STORAGE Help for more information
1003# 1043#
1004# CONFIG_INFINIBAND is not set 1044CONFIG_USB_STORAGE=y
1045# CONFIG_USB_STORAGE_DEBUG is not set
1046# CONFIG_USB_STORAGE_DATAFAB is not set
1047# CONFIG_USB_STORAGE_FREECOM is not set
1048# CONFIG_USB_STORAGE_ISD200 is not set
1049# CONFIG_USB_STORAGE_DPCM is not set
1050# CONFIG_USB_STORAGE_USBAT is not set
1051# CONFIG_USB_STORAGE_SDDR09 is not set
1052# CONFIG_USB_STORAGE_SDDR55 is not set
1053# CONFIG_USB_STORAGE_JUMPSHOT is not set
1054# CONFIG_USB_STORAGE_ALAUDA is not set
1055# CONFIG_USB_STORAGE_ONETOUCH is not set
1056# CONFIG_USB_STORAGE_KARMA is not set
1057# CONFIG_USB_LIBUSUAL is not set
1005 1058
1006# 1059#
1007# EDAC - error detection and reporting (RAS) (EXPERIMENTAL) 1060# USB Imaging devices
1008# 1061#
1062# CONFIG_USB_MDC800 is not set
1063# CONFIG_USB_MICROTEK is not set
1064CONFIG_USB_MON=y
1009 1065
1010# 1066#
1011# Real Time Clock 1067# USB port drivers
1012# 1068#
1013CONFIG_RTC_LIB=y 1069# CONFIG_USB_USS720 is not set
1014CONFIG_RTC_CLASS=y
1015CONFIG_RTC_HCTOSYS=y
1016CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1017# CONFIG_RTC_DEBUG is not set
1018 1070
1019# 1071#
1020# RTC interfaces 1072# USB Serial Converter support
1021# 1073#
1022CONFIG_RTC_INTF_SYSFS=y 1074# CONFIG_USB_SERIAL is not set
1023CONFIG_RTC_INTF_PROC=y
1024CONFIG_RTC_INTF_DEV=y
1025# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1026 1075
1027# 1076#
1028# RTC drivers 1077# USB Miscellaneous drivers
1029# 1078#
1030# CONFIG_RTC_DRV_DS1553 is not set 1079# CONFIG_USB_EMI62 is not set
1031# CONFIG_RTC_DRV_DS1742 is not set 1080# CONFIG_USB_EMI26 is not set
1032# CONFIG_RTC_DRV_M48T86 is not set 1081# CONFIG_USB_ADUTUX is not set
1033CONFIG_RTC_DRV_SH=y 1082# CONFIG_USB_AUERSWALD is not set
1034# CONFIG_RTC_DRV_TEST is not set 1083# CONFIG_USB_RIO500 is not set
1035# CONFIG_RTC_DRV_V3020 is not set 1084# CONFIG_USB_LEGOTOWER is not set
1085# CONFIG_USB_LCD is not set
1086# CONFIG_USB_BERRY_CHARGE is not set
1087# CONFIG_USB_LED is not set
1088# CONFIG_USB_CYPRESS_CY7C63 is not set
1089# CONFIG_USB_CYTHERM is not set
1090# CONFIG_USB_PHIDGET is not set
1091# CONFIG_USB_IDMOUSE is not set
1092# CONFIG_USB_FTDI_ELAN is not set
1093# CONFIG_USB_APPLEDISPLAY is not set
1094# CONFIG_USB_SISUSBVGA is not set
1095# CONFIG_USB_LD is not set
1096# CONFIG_USB_TRANCEVIBRATOR is not set
1097# CONFIG_USB_IOWARRIOR is not set
1098# CONFIG_USB_TEST is not set
1036 1099
1037# 1100#
1038# DMA Engine support 1101# USB DSL modem support
1039# 1102#
1040# CONFIG_DMA_ENGINE is not set
1041 1103
1042# 1104#
1043# DMA Clients 1105# USB Gadget Support
1044# 1106#
1107# CONFIG_USB_GADGET is not set
1108# CONFIG_MMC is not set
1109CONFIG_NEW_LEDS=y
1110CONFIG_LEDS_CLASS=y
1045 1111
1046# 1112#
1047# DMA Devices 1113# LED drivers
1048# 1114#
1049 1115
1050# 1116#
1051# Auxiliary Display support 1117# LED Triggers
1052# 1118#
1119# CONFIG_LEDS_TRIGGERS is not set
1120# CONFIG_INFINIBAND is not set
1121# CONFIG_RTC_CLASS is not set
1122# CONFIG_AUXDISPLAY is not set
1053 1123
1054# 1124#
1055# Virtualization 1125# Userspace I/O
1056# 1126#
1127# CONFIG_UIO is not set
1057 1128
1058# 1129#
1059# File systems 1130# File systems
1060# 1131#
1061CONFIG_EXT2_FS=y 1132CONFIG_EXT2_FS=y
1062# CONFIG_EXT2_FS_XATTR is not set 1133CONFIG_EXT2_FS_XATTR=y
1134CONFIG_EXT2_FS_POSIX_ACL=y
1135# CONFIG_EXT2_FS_SECURITY is not set
1063# CONFIG_EXT2_FS_XIP is not set 1136# CONFIG_EXT2_FS_XIP is not set
1064CONFIG_EXT3_FS=y 1137CONFIG_EXT3_FS=y
1065CONFIG_EXT3_FS_XATTR=y 1138CONFIG_EXT3_FS_XATTR=y
1066# CONFIG_EXT3_FS_POSIX_ACL is not set 1139CONFIG_EXT3_FS_POSIX_ACL=y
1067# CONFIG_EXT3_FS_SECURITY is not set 1140# CONFIG_EXT3_FS_SECURITY is not set
1068# CONFIG_EXT4DEV_FS is not set 1141# CONFIG_EXT4DEV_FS is not set
1069CONFIG_JBD=y 1142CONFIG_JBD=y
1070# CONFIG_JBD_DEBUG is not set
1071CONFIG_FS_MBCACHE=y 1143CONFIG_FS_MBCACHE=y
1072# CONFIG_REISERFS_FS is not set 1144# CONFIG_REISERFS_FS is not set
1073# CONFIG_JFS_FS is not set 1145# CONFIG_JFS_FS is not set
@@ -1082,13 +1154,16 @@ CONFIG_INOTIFY_USER=y
1082# CONFIG_QUOTA is not set 1154# CONFIG_QUOTA is not set
1083CONFIG_DNOTIFY=y 1155CONFIG_DNOTIFY=y
1084# CONFIG_AUTOFS_FS is not set 1156# CONFIG_AUTOFS_FS is not set
1085# CONFIG_AUTOFS4_FS is not set 1157CONFIG_AUTOFS4_FS=y
1086CONFIG_FUSE_FS=m 1158# CONFIG_FUSE_FS is not set
1159CONFIG_GENERIC_ACL=y
1087 1160
1088# 1161#
1089# CD-ROM/DVD Filesystems 1162# CD-ROM/DVD Filesystems
1090# 1163#
1091# CONFIG_ISO9660_FS is not set 1164CONFIG_ISO9660_FS=y
1165# CONFIG_JOLIET is not set
1166# CONFIG_ZISOFS is not set
1092# CONFIG_UDF_FS is not set 1167# CONFIG_UDF_FS is not set
1093 1168
1094# 1169#
@@ -1100,22 +1175,21 @@ CONFIG_VFAT_FS=y
1100CONFIG_FAT_DEFAULT_CODEPAGE=437 1175CONFIG_FAT_DEFAULT_CODEPAGE=437
1101CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" 1176CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1102CONFIG_NTFS_FS=y 1177CONFIG_NTFS_FS=y
1103# CONFIG_NTFS_DEBUG is not set 1178CONFIG_NTFS_DEBUG=y
1104CONFIG_NTFS_RW=y 1179CONFIG_NTFS_RW=y
1105 1180
1106# 1181#
1107# Pseudo filesystems 1182# Pseudo filesystems
1108# 1183#
1109CONFIG_PROC_FS=y 1184CONFIG_PROC_FS=y
1110CONFIG_PROC_KCORE=y 1185# CONFIG_PROC_KCORE is not set
1111CONFIG_PROC_SYSCTL=y 1186CONFIG_PROC_SYSCTL=y
1112CONFIG_SYSFS=y 1187CONFIG_SYSFS=y
1113CONFIG_TMPFS=y 1188CONFIG_TMPFS=y
1114# CONFIG_TMPFS_POSIX_ACL is not set 1189CONFIG_TMPFS_POSIX_ACL=y
1115CONFIG_HUGETLBFS=y 1190CONFIG_HUGETLBFS=y
1116CONFIG_HUGETLB_PAGE=y 1191CONFIG_HUGETLB_PAGE=y
1117CONFIG_RAMFS=y 1192# CONFIG_CONFIGFS_FS is not set
1118CONFIG_CONFIGFS_FS=m
1119 1193
1120# 1194#
1121# Miscellaneous filesystems 1195# Miscellaneous filesystems
@@ -1133,19 +1207,16 @@ CONFIG_CONFIGFS_FS=m
1133# CONFIG_QNX4FS_FS is not set 1207# CONFIG_QNX4FS_FS is not set
1134# CONFIG_SYSV_FS is not set 1208# CONFIG_SYSV_FS is not set
1135# CONFIG_UFS_FS is not set 1209# CONFIG_UFS_FS is not set
1136 1210CONFIG_NETWORK_FILESYSTEMS=y
1137#
1138# Network File Systems
1139#
1140CONFIG_NFS_FS=y 1211CONFIG_NFS_FS=y
1141CONFIG_NFS_V3=y 1212CONFIG_NFS_V3=y
1142# CONFIG_NFS_V3_ACL is not set 1213# CONFIG_NFS_V3_ACL is not set
1143CONFIG_NFS_V4=y 1214# CONFIG_NFS_V4 is not set
1144# CONFIG_NFS_DIRECTIO is not set 1215# CONFIG_NFS_DIRECTIO is not set
1145CONFIG_NFSD=y 1216CONFIG_NFSD=y
1146CONFIG_NFSD_V3=y 1217CONFIG_NFSD_V3=y
1147# CONFIG_NFSD_V3_ACL is not set 1218# CONFIG_NFSD_V3_ACL is not set
1148CONFIG_NFSD_V4=y 1219# CONFIG_NFSD_V4 is not set
1149CONFIG_NFSD_TCP=y 1220CONFIG_NFSD_TCP=y
1150CONFIG_ROOT_NFS=y 1221CONFIG_ROOT_NFS=y
1151CONFIG_LOCKD=y 1222CONFIG_LOCKD=y
@@ -1153,25 +1224,20 @@ CONFIG_LOCKD_V4=y
1153CONFIG_EXPORTFS=y 1224CONFIG_EXPORTFS=y
1154CONFIG_NFS_COMMON=y 1225CONFIG_NFS_COMMON=y
1155CONFIG_SUNRPC=y 1226CONFIG_SUNRPC=y
1156CONFIG_SUNRPC_GSS=y 1227# CONFIG_SUNRPC_BIND34 is not set
1157CONFIG_RPCSEC_GSS_KRB5=y 1228# CONFIG_RPCSEC_GSS_KRB5 is not set
1158# CONFIG_RPCSEC_GSS_SPKM3 is not set 1229# CONFIG_RPCSEC_GSS_SPKM3 is not set
1159# CONFIG_SMB_FS is not set 1230# CONFIG_SMB_FS is not set
1160# CONFIG_CIFS is not set 1231# CONFIG_CIFS is not set
1161# CONFIG_NCP_FS is not set 1232# CONFIG_NCP_FS is not set
1162# CONFIG_CODA_FS is not set 1233# CONFIG_CODA_FS is not set
1163# CONFIG_AFS_FS is not set 1234# CONFIG_AFS_FS is not set
1164# CONFIG_9P_FS is not set
1165 1235
1166# 1236#
1167# Partition Types 1237# Partition Types
1168# 1238#
1169# CONFIG_PARTITION_ADVANCED is not set 1239# CONFIG_PARTITION_ADVANCED is not set
1170CONFIG_MSDOS_PARTITION=y 1240CONFIG_MSDOS_PARTITION=y
1171
1172#
1173# Native Language Support
1174#
1175CONFIG_NLS=y 1241CONFIG_NLS=y
1176CONFIG_NLS_DEFAULT="iso8859-1" 1242CONFIG_NLS_DEFAULT="iso8859-1"
1177CONFIG_NLS_CODEPAGE_437=y 1243CONFIG_NLS_CODEPAGE_437=y
@@ -1191,13 +1257,13 @@ CONFIG_NLS_CODEPAGE_437=y
1191# CONFIG_NLS_CODEPAGE_869 is not set 1257# CONFIG_NLS_CODEPAGE_869 is not set
1192# CONFIG_NLS_CODEPAGE_936 is not set 1258# CONFIG_NLS_CODEPAGE_936 is not set
1193# CONFIG_NLS_CODEPAGE_950 is not set 1259# CONFIG_NLS_CODEPAGE_950 is not set
1194CONFIG_NLS_CODEPAGE_932=y 1260# CONFIG_NLS_CODEPAGE_932 is not set
1195# CONFIG_NLS_CODEPAGE_949 is not set 1261# CONFIG_NLS_CODEPAGE_949 is not set
1196# CONFIG_NLS_CODEPAGE_874 is not set 1262# CONFIG_NLS_CODEPAGE_874 is not set
1197# CONFIG_NLS_ISO8859_8 is not set 1263# CONFIG_NLS_ISO8859_8 is not set
1198# CONFIG_NLS_CODEPAGE_1250 is not set 1264# CONFIG_NLS_CODEPAGE_1250 is not set
1199# CONFIG_NLS_CODEPAGE_1251 is not set 1265# CONFIG_NLS_CODEPAGE_1251 is not set
1200# CONFIG_NLS_ASCII is not set 1266CONFIG_NLS_ASCII=y
1201CONFIG_NLS_ISO8859_1=y 1267CONFIG_NLS_ISO8859_1=y
1202# CONFIG_NLS_ISO8859_2 is not set 1268# CONFIG_NLS_ISO8859_2 is not set
1203# CONFIG_NLS_ISO8859_3 is not set 1269# CONFIG_NLS_ISO8859_3 is not set
@@ -1208,44 +1274,39 @@ CONFIG_NLS_ISO8859_1=y
1208# CONFIG_NLS_ISO8859_9 is not set 1274# CONFIG_NLS_ISO8859_9 is not set
1209# CONFIG_NLS_ISO8859_13 is not set 1275# CONFIG_NLS_ISO8859_13 is not set
1210# CONFIG_NLS_ISO8859_14 is not set 1276# CONFIG_NLS_ISO8859_14 is not set
1211# CONFIG_NLS_ISO8859_15 is not set 1277CONFIG_NLS_ISO8859_15=y
1212# CONFIG_NLS_KOI8_R is not set 1278# CONFIG_NLS_KOI8_R is not set
1213# CONFIG_NLS_KOI8_U is not set 1279# CONFIG_NLS_KOI8_U is not set
1214# CONFIG_NLS_UTF8 is not set 1280CONFIG_NLS_UTF8=y
1215
1216#
1217# Distributed Lock Manager
1218#
1219# CONFIG_DLM is not set 1281# CONFIG_DLM is not set
1220 1282# CONFIG_INSTRUMENTATION is not set
1221#
1222# Profiling support
1223#
1224CONFIG_PROFILING=y
1225CONFIG_OPROFILE=m
1226 1283
1227# 1284#
1228# Kernel hacking 1285# Kernel hacking
1229# 1286#
1230CONFIG_TRACE_IRQFLAGS_SUPPORT=y 1287CONFIG_TRACE_IRQFLAGS_SUPPORT=y
1231# CONFIG_PRINTK_TIME is not set 1288# CONFIG_PRINTK_TIME is not set
1232CONFIG_ENABLE_MUST_CHECK=y 1289CONFIG_ENABLE_WARN_DEPRECATED=y
1290# CONFIG_ENABLE_MUST_CHECK is not set
1233CONFIG_MAGIC_SYSRQ=y 1291CONFIG_MAGIC_SYSRQ=y
1234# CONFIG_UNUSED_SYMBOLS is not set 1292CONFIG_UNUSED_SYMBOLS=y
1235CONFIG_DEBUG_FS=y 1293# CONFIG_DEBUG_FS is not set
1236# CONFIG_HEADERS_CHECK is not set 1294# CONFIG_HEADERS_CHECK is not set
1237CONFIG_DEBUG_KERNEL=y 1295CONFIG_DEBUG_KERNEL=y
1238# CONFIG_DEBUG_SHIRQ is not set 1296# CONFIG_DEBUG_SHIRQ is not set
1239CONFIG_LOG_BUF_SHIFT=14
1240CONFIG_DETECT_SOFTLOCKUP=y 1297CONFIG_DETECT_SOFTLOCKUP=y
1298# CONFIG_SCHED_DEBUG is not set
1241# CONFIG_SCHEDSTATS is not set 1299# CONFIG_SCHEDSTATS is not set
1242# CONFIG_TIMER_STATS is not set 1300CONFIG_TIMER_STATS=y
1243# CONFIG_DEBUG_SLAB is not set 1301# CONFIG_SLUB_DEBUG_ON is not set
1244# CONFIG_DEBUG_PREEMPT is not set 1302CONFIG_DEBUG_PREEMPT=y
1303# CONFIG_DEBUG_RT_MUTEXES is not set
1304# CONFIG_RT_MUTEX_TESTER is not set
1245# CONFIG_DEBUG_SPINLOCK is not set 1305# CONFIG_DEBUG_SPINLOCK is not set
1246# CONFIG_DEBUG_MUTEXES is not set 1306# CONFIG_DEBUG_MUTEXES is not set
1247# CONFIG_DEBUG_LOCK_ALLOC is not set 1307# CONFIG_DEBUG_LOCK_ALLOC is not set
1248# CONFIG_PROVE_LOCKING is not set 1308# CONFIG_PROVE_LOCKING is not set
1309# CONFIG_LOCK_STAT is not set
1249# CONFIG_DEBUG_SPINLOCK_SLEEP is not set 1310# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1250# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1311# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1251# CONFIG_DEBUG_KOBJECT is not set 1312# CONFIG_DEBUG_KOBJECT is not set
@@ -1253,16 +1314,21 @@ CONFIG_DEBUG_BUGVERBOSE=y
1253CONFIG_DEBUG_INFO=y 1314CONFIG_DEBUG_INFO=y
1254# CONFIG_DEBUG_VM is not set 1315# CONFIG_DEBUG_VM is not set
1255# CONFIG_DEBUG_LIST is not set 1316# CONFIG_DEBUG_LIST is not set
1317# CONFIG_DEBUG_SG is not set
1256# CONFIG_FRAME_POINTER is not set 1318# CONFIG_FRAME_POINTER is not set
1257CONFIG_FORCED_INLINING=y 1319# CONFIG_FORCED_INLINING is not set
1320# CONFIG_BOOT_PRINTK_DELAY is not set
1258# CONFIG_RCU_TORTURE_TEST is not set 1321# CONFIG_RCU_TORTURE_TEST is not set
1259# CONFIG_FAULT_INJECTION is not set 1322# CONFIG_FAULT_INJECTION is not set
1323# CONFIG_SAMPLES is not set
1260CONFIG_SH_STANDARD_BIOS=y 1324CONFIG_SH_STANDARD_BIOS=y
1261# CONFIG_EARLY_SCIF_CONSOLE is not set 1325# CONFIG_EARLY_SCIF_CONSOLE is not set
1262CONFIG_EARLY_PRINTK=y 1326# CONFIG_EARLY_PRINTK is not set
1327# CONFIG_DEBUG_BOOTMEM is not set
1263CONFIG_DEBUG_STACKOVERFLOW=y 1328CONFIG_DEBUG_STACKOVERFLOW=y
1264# CONFIG_DEBUG_STACK_USAGE is not set 1329# CONFIG_DEBUG_STACK_USAGE is not set
1265# CONFIG_4KSTACKS is not set 1330# CONFIG_4KSTACKS is not set
1331# CONFIG_IRQSTACKS is not set
1266# CONFIG_SH_KGDB is not set 1332# CONFIG_SH_KGDB is not set
1267 1333
1268# 1334#
@@ -1270,16 +1336,11 @@ CONFIG_DEBUG_STACKOVERFLOW=y
1270# 1336#
1271# CONFIG_KEYS is not set 1337# CONFIG_KEYS is not set
1272# CONFIG_SECURITY is not set 1338# CONFIG_SECURITY is not set
1273 1339# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1274#
1275# Cryptographic options
1276#
1277CONFIG_CRYPTO=y 1340CONFIG_CRYPTO=y
1278CONFIG_CRYPTO_ALGAPI=y 1341CONFIG_CRYPTO_ALGAPI=y
1279CONFIG_CRYPTO_BLKCIPHER=y 1342# CONFIG_CRYPTO_MANAGER is not set
1280CONFIG_CRYPTO_HASH=y 1343# CONFIG_CRYPTO_HMAC is not set
1281CONFIG_CRYPTO_MANAGER=y
1282CONFIG_CRYPTO_HMAC=y
1283# CONFIG_CRYPTO_XCBC is not set 1344# CONFIG_CRYPTO_XCBC is not set
1284# CONFIG_CRYPTO_NULL is not set 1345# CONFIG_CRYPTO_NULL is not set
1285# CONFIG_CRYPTO_MD4 is not set 1346# CONFIG_CRYPTO_MD4 is not set
@@ -1290,10 +1351,12 @@ CONFIG_CRYPTO_MD5=y
1290# CONFIG_CRYPTO_WP512 is not set 1351# CONFIG_CRYPTO_WP512 is not set
1291# CONFIG_CRYPTO_TGR192 is not set 1352# CONFIG_CRYPTO_TGR192 is not set
1292# CONFIG_CRYPTO_GF128MUL is not set 1353# CONFIG_CRYPTO_GF128MUL is not set
1293CONFIG_CRYPTO_ECB=m 1354# CONFIG_CRYPTO_ECB is not set
1294CONFIG_CRYPTO_CBC=y 1355# CONFIG_CRYPTO_CBC is not set
1295CONFIG_CRYPTO_PCBC=m 1356# CONFIG_CRYPTO_PCBC is not set
1296# CONFIG_CRYPTO_LRW is not set 1357# CONFIG_CRYPTO_LRW is not set
1358# CONFIG_CRYPTO_XTS is not set
1359# CONFIG_CRYPTO_CRYPTD is not set
1297CONFIG_CRYPTO_DES=y 1360CONFIG_CRYPTO_DES=y
1298# CONFIG_CRYPTO_FCRYPT is not set 1361# CONFIG_CRYPTO_FCRYPT is not set
1299# CONFIG_CRYPTO_BLOWFISH is not set 1362# CONFIG_CRYPTO_BLOWFISH is not set
@@ -1306,15 +1369,14 @@ CONFIG_CRYPTO_DES=y
1306# CONFIG_CRYPTO_ARC4 is not set 1369# CONFIG_CRYPTO_ARC4 is not set
1307# CONFIG_CRYPTO_KHAZAD is not set 1370# CONFIG_CRYPTO_KHAZAD is not set
1308# CONFIG_CRYPTO_ANUBIS is not set 1371# CONFIG_CRYPTO_ANUBIS is not set
1372# CONFIG_CRYPTO_SEED is not set
1309# CONFIG_CRYPTO_DEFLATE is not set 1373# CONFIG_CRYPTO_DEFLATE is not set
1310# CONFIG_CRYPTO_MICHAEL_MIC is not set 1374# CONFIG_CRYPTO_MICHAEL_MIC is not set
1311# CONFIG_CRYPTO_CRC32C is not set 1375# CONFIG_CRYPTO_CRC32C is not set
1312# CONFIG_CRYPTO_CAMELLIA is not set 1376# CONFIG_CRYPTO_CAMELLIA is not set
1313# CONFIG_CRYPTO_TEST is not set 1377# CONFIG_CRYPTO_TEST is not set
1314 1378# CONFIG_CRYPTO_AUTHENC is not set
1315# 1379CONFIG_CRYPTO_HW=y
1316# Hardware crypto devices
1317#
1318 1380
1319# 1381#
1320# Library routines 1382# Library routines
@@ -1322,7 +1384,11 @@ CONFIG_CRYPTO_DES=y
1322CONFIG_BITREVERSE=y 1384CONFIG_BITREVERSE=y
1323# CONFIG_CRC_CCITT is not set 1385# CONFIG_CRC_CCITT is not set
1324# CONFIG_CRC16 is not set 1386# CONFIG_CRC16 is not set
1387# CONFIG_CRC_ITU_T is not set
1325CONFIG_CRC32=y 1388CONFIG_CRC32=y
1389# CONFIG_CRC7 is not set
1326# CONFIG_LIBCRC32C is not set 1390# CONFIG_LIBCRC32C is not set
1391CONFIG_PLIST=y
1327CONFIG_HAS_IOMEM=y 1392CONFIG_HAS_IOMEM=y
1328CONFIG_HAS_IOPORT=y 1393CONFIG_HAS_IOPORT=y
1394CONFIG_HAS_DMA=y
diff --git a/arch/sh/configs/se7712_defconfig b/arch/sh/configs/se7712_defconfig
index a5e37dbc5353..240a1cef69aa 100644
--- a/arch/sh/configs/se7712_defconfig
+++ b/arch/sh/configs/se7712_defconfig
@@ -237,7 +237,7 @@ CONFIG_CPU_HAS_SR_RB=y
237CONFIG_SH_TMU=y 237CONFIG_SH_TMU=y
238CONFIG_SH_TIMER_IRQ=16 238CONFIG_SH_TIMER_IRQ=16
239# CONFIG_NO_IDLE_HZ is not set 239# CONFIG_NO_IDLE_HZ is not set
240CONFIG_SH_PCLK_FREQ=33333333 240CONFIG_SH_PCLK_FREQ=66666666
241 241
242# 242#
243# CPU Frequency scaling 243# CPU Frequency scaling
diff --git a/arch/sh/drivers/dma/Kconfig b/arch/sh/drivers/dma/Kconfig
index 4e711a0c3dae..01936368b8b0 100644
--- a/arch/sh/drivers/dma/Kconfig
+++ b/arch/sh/drivers/dma/Kconfig
@@ -12,7 +12,7 @@ config SH_DMA
12config NR_ONCHIP_DMA_CHANNELS 12config NR_ONCHIP_DMA_CHANNELS
13 int 13 int
14 depends on SH_DMA 14 depends on SH_DMA
15 default "6" if CPU_SUBTYPE_SH7720 15 default "6" if CPU_SUBTYPE_SH7720 || CPU_SUBTYPE_SH7721
16 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R 16 default "8" if CPU_SUBTYPE_SH7750R || CPU_SUBTYPE_SH7751R
17 default "12" if CPU_SUBTYPE_SH7780 17 default "12" if CPU_SUBTYPE_SH7780
18 default "4" 18 default "4"
diff --git a/arch/sh/drivers/dma/dma-sh.c b/arch/sh/drivers/dma/dma-sh.c
index 958bac1c585a..5c3359756a92 100644
--- a/arch/sh/drivers/dma/dma-sh.c
+++ b/arch/sh/drivers/dma/dma-sh.c
@@ -25,6 +25,7 @@ static int dmte_irq_map[] = {
25 DMTE2_IRQ, 25 DMTE2_IRQ,
26 DMTE3_IRQ, 26 DMTE3_IRQ,
27#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 27#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
28 defined(CONFIG_CPU_SUBTYPE_SH7751R) || \ 29 defined(CONFIG_CPU_SUBTYPE_SH7751R) || \
29 defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 30 defined(CONFIG_CPU_SUBTYPE_SH7760) || \
30 defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 31 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
@@ -203,6 +204,7 @@ static int sh_dmac_get_dma_residue(struct dma_channel *chan)
203} 204}
204 205
205#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ 206#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
207 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
206 defined(CONFIG_CPU_SUBTYPE_SH7780) 208 defined(CONFIG_CPU_SUBTYPE_SH7780)
207#define dmaor_read_reg() ctrl_inw(DMAOR) 209#define dmaor_read_reg() ctrl_inw(DMAOR)
208#define dmaor_write_reg(data) ctrl_outw(data, DMAOR) 210#define dmaor_write_reg(data) ctrl_outw(data, DMAOR)
diff --git a/arch/sh/drivers/pci/Makefile b/arch/sh/drivers/pci/Makefile
index fba6b5ba0b3a..0718805774e8 100644
--- a/arch/sh/drivers/pci/Makefile
+++ b/arch/sh/drivers/pci/Makefile
@@ -7,16 +7,19 @@ obj-$(CONFIG_PCI_AUTO) += pci-auto.o
7 7
8obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7751) += pci-sh7751.o ops-sh4.o
9obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7751R) += pci-sh7751.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7763) += pci-sh7780.o ops-sh4.o
10obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7780) += pci-sh7780.o ops-sh4.o
11obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o 12obj-$(CONFIG_CPU_SUBTYPE_SH7785) += pci-sh7780.o ops-sh4.o
13obj-$(CONFIG_CPU_SH5) += pci-sh5.o ops-sh5.o
12 14
13obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o \ 15obj-$(CONFIG_SH_DREAMCAST) += ops-dreamcast.o fixups-dreamcast.o
14 dma-dreamcast.o
15obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o 16obj-$(CONFIG_SH_SECUREEDGE5410) += ops-snapgear.o
16obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o 17obj-$(CONFIG_SH_RTS7751R2D) += ops-rts7751r2d.o fixups-rts7751r2d.o
17obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o 18obj-$(CONFIG_SH_SH03) += ops-sh03.o fixups-sh03.o
18obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o 19obj-$(CONFIG_SH_HIGHLANDER) += ops-r7780rp.o fixups-r7780rp.o
20obj-$(CONFIG_SH_SDK7780) += ops-sdk7780.o fixups-sdk7780.o
19obj-$(CONFIG_SH_TITAN) += ops-titan.o 21obj-$(CONFIG_SH_TITAN) += ops-titan.o
20obj-$(CONFIG_SH_LANDISK) += ops-landisk.o 22obj-$(CONFIG_SH_LANDISK) += ops-landisk.o
21obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o 23obj-$(CONFIG_SH_LBOX_RE2) += ops-lboxre2.o fixups-lboxre2.o
22obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o 24obj-$(CONFIG_SH_7780_SOLUTION_ENGINE) += ops-se7780.o fixups-se7780.o
25obj-$(CONFIG_SH_CAYMAN) += ops-cayman.o
diff --git a/arch/sh/drivers/pci/dma-dreamcast.c b/arch/sh/drivers/pci/dma-dreamcast.c
deleted file mode 100644
index 888a34050599..000000000000
--- a/arch/sh/drivers/pci/dma-dreamcast.c
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * arch/sh/drivers/pci/dma-dreamcast.c
3 *
4 * PCI DMA support for the Sega Dreamcast
5 *
6 * Copyright (C) 2001, 2002 M. R. Brown
7 * Copyright (C) 2002, 2003 Paul Mundt
8 *
9 * This file originally bore the message (with enclosed-$):
10 * Id: pci.c,v 1.3 2003/05/04 19:29:46 lethal Exp
11 * Dreamcast PCI: Supports SEGA Broadband Adaptor only.
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */
17
18#include <linux/sched.h>
19#include <linux/kernel.h>
20#include <linux/param.h>
21#include <linux/interrupt.h>
22#include <linux/init.h>
23#include <linux/irq.h>
24#include <linux/pci.h>
25#include <linux/dma-mapping.h>
26#include <linux/device.h>
27
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/mach/pci.h>
31
32static int gapspci_dma_used = 0;
33
34void *dreamcast_consistent_alloc(struct device *dev, size_t size,
35 dma_addr_t *dma_handle, gfp_t flag)
36{
37 unsigned long buf;
38
39 if (dev && dev->bus != &pci_bus_type)
40 return NULL;
41
42 if (gapspci_dma_used + size > GAPSPCI_DMA_SIZE)
43 return ERR_PTR(-EINVAL);
44
45 buf = GAPSPCI_DMA_BASE + gapspci_dma_used;
46
47 gapspci_dma_used = PAGE_ALIGN(gapspci_dma_used+size);
48
49 *dma_handle = (dma_addr_t)buf;
50
51 buf = P2SEGADDR(buf);
52
53 /* Flush the dcache before we hand off the buffer */
54 __flush_purge_region((void *)buf, size);
55
56 return (void *)buf;
57}
58
59int dreamcast_consistent_free(struct device *dev, size_t size,
60 void *vaddr, dma_addr_t dma_handle)
61{
62 if (dev && dev->bus != &pci_bus_type)
63 return -EINVAL;
64
65 /* XXX */
66 gapspci_dma_used = 0;
67
68 return 0;
69}
70
diff --git a/arch/sh/drivers/pci/fixups-dreamcast.c b/arch/sh/drivers/pci/fixups-dreamcast.c
index 6f53f8200dc3..c44699301eeb 100644
--- a/arch/sh/drivers/pci/fixups-dreamcast.c
+++ b/arch/sh/drivers/pci/fixups-dreamcast.c
@@ -22,6 +22,7 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/pci.h> 24#include <linux/pci.h>
25#include <linux/dma-mapping.h>
25 26
26#include <asm/io.h> 27#include <asm/io.h>
27#include <asm/irq.h> 28#include <asm/irq.h>
@@ -40,6 +41,15 @@ static void __init gapspci_fixup_resources(struct pci_dev *dev)
40 */ 41 */
41 dev->resource[1].start = p->io_resource->start + 0x100; 42 dev->resource[1].start = p->io_resource->start + 0x100;
42 dev->resource[1].end = dev->resource[1].start + 0x200 - 1; 43 dev->resource[1].end = dev->resource[1].start + 0x200 - 1;
44 /*
45 * Redirect dma memory allocations to special memory window.
46 */
47 BUG_ON(!dma_declare_coherent_memory(&dev->dev,
48 GAPSPCI_DMA_BASE,
49 GAPSPCI_DMA_BASE,
50 GAPSPCI_DMA_SIZE,
51 DMA_MEMORY_MAP |
52 DMA_MEMORY_EXCLUSIVE));
43 break; 53 break;
44 default: 54 default:
45 printk("PCI: Failed resource fixup\n"); 55 printk("PCI: Failed resource fixup\n");
diff --git a/arch/sh/drivers/pci/fixups-sdk7780.c b/arch/sh/drivers/pci/fixups-sdk7780.c
new file mode 100644
index 000000000000..2f8863099dd1
--- /dev/null
+++ b/arch/sh/drivers/pci/fixups-sdk7780.c
@@ -0,0 +1,59 @@
1/*
2 * arch/sh/drivers/pci/fixups-sdk7780.c
3 *
4 * PCI fixups for the SDK7780SE03
5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc.
7 * Copyright (C) 2004 - 2006 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/pci.h>
14#include "pci-sh4.h"
15#include <asm/io.h>
16
17int pci_fixup_pcic(void)
18{
19 ctrl_outl(0x00000001, SH7780_PCI_VCR2);
20
21 /* Enable all interrupts, so we know what to fix */
22 pci_write_reg(0x0000C3FF, SH7780_PCIIMR);
23 pci_write_reg(0x0000380F, SH7780_PCIAINTM);
24
25 /* Set up standard PCI config registers */
26 pci_write_reg(0xFB00, SH7780_PCISTATUS);
27 pci_write_reg(0x0047, SH7780_PCICMD);
28 pci_write_reg(0x00, SH7780_PCIPIF);
29 pci_write_reg(0x00, SH7780_PCISUB);
30 pci_write_reg(0x06, SH7780_PCIBCC);
31 pci_write_reg(0x1912, SH7780_PCISVID);
32 pci_write_reg(0x0001, SH7780_PCISID);
33
34 pci_write_reg(0x08000000, SH7780_PCIMBAR0); /* PCI */
35 pci_write_reg(0x08000000, SH7780_PCILAR0); /* SHwy */
36 pci_write_reg(0x07F00001, SH7780_PCILSR); /* size 128M w/ MBAR */
37
38 pci_write_reg(0x00000000, SH7780_PCIMBAR1);
39 pci_write_reg(0x00000000, SH7780_PCILAR1);
40 pci_write_reg(0x00000000, SH7780_PCILSR1);
41
42 pci_write_reg(0xAB000801, SH7780_PCIIBAR);
43
44 /*
45 * Set the MBR so PCI address is one-to-one with window,
46 * meaning all calls go straight through... use ifdef to
47 * catch erroneous assumption.
48 */
49 pci_write_reg(0xFD000000 , SH7780_PCIMBR0);
50 pci_write_reg(0x00FC0000 , SH7780_PCIMBMR0); /* 16M */
51
52 /* Set IOBR for window containing area specified in pci.h */
53 pci_write_reg(PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1), SH7780_PCIIOBR);
54 pci_write_reg((SH7780_PCI_IO_SIZE-1) & (7 << 18), SH7780_PCIIOBMR);
55
56 pci_write_reg(0xA5000C01, SH7780_PCICR);
57
58 return 0;
59}
diff --git a/arch/sh/drivers/pci/ops-cayman.c b/arch/sh/drivers/pci/ops-cayman.c
new file mode 100644
index 000000000000..980275ffa30b
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-cayman.c
@@ -0,0 +1,94 @@
1#include <linux/kernel.h>
2#include <linux/init.h>
3#include <linux/pci.h>
4#include <linux/types.h>
5#include <asm/cpu/irq.h>
6#include "pci-sh5.h"
7
8static inline u8 bridge_swizzle(u8 pin, u8 slot)
9{
10 return (((pin - 1) + slot) % 4) + 1;
11}
12
13int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
14{
15 int result = -1;
16
17 /* The complication here is that the PCI IRQ lines from the Cayman's 2
18 5V slots get into the CPU via a different path from the IRQ lines
19 from the 3 3.3V slots. Thus, we have to detect whether the card's
20 interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling'
21 at the point where we cross from 5V to 3.3V is not the normal case.
22
23 The added complication is that we don't know that the 5V slots are
24 always bus 2, because a card containing a PCI-PCI bridge may be
25 plugged into a 3.3V slot, and this changes the bus numbering.
26
27 Also, the Cayman has an intermediate PCI bus that goes a custom
28 expansion board header (and to the secondary bridge). This bus has
29 never been used in practice.
30
31 The 1ary onboard PCI-PCI bridge is device 3 on bus 0
32 The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of
33 the 1ary bridge.
34 */
35
36 struct slot_pin {
37 int slot;
38 int pin;
39 } path[4];
40 int i=0;
41
42 while (dev->bus->number > 0) {
43
44 slot = path[i].slot = PCI_SLOT(dev->devfn);
45 pin = path[i].pin = bridge_swizzle(pin, slot);
46 dev = dev->bus->self;
47 i++;
48 if (i > 3) panic("PCI path to root bus too long!\n");
49 }
50
51 slot = PCI_SLOT(dev->devfn);
52 /* This is the slot on bus 0 through which the device is eventually
53 reachable. */
54
55 /* Now work back up. */
56 if ((slot < 3) || (i == 0)) {
57 /* Bus 0 (incl. PCI-PCI bridge itself) : perform the final
58 swizzle now. */
59 result = IRQ_INTA + bridge_swizzle(pin, slot) - 1;
60 } else {
61 i--;
62 slot = path[i].slot;
63 pin = path[i].pin;
64 if (slot > 0) {
65 panic("PCI expansion bus device found - not handled!\n");
66 } else {
67 if (i > 0) {
68 /* 5V slots */
69 i--;
70 slot = path[i].slot;
71 pin = path[i].pin;
72 /* 'pin' was swizzled earlier wrt slot, don't do it again. */
73 result = IRQ_P2INTA + (pin - 1);
74 } else {
75 /* IRQ for 2ary PCI-PCI bridge : unused */
76 result = -1;
77 }
78 }
79 }
80
81 return result;
82}
83
84struct pci_channel board_pci_channels[] = {
85 { &sh5_pci_ops, NULL, NULL, 0, 0xff },
86 { NULL, NULL, NULL, 0, 0 },
87};
88EXPORT_SYMBOL(board_pci_channels);
89
90int __init pcibios_init_platform(void)
91{
92 return sh5pci_init(__pa(memory_start),
93 __pa(memory_end) - __pa(memory_start));
94}
diff --git a/arch/sh/drivers/pci/ops-r7780rp.c b/arch/sh/drivers/pci/ops-r7780rp.c
index 48fe4032ebea..5fdadaeed6fc 100644
--- a/arch/sh/drivers/pci/ops-r7780rp.c
+++ b/arch/sh/drivers/pci/ops-r7780rp.c
@@ -17,25 +17,13 @@
17#include <asm/io.h> 17#include <asm/io.h>
18#include "pci-sh4.h" 18#include "pci-sh4.h"
19 19
20static char r7780rp_irq_tab[] __initdata = { 20static char irq_tab[] __initdata = {
21 0, 1, 2, 3,
22};
23
24static char r7780mp_irq_tab[] __initdata = {
25 65, 66, 67, 68, 21 65, 66, 67, 68,
26}; 22};
27 23
28int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin) 24int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
29{ 25{
30 if (mach_is_r7780rp()) 26 return irq_tab[slot];
31 return r7780rp_irq_tab[slot];
32 if (mach_is_r7780mp() || mach_is_r7785rp())
33 return r7780mp_irq_tab[slot];
34
35 printk(KERN_ERR "PCI: Bad IRQ mapping "
36 "request for slot %d, func %d\n", slot, pin-1);
37
38 return -1;
39} 27}
40 28
41static struct resource sh7780_io_resource = { 29static struct resource sh7780_io_resource = {
diff --git a/arch/sh/drivers/pci/ops-sdk7780.c b/arch/sh/drivers/pci/ops-sdk7780.c
new file mode 100644
index 000000000000..66a9b4047f26
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-sdk7780.c
@@ -0,0 +1,73 @@
1/*
2 * linux/arch/sh/drivers/pci/ops-sdk7780.c
3 *
4 * Copyright (C) 2006 Nobuhiro Iwamatsu
5 *
6 * PCI initialization for the SDK7780SE03
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 */
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/init.h>
14#include <linux/delay.h>
15#include <linux/pci.h>
16#include <asm/sdk7780.h>
17#include <asm/io.h>
18#include "pci-sh4.h"
19
20/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
21static char sdk7780_irq_tab[4][16] __initdata = {
22 /* INTA */
23 { 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
24 /* INTB */
25 { 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
26 /* INTC */
27 { 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
28 /* INTD */
29 { 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
30};
31
32int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
33{
34 return sdk7780_irq_tab[pin-1][slot];
35}
36
37static struct resource sdk7780_io_resource = {
38 .name = "SH7780_IO",
39 .start = SH7780_PCI_IO_BASE,
40 .end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
41 .flags = IORESOURCE_IO
42};
43
44static struct resource sdk7780_mem_resource = {
45 .name = "SH7780_mem",
46 .start = SH7780_PCI_MEMORY_BASE,
47 .end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
48 .flags = IORESOURCE_MEM
49};
50
51struct pci_channel board_pci_channels[] = {
52 { &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff },
53 { NULL, NULL, NULL, 0, 0 },
54};
55EXPORT_SYMBOL(board_pci_channels);
56
57static struct sh4_pci_address_map sdk7780_pci_map = {
58 .window0 = {
59 .base = SH7780_CS2_BASE_ADDR,
60 .size = 0x04000000,
61 },
62 .window1 = {
63 .base = SH7780_CS3_BASE_ADDR,
64 .size = 0x04000000,
65 },
66 .flags = SH4_PCIC_NO_RESET,
67};
68
69int __init pcibios_init_platform(void)
70{
71 printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
72 return sh7780_pcic_init(&sdk7780_pci_map);
73}
diff --git a/arch/sh/drivers/pci/ops-sh5.c b/arch/sh/drivers/pci/ops-sh5.c
new file mode 100644
index 000000000000..729e38a6fe07
--- /dev/null
+++ b/arch/sh/drivers/pci/ops-sh5.c
@@ -0,0 +1,93 @@
1/*
2 * Support functions for the SH5 PCI hardware.
3 *
4 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
5 * Copyright (C) 2003, 2004 Paul Mundt
6 * Copyright (C) 2004 Richard Curnow
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 */
11#include <linux/kernel.h>
12#include <linux/rwsem.h>
13#include <linux/smp.h>
14#include <linux/interrupt.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/pci.h>
18#include <linux/delay.h>
19#include <linux/types.h>
20#include <linux/irq.h>
21#include <asm/pci.h>
22#include <asm/io.h>
23#include "pci-sh5.h"
24
25static void __init pci_fixup_ide_bases(struct pci_dev *d)
26{
27 int i;
28
29 /*
30 * PCI IDE controllers use non-standard I/O port decoding, respect it.
31 */
32 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
33 return;
34 printk("PCI: IDE base address fixup for %s\n", pci_name(d));
35 for(i=0; i<4; i++) {
36 struct resource *r = &d->resource[i];
37 if ((r->start & ~0x80) == 0x374) {
38 r->start |= 2;
39 r->end = r->start;
40 }
41 }
42}
43DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
44
45char * __devinit pcibios_setup(char *str)
46{
47 return str;
48}
49
50static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
51 int size, u32 *val)
52{
53 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
54
55 switch (size) {
56 case 1:
57 *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
58 break;
59 case 2:
60 *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
61 break;
62 case 4:
63 *val = SH5PCI_READ(PDR);
64 break;
65 }
66
67 return PCIBIOS_SUCCESSFUL;
68}
69
70static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
71 int size, u32 val)
72{
73 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
74
75 switch (size) {
76 case 1:
77 SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
78 break;
79 case 2:
80 SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
81 break;
82 case 4:
83 SH5PCI_WRITE(PDR, val);
84 break;
85 }
86
87 return PCIBIOS_SUCCESSFUL;
88}
89
90struct pci_ops sh5_pci_ops = {
91 .read = sh5pci_read,
92 .write = sh5pci_write,
93};
diff --git a/arch/sh/drivers/pci/pci-auto.c b/arch/sh/drivers/pci/pci-auto.c
index 224e007736fb..ea404704ace8 100644
--- a/arch/sh/drivers/pci/pci-auto.c
+++ b/arch/sh/drivers/pci/pci-auto.c
@@ -516,10 +516,8 @@ pciauto_bus_scan(struct pci_channel *hose, int top_bus, int current_bus)
516 PCI_COMMAND, cmdstat | PCI_COMMAND_IO | 516 PCI_COMMAND, cmdstat | PCI_COMMAND_IO |
517 PCI_COMMAND_MEMORY | 517 PCI_COMMAND_MEMORY |
518 PCI_COMMAND_MASTER); 518 PCI_COMMAND_MASTER);
519#if !defined(CONFIG_SH_HS7751RVOIP) && !defined(CONFIG_SH_RTS7751R2D)
520 early_write_config_byte(hose, top_bus, current_bus, pci_devfn, 519 early_write_config_byte(hose, top_bus, current_bus, pci_devfn,
521 PCI_LATENCY_TIMER, 0x80); 520 PCI_LATENCY_TIMER, 0x80);
522#endif
523 521
524 /* Allocate PCI I/O and/or memory space */ 522 /* Allocate PCI I/O and/or memory space */
525 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5); 523 pciauto_setup_bars(hose, top_bus, current_bus, pci_devfn, PCI_BASE_ADDRESS_5);
diff --git a/arch/sh/drivers/pci/pci-sh4.h b/arch/sh/drivers/pci/pci-sh4.h
index 1901c33cde6a..4925c79ea959 100644
--- a/arch/sh/drivers/pci/pci-sh4.h
+++ b/arch/sh/drivers/pci/pci-sh4.h
@@ -1,7 +1,9 @@
1#ifndef __PCI_SH4_H 1#ifndef __PCI_SH4_H
2#define __PCI_SH4_H 2#define __PCI_SH4_H
3 3
4#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) 4#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \
5 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7763)
5#include "pci-sh7780.h" 7#include "pci-sh7780.h"
6#else 8#else
7#include "pci-sh7751.h" 9#include "pci-sh7751.h"
diff --git a/arch/sh/drivers/pci/pci-sh5.c b/arch/sh/drivers/pci/pci-sh5.c
new file mode 100644
index 000000000000..a00a4df8c02d
--- /dev/null
+++ b/arch/sh/drivers/pci/pci-sh5.c
@@ -0,0 +1,228 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 * Copyright (C) 2003, 2004 Paul Mundt
4 * Copyright (C) 2004 Richard Curnow
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Support functions for the SH5 PCI hardware.
10 */
11
12#include <linux/kernel.h>
13#include <linux/rwsem.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/types.h>
21#include <linux/irq.h>
22#include <asm/cpu/irq.h>
23#include <asm/pci.h>
24#include <asm/io.h>
25#include "pci-sh5.h"
26
27unsigned long pcicr_virt;
28unsigned long PCI_IO_AREA;
29
30/* Rounds a number UP to the nearest power of two. Used for
31 * sizing the PCI window.
32 */
33static u32 __init r2p2(u32 num)
34{
35 int i = 31;
36 u32 tmp = num;
37
38 if (num == 0)
39 return 0;
40
41 do {
42 if (tmp & (1 << 31))
43 break;
44 i--;
45 tmp <<= 1;
46 } while (i >= 0);
47
48 tmp = 1 << i;
49 /* If the original number isn't a power of 2, round it up */
50 if (tmp != num)
51 tmp <<= 1;
52
53 return tmp;
54}
55
56static irqreturn_t pcish5_err_irq(int irq, void *dev_id)
57{
58 struct pt_regs *regs = get_irq_regs();
59 unsigned pci_int, pci_air, pci_cir, pci_aint;
60
61 pci_int = SH5PCI_READ(INT);
62 pci_cir = SH5PCI_READ(CIR);
63 pci_air = SH5PCI_READ(AIR);
64
65 if (pci_int) {
66 printk("PCI INTERRUPT (at %08llx)!\n", regs->pc);
67 printk("PCI INT -> 0x%x\n", pci_int & 0xffff);
68 printk("PCI AIR -> 0x%x\n", pci_air);
69 printk("PCI CIR -> 0x%x\n", pci_cir);
70 SH5PCI_WRITE(INT, ~0);
71 }
72
73 pci_aint = SH5PCI_READ(AINT);
74 if (pci_aint) {
75 printk("PCI ARB INTERRUPT!\n");
76 printk("PCI AINT -> 0x%x\n", pci_aint);
77 printk("PCI AIR -> 0x%x\n", pci_air);
78 printk("PCI CIR -> 0x%x\n", pci_cir);
79 SH5PCI_WRITE(AINT, ~0);
80 }
81
82 return IRQ_HANDLED;
83}
84
85static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
86{
87 printk("SERR IRQ\n");
88
89 return IRQ_NONE;
90}
91
92int __init sh5pci_init(unsigned long memStart, unsigned long memSize)
93{
94 u32 lsr0;
95 u32 uval;
96
97 if (request_irq(IRQ_ERR, pcish5_err_irq,
98 IRQF_DISABLED, "PCI Error",NULL) < 0) {
99 printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n");
100 return -EINVAL;
101 }
102
103 if (request_irq(IRQ_SERR, pcish5_serr_irq,
104 IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) {
105 printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n");
106 return -EINVAL;
107 }
108
109 pcicr_virt = onchip_remap(SH5PCI_ICR_BASE, 1024, "PCICR");
110 if (!pcicr_virt) {
111 panic("Unable to remap PCICR\n");
112 }
113
114 PCI_IO_AREA = onchip_remap(SH5PCI_IO_BASE, 0x10000, "PCIIO");
115 if (!PCI_IO_AREA) {
116 panic("Unable to remap PCIIO\n");
117 }
118
119 /* Clear snoop registers */
120 SH5PCI_WRITE(CSCR0, 0);
121 SH5PCI_WRITE(CSCR1, 0);
122
123 /* Switch off interrupts */
124 SH5PCI_WRITE(INTM, 0);
125 SH5PCI_WRITE(AINTM, 0);
126 SH5PCI_WRITE(PINTM, 0);
127
128 /* Set bus active, take it out of reset */
129 uval = SH5PCI_READ(CR);
130
131 /* Set command Register */
132 SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE |
133 CR_PFCS | CR_BMAM);
134
135 uval=SH5PCI_READ(CR);
136
137 /* Allow it to be a master */
138 /* NB - WE DISABLE I/O ACCESS to stop overlap */
139 /* set WAIT bit to enable stepping, an attempt to improve stability */
140 SH5PCI_WRITE_SHORT(CSR_CMD,
141 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
142 PCI_COMMAND_WAIT);
143
144 /*
145 ** Set translation mapping memory in order to convert the address
146 ** used for the main bus, to the PCI internal address.
147 */
148 SH5PCI_WRITE(MBR,0x40000000);
149
150 /* Always set the max size 512M */
151 SH5PCI_WRITE(MBMR, PCISH5_MEM_SIZCONV(512*1024*1024));
152
153 /*
154 ** I/O addresses are mapped at internal PCI specific address
155 ** as is described into the configuration bridge table.
156 ** These are changed to 0, to allow cards that have legacy
157 ** io such as vga to function correctly. We set the SH5 IOBAR to
158 ** 256K, which is a bit big as we can only have 64K of address space
159 */
160
161 SH5PCI_WRITE(IOBR,0x0);
162
163 /* Set up a 256K window. Totally pointless waste of address space */
164 SH5PCI_WRITE(IOBMR,0);
165
166 /* The SH5 has a HUGE 256K I/O region, which breaks the PCI spec.
167 * Ideally, we would want to map the I/O region somewhere, but it
168 * is so big this is not that easy!
169 */
170 SH5PCI_WRITE(CSR_IBAR0,~0);
171 /* Set memory size value */
172 memSize = memory_end - memory_start;
173
174 /* Now we set up the mbars so the PCI bus can see the memory of
175 * the machine */
176 if (memSize < (1024 * 1024)) {
177 printk(KERN_ERR "PCISH5: Ridiculous memory size of 0x%lx?\n",
178 memSize);
179 return -EINVAL;
180 }
181
182 /* Set LSR 0 */
183 lsr0 = (memSize > (512 * 1024 * 1024)) ? 0x1ff00001 :
184 ((r2p2(memSize) - 0x100000) | 0x1);
185 SH5PCI_WRITE(LSR0, lsr0);
186
187 /* Set MBAR 0 */
188 SH5PCI_WRITE(CSR_MBAR0, memory_start);
189 SH5PCI_WRITE(LAR0, memory_start);
190
191 SH5PCI_WRITE(CSR_MBAR1,0);
192 SH5PCI_WRITE(LAR1,0);
193 SH5PCI_WRITE(LSR1,0);
194
195 /* Enable the PCI interrupts on the device */
196 SH5PCI_WRITE(INTM, ~0);
197 SH5PCI_WRITE(AINTM, ~0);
198 SH5PCI_WRITE(PINTM, ~0);
199
200 return 0;
201}
202
203void __devinit pcibios_fixup_bus(struct pci_bus *bus)
204{
205 struct pci_dev *dev = bus->self;
206 int i;
207
208 if (dev) {
209 for (i= 0; i < 3; i++) {
210 bus->resource[i] =
211 &dev->resource[PCI_BRIDGE_RESOURCES+i];
212 bus->resource[i]->name = bus->name;
213 }
214 bus->resource[0]->flags |= IORESOURCE_IO;
215 bus->resource[1]->flags |= IORESOURCE_MEM;
216
217 /* For now, propagate host limits to the bus;
218 * we'll adjust them later. */
219 bus->resource[0]->end = 64*1024 - 1 ;
220 bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1;
221 bus->resource[0]->start = PCIBIOS_MIN_IO;
222 bus->resource[1]->start = PCIBIOS_MIN_MEM;
223
224 /* Turn off downstream PF memory address range by default */
225 bus->resource[2]->start = 1024*1024;
226 bus->resource[2]->end = bus->resource[2]->start - 1;
227 }
228}
diff --git a/arch/sh64/kernel/pci_sh5.h b/arch/sh/drivers/pci/pci-sh5.h
index c71159dd04b9..7cff3fc04d30 100644
--- a/arch/sh64/kernel/pci_sh5.h
+++ b/arch/sh/drivers/pci/pci-sh5.h
@@ -6,6 +6,8 @@
6 * 6 *
7 * Definitions for the SH5 PCI hardware. 7 * Definitions for the SH5 PCI hardware.
8 */ 8 */
9#ifndef __PCI_SH5_H
10#define __PCI_SH5_H
9 11
10/* Product ID */ 12/* Product ID */
11#define PCISH5_PID 0x350d 13#define PCISH5_PID 0x350d
@@ -73,13 +75,12 @@
73#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */ 75#define PCISH5_ICR_CSR_MBAR0 0x014 /* First Memory base address register */
74#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */ 76#define PCISH5_ICR_CSR_MBAR1 0x018 /* Second Memory base address register */
75 77
76
77
78/* Base address of registers */ 78/* Base address of registers */
79#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000) 79#define SH5PCI_ICR_BASE (PHYS_PCI_BLOCK + 0x00040000)
80#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000) 80#define SH5PCI_IO_BASE (PHYS_PCI_BLOCK + 0x00800000)
81/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */ 81/* #define SH5PCI_VCR_BASE (P2SEG_PCICB_BLOCK + P2SEG) */
82 82
83extern unsigned long pcicr_virt;
83/* Register selection macro */ 84/* Register selection macro */
84#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x)) 85#define PCISH5_ICR_REG(x) ( pcicr_virt + (PCISH5_ICR_##x))
85/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */ 86/* #define PCISH5_VCR_REG(x) ( SH5PCI_VCR_BASE (PCISH5_VCR_##x)) */
@@ -104,4 +105,9 @@
104#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18) 105#define PCISH5_MEM_SIZCONV(x) (((x / 0x40000) - 1) << 18)
105#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18) 106#define PCISH5_IO_SIZCONV(x) (((x / 0x40000) - 1) << 18)
106 107
108extern struct pci_ops sh5_pci_ops;
109
110/* arch/sh/drivers/pci/pci-sh5.c */
111int sh5pci_init(unsigned long memStart, unsigned long memSize);
107 112
113#endif /* __PCI_SH5_H */
diff --git a/arch/sh/drivers/pci/pci-sh7780.c b/arch/sh/drivers/pci/pci-sh7780.c
index e516087fb435..7d797f4de5e7 100644
--- a/arch/sh/drivers/pci/pci-sh7780.c
+++ b/arch/sh/drivers/pci/pci-sh7780.c
@@ -58,6 +58,7 @@ static int __init sh7780_pci_init(void)
58 id = pci_read_reg(SH7780_PCIVID); 58 id = pci_read_reg(SH7780_PCIVID);
59 if ((id & 0xffff) == SH7780_VENDOR_ID) { 59 if ((id & 0xffff) == SH7780_VENDOR_ID) {
60 switch ((id >> 16) & 0xffff) { 60 switch ((id >> 16) & 0xffff) {
61 case SH7763_DEVICE_ID:
61 case SH7780_DEVICE_ID: 62 case SH7780_DEVICE_ID:
62 case SH7781_DEVICE_ID: 63 case SH7781_DEVICE_ID:
63 case SH7785_DEVICE_ID: 64 case SH7785_DEVICE_ID:
diff --git a/arch/sh/drivers/pci/pci-sh7780.h b/arch/sh/drivers/pci/pci-sh7780.h
index 1d069a859de2..97b2c98f05c4 100644
--- a/arch/sh/drivers/pci/pci-sh7780.h
+++ b/arch/sh/drivers/pci/pci-sh7780.h
@@ -16,6 +16,7 @@
16#define SH7780_VENDOR_ID 0x1912 16#define SH7780_VENDOR_ID 0x1912
17#define SH7781_DEVICE_ID 0x0001 17#define SH7781_DEVICE_ID 0x0001
18#define SH7780_DEVICE_ID 0x0002 18#define SH7780_DEVICE_ID 0x0002
19#define SH7763_DEVICE_ID 0x0004
19#define SH7785_DEVICE_ID 0x0007 20#define SH7785_DEVICE_ID 0x0007
20 21
21/* SH7780 Control Registers */ 22/* SH7780 Control Registers */
diff --git a/arch/sh/drivers/pci/pci.c b/arch/sh/drivers/pci/pci.c
index ccaba368ac9b..49b435c3a57a 100644
--- a/arch/sh/drivers/pci/pci.c
+++ b/arch/sh/drivers/pci/pci.c
@@ -71,7 +71,7 @@ subsys_initcall(pcibios_init);
71 * Called after each bus is probed, but before its children 71 * Called after each bus is probed, but before its children
72 * are examined. 72 * are examined.
73 */ 73 */
74void __devinit pcibios_fixup_bus(struct pci_bus *bus) 74void __devinit __weak pcibios_fixup_bus(struct pci_bus *bus)
75{ 75{
76 pci_read_bridge_bases(bus); 76 pci_read_bridge_bases(bus);
77} 77}
diff --git a/arch/sh/kernel/Makefile b/arch/sh/kernel/Makefile
index 4b81d9c47b00..349d833deab5 100644
--- a/arch/sh/kernel/Makefile
+++ b/arch/sh/kernel/Makefile
@@ -1,25 +1,5 @@
1# 1ifeq ($(CONFIG_SUPERH32),y)
2# Makefile for the Linux/SuperH kernel. 2include ${srctree}/arch/sh/kernel/Makefile_32
3# 3else
4 4include ${srctree}/arch/sh/kernel/Makefile_64
5extra-y := head.o init_task.o vmlinux.lds 5endif
6
7obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process.o ptrace.o \
8 semaphore.o setup.o signal.o sys_sh.o syscalls.o \
9 time.o topology.o traps.o
10
11obj-y += cpu/ timers/
12obj-$(CONFIG_VSYSCALL) += vsyscall/
13obj-$(CONFIG_SMP) += smp.o
14obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
15obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
16obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
17obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
18obj-$(CONFIG_MODULES) += sh_ksyms.o module.o
19obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
20obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
21obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
22obj-$(CONFIG_PM) += pm.o
23obj-$(CONFIG_STACKTRACE) += stacktrace.o
24
25EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_32 b/arch/sh/kernel/Makefile_32
new file mode 100644
index 000000000000..c89289831053
--- /dev/null
+++ b/arch/sh/kernel/Makefile_32
@@ -0,0 +1,26 @@
1#
2# Makefile for the Linux/SuperH kernel.
3#
4
5extra-y := head_32.o init_task.o vmlinux.lds
6
7obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_32.o \
8 ptrace_32.o semaphore.o setup.o signal_32.o sys_sh.o sys_sh32.o \
9 syscalls_32.o time_32.o topology.o traps.o traps_32.o
10
11obj-y += cpu/ timers/
12obj-$(CONFIG_VSYSCALL) += vsyscall/
13obj-$(CONFIG_SMP) += smp.o
14obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
15obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
16obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
17obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
18obj-$(CONFIG_MODULES) += sh_ksyms_32.o module.o
19obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
20obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
21obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
22obj-$(CONFIG_PM) += pm.o
23obj-$(CONFIG_STACKTRACE) += stacktrace.o
24obj-$(CONFIG_BINFMT_ELF) += dump_task.o
25
26EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/Makefile_64 b/arch/sh/kernel/Makefile_64
new file mode 100644
index 000000000000..1ef21cc087f3
--- /dev/null
+++ b/arch/sh/kernel/Makefile_64
@@ -0,0 +1,22 @@
1extra-y := head_64.o init_task.o vmlinux.lds
2
3obj-y := debugtraps.o io.o io_generic.o irq.o machvec.o process_64.o \
4 ptrace_64.o semaphore.o setup.o signal_64.o sys_sh.o sys_sh64.o \
5 syscalls_64.o time_64.o topology.o traps.o traps_64.o
6
7obj-y += cpu/ timers/
8obj-$(CONFIG_VSYSCALL) += vsyscall/
9obj-$(CONFIG_SMP) += smp.o
10obj-$(CONFIG_CF_ENABLER) += cf-enabler.o
11obj-$(CONFIG_SH_STANDARD_BIOS) += sh_bios.o
12obj-$(CONFIG_SH_KGDB) += kgdb_stub.o kgdb_jmp.o
13obj-$(CONFIG_SH_CPU_FREQ) += cpufreq.o
14obj-$(CONFIG_MODULES) += sh_ksyms_64.o module.o
15obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
16obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
17obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
18obj-$(CONFIG_PM) += pm.o
19obj-$(CONFIG_STACKTRACE) += stacktrace.o
20obj-$(CONFIG_BINFMT_ELF) += dump_task.o
21
22EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile
index d055a3ea6b4b..f471d242774e 100644
--- a/arch/sh/kernel/cpu/Makefile
+++ b/arch/sh/kernel/cpu/Makefile
@@ -6,8 +6,14 @@ obj-$(CONFIG_CPU_SH2) = sh2/
6obj-$(CONFIG_CPU_SH2A) = sh2a/ 6obj-$(CONFIG_CPU_SH2A) = sh2a/
7obj-$(CONFIG_CPU_SH3) = sh3/ 7obj-$(CONFIG_CPU_SH3) = sh3/
8obj-$(CONFIG_CPU_SH4) = sh4/ 8obj-$(CONFIG_CPU_SH4) = sh4/
9obj-$(CONFIG_CPU_SH5) = sh5/
10
11# Special cases for family ancestry.
12
9obj-$(CONFIG_CPU_SH4A) += sh4a/ 13obj-$(CONFIG_CPU_SH4A) += sh4a/
10 14
15# Common interfaces.
16
11obj-$(CONFIG_UBC_WAKEUP) += ubc.o 17obj-$(CONFIG_UBC_WAKEUP) += ubc.o
12obj-$(CONFIG_SH_ADC) += adc.o 18obj-$(CONFIG_SH_ADC) += adc.o
13 19
diff --git a/arch/sh/kernel/cpu/init.c b/arch/sh/kernel/cpu/init.c
index c217c4bf0085..80a31329ead9 100644
--- a/arch/sh/kernel/cpu/init.c
+++ b/arch/sh/kernel/cpu/init.c
@@ -13,6 +13,7 @@
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <linux/mm.h> 15#include <linux/mm.h>
16#include <linux/log2.h>
16#include <asm/mmu_context.h> 17#include <asm/mmu_context.h>
17#include <asm/processor.h> 18#include <asm/processor.h>
18#include <asm/uaccess.h> 19#include <asm/uaccess.h>
@@ -20,9 +21,12 @@
20#include <asm/system.h> 21#include <asm/system.h>
21#include <asm/cacheflush.h> 22#include <asm/cacheflush.h>
22#include <asm/cache.h> 23#include <asm/cache.h>
24#include <asm/elf.h>
23#include <asm/io.h> 25#include <asm/io.h>
24#include <asm/ubc.h>
25#include <asm/smp.h> 26#include <asm/smp.h>
27#ifdef CONFIG_SUPERH32
28#include <asm/ubc.h>
29#endif
26 30
27/* 31/*
28 * Generic wrapper for command line arguments to disable on-chip 32 * Generic wrapper for command line arguments to disable on-chip
@@ -61,25 +65,12 @@ static void __init speculative_execution_init(void)
61/* 65/*
62 * Generic first-level cache init 66 * Generic first-level cache init
63 */ 67 */
64static void __init cache_init(void) 68#ifdef CONFIG_SUPERH32
69static void __uses_jump_to_uncached cache_init(void)
65{ 70{
66 unsigned long ccr, flags; 71 unsigned long ccr, flags;
67 72
68 /* First setup the rest of the I-cache info */ 73 jump_to_uncached();
69 current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
70 current_cpu_data.icache.linesz;
71
72 current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
73 current_cpu_data.icache.linesz;
74
75 /* And the D-cache too */
76 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
77 current_cpu_data.dcache.linesz;
78
79 current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
80 current_cpu_data.dcache.linesz;
81
82 jump_to_P2();
83 ccr = ctrl_inl(CCR); 74 ccr = ctrl_inl(CCR);
84 75
85 /* 76 /*
@@ -156,7 +147,31 @@ static void __init cache_init(void)
156#endif 147#endif
157 148
158 ctrl_outl(flags, CCR); 149 ctrl_outl(flags, CCR);
159 back_to_P1(); 150 back_to_cached();
151}
152#else
153#define cache_init() do { } while (0)
154#endif
155
156#define CSHAPE(totalsize, linesize, assoc) \
157 ((totalsize & ~0xff) | (linesize << 4) | assoc)
158
159#define CACHE_DESC_SHAPE(desc) \
160 CSHAPE((desc).way_size * (desc).ways, ilog2((desc).linesz), (desc).ways)
161
162static void detect_cache_shape(void)
163{
164 l1d_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.dcache);
165
166 if (current_cpu_data.dcache.flags & SH_CACHE_COMBINED)
167 l1i_cache_shape = l1d_cache_shape;
168 else
169 l1i_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.icache);
170
171 if (current_cpu_data.flags & CPU_HAS_L2_CACHE)
172 l2_cache_shape = CACHE_DESC_SHAPE(current_cpu_data.scache);
173 else
174 l2_cache_shape = -1; /* No S-cache */
160} 175}
161 176
162#ifdef CONFIG_SH_DSP 177#ifdef CONFIG_SH_DSP
@@ -228,14 +243,32 @@ asmlinkage void __cpuinit sh_cpu_init(void)
228 if (current_cpu_data.type == CPU_SH_NONE) 243 if (current_cpu_data.type == CPU_SH_NONE)
229 panic("Unknown CPU"); 244 panic("Unknown CPU");
230 245
246 /* First setup the rest of the I-cache info */
247 current_cpu_data.icache.entry_mask = current_cpu_data.icache.way_incr -
248 current_cpu_data.icache.linesz;
249
250 current_cpu_data.icache.way_size = current_cpu_data.icache.sets *
251 current_cpu_data.icache.linesz;
252
253 /* And the D-cache too */
254 current_cpu_data.dcache.entry_mask = current_cpu_data.dcache.way_incr -
255 current_cpu_data.dcache.linesz;
256
257 current_cpu_data.dcache.way_size = current_cpu_data.dcache.sets *
258 current_cpu_data.dcache.linesz;
259
231 /* Init the cache */ 260 /* Init the cache */
232 cache_init(); 261 cache_init();
233 262
234 if (raw_smp_processor_id() == 0) 263 if (raw_smp_processor_id() == 0) {
235 shm_align_mask = max_t(unsigned long, 264 shm_align_mask = max_t(unsigned long,
236 current_cpu_data.dcache.way_size - 1, 265 current_cpu_data.dcache.way_size - 1,
237 PAGE_SIZE - 1); 266 PAGE_SIZE - 1);
238 267
268 /* Boot CPU sets the cache shape */
269 detect_cache_shape();
270 }
271
239 /* Disable the FPU */ 272 /* Disable the FPU */
240 if (fpu_disabled) { 273 if (fpu_disabled) {
241 printk("FPU Disabled\n"); 274 printk("FPU Disabled\n");
@@ -273,7 +306,10 @@ asmlinkage void __cpuinit sh_cpu_init(void)
273 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So .. 306 * like PTRACE_SINGLESTEP or doing hardware watchpoints in GDB. So ..
274 * we wake it up and hope that all is well. 307 * we wake it up and hope that all is well.
275 */ 308 */
309#ifdef CONFIG_SUPERH32
276 if (raw_smp_processor_id() == 0) 310 if (raw_smp_processor_id() == 0)
277 ubc_wakeup(); 311 ubc_wakeup();
312#endif
313
278 speculative_execution_init(); 314 speculative_execution_init();
279} 315}
diff --git a/arch/sh/kernel/cpu/irq/Makefile b/arch/sh/kernel/cpu/irq/Makefile
index 8da8e178f09c..cc1836e47a5d 100644
--- a/arch/sh/kernel/cpu/irq/Makefile
+++ b/arch/sh/kernel/cpu/irq/Makefile
@@ -1,7 +1,9 @@
1# 1#
2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers. 2# Makefile for the Linux/SuperH CPU-specifc IRQ handlers.
3# 3#
4obj-y += imask.o intc.o 4obj-y += intc.o
5 5
6obj-$(CONFIG_SUPERH32) += imask.o
7obj-$(CONFIG_CPU_SH5) += intc-sh5.o
6obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o 8obj-$(CONFIG_CPU_HAS_IPR_IRQ) += ipr.o
7obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o 9obj-$(CONFIG_CPU_HAS_MASKREG_IRQ) += maskreg.o
diff --git a/arch/sh64/kernel/irq_intc.c b/arch/sh/kernel/cpu/irq/intc-sh5.c
index 3b63a93198f2..43ee7a9a4f0b 100644
--- a/arch/sh64/kernel/irq_intc.c
+++ b/arch/sh/kernel/cpu/irq/intc-sh5.c
@@ -1,34 +1,27 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/cpu/irq/intc-sh5.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 * 3 *
6 * arch/sh64/kernel/irq_intc.c 4 * Interrupt Controller support for SH5 INTC.
7 * 5 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 6 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt 7 * Copyright (C) 2003 Paul Mundt
10 * 8 *
11 * Interrupt Controller support for SH5 INTC.
12 * Per-interrupt selective. IRLM=0 (Fixed priority) is not 9 * Per-interrupt selective. IRLM=0 (Fixed priority) is not
13 * supported being useless without a cascaded interrupt 10 * supported being useless without a cascaded interrupt
14 * controller. 11 * controller.
15 * 12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */ 16 */
17
18#include <linux/init.h> 17#include <linux/init.h>
19#include <linux/interrupt.h> 18#include <linux/interrupt.h>
20#include <linux/irq.h> 19#include <linux/irq.h>
20#include <linux/io.h>
21#include <linux/kernel.h> 21#include <linux/kernel.h>
22#include <linux/stddef.h> 22#include <linux/bitops.h>
23#include <linux/bitops.h> /* this includes also <asm/registers.h */ 23#include <asm/cpu/irq.h>
24 /* which is required to remap register */
25 /* names used into __asm__ blocks... */
26
27#include <asm/hardware.h>
28#include <asm/platform.h>
29#include <asm/page.h> 24#include <asm/page.h>
30#include <asm/io.h>
31#include <asm/irq.h>
32 25
33/* 26/*
34 * Maybe the generic Peripheral block could move to a more 27 * Maybe the generic Peripheral block could move to a more
@@ -192,7 +185,7 @@ int intc_irq_describe(char* p, int irq)
192} 185}
193#endif 186#endif
194 187
195void __init init_IRQ(void) 188void __init plat_irq_setup(void)
196{ 189{
197 unsigned long long __dummy0, __dummy1=~0x00000000100000f0; 190 unsigned long long __dummy0, __dummy1=~0x00000000100000f0;
198 unsigned long reg; 191 unsigned long reg;
@@ -251,14 +244,6 @@ void __init init_IRQ(void)
251 } 244 }
252 } 245 }
253 246
254#ifdef CONFIG_SH_CAYMAN
255 {
256 extern void init_cayman_irq(void);
257
258 init_cayman_irq();
259 }
260#endif
261
262 /* 247 /*
263 * And now let interrupts come in. 248 * And now let interrupts come in.
264 * sti() is not enough, we need to 249 * sti() is not enough, we need to
diff --git a/arch/sh/kernel/cpu/irq/intc.c b/arch/sh/kernel/cpu/irq/intc.c
index 6ac018c15e03..84806b2027f8 100644
--- a/arch/sh/kernel/cpu/irq/intc.c
+++ b/arch/sh/kernel/cpu/irq/intc.c
@@ -335,31 +335,6 @@ static intc_enum __init intc_grp_id(struct intc_desc *desc,
335 return 0; 335 return 0;
336} 336}
337 337
338static unsigned int __init intc_prio_value(struct intc_desc *desc,
339 intc_enum enum_id, int do_grps)
340{
341 struct intc_prio *p = desc->priorities;
342 unsigned int i;
343
344 for (i = 0; p && enum_id && i < desc->nr_priorities; i++) {
345 p = desc->priorities + i;
346
347 if (p->enum_id != enum_id)
348 continue;
349
350 return p->priority;
351 }
352
353 if (do_grps)
354 return intc_prio_value(desc, intc_grp_id(desc, enum_id), 0);
355
356 /* default to the lowest priority possible if no priority is set
357 * - this needs to be at least 2 for 5-bit priorities on 7780
358 */
359
360 return 2;
361}
362
363static unsigned int __init intc_mask_data(struct intc_desc *desc, 338static unsigned int __init intc_mask_data(struct intc_desc *desc,
364 struct intc_desc_int *d, 339 struct intc_desc_int *d,
365 intc_enum enum_id, int do_grps) 340 intc_enum enum_id, int do_grps)
@@ -518,8 +493,10 @@ static void __init intc_register_irq(struct intc_desc *desc,
518 handle_level_irq, "level"); 493 handle_level_irq, "level");
519 set_irq_chip_data(irq, (void *)data[primary]); 494 set_irq_chip_data(irq, (void *)data[primary]);
520 495
521 /* record the desired priority level */ 496 /* set priority level
522 intc_prio_level[irq] = intc_prio_value(desc, enum_id, 1); 497 * - this needs to be at least 2 for 5-bit priorities on 7780
498 */
499 intc_prio_level[irq] = 2;
523 500
524 /* enable secondary masking method if present */ 501 /* enable secondary masking method if present */
525 if (data[!primary]) 502 if (data[!primary])
diff --git a/arch/sh/kernel/cpu/sh2/entry.S b/arch/sh/kernel/cpu/sh2/entry.S
index ee8f1fe84b08..7a26569e7956 100644
--- a/arch/sh/kernel/cpu/sh2/entry.S
+++ b/arch/sh/kernel/cpu/sh2/entry.S
@@ -149,6 +149,14 @@ ENTRY(exception_handler)
149 mov #32,r8 149 mov #32,r8
150 cmp/hs r8,r9 150 cmp/hs r8,r9
151 bt trap_entry ! 64 > vec >= 32 is trap 151 bt trap_entry ! 64 > vec >= 32 is trap
152
153#if defined(CONFIG_SH_FPU)
154 mov #13,r8
155 cmp/eq r8,r9
156 bt 10f ! fpu
157 nop
158#endif
159
152 mov.l 4f,r8 160 mov.l 4f,r8
153 mov r9,r4 161 mov r9,r4
154 shll2 r9 162 shll2 r9
@@ -158,6 +166,10 @@ ENTRY(exception_handler)
158 cmp/eq r9,r8 166 cmp/eq r9,r8
159 bf 3f 167 bf 3f
160 mov.l 8f,r8 ! unhandled exception 168 mov.l 8f,r8 ! unhandled exception
169#if defined(CONFIG_SH_FPU)
17010:
171 mov.l 9f, r8 ! unhandled exception
172#endif
1613: 1733:
162 mov.l 5f,r10 174 mov.l 5f,r10
163 jmp @r8 175 jmp @r8
@@ -177,7 +189,10 @@ interrupt_entry:
1776: .long ret_from_irq 1896: .long ret_from_irq
1787: .long do_IRQ 1907: .long do_IRQ
1798: .long do_exception_error 1918: .long do_exception_error
180 192#ifdef CONFIG_SH_FPU
1939: .long fpu_error_trap_handler
194#endif
195
181trap_entry: 196trap_entry:
182 mov #0x30,r8 197 mov #0x30,r8
183 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall 198 cmp/ge r8,r9 ! vector 0x20-0x2f is systemcall
@@ -250,7 +265,7 @@ ENTRY(sh_bios_handler)
2501: .long gdb_vbr_vector 2651: .long gdb_vbr_vector
251#endif /* CONFIG_SH_STANDARD_BIOS */ 266#endif /* CONFIG_SH_STANDARD_BIOS */
252 267
253ENTRY(address_error_handler) 268ENTRY(address_error_trap_handler)
254 mov r15,r4 ! regs 269 mov r15,r4 ! regs
255 add #4,r4 270 add #4,r4
256 mov #OFF_PC,r0 271 mov #OFF_PC,r0
diff --git a/arch/sh/kernel/cpu/sh2/setup-sh7619.c b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
index ec6adc3f306f..b230eb278cef 100644
--- a/arch/sh/kernel/cpu/sh2/setup-sh7619.c
+++ b/arch/sh/kernel/cpu/sh2/setup-sh7619.c
@@ -65,7 +65,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
65}; 65};
66 66
67static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups, 67static DECLARE_INTC_DESC(intc_desc, "sh7619", vectors, groups,
68 NULL, NULL, prio_registers, NULL); 68 NULL, prio_registers, NULL);
69 69
70static struct plat_sci_port sci_platform_data[] = { 70static struct plat_sci_port sci_platform_data[] = {
71 { 71 {
diff --git a/arch/sh/kernel/cpu/sh2a/Makefile b/arch/sh/kernel/cpu/sh2a/Makefile
index 965fa2572b23..b279cdc3a233 100644
--- a/arch/sh/kernel/cpu/sh2a/Makefile
+++ b/arch/sh/kernel/cpu/sh2a/Makefile
@@ -6,4 +6,8 @@ obj-y := common.o probe.o opcode_helper.o
6 6
7common-y += $(addprefix ../sh2/, ex.o entry.o) 7common-y += $(addprefix ../sh2/, ex.o entry.o)
8 8
9obj-$(CONFIG_SH_FPU) += fpu.o
10
9obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o 11obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
12obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
diff --git a/arch/sh/kernel/cpu/sh2a/clock-sh7203.c b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
new file mode 100644
index 000000000000..3feb95a4fcbc
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/clock-sh7203.c
@@ -0,0 +1,89 @@
1/*
2 * arch/sh/kernel/cpu/sh2a/clock-sh7203.c
3 *
4 * SH7203 support for the clock framework
5 *
6 * Copyright (C) 2007 Kieran Bingham (MPC-Data Ltd)
7 *
8 * Based on clock-sh7263.c
9 * Copyright (C) 2006 Yoshinori Sato
10 *
11 * Based on clock-sh4.c
12 * Copyright (C) 2005 Paul Mundt
13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file "COPYING" in the main directory of this archive
16 * for more details.
17 */
18#include <linux/init.h>
19#include <linux/kernel.h>
20#include <asm/clock.h>
21#include <asm/freq.h>
22#include <asm/io.h>
23
24const static int pll1rate[]={8,12,16,0};
25const static int pfc_divisors[]={1,2,3,4,6,8,12};
26#define ifc_divisors pfc_divisors
27
28#if (CONFIG_SH_CLK_MD == 0)
29#define PLL2 (1)
30#elif (CONFIG_SH_CLK_MD == 1)
31#define PLL2 (2)
32#elif (CONFIG_SH_CLK_MD == 2)
33#define PLL2 (4)
34#elif (CONFIG_SH_CLK_MD == 3)
35#define PLL2 (4)
36#else
37#error "Illegal Clock Mode!"
38#endif
39
40static void master_clk_init(struct clk *clk)
41{
42 clk->rate *= pll1rate[(ctrl_inw(FREQCR) >> 8) & 0x0003] * PLL2 ;
43}
44
45static struct clk_ops sh7203_master_clk_ops = {
46 .init = master_clk_init,
47};
48
49static void module_clk_recalc(struct clk *clk)
50{
51 int idx = (ctrl_inw(FREQCR) & 0x0007);
52 clk->rate = clk->parent->rate / pfc_divisors[idx];
53}
54
55static struct clk_ops sh7203_module_clk_ops = {
56 .recalc = module_clk_recalc,
57};
58
59static void bus_clk_recalc(struct clk *clk)
60{
61 int idx = (ctrl_inw(FREQCR) & 0x0007);
62 clk->rate = clk->parent->rate / pfc_divisors[idx-2];
63}
64
65static struct clk_ops sh7203_bus_clk_ops = {
66 .recalc = bus_clk_recalc,
67};
68
69static void cpu_clk_recalc(struct clk *clk)
70{
71 clk->rate = clk->parent->rate;
72}
73
74static struct clk_ops sh7203_cpu_clk_ops = {
75 .recalc = cpu_clk_recalc,
76};
77
78static struct clk_ops *sh7203_clk_ops[] = {
79 &sh7203_master_clk_ops,
80 &sh7203_module_clk_ops,
81 &sh7203_bus_clk_ops,
82 &sh7203_cpu_clk_ops,
83};
84
85void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
86{
87 if (idx < ARRAY_SIZE(sh7203_clk_ops))
88 *ops = sh7203_clk_ops[idx];
89}
diff --git a/arch/sh/kernel/cpu/sh2a/fpu.c b/arch/sh/kernel/cpu/sh2a/fpu.c
new file mode 100644
index 000000000000..ff99562456fb
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/fpu.c
@@ -0,0 +1,633 @@
1/*
2 * Save/restore floating point context for signal handlers.
3 *
4 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * FIXME! These routines can be optimized in big endian case.
11 */
12#include <linux/sched.h>
13#include <linux/signal.h>
14#include <asm/processor.h>
15#include <asm/io.h>
16
17/* The PR (precision) bit in the FP Status Register must be clear when
18 * an frchg instruction is executed, otherwise the instruction is undefined.
19 * Executing frchg with PR set causes a trap on some SH4 implementations.
20 */
21
22#define FPSCR_RCHG 0x00000000
23
24
25/*
26 * Save FPU registers onto task structure.
27 * Assume called with FPU enabled (SR.FD=0).
28 */
29void
30save_fpu(struct task_struct *tsk, struct pt_regs *regs)
31{
32 unsigned long dummy;
33
34 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
35 enable_fpu();
36 asm volatile("sts.l fpul, @-%0\n\t"
37 "sts.l fpscr, @-%0\n\t"
38 "fmov.s fr15, @-%0\n\t"
39 "fmov.s fr14, @-%0\n\t"
40 "fmov.s fr13, @-%0\n\t"
41 "fmov.s fr12, @-%0\n\t"
42 "fmov.s fr11, @-%0\n\t"
43 "fmov.s fr10, @-%0\n\t"
44 "fmov.s fr9, @-%0\n\t"
45 "fmov.s fr8, @-%0\n\t"
46 "fmov.s fr7, @-%0\n\t"
47 "fmov.s fr6, @-%0\n\t"
48 "fmov.s fr5, @-%0\n\t"
49 "fmov.s fr4, @-%0\n\t"
50 "fmov.s fr3, @-%0\n\t"
51 "fmov.s fr2, @-%0\n\t"
52 "fmov.s fr1, @-%0\n\t"
53 "fmov.s fr0, @-%0\n\t"
54 "lds %3, fpscr\n\t"
55 : "=r" (dummy)
56 : "0" ((char *)(&tsk->thread.fpu.hard.status)),
57 "r" (FPSCR_RCHG),
58 "r" (FPSCR_INIT)
59 : "memory");
60
61 disable_fpu();
62 release_fpu(regs);
63}
64
65static void
66restore_fpu(struct task_struct *tsk)
67{
68 unsigned long dummy;
69
70 enable_fpu();
71 asm volatile("fmov.s @%0+, fr0\n\t"
72 "fmov.s @%0+, fr1\n\t"
73 "fmov.s @%0+, fr2\n\t"
74 "fmov.s @%0+, fr3\n\t"
75 "fmov.s @%0+, fr4\n\t"
76 "fmov.s @%0+, fr5\n\t"
77 "fmov.s @%0+, fr6\n\t"
78 "fmov.s @%0+, fr7\n\t"
79 "fmov.s @%0+, fr8\n\t"
80 "fmov.s @%0+, fr9\n\t"
81 "fmov.s @%0+, fr10\n\t"
82 "fmov.s @%0+, fr11\n\t"
83 "fmov.s @%0+, fr12\n\t"
84 "fmov.s @%0+, fr13\n\t"
85 "fmov.s @%0+, fr14\n\t"
86 "fmov.s @%0+, fr15\n\t"
87 "lds.l @%0+, fpscr\n\t"
88 "lds.l @%0+, fpul\n\t"
89 : "=r" (dummy)
90 : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG)
91 : "memory");
92 disable_fpu();
93}
94
95/*
96 * Load the FPU with signalling NANS. This bit pattern we're using
97 * has the property that no matter wether considered as single or as
98 * double precission represents signaling NANS.
99 */
100
101static void
102fpu_init(void)
103{
104 enable_fpu();
105 asm volatile("lds %0, fpul\n\t"
106 "fsts fpul, fr0\n\t"
107 "fsts fpul, fr1\n\t"
108 "fsts fpul, fr2\n\t"
109 "fsts fpul, fr3\n\t"
110 "fsts fpul, fr4\n\t"
111 "fsts fpul, fr5\n\t"
112 "fsts fpul, fr6\n\t"
113 "fsts fpul, fr7\n\t"
114 "fsts fpul, fr8\n\t"
115 "fsts fpul, fr9\n\t"
116 "fsts fpul, fr10\n\t"
117 "fsts fpul, fr11\n\t"
118 "fsts fpul, fr12\n\t"
119 "fsts fpul, fr13\n\t"
120 "fsts fpul, fr14\n\t"
121 "fsts fpul, fr15\n\t"
122 "lds %2, fpscr\n\t"
123 : /* no output */
124 : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT));
125 disable_fpu();
126}
127
128/*
129 * Emulate arithmetic ops on denormalized number for some FPU insns.
130 */
131
132/* denormalized float * float */
133static int denormal_mulf(int hx, int hy)
134{
135 unsigned int ix, iy;
136 unsigned long long m, n;
137 int exp, w;
138
139 ix = hx & 0x7fffffff;
140 iy = hy & 0x7fffffff;
141 if (iy < 0x00800000 || ix == 0)
142 return ((hx ^ hy) & 0x80000000);
143
144 exp = (iy & 0x7f800000) >> 23;
145 ix &= 0x007fffff;
146 iy = (iy & 0x007fffff) | 0x00800000;
147 m = (unsigned long long)ix * iy;
148 n = m;
149 w = -1;
150 while (n) { n >>= 1; w++; }
151
152 /* FIXME: use guard bits */
153 exp += w - 126 - 46;
154 if (exp > 0)
155 ix = ((int) (m >> (w - 23)) & 0x007fffff) | (exp << 23);
156 else if (exp + 22 >= 0)
157 ix = (int) (m >> (w - 22 - exp)) & 0x007fffff;
158 else
159 ix = 0;
160
161 ix |= (hx ^ hy) & 0x80000000;
162 return ix;
163}
164
165/* denormalized double * double */
166static void mult64(unsigned long long x, unsigned long long y,
167 unsigned long long *highp, unsigned long long *lowp)
168{
169 unsigned long long sub0, sub1, sub2, sub3;
170 unsigned long long high, low;
171
172 sub0 = (x >> 32) * (unsigned long) (y >> 32);
173 sub1 = (x & 0xffffffffLL) * (unsigned long) (y >> 32);
174 sub2 = (x >> 32) * (unsigned long) (y & 0xffffffffLL);
175 sub3 = (x & 0xffffffffLL) * (unsigned long) (y & 0xffffffffLL);
176 low = sub3;
177 high = 0LL;
178 sub3 += (sub1 << 32);
179 if (low > sub3)
180 high++;
181 low = sub3;
182 sub3 += (sub2 << 32);
183 if (low > sub3)
184 high++;
185 low = sub3;
186 high += (sub1 >> 32) + (sub2 >> 32);
187 high += sub0;
188 *lowp = low;
189 *highp = high;
190}
191
192static inline long long rshift64(unsigned long long mh,
193 unsigned long long ml, int n)
194{
195 if (n >= 64)
196 return mh >> (n - 64);
197 return (mh << (64 - n)) | (ml >> n);
198}
199
200static long long denormal_muld(long long hx, long long hy)
201{
202 unsigned long long ix, iy;
203 unsigned long long mh, ml, nh, nl;
204 int exp, w;
205
206 ix = hx & 0x7fffffffffffffffLL;
207 iy = hy & 0x7fffffffffffffffLL;
208 if (iy < 0x0010000000000000LL || ix == 0)
209 return ((hx ^ hy) & 0x8000000000000000LL);
210
211 exp = (iy & 0x7ff0000000000000LL) >> 52;
212 ix &= 0x000fffffffffffffLL;
213 iy = (iy & 0x000fffffffffffffLL) | 0x0010000000000000LL;
214 mult64(ix, iy, &mh, &ml);
215 nh = mh;
216 nl = ml;
217 w = -1;
218 if (nh) {
219 while (nh) { nh >>= 1; w++;}
220 w += 64;
221 } else
222 while (nl) { nl >>= 1; w++;}
223
224 /* FIXME: use guard bits */
225 exp += w - 1022 - 52 * 2;
226 if (exp > 0)
227 ix = (rshift64(mh, ml, w - 52) & 0x000fffffffffffffLL)
228 | ((long long)exp << 52);
229 else if (exp + 51 >= 0)
230 ix = rshift64(mh, ml, w - 51 - exp) & 0x000fffffffffffffLL;
231 else
232 ix = 0;
233
234 ix |= (hx ^ hy) & 0x8000000000000000LL;
235 return ix;
236}
237
238/* ix - iy where iy: denormal and ix, iy >= 0 */
239static int denormal_subf1(unsigned int ix, unsigned int iy)
240{
241 int frac;
242 int exp;
243
244 if (ix < 0x00800000)
245 return ix - iy;
246
247 exp = (ix & 0x7f800000) >> 23;
248 if (exp - 1 > 31)
249 return ix;
250 iy >>= exp - 1;
251 if (iy == 0)
252 return ix;
253
254 frac = (ix & 0x007fffff) | 0x00800000;
255 frac -= iy;
256 while (frac < 0x00800000) {
257 if (--exp == 0)
258 return frac;
259 frac <<= 1;
260 }
261
262 return (exp << 23) | (frac & 0x007fffff);
263}
264
265/* ix + iy where iy: denormal and ix, iy >= 0 */
266static int denormal_addf1(unsigned int ix, unsigned int iy)
267{
268 int frac;
269 int exp;
270
271 if (ix < 0x00800000)
272 return ix + iy;
273
274 exp = (ix & 0x7f800000) >> 23;
275 if (exp - 1 > 31)
276 return ix;
277 iy >>= exp - 1;
278 if (iy == 0)
279 return ix;
280
281 frac = (ix & 0x007fffff) | 0x00800000;
282 frac += iy;
283 if (frac >= 0x01000000) {
284 frac >>= 1;
285 ++exp;
286 }
287
288 return (exp << 23) | (frac & 0x007fffff);
289}
290
291static int denormal_addf(int hx, int hy)
292{
293 unsigned int ix, iy;
294 int sign;
295
296 if ((hx ^ hy) & 0x80000000) {
297 sign = hx & 0x80000000;
298 ix = hx & 0x7fffffff;
299 iy = hy & 0x7fffffff;
300 if (iy < 0x00800000) {
301 ix = denormal_subf1(ix, iy);
302 if (ix < 0) {
303 ix = -ix;
304 sign ^= 0x80000000;
305 }
306 } else {
307 ix = denormal_subf1(iy, ix);
308 sign ^= 0x80000000;
309 }
310 } else {
311 sign = hx & 0x80000000;
312 ix = hx & 0x7fffffff;
313 iy = hy & 0x7fffffff;
314 if (iy < 0x00800000)
315 ix = denormal_addf1(ix, iy);
316 else
317 ix = denormal_addf1(iy, ix);
318 }
319
320 return sign | ix;
321}
322
323/* ix - iy where iy: denormal and ix, iy >= 0 */
324static long long denormal_subd1(unsigned long long ix, unsigned long long iy)
325{
326 long long frac;
327 int exp;
328
329 if (ix < 0x0010000000000000LL)
330 return ix - iy;
331
332 exp = (ix & 0x7ff0000000000000LL) >> 52;
333 if (exp - 1 > 63)
334 return ix;
335 iy >>= exp - 1;
336 if (iy == 0)
337 return ix;
338
339 frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
340 frac -= iy;
341 while (frac < 0x0010000000000000LL) {
342 if (--exp == 0)
343 return frac;
344 frac <<= 1;
345 }
346
347 return ((long long)exp << 52) | (frac & 0x000fffffffffffffLL);
348}
349
350/* ix + iy where iy: denormal and ix, iy >= 0 */
351static long long denormal_addd1(unsigned long long ix, unsigned long long iy)
352{
353 long long frac;
354 long long exp;
355
356 if (ix < 0x0010000000000000LL)
357 return ix + iy;
358
359 exp = (ix & 0x7ff0000000000000LL) >> 52;
360 if (exp - 1 > 63)
361 return ix;
362 iy >>= exp - 1;
363 if (iy == 0)
364 return ix;
365
366 frac = (ix & 0x000fffffffffffffLL) | 0x0010000000000000LL;
367 frac += iy;
368 if (frac >= 0x0020000000000000LL) {
369 frac >>= 1;
370 ++exp;
371 }
372
373 return (exp << 52) | (frac & 0x000fffffffffffffLL);
374}
375
376static long long denormal_addd(long long hx, long long hy)
377{
378 unsigned long long ix, iy;
379 long long sign;
380
381 if ((hx ^ hy) & 0x8000000000000000LL) {
382 sign = hx & 0x8000000000000000LL;
383 ix = hx & 0x7fffffffffffffffLL;
384 iy = hy & 0x7fffffffffffffffLL;
385 if (iy < 0x0010000000000000LL) {
386 ix = denormal_subd1(ix, iy);
387 if (ix < 0) {
388 ix = -ix;
389 sign ^= 0x8000000000000000LL;
390 }
391 } else {
392 ix = denormal_subd1(iy, ix);
393 sign ^= 0x8000000000000000LL;
394 }
395 } else {
396 sign = hx & 0x8000000000000000LL;
397 ix = hx & 0x7fffffffffffffffLL;
398 iy = hy & 0x7fffffffffffffffLL;
399 if (iy < 0x0010000000000000LL)
400 ix = denormal_addd1(ix, iy);
401 else
402 ix = denormal_addd1(iy, ix);
403 }
404
405 return sign | ix;
406}
407
408/**
409 * denormal_to_double - Given denormalized float number,
410 * store double float
411 *
412 * @fpu: Pointer to sh_fpu_hard structure
413 * @n: Index to FP register
414 */
415static void
416denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
417{
418 unsigned long du, dl;
419 unsigned long x = fpu->fpul;
420 int exp = 1023 - 126;
421
422 if (x != 0 && (x & 0x7f800000) == 0) {
423 du = (x & 0x80000000);
424 while ((x & 0x00800000) == 0) {
425 x <<= 1;
426 exp--;
427 }
428 x &= 0x007fffff;
429 du |= (exp << 20) | (x >> 3);
430 dl = x << 29;
431
432 fpu->fp_regs[n] = du;
433 fpu->fp_regs[n+1] = dl;
434 }
435}
436
437/**
438 * ieee_fpe_handler - Handle denormalized number exception
439 *
440 * @regs: Pointer to register structure
441 *
442 * Returns 1 when it's handled (should not cause exception).
443 */
444static int
445ieee_fpe_handler (struct pt_regs *regs)
446{
447 unsigned short insn = *(unsigned short *) regs->pc;
448 unsigned short finsn;
449 unsigned long nextpc;
450 int nib[4] = {
451 (insn >> 12) & 0xf,
452 (insn >> 8) & 0xf,
453 (insn >> 4) & 0xf,
454 insn & 0xf};
455
456 if (nib[0] == 0xb ||
457 (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */
458 regs->pr = regs->pc + 4;
459 if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */
460 nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3);
461 finsn = *(unsigned short *) (regs->pc + 2);
462 } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */
463 if (regs->sr & 1)
464 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
465 else
466 nextpc = regs->pc + 4;
467 finsn = *(unsigned short *) (regs->pc + 2);
468 } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */
469 if (regs->sr & 1)
470 nextpc = regs->pc + 4;
471 else
472 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1);
473 finsn = *(unsigned short *) (regs->pc + 2);
474 } else if (nib[0] == 0x4 && nib[3] == 0xb &&
475 (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */
476 nextpc = regs->regs[nib[1]];
477 finsn = *(unsigned short *) (regs->pc + 2);
478 } else if (nib[0] == 0x0 && nib[3] == 0x3 &&
479 (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */
480 nextpc = regs->pc + 4 + regs->regs[nib[1]];
481 finsn = *(unsigned short *) (regs->pc + 2);
482 } else if (insn == 0x000b) { /* rts */
483 nextpc = regs->pr;
484 finsn = *(unsigned short *) (regs->pc + 2);
485 } else {
486 nextpc = regs->pc + 2;
487 finsn = insn;
488 }
489
490#define FPSCR_FPU_ERROR (1 << 17)
491
492 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */
493 struct task_struct *tsk = current;
494
495 if ((tsk->thread.fpu.hard.fpscr & FPSCR_FPU_ERROR)) {
496 /* FPU error */
497 denormal_to_double (&tsk->thread.fpu.hard,
498 (finsn >> 8) & 0xf);
499 } else
500 return 0;
501
502 regs->pc = nextpc;
503 return 1;
504 } else if ((finsn & 0xf00f) == 0xf002) { /* fmul */
505 struct task_struct *tsk = current;
506 int fpscr;
507 int n, m, prec;
508 unsigned int hx, hy;
509
510 n = (finsn >> 8) & 0xf;
511 m = (finsn >> 4) & 0xf;
512 hx = tsk->thread.fpu.hard.fp_regs[n];
513 hy = tsk->thread.fpu.hard.fp_regs[m];
514 fpscr = tsk->thread.fpu.hard.fpscr;
515 prec = fpscr & (1 << 19);
516
517 if ((fpscr & FPSCR_FPU_ERROR)
518 && (prec && ((hx & 0x7fffffff) < 0x00100000
519 || (hy & 0x7fffffff) < 0x00100000))) {
520 long long llx, lly;
521
522 /* FPU error because of denormal */
523 llx = ((long long) hx << 32)
524 | tsk->thread.fpu.hard.fp_regs[n+1];
525 lly = ((long long) hy << 32)
526 | tsk->thread.fpu.hard.fp_regs[m+1];
527 if ((hx & 0x7fffffff) >= 0x00100000)
528 llx = denormal_muld(lly, llx);
529 else
530 llx = denormal_muld(llx, lly);
531 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
532 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff;
533 } else if ((fpscr & FPSCR_FPU_ERROR)
534 && (!prec && ((hx & 0x7fffffff) < 0x00800000
535 || (hy & 0x7fffffff) < 0x00800000))) {
536 /* FPU error because of denormal */
537 if ((hx & 0x7fffffff) >= 0x00800000)
538 hx = denormal_mulf(hy, hx);
539 else
540 hx = denormal_mulf(hx, hy);
541 tsk->thread.fpu.hard.fp_regs[n] = hx;
542 } else
543 return 0;
544
545 regs->pc = nextpc;
546 return 1;
547 } else if ((finsn & 0xf00e) == 0xf000) { /* fadd, fsub */
548 struct task_struct *tsk = current;
549 int fpscr;
550 int n, m, prec;
551 unsigned int hx, hy;
552
553 n = (finsn >> 8) & 0xf;
554 m = (finsn >> 4) & 0xf;
555 hx = tsk->thread.fpu.hard.fp_regs[n];
556 hy = tsk->thread.fpu.hard.fp_regs[m];
557 fpscr = tsk->thread.fpu.hard.fpscr;
558 prec = fpscr & (1 << 19);
559
560 if ((fpscr & FPSCR_FPU_ERROR)
561 && (prec && ((hx & 0x7fffffff) < 0x00100000
562 || (hy & 0x7fffffff) < 0x00100000))) {
563 long long llx, lly;
564
565 /* FPU error because of denormal */
566 llx = ((long long) hx << 32)
567 | tsk->thread.fpu.hard.fp_regs[n+1];
568 lly = ((long long) hy << 32)
569 | tsk->thread.fpu.hard.fp_regs[m+1];
570 if ((finsn & 0xf00f) == 0xf000)
571 llx = denormal_addd(llx, lly);
572 else
573 llx = denormal_addd(llx, lly ^ (1LL << 63));
574 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
575 tsk->thread.fpu.hard.fp_regs[n+1] = llx & 0xffffffff;
576 } else if ((fpscr & FPSCR_FPU_ERROR)
577 && (!prec && ((hx & 0x7fffffff) < 0x00800000
578 || (hy & 0x7fffffff) < 0x00800000))) {
579 /* FPU error because of denormal */
580 if ((finsn & 0xf00f) == 0xf000)
581 hx = denormal_addf(hx, hy);
582 else
583 hx = denormal_addf(hx, hy ^ 0x80000000);
584 tsk->thread.fpu.hard.fp_regs[n] = hx;
585 } else
586 return 0;
587
588 regs->pc = nextpc;
589 return 1;
590 }
591
592 return 0;
593}
594
595BUILD_TRAP_HANDLER(fpu_error)
596{
597 struct task_struct *tsk = current;
598 TRAP_HANDLER_DECL;
599
600 save_fpu(tsk, regs);
601 if (ieee_fpe_handler(regs)) {
602 tsk->thread.fpu.hard.fpscr &=
603 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
604 grab_fpu(regs);
605 restore_fpu(tsk);
606 set_tsk_thread_flag(tsk, TIF_USEDFPU);
607 return;
608 }
609
610 force_sig(SIGFPE, tsk);
611}
612
613BUILD_TRAP_HANDLER(fpu_state_restore)
614{
615 struct task_struct *tsk = current;
616 TRAP_HANDLER_DECL;
617
618 grab_fpu(regs);
619 if (!user_mode(regs)) {
620 printk(KERN_ERR "BUG: FPU is used in kernel mode.\n");
621 return;
622 }
623
624 if (used_math()) {
625 /* Using the FPU again. */
626 restore_fpu(tsk);
627 } else {
628 /* First time FPU user. */
629 fpu_init();
630 set_used_math();
631 }
632 set_tsk_thread_flag(tsk, TIF_USEDFPU);
633}
diff --git a/arch/sh/kernel/cpu/sh2a/probe.c b/arch/sh/kernel/cpu/sh2a/probe.c
index 6d02465704b9..6910e2664468 100644
--- a/arch/sh/kernel/cpu/sh2a/probe.c
+++ b/arch/sh/kernel/cpu/sh2a/probe.c
@@ -3,25 +3,36 @@
3 * 3 *
4 * CPU Subtype Probing for SH-2A. 4 * CPU Subtype Probing for SH-2A.
5 * 5 *
6 * Copyright (C) 2004, 2005 Paul Mundt 6 * Copyright (C) 2004 - 2007 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details. 10 * for more details.
11 */ 11 */
12
13#include <linux/init.h> 12#include <linux/init.h>
14#include <asm/processor.h> 13#include <asm/processor.h>
15#include <asm/cache.h> 14#include <asm/cache.h>
16 15
17int __init detect_cpu_and_cache_system(void) 16int __init detect_cpu_and_cache_system(void)
18{ 17{
19 /* Just SH7206 for now .. */ 18 /* All SH-2A CPUs have support for 16 and 32-bit opcodes.. */
20 boot_cpu_data.type = CPU_SH7206;
21 boot_cpu_data.flags |= CPU_HAS_OP32; 19 boot_cpu_data.flags |= CPU_HAS_OP32;
22 20
21#if defined(CONFIG_CPU_SUBTYPE_SH7203)
22 boot_cpu_data.type = CPU_SH7203;
23 /* SH7203 has an FPU.. */
24 boot_cpu_data.flags |= CPU_HAS_FPU;
25#elif defined(CONFIG_CPU_SUBTYPE_SH7263)
26 boot_cpu_data.type = CPU_SH7263;
27 boot_cpu_data.flags |= CPU_HAS_FPU;
28#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
29 boot_cpu_data.type = CPU_SH7206;
30 /* While SH7206 has a DSP.. */
31 boot_cpu_data.flags |= CPU_HAS_DSP;
32#endif
33
23 boot_cpu_data.dcache.ways = 4; 34 boot_cpu_data.dcache.ways = 4;
24 boot_cpu_data.dcache.way_incr = (1 << 11); 35 boot_cpu_data.dcache.way_incr = (1 << 11);
25 boot_cpu_data.dcache.sets = 128; 36 boot_cpu_data.dcache.sets = 128;
26 boot_cpu_data.dcache.entry_shift = 4; 37 boot_cpu_data.dcache.entry_shift = 4;
27 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES; 38 boot_cpu_data.dcache.linesz = L1_CACHE_BYTES;
@@ -37,4 +48,3 @@ int __init detect_cpu_and_cache_system(void)
37 48
38 return 0; 49 return 0;
39} 50}
40
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7203.c b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
new file mode 100644
index 000000000000..db6ef5cecde1
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7203.c
@@ -0,0 +1,319 @@
1/*
2 * SH7203 and SH7263 Setup
3 *
4 * Copyright (C) 2007 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/platform_device.h>
11#include <linux/init.h>
12#include <linux/serial.h>
13#include <asm/sci.h>
14
15enum {
16 UNUSED = 0,
17
18 /* interrupt sources */
19 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
20 PINT0, PINT1, PINT2, PINT3, PINT4, PINT5, PINT6, PINT7,
21 DMAC0_DEI, DMAC0_HEI, DMAC1_DEI, DMAC1_HEI,
22 DMAC2_DEI, DMAC2_HEI, DMAC3_DEI, DMAC3_HEI,
23 DMAC4_DEI, DMAC4_HEI, DMAC5_DEI, DMAC5_HEI,
24 DMAC6_DEI, DMAC6_HEI, DMAC7_DEI, DMAC7_HEI,
25 USB, LCDC, CMT0, CMT1, BSC, WDT,
26 MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D,
27 MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F,
28 MTU2_TGI1A, MTU2_TGI1B, MTU2_TCI1V, MTU2_TCI1U,
29 MTU2_TGI2A, MTU2_TGI2B, MTU2_TCI2V, MTU2_TCI2U,
30 MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D, MTU2_TCI3V,
31 MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D, MTU2_TCI4V,
32 ADC_ADI,
33 IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI, IIC30_TEI,
34 IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI, IIC31_TEI,
35 IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI, IIC32_TEI,
36 IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI, IIC33_TEI,
37 SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI,
38 SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI,
39 SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI,
40 SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI,
41 SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI,
42 SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI,
43 SSI0_SSII, SSI1_SSII, SSI2_SSII, SSI3_SSII,
44
45 /* ROM-DEC, SDHI, SRC, and IEB are SH7263 specific */
46 ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG, ROMDEC_ISEC, ROMDEC_IBUF,
47 ROMDEC_IREADY,
48
49 FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I, FLCTL_FLTREQ1I,
50
51 SDHI3, SDHI0, SDHI1,
52
53 RTC_ARM, RTC_PRD, RTC_CUP,
54 RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1, RCAN0_SLE,
55 RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1, RCAN1_SLE,
56
57 SRC_OVF, SRC_ODFI, SRC_IDEI, IEBI,
58
59 /* interrupt groups */
60 PINT, DMAC0, DMAC1, DMAC2, DMAC3, DMAC4, DMAC5, DMAC6, DMAC7,
61 MTU0_ABCD, MTU0_VEF, MTU1_AB, MTU1_VU, MTU2_AB, MTU2_VU,
62 MTU3_ABCD, MTU4_ABCD,
63 IIC30, IIC31, IIC32, IIC33, SCIF0, SCIF1, SCIF2, SCIF3,
64 SSU0, SSU1, ROMDEC, SDHI, FLCTL, RTC, RCAN0, RCAN1, SRC
65};
66
67static struct intc_vect vectors[] __initdata = {
68 INTC_IRQ(IRQ0, 64), INTC_IRQ(IRQ1, 65),
69 INTC_IRQ(IRQ2, 66), INTC_IRQ(IRQ3, 67),
70 INTC_IRQ(IRQ4, 68), INTC_IRQ(IRQ5, 69),
71 INTC_IRQ(IRQ6, 70), INTC_IRQ(IRQ7, 71),
72 INTC_IRQ(PINT0, 80), INTC_IRQ(PINT1, 81),
73 INTC_IRQ(PINT2, 82), INTC_IRQ(PINT3, 83),
74 INTC_IRQ(PINT4, 84), INTC_IRQ(PINT5, 85),
75 INTC_IRQ(PINT6, 86), INTC_IRQ(PINT7, 87),
76 INTC_IRQ(DMAC0_DEI, 108), INTC_IRQ(DMAC0_HEI, 109),
77 INTC_IRQ(DMAC1_DEI, 112), INTC_IRQ(DMAC1_HEI, 113),
78 INTC_IRQ(DMAC2_DEI, 116), INTC_IRQ(DMAC2_HEI, 117),
79 INTC_IRQ(DMAC3_DEI, 120), INTC_IRQ(DMAC3_HEI, 121),
80 INTC_IRQ(DMAC4_DEI, 124), INTC_IRQ(DMAC4_HEI, 125),
81 INTC_IRQ(DMAC5_DEI, 128), INTC_IRQ(DMAC5_HEI, 129),
82 INTC_IRQ(DMAC6_DEI, 132), INTC_IRQ(DMAC6_HEI, 133),
83 INTC_IRQ(DMAC7_DEI, 136), INTC_IRQ(DMAC7_HEI, 137),
84 INTC_IRQ(USB, 140), INTC_IRQ(LCDC, 141),
85 INTC_IRQ(CMT0, 142), INTC_IRQ(CMT1, 143),
86 INTC_IRQ(BSC, 144), INTC_IRQ(WDT, 145),
87 INTC_IRQ(MTU2_TGI0A, 146), INTC_IRQ(MTU2_TGI0B, 147),
88 INTC_IRQ(MTU2_TGI0C, 148), INTC_IRQ(MTU2_TGI0D, 149),
89 INTC_IRQ(MTU2_TCI0V, 150),
90 INTC_IRQ(MTU2_TGI0E, 151), INTC_IRQ(MTU2_TGI0F, 152),
91 INTC_IRQ(MTU2_TGI1A, 153), INTC_IRQ(MTU2_TGI1B, 154),
92 INTC_IRQ(MTU2_TCI1V, 155), INTC_IRQ(MTU2_TCI1U, 156),
93 INTC_IRQ(MTU2_TGI2A, 157), INTC_IRQ(MTU2_TGI2B, 158),
94 INTC_IRQ(MTU2_TCI2V, 159), INTC_IRQ(MTU2_TCI2U, 160),
95 INTC_IRQ(MTU2_TGI3A, 161), INTC_IRQ(MTU2_TGI3B, 162),
96 INTC_IRQ(MTU2_TGI3C, 163), INTC_IRQ(MTU2_TGI3D, 164),
97 INTC_IRQ(MTU2_TCI3V, 165),
98 INTC_IRQ(MTU2_TGI4A, 166), INTC_IRQ(MTU2_TGI4B, 167),
99 INTC_IRQ(MTU2_TGI4C, 168), INTC_IRQ(MTU2_TGI4D, 169),
100 INTC_IRQ(MTU2_TCI4V, 170),
101 INTC_IRQ(ADC_ADI, 171),
102 INTC_IRQ(IIC30_STPI, 172), INTC_IRQ(IIC30_NAKI, 173),
103 INTC_IRQ(IIC30_RXI, 174), INTC_IRQ(IIC30_TXI, 175),
104 INTC_IRQ(IIC30_TEI, 176),
105 INTC_IRQ(IIC31_STPI, 177), INTC_IRQ(IIC31_NAKI, 178),
106 INTC_IRQ(IIC31_RXI, 179), INTC_IRQ(IIC31_TXI, 180),
107 INTC_IRQ(IIC31_TEI, 181),
108 INTC_IRQ(IIC32_STPI, 182), INTC_IRQ(IIC32_NAKI, 183),
109 INTC_IRQ(IIC32_RXI, 184), INTC_IRQ(IIC32_TXI, 185),
110 INTC_IRQ(IIC32_TEI, 186),
111 INTC_IRQ(IIC33_STPI, 187), INTC_IRQ(IIC33_NAKI, 188),
112 INTC_IRQ(IIC33_RXI, 189), INTC_IRQ(IIC33_TXI, 190),
113 INTC_IRQ(IIC33_TEI, 191),
114 INTC_IRQ(SCIF0_BRI, 192), INTC_IRQ(SCIF0_ERI, 193),
115 INTC_IRQ(SCIF0_RXI, 194), INTC_IRQ(SCIF0_TXI, 195),
116 INTC_IRQ(SCIF1_BRI, 196), INTC_IRQ(SCIF1_ERI, 197),
117 INTC_IRQ(SCIF1_RXI, 198), INTC_IRQ(SCIF1_TXI, 199),
118 INTC_IRQ(SCIF2_BRI, 200), INTC_IRQ(SCIF2_ERI, 201),
119 INTC_IRQ(SCIF2_RXI, 202), INTC_IRQ(SCIF2_TXI, 203),
120 INTC_IRQ(SCIF3_BRI, 204), INTC_IRQ(SCIF3_ERI, 205),
121 INTC_IRQ(SCIF3_RXI, 206), INTC_IRQ(SCIF3_TXI, 207),
122 INTC_IRQ(SSU0_SSERI, 208), INTC_IRQ(SSU0_SSRXI, 209),
123 INTC_IRQ(SSU0_SSTXI, 210),
124 INTC_IRQ(SSU1_SSERI, 211), INTC_IRQ(SSU1_SSRXI, 212),
125 INTC_IRQ(SSU1_SSTXI, 213),
126 INTC_IRQ(SSI0_SSII, 214), INTC_IRQ(SSI1_SSII, 215),
127 INTC_IRQ(SSI2_SSII, 216), INTC_IRQ(SSI3_SSII, 217),
128 INTC_IRQ(FLCTL_FLSTEI, 224), INTC_IRQ(FLCTL_FLTENDI, 225),
129 INTC_IRQ(FLCTL_FLTREQ0I, 226), INTC_IRQ(FLCTL_FLTREQ1I, 227),
130 INTC_IRQ(RTC_ARM, 231), INTC_IRQ(RTC_PRD, 232),
131 INTC_IRQ(RTC_CUP, 233),
132 INTC_IRQ(RCAN0_ERS, 234), INTC_IRQ(RCAN0_OVR, 235),
133 INTC_IRQ(RCAN0_RM0, 236), INTC_IRQ(RCAN0_RM1, 237),
134 INTC_IRQ(RCAN0_SLE, 238),
135 INTC_IRQ(RCAN1_ERS, 239), INTC_IRQ(RCAN1_OVR, 240),
136 INTC_IRQ(RCAN1_RM0, 241), INTC_IRQ(RCAN1_RM1, 242),
137 INTC_IRQ(RCAN1_SLE, 243),
138
139 /* SH7263-specific trash */
140#ifdef CONFIG_CPU_SUBTYPE_SH7263
141 INTC_IRQ(ROMDEC_ISY, 218), INTC_IRQ(ROMDEC_IERR, 219),
142 INTC_IRQ(ROMDEC_IARG, 220), INTC_IRQ(ROMDEC_ISEC, 221),
143 INTC_IRQ(ROMDEC_IBUF, 222), INTC_IRQ(ROMDEC_IREADY, 223),
144
145 INTC_IRQ(SDHI3, 228), INTC_IRQ(SDHI0, 229), INTC_IRQ(SDHI1, 230),
146
147 INTC_IRQ(SRC_OVF, 244), INTC_IRQ(SRC_ODFI, 245),
148 INTC_IRQ(SRC_IDEI, 246),
149
150 INTC_IRQ(IEBI, 247),
151#endif
152};
153
154static struct intc_group groups[] __initdata = {
155 INTC_GROUP(PINT, PINT0, PINT1, PINT2, PINT3,
156 PINT4, PINT5, PINT6, PINT7),
157 INTC_GROUP(DMAC0, DMAC0_DEI, DMAC0_HEI),
158 INTC_GROUP(DMAC1, DMAC1_DEI, DMAC1_HEI),
159 INTC_GROUP(DMAC2, DMAC2_DEI, DMAC2_HEI),
160 INTC_GROUP(DMAC3, DMAC3_DEI, DMAC3_HEI),
161 INTC_GROUP(DMAC4, DMAC4_DEI, DMAC4_HEI),
162 INTC_GROUP(DMAC5, DMAC5_DEI, DMAC5_HEI),
163 INTC_GROUP(DMAC6, DMAC6_DEI, DMAC6_HEI),
164 INTC_GROUP(DMAC7, DMAC7_DEI, DMAC7_HEI),
165 INTC_GROUP(MTU0_ABCD, MTU2_TGI0A, MTU2_TGI0B, MTU2_TGI0C, MTU2_TGI0D),
166 INTC_GROUP(MTU0_VEF, MTU2_TCI0V, MTU2_TGI0E, MTU2_TGI0F),
167 INTC_GROUP(MTU1_AB, MTU2_TGI1A, MTU2_TGI1B),
168 INTC_GROUP(MTU1_VU, MTU2_TCI1V, MTU2_TCI1U),
169 INTC_GROUP(MTU2_AB, MTU2_TGI2A, MTU2_TGI2B),
170 INTC_GROUP(MTU2_VU, MTU2_TCI2V, MTU2_TCI2U),
171 INTC_GROUP(MTU3_ABCD, MTU2_TGI3A, MTU2_TGI3B, MTU2_TGI3C, MTU2_TGI3D),
172 INTC_GROUP(MTU4_ABCD, MTU2_TGI4A, MTU2_TGI4B, MTU2_TGI4C, MTU2_TGI4D),
173 INTC_GROUP(IIC30, IIC30_STPI, IIC30_NAKI, IIC30_RXI, IIC30_TXI,
174 IIC30_TEI),
175 INTC_GROUP(IIC31, IIC31_STPI, IIC31_NAKI, IIC31_RXI, IIC31_TXI,
176 IIC31_TEI),
177 INTC_GROUP(IIC32, IIC32_STPI, IIC32_NAKI, IIC32_RXI, IIC32_TXI,
178 IIC32_TEI),
179 INTC_GROUP(IIC33, IIC33_STPI, IIC33_NAKI, IIC33_RXI, IIC33_TXI,
180 IIC33_TEI),
181 INTC_GROUP(SCIF0, SCIF0_BRI, SCIF0_ERI, SCIF0_RXI, SCIF0_TXI),
182 INTC_GROUP(SCIF1, SCIF1_BRI, SCIF1_ERI, SCIF1_RXI, SCIF1_TXI),
183 INTC_GROUP(SCIF2, SCIF2_BRI, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
184 INTC_GROUP(SCIF3, SCIF3_BRI, SCIF3_ERI, SCIF3_RXI, SCIF3_TXI),
185 INTC_GROUP(SSU0, SSU0_SSERI, SSU0_SSRXI, SSU0_SSTXI),
186 INTC_GROUP(SSU1, SSU1_SSERI, SSU1_SSRXI, SSU1_SSTXI),
187 INTC_GROUP(FLCTL, FLCTL_FLSTEI, FLCTL_FLTENDI, FLCTL_FLTREQ0I,
188 FLCTL_FLTREQ1I),
189 INTC_GROUP(RTC, RTC_ARM, RTC_PRD, RTC_CUP),
190 INTC_GROUP(RCAN0, RCAN0_ERS, RCAN0_OVR, RCAN0_RM0, RCAN0_RM1,
191 RCAN0_SLE),
192 INTC_GROUP(RCAN1, RCAN1_ERS, RCAN1_OVR, RCAN1_RM0, RCAN1_RM1,
193 RCAN1_SLE),
194
195#ifdef CONFIG_CPU_SUBTYPE_SH7263
196 INTC_GROUP(ROMDEC, ROMDEC_ISY, ROMDEC_IERR, ROMDEC_IARG,
197 ROMDEC_ISEC, ROMDEC_IBUF, ROMDEC_IREADY),
198 INTC_GROUP(SDHI, SDHI3, SDHI0, SDHI1),
199 INTC_GROUP(SRC, SRC_OVF, SRC_ODFI, SRC_IDEI),
200#endif
201};
202
203static struct intc_prio_reg prio_registers[] __initdata = {
204 { 0xfffe0818, 0, 16, 4, /* IPR01 */ { IRQ0, IRQ1, IRQ2, IRQ3 } },
205 { 0xfffe081a, 0, 16, 4, /* IPR02 */ { IRQ4, IRQ5, IRQ6, IRQ7 } },
206 { 0xfffe0820, 0, 16, 4, /* IPR05 */ { PINT, 0, 0, 0 } },
207 { 0xfffe0c00, 0, 16, 4, /* IPR06 */ { DMAC0, DMAC1, DMAC2, DMAC3 } },
208 { 0xfffe0c02, 0, 16, 4, /* IPR07 */ { DMAC4, DMAC5, DMAC6, DMAC7 } },
209 { 0xfffe0c04, 0, 16, 4, /* IPR08 */ { USB, LCDC, CMT0, CMT1 } },
210 { 0xfffe0c06, 0, 16, 4, /* IPR09 */ { BSC, WDT, MTU0_ABCD, MTU0_VEF } },
211 { 0xfffe0c08, 0, 16, 4, /* IPR10 */ { MTU1_AB, MTU1_VU, MTU2_AB,
212 MTU2_VU } },
213 { 0xfffe0c0a, 0, 16, 4, /* IPR11 */ { MTU3_ABCD, MTU2_TCI3V, MTU4_ABCD,
214 MTU2_TCI4V } },
215 { 0xfffe0c0c, 0, 16, 4, /* IPR12 */ { ADC_ADI, IIC30, IIC31, IIC32 } },
216 { 0xfffe0c0e, 0, 16, 4, /* IPR13 */ { IIC33, SCIF0, SCIF1, SCIF2 } },
217 { 0xfffe0c10, 0, 16, 4, /* IPR14 */ { SCIF3, SSU0, SSU1, SSI0_SSII } },
218#ifdef CONFIG_CPU_SUBTYPE_SH7203
219 { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII,
220 SSI3_SSII, 0 } },
221 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, 0, RTC, RCAN0 } },
222 { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, 0, 0, 0 } },
223#else
224 { 0xfffe0c12, 0, 16, 4, /* IPR15 */ { SSI1_SSII, SSI2_SSII,
225 SSI3_SSII, ROMDEC } },
226 { 0xfffe0c14, 0, 16, 4, /* IPR16 */ { FLCTL, SDHI, RTC, RCAN0 } },
227 { 0xfffe0c16, 0, 16, 4, /* IPR17 */ { RCAN1, SRC, IEBI, 0 } },
228#endif
229};
230
231static struct intc_mask_reg mask_registers[] __initdata = {
232 { 0xfffe0808, 0, 16, /* PINTER */
233 { 0, 0, 0, 0, 0, 0, 0, 0,
234 PINT7, PINT6, PINT5, PINT4, PINT3, PINT2, PINT1, PINT0 } },
235};
236
237static DECLARE_INTC_DESC(intc_desc, "sh7203", vectors, groups,
238 mask_registers, prio_registers, NULL);
239
240static struct plat_sci_port sci_platform_data[] = {
241 {
242 .mapbase = 0xfffe8000,
243 .flags = UPF_BOOT_AUTOCONF,
244 .type = PORT_SCIF,
245 .irqs = { 193, 194, 195, 192 },
246 }, {
247 .mapbase = 0xfffe8800,
248 .flags = UPF_BOOT_AUTOCONF,
249 .type = PORT_SCIF,
250 .irqs = { 197, 198, 199, 196 },
251 }, {
252 .mapbase = 0xfffe9000,
253 .flags = UPF_BOOT_AUTOCONF,
254 .type = PORT_SCIF,
255 .irqs = { 201, 202, 203, 200 },
256 }, {
257 .mapbase = 0xfffe9800,
258 .flags = UPF_BOOT_AUTOCONF,
259 .type = PORT_SCIF,
260 .irqs = { 205, 206, 207, 204 },
261 }, {
262 .flags = 0,
263 }
264};
265
266static struct platform_device sci_device = {
267 .name = "sh-sci",
268 .id = -1,
269 .dev = {
270 .platform_data = sci_platform_data,
271 },
272};
273
274static struct resource rtc_resources[] = {
275 [0] = {
276 .start = 0xffff2000,
277 .end = 0xffff2000 + 0x58 - 1,
278 .flags = IORESOURCE_IO,
279 },
280 [1] = {
281 /* Period IRQ */
282 .start = 232,
283 .flags = IORESOURCE_IRQ,
284 },
285 [2] = {
286 /* Carry IRQ */
287 .start = 233,
288 .flags = IORESOURCE_IRQ,
289 },
290 [3] = {
291 /* Alarm IRQ */
292 .start = 231,
293 .flags = IORESOURCE_IRQ,
294 },
295};
296
297static struct platform_device rtc_device = {
298 .name = "sh-rtc",
299 .id = -1,
300 .num_resources = ARRAY_SIZE(rtc_resources),
301 .resource = rtc_resources,
302};
303
304static struct platform_device *sh7203_devices[] __initdata = {
305 &sci_device,
306 &rtc_device,
307};
308
309static int __init sh7203_devices_setup(void)
310{
311 return platform_add_devices(sh7203_devices,
312 ARRAY_SIZE(sh7203_devices));
313}
314__initcall(sh7203_devices_setup);
315
316void __init plat_irq_setup(void)
317{
318 register_intc_controller(&intc_desc);
319}
diff --git a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
index bd745aa87222..a564425b905f 100644
--- a/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
+++ b/arch/sh/kernel/cpu/sh2a/setup-sh7206.c
@@ -167,7 +167,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
167}; 167};
168 168
169static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups, 169static DECLARE_INTC_DESC(intc_desc, "sh7206", vectors, groups,
170 NULL, mask_registers, prio_registers, NULL); 170 mask_registers, prio_registers, NULL);
171 171
172static struct plat_sci_port sci_platform_data[] = { 172static struct plat_sci_port sci_platform_data[] = {
173 { 173 {
diff --git a/arch/sh/kernel/cpu/sh3/Makefile b/arch/sh/kernel/cpu/sh3/Makefile
index 646eb6933614..3ae4d9111f19 100644
--- a/arch/sh/kernel/cpu/sh3/Makefile
+++ b/arch/sh/kernel/cpu/sh3/Makefile
@@ -13,6 +13,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SH7709) += setup-sh770x.o
13obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o 13obj-$(CONFIG_CPU_SUBTYPE_SH7710) += setup-sh7710.o
14obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o 14obj-$(CONFIG_CPU_SUBTYPE_SH7712) += setup-sh7710.o
15obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o 15obj-$(CONFIG_CPU_SUBTYPE_SH7720) += setup-sh7720.o
16obj-$(CONFIG_CPU_SUBTYPE_SH7721) += setup-sh7720.o
16 17
17# Primary on-chip clocks (common) 18# Primary on-chip clocks (common)
18clock-$(CONFIG_CPU_SH3) := clock-sh3.o 19clock-$(CONFIG_CPU_SH3) := clock-sh3.o
@@ -21,5 +22,6 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7706) := clock-sh7706.o
21clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o 22clock-$(CONFIG_CPU_SUBTYPE_SH7709) := clock-sh7709.o
22clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o 23clock-$(CONFIG_CPU_SUBTYPE_SH7710) := clock-sh7710.o
23clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o 24clock-$(CONFIG_CPU_SUBTYPE_SH7720) := clock-sh7710.o
25clock-$(CONFIG_CPU_SUBTYPE_SH7712) := clock-sh7712.o
24 26
25obj-y += $(clock-y) 27obj-y += $(clock-y)
diff --git a/arch/sh/kernel/cpu/sh3/clock-sh7712.c b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
new file mode 100644
index 000000000000..54f54df51ef0
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh3/clock-sh7712.c
@@ -0,0 +1,71 @@
1/*
2 * arch/sh/kernel/cpu/sh3/clock-sh7712.c
3 *
4 * SH7712 support for the clock framework
5 *
6 * Copyright (C) 2007 Andrew Murray <amurray@mpc-data.co.uk>
7 *
8 * Based on arch/sh/kernel/cpu/sh3/clock-sh3.c
9 * Copyright (C) 2005 Paul Mundt
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <linux/init.h>
16#include <linux/kernel.h>
17#include <asm/clock.h>
18#include <asm/freq.h>
19#include <asm/io.h>
20
21static int multipliers[] = { 1, 2, 3 };
22static int divisors[] = { 1, 2, 3, 4, 6 };
23
24static void master_clk_init(struct clk *clk)
25{
26 int frqcr = ctrl_inw(FRQCR);
27 int idx = (frqcr & 0x0300) >> 8;
28
29 clk->rate *= multipliers[idx];
30}
31
32static struct clk_ops sh7712_master_clk_ops = {
33 .init = master_clk_init,
34};
35
36static void module_clk_recalc(struct clk *clk)
37{
38 int frqcr = ctrl_inw(FRQCR);
39 int idx = frqcr & 0x0007;
40
41 clk->rate = clk->parent->rate / divisors[idx];
42}
43
44static struct clk_ops sh7712_module_clk_ops = {
45 .recalc = module_clk_recalc,
46};
47
48static void cpu_clk_recalc(struct clk *clk)
49{
50 int frqcr = ctrl_inw(FRQCR);
51 int idx = (frqcr & 0x0030) >> 4;
52
53 clk->rate = clk->parent->rate / divisors[idx];
54}
55
56static struct clk_ops sh7712_cpu_clk_ops = {
57 .recalc = cpu_clk_recalc,
58};
59
60static struct clk_ops *sh7712_clk_ops[] = {
61 &sh7712_master_clk_ops,
62 &sh7712_module_clk_ops,
63 &sh7712_cpu_clk_ops,
64};
65
66void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
67{
68 if (idx < ARRAY_SIZE(sh7712_clk_ops))
69 *ops = sh7712_clk_ops[idx];
70}
71
diff --git a/arch/sh/kernel/cpu/sh3/entry.S b/arch/sh/kernel/cpu/sh3/entry.S
index 0d12a124055c..4004073f98cd 100644
--- a/arch/sh/kernel/cpu/sh3/entry.S
+++ b/arch/sh/kernel/cpu/sh3/entry.S
@@ -13,8 +13,9 @@
13#include <linux/linkage.h> 13#include <linux/linkage.h>
14#include <asm/asm-offsets.h> 14#include <asm/asm-offsets.h>
15#include <asm/thread_info.h> 15#include <asm/thread_info.h>
16#include <asm/cpu/mmu_context.h>
17#include <asm/unistd.h> 16#include <asm/unistd.h>
17#include <asm/cpu/mmu_context.h>
18#include <asm/page.h>
18 19
19! NOTE: 20! NOTE:
20! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address 21! GNU as (as of 2.9.1) changes bf/s into bt/s and bra, when the address
@@ -409,6 +410,27 @@ ENTRY(handle_exception)
409 ! Using k0, k1 for scratch registers (r0_bank1, r1_bank), 410 ! Using k0, k1 for scratch registers (r0_bank1, r1_bank),
410 ! save all registers onto stack. 411 ! save all registers onto stack.
411 ! 412 !
413
414#ifdef CONFIG_GUSA
415 ! Check for roll back gRB (User and Kernel)
416 mov r15, k0
417 shll k0
418 bf/s 1f
419 shll k0
420 bf/s 1f
421 stc spc, k1
422 stc r0_bank, k0
423 cmp/hs k0, k1 ! test k1 (saved PC) >= k0 (saved r0)
424 bt/s 2f
425 stc r1_bank, k1
426
427 add #-2, k0
428 add r15, k0
429 ldc k0, spc ! PC = saved r0 + r15 - 2
4302: mov k1, r15 ! SP = r1
4311:
432#endif
433
412 stc ssr, k0 ! Is it from kernel space? 434 stc ssr, k0 ! Is it from kernel space?
413 shll k0 ! Check MD bit (bit30) by shifting it into... 435 shll k0 ! Check MD bit (bit30) by shifting it into...
414 shll k0 ! ...the T bit 436 shll k0 ! ...the T bit
diff --git a/arch/sh/kernel/cpu/sh3/ex.S b/arch/sh/kernel/cpu/sh3/ex.S
index b6abf38d3a8d..11b6d9c6edae 100644
--- a/arch/sh/kernel/cpu/sh3/ex.S
+++ b/arch/sh/kernel/cpu/sh3/ex.S
@@ -36,7 +36,7 @@ ENTRY(exception_handling_table)
36 .long exception_error ! address error store /* 100 */ 36 .long exception_error ! address error store /* 100 */
37#endif 37#endif
38#if defined(CONFIG_SH_FPU) 38#if defined(CONFIG_SH_FPU)
39 .long do_fpu_error /* 120 */ 39 .long fpu_error_trap_handler /* 120 */
40#else 40#else
41 .long exception_error /* 120 */ 41 .long exception_error /* 120 */
42#endif 42#endif
diff --git a/arch/sh/kernel/cpu/sh3/probe.c b/arch/sh/kernel/cpu/sh3/probe.c
index bf579e061e09..fcc80bb7bee7 100644
--- a/arch/sh/kernel/cpu/sh3/probe.c
+++ b/arch/sh/kernel/cpu/sh3/probe.c
@@ -16,11 +16,11 @@
16#include <asm/cache.h> 16#include <asm/cache.h>
17#include <asm/io.h> 17#include <asm/io.h>
18 18
19int __init detect_cpu_and_cache_system(void) 19int __uses_jump_to_uncached detect_cpu_and_cache_system(void)
20{ 20{
21 unsigned long addr0, addr1, data0, data1, data2, data3; 21 unsigned long addr0, addr1, data0, data1, data2, data3;
22 22
23 jump_to_P2(); 23 jump_to_uncached();
24 /* 24 /*
25 * Check if the entry shadows or not. 25 * Check if the entry shadows or not.
26 * When shadowed, it's 128-entry system. 26 * When shadowed, it's 128-entry system.
@@ -48,7 +48,7 @@ int __init detect_cpu_and_cache_system(void)
48 ctrl_outl(data0&~SH_CACHE_VALID, addr0); 48 ctrl_outl(data0&~SH_CACHE_VALID, addr0);
49 ctrl_outl(data2&~SH_CACHE_VALID, addr1); 49 ctrl_outl(data2&~SH_CACHE_VALID, addr1);
50 50
51 back_to_P1(); 51 back_to_cached();
52 52
53 boot_cpu_data.dcache.ways = 4; 53 boot_cpu_data.dcache.ways = 4;
54 boot_cpu_data.dcache.entry_shift = 4; 54 boot_cpu_data.dcache.entry_shift = 4;
@@ -84,6 +84,9 @@ int __init detect_cpu_and_cache_system(void)
84#if defined(CONFIG_CPU_SUBTYPE_SH7720) 84#if defined(CONFIG_CPU_SUBTYPE_SH7720)
85 boot_cpu_data.type = CPU_SH7720; 85 boot_cpu_data.type = CPU_SH7720;
86#endif 86#endif
87#if defined(CONFIG_CPU_SUBTYPE_SH7721)
88 boot_cpu_data.type = CPU_SH7721;
89#endif
87#if defined(CONFIG_CPU_SUBTYPE_SH7705) 90#if defined(CONFIG_CPU_SUBTYPE_SH7705)
88 boot_cpu_data.type = CPU_SH7705; 91 boot_cpu_data.type = CPU_SH7705;
89 92
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7705.c b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
index f6c65f2659e9..dd0a20a685f7 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7705.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7705.c
@@ -66,12 +66,6 @@ static struct intc_group groups[] __initdata = {
66 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI), 66 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_TXI),
67}; 67};
68 68
69static struct intc_prio priorities[] __initdata = {
70 INTC_PRIO(DMAC, 7),
71 INTC_PRIO(SCIF2, 3),
72 INTC_PRIO(SCIF0, 3),
73};
74
75static struct intc_prio_reg prio_registers[] __initdata = { 69static struct intc_prio_reg prio_registers[] __initdata = {
76 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 70 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
77 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } }, 71 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, 0, 0 } },
@@ -85,7 +79,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
85}; 79};
86 80
87static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups, 81static DECLARE_INTC_DESC(intc_desc, "sh7705", vectors, groups,
88 priorities, NULL, prio_registers, NULL); 82 NULL, prio_registers, NULL);
89 83
90static struct intc_vect vectors_irq[] __initdata = { 84static struct intc_vect vectors_irq[] __initdata = {
91 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 85 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
@@ -93,7 +87,7 @@ static struct intc_vect vectors_irq[] __initdata = {
93}; 87};
94 88
95static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL, 89static DECLARE_INTC_DESC(intc_desc_irq, "sh7705-irq", vectors_irq, NULL,
96 priorities, NULL, prio_registers, NULL); 90 NULL, prio_registers, NULL);
97 91
98static struct plat_sci_port sci_platform_data[] = { 92static struct plat_sci_port sci_platform_data[] = {
99 { 93 {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh770x.c b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
index 60b04b1f9453..969804bb523b 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh770x.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh770x.c
@@ -81,13 +81,6 @@ static struct intc_group groups[] __initdata = {
81 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI), 81 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
82}; 82};
83 83
84static struct intc_prio priorities[] __initdata = {
85 INTC_PRIO(DMAC, 7),
86 INTC_PRIO(SCI, 3),
87 INTC_PRIO(SCIF2, 3),
88 INTC_PRIO(SCIF0, 3),
89};
90
91static struct intc_prio_reg prio_registers[] __initdata = { 84static struct intc_prio_reg prio_registers[] __initdata = {
92 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 85 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
93 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } }, 86 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, SCI, 0 } },
@@ -109,7 +102,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
109}; 102};
110 103
111static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups, 104static DECLARE_INTC_DESC(intc_desc, "sh770x", vectors, groups,
112 priorities, NULL, prio_registers, NULL); 105 NULL, prio_registers, NULL);
113 106
114#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \ 107#if defined(CONFIG_CPU_SUBTYPE_SH7706) || \
115 defined(CONFIG_CPU_SUBTYPE_SH7707) || \ 108 defined(CONFIG_CPU_SUBTYPE_SH7707) || \
@@ -120,7 +113,7 @@ static struct intc_vect vectors_irq[] __initdata = {
120}; 113};
121 114
122static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL, 115static DECLARE_INTC_DESC(intc_desc_irq, "sh770x-irq", vectors_irq, NULL,
123 priorities, NULL, prio_registers, NULL); 116 NULL, prio_registers, NULL);
124#endif 117#endif
125 118
126static struct resource rtc_resources[] = { 119static struct resource rtc_resources[] = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7710.c b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
index 84e5629fa841..0cc0e2bf135d 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7710.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7710.c
@@ -73,18 +73,6 @@ static struct intc_group groups[] __initdata = {
73 INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI), 73 INTC_GROUP(SIOF1, SIOF1_ERI, SIOF1_TXI, SIOF1_RXI, SIOF1_CCI),
74}; 74};
75 75
76static struct intc_prio priorities[] __initdata = {
77 INTC_PRIO(DMAC1, 7),
78 INTC_PRIO(DMAC2, 7),
79 INTC_PRIO(SCIF0, 3),
80 INTC_PRIO(SCIF1, 3),
81 INTC_PRIO(SIOF0, 3),
82 INTC_PRIO(SIOF1, 3),
83 INTC_PRIO(EDMAC0, 5),
84 INTC_PRIO(EDMAC1, 5),
85 INTC_PRIO(EDMAC2, 5),
86};
87
88static struct intc_prio_reg prio_registers[] __initdata = { 76static struct intc_prio_reg prio_registers[] __initdata = {
89 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 77 { 0xfffffee2, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
90 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } }, 78 { 0xfffffee4, 0, 16, 4, /* IPRB */ { WDT, REF, 0, 0 } },
@@ -101,7 +89,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
101}; 89};
102 90
103static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups, 91static DECLARE_INTC_DESC(intc_desc, "sh7710", vectors, groups,
104 priorities, NULL, prio_registers, NULL); 92 NULL, prio_registers, NULL);
105 93
106static struct intc_vect vectors_irq[] __initdata = { 94static struct intc_vect vectors_irq[] __initdata = {
107 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620), 95 INTC_VECT(IRQ0, 0x600), INTC_VECT(IRQ1, 0x620),
@@ -109,7 +97,7 @@ static struct intc_vect vectors_irq[] __initdata = {
109}; 97};
110 98
111static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL, 99static DECLARE_INTC_DESC(intc_desc_irq, "sh7710-irq", vectors_irq, NULL,
112 priorities, NULL, prio_registers, NULL); 100 NULL, prio_registers, NULL);
113 101
114static struct resource rtc_resources[] = { 102static struct resource rtc_resources[] = {
115 [0] = { 103 [0] = {
diff --git a/arch/sh/kernel/cpu/sh3/setup-sh7720.c b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
index a0929b8a95ae..3855ea4c21c8 100644
--- a/arch/sh/kernel/cpu/sh3/setup-sh7720.c
+++ b/arch/sh/kernel/cpu/sh3/setup-sh7720.c
@@ -85,9 +85,62 @@ static struct platform_device sci_device = {
85 }, 85 },
86}; 86};
87 87
88static struct resource usb_ohci_resources[] = {
89 [0] = {
90 .start = 0xA4428000,
91 .end = 0xA44280FF,
92 .flags = IORESOURCE_MEM,
93 },
94 [1] = {
95 .start = 67,
96 .end = 67,
97 .flags = IORESOURCE_IRQ,
98 },
99};
100
101static u64 usb_ohci_dma_mask = 0xffffffffUL;
102static struct platform_device usb_ohci_device = {
103 .name = "sh_ohci",
104 .id = -1,
105 .dev = {
106 .dma_mask = &usb_ohci_dma_mask,
107 .coherent_dma_mask = 0xffffffff,
108 },
109 .num_resources = ARRAY_SIZE(usb_ohci_resources),
110 .resource = usb_ohci_resources,
111};
112
113static struct resource usbf_resources[] = {
114 [0] = {
115 .name = "sh_udc",
116 .start = 0xA4420000,
117 .end = 0xA44200FF,
118 .flags = IORESOURCE_MEM,
119 },
120 [1] = {
121 .name = "sh_udc",
122 .start = 65,
123 .end = 65,
124 .flags = IORESOURCE_IRQ,
125 },
126};
127
128static struct platform_device usbf_device = {
129 .name = "sh_udc",
130 .id = -1,
131 .dev = {
132 .dma_mask = NULL,
133 .coherent_dma_mask = 0xffffffff,
134 },
135 .num_resources = ARRAY_SIZE(usbf_resources),
136 .resource = usbf_resources,
137};
138
88static struct platform_device *sh7720_devices[] __initdata = { 139static struct platform_device *sh7720_devices[] __initdata = {
89 &rtc_device, 140 &rtc_device,
90 &sci_device, 141 &sci_device,
142 &usb_ohci_device,
143 &usbf_device,
91}; 144};
92 145
93static int __init sh7720_devices_setup(void) 146static int __init sh7720_devices_setup(void)
@@ -127,8 +180,11 @@ static struct intc_vect vectors[] __initdata = {
127 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800), 180 INTC_VECT(USBF_SPD, 0x6e0), INTC_VECT(DMAC1_DEI0, 0x800),
128 INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840), 181 INTC_VECT(DMAC1_DEI1, 0x820), INTC_VECT(DMAC1_DEI2, 0x840),
129 INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900), 182 INTC_VECT(DMAC1_DEI3, 0x860), INTC_VECT(LCDC, 0x900),
130 INTC_VECT(SSL, 0x980), INTC_VECT(USBFI0, 0xa20), 183#if defined(CONFIG_CPU_SUBTYPE_SH7720)
131 INTC_VECT(USBFI1, 0xa40), INTC_VECT(USBHI, 0xa60), 184 INTC_VECT(SSL, 0x980),
185#endif
186 INTC_VECT(USBFI0, 0xa20), INTC_VECT(USBFI1, 0xa40),
187 INTC_VECT(USBHI, 0xa60),
132 INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0), 188 INTC_VECT(DMAC2_DEI4, 0xb80), INTC_VECT(DMAC2_DEI5, 0xba0),
133 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00), 189 INTC_VECT(ADC, 0xbe0), INTC_VECT(SCIF0, 0xc00),
134 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80), 190 INTC_VECT(SCIF1, 0xc20), INTC_VECT(PINT07, 0xc80),
@@ -153,22 +209,16 @@ static struct intc_group groups[] __initdata = {
153 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3), 209 INTC_GROUP(MMC, MMCI0, MMCI1, MMCI2, MMCI3),
154}; 210};
155 211
156static struct intc_prio priorities[] __initdata = {
157 INTC_PRIO(SCIF0, 2),
158 INTC_PRIO(SCIF1, 2),
159 INTC_PRIO(DMAC1, 1),
160 INTC_PRIO(DMAC2, 1),
161 INTC_PRIO(RTC, 2),
162 INTC_PRIO(TMU, 2),
163 INTC_PRIO(TPU, 2),
164};
165
166static struct intc_prio_reg prio_registers[] __initdata = { 212static struct intc_prio_reg prio_registers[] __initdata = {
167 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 213 { 0xA414FEE2UL, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
168 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } }, 214 { 0xA414FEE4UL, 0, 16, 4, /* IPRB */ { WDT, REF_RCMI, SIM, 0 } },
169 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } }, 215 { 0xA4140016UL, 0, 16, 4, /* IPRC */ { IRQ3, IRQ2, IRQ1, IRQ0 } },
170 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } }, 216 { 0xA4140018UL, 0, 16, 4, /* IPRD */ { USBF_SPD, TMU_SUNI, IRQ5, IRQ4 } },
217#if defined(CONFIG_CPU_SUBTYPE_SH7720)
171 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } }, 218 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, SSL } },
219#else
220 { 0xA414001AUL, 0, 16, 4, /* IPRE */ { DMAC1, 0, LCDC, 0 } },
221#endif
172 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } }, 222 { 0xA4080000UL, 0, 16, 4, /* IPRF */ { ADC, DMAC2, USBFI, CMT } },
173 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } }, 223 { 0xA4080002UL, 0, 16, 4, /* IPRG */ { SCIF0, SCIF1, 0, 0 } },
174 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } }, 224 { 0xA4080004UL, 0, 16, 4, /* IPRH */ { PINT07, PINT815, TPU, IIC } },
@@ -177,7 +227,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
177}; 227};
178 228
179static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups, 229static DECLARE_INTC_DESC(intc_desc, "sh7720", vectors, groups,
180 priorities, NULL, prio_registers, NULL); 230 NULL, prio_registers, NULL);
181 231
182static struct intc_sense_reg sense_registers[] __initdata = { 232static struct intc_sense_reg sense_registers[] __initdata = {
183 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } }, 233 { INTC_ICR1, 16, 2, { 0, 0, IRQ5, IRQ4, IRQ3, IRQ2, IRQ1, IRQ0 } },
@@ -190,7 +240,7 @@ static struct intc_vect vectors_irq[] __initdata = {
190}; 240};
191 241
192static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq, 242static DECLARE_INTC_DESC(intc_irq_desc, "sh7720-irq", vectors_irq,
193 NULL, priorities, NULL, prio_registers, sense_registers); 243 NULL, NULL, prio_registers, sense_registers);
194 244
195void __init plat_irq_setup_pins(int mode) 245void __init plat_irq_setup_pins(int mode)
196{ 246{
diff --git a/arch/sh/kernel/cpu/sh4/Makefile b/arch/sh/kernel/cpu/sh4/Makefile
index dadd6bffc128..d608557c7a3f 100644
--- a/arch/sh/kernel/cpu/sh4/Makefile
+++ b/arch/sh/kernel/cpu/sh4/Makefile
@@ -5,7 +5,7 @@
5obj-y := probe.o common.o 5obj-y := probe.o common.o
6common-y += $(addprefix ../sh3/, entry.o ex.o) 6common-y += $(addprefix ../sh3/, entry.o ex.o)
7 7
8obj-$(CONFIG_SH_FPU) += fpu.o 8obj-$(CONFIG_SH_FPU) += fpu.o softfloat.o
9obj-$(CONFIG_SH_STORE_QUEUES) += sq.o 9obj-$(CONFIG_SH_STORE_QUEUES) += sq.o
10 10
11# CPU subtype setup 11# CPU subtype setup
diff --git a/arch/sh/kernel/cpu/sh4/fpu.c b/arch/sh/kernel/cpu/sh4/fpu.c
index c5a4fc77fa06..817f9939cda6 100644
--- a/arch/sh/kernel/cpu/sh4/fpu.c
+++ b/arch/sh/kernel/cpu/sh4/fpu.c
@@ -1,7 +1,4 @@
1/* $Id: fpu.c,v 1.4 2004/01/13 05:52:11 kkojima Exp $ 1/*
2 *
3 * linux/arch/sh/kernel/fpu.c
4 *
5 * Save/restore floating point context for signal handlers. 2 * Save/restore floating point context for signal handlers.
6 * 3 *
7 * This file is subject to the terms and conditions of the GNU General Public 4 * This file is subject to the terms and conditions of the GNU General Public
@@ -9,15 +6,16 @@
9 * for more details. 6 * for more details.
10 * 7 *
11 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 8 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
9 * Copyright (C) 2006 ST Microelectronics Ltd. (denorm support)
12 * 10 *
13 * FIXME! These routines can be optimized in big endian case. 11 * FIXME! These routines have not been tested for big endian case.
14 */ 12 */
15
16#include <linux/sched.h> 13#include <linux/sched.h>
17#include <linux/signal.h> 14#include <linux/signal.h>
15#include <linux/io.h>
16#include <asm/cpu/fpu.h>
18#include <asm/processor.h> 17#include <asm/processor.h>
19#include <asm/system.h> 18#include <asm/system.h>
20#include <asm/io.h>
21 19
22/* The PR (precision) bit in the FP Status Register must be clear when 20/* The PR (precision) bit in the FP Status Register must be clear when
23 * an frchg instruction is executed, otherwise the instruction is undefined. 21 * an frchg instruction is executed, otherwise the instruction is undefined.
@@ -25,177 +23,184 @@
25 */ 23 */
26 24
27#define FPSCR_RCHG 0x00000000 25#define FPSCR_RCHG 0x00000000
26extern unsigned long long float64_div(unsigned long long a,
27 unsigned long long b);
28extern unsigned long int float32_div(unsigned long int a, unsigned long int b);
29extern unsigned long long float64_mul(unsigned long long a,
30 unsigned long long b);
31extern unsigned long int float32_mul(unsigned long int a, unsigned long int b);
32extern unsigned long long float64_add(unsigned long long a,
33 unsigned long long b);
34extern unsigned long int float32_add(unsigned long int a, unsigned long int b);
35extern unsigned long long float64_sub(unsigned long long a,
36 unsigned long long b);
37extern unsigned long int float32_sub(unsigned long int a, unsigned long int b);
28 38
39static unsigned int fpu_exception_flags;
29 40
30/* 41/*
31 * Save FPU registers onto task structure. 42 * Save FPU registers onto task structure.
32 * Assume called with FPU enabled (SR.FD=0). 43 * Assume called with FPU enabled (SR.FD=0).
33 */ 44 */
34void 45void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
35save_fpu(struct task_struct *tsk, struct pt_regs *regs)
36{ 46{
37 unsigned long dummy; 47 unsigned long dummy;
38 48
39 clear_tsk_thread_flag(tsk, TIF_USEDFPU); 49 clear_tsk_thread_flag(tsk, TIF_USEDFPU);
40 enable_fpu(); 50 enable_fpu();
41 asm volatile("sts.l fpul, @-%0\n\t" 51 asm volatile ("sts.l fpul, @-%0\n\t"
42 "sts.l fpscr, @-%0\n\t" 52 "sts.l fpscr, @-%0\n\t"
43 "lds %2, fpscr\n\t" 53 "lds %2, fpscr\n\t"
44 "frchg\n\t" 54 "frchg\n\t"
45 "fmov.s fr15, @-%0\n\t" 55 "fmov.s fr15, @-%0\n\t"
46 "fmov.s fr14, @-%0\n\t" 56 "fmov.s fr14, @-%0\n\t"
47 "fmov.s fr13, @-%0\n\t" 57 "fmov.s fr13, @-%0\n\t"
48 "fmov.s fr12, @-%0\n\t" 58 "fmov.s fr12, @-%0\n\t"
49 "fmov.s fr11, @-%0\n\t" 59 "fmov.s fr11, @-%0\n\t"
50 "fmov.s fr10, @-%0\n\t" 60 "fmov.s fr10, @-%0\n\t"
51 "fmov.s fr9, @-%0\n\t" 61 "fmov.s fr9, @-%0\n\t"
52 "fmov.s fr8, @-%0\n\t" 62 "fmov.s fr8, @-%0\n\t"
53 "fmov.s fr7, @-%0\n\t" 63 "fmov.s fr7, @-%0\n\t"
54 "fmov.s fr6, @-%0\n\t" 64 "fmov.s fr6, @-%0\n\t"
55 "fmov.s fr5, @-%0\n\t" 65 "fmov.s fr5, @-%0\n\t"
56 "fmov.s fr4, @-%0\n\t" 66 "fmov.s fr4, @-%0\n\t"
57 "fmov.s fr3, @-%0\n\t" 67 "fmov.s fr3, @-%0\n\t"
58 "fmov.s fr2, @-%0\n\t" 68 "fmov.s fr2, @-%0\n\t"
59 "fmov.s fr1, @-%0\n\t" 69 "fmov.s fr1, @-%0\n\t"
60 "fmov.s fr0, @-%0\n\t" 70 "fmov.s fr0, @-%0\n\t"
61 "frchg\n\t" 71 "frchg\n\t"
62 "fmov.s fr15, @-%0\n\t" 72 "fmov.s fr15, @-%0\n\t"
63 "fmov.s fr14, @-%0\n\t" 73 "fmov.s fr14, @-%0\n\t"
64 "fmov.s fr13, @-%0\n\t" 74 "fmov.s fr13, @-%0\n\t"
65 "fmov.s fr12, @-%0\n\t" 75 "fmov.s fr12, @-%0\n\t"
66 "fmov.s fr11, @-%0\n\t" 76 "fmov.s fr11, @-%0\n\t"
67 "fmov.s fr10, @-%0\n\t" 77 "fmov.s fr10, @-%0\n\t"
68 "fmov.s fr9, @-%0\n\t" 78 "fmov.s fr9, @-%0\n\t"
69 "fmov.s fr8, @-%0\n\t" 79 "fmov.s fr8, @-%0\n\t"
70 "fmov.s fr7, @-%0\n\t" 80 "fmov.s fr7, @-%0\n\t"
71 "fmov.s fr6, @-%0\n\t" 81 "fmov.s fr6, @-%0\n\t"
72 "fmov.s fr5, @-%0\n\t" 82 "fmov.s fr5, @-%0\n\t"
73 "fmov.s fr4, @-%0\n\t" 83 "fmov.s fr4, @-%0\n\t"
74 "fmov.s fr3, @-%0\n\t" 84 "fmov.s fr3, @-%0\n\t"
75 "fmov.s fr2, @-%0\n\t" 85 "fmov.s fr2, @-%0\n\t"
76 "fmov.s fr1, @-%0\n\t" 86 "fmov.s fr1, @-%0\n\t"
77 "fmov.s fr0, @-%0\n\t" 87 "fmov.s fr0, @-%0\n\t"
78 "lds %3, fpscr\n\t" 88 "lds %3, fpscr\n\t":"=r" (dummy)
79 : "=r" (dummy) 89 :"0"((char *)(&tsk->thread.fpu.hard.status)),
80 : "0" ((char *)(&tsk->thread.fpu.hard.status)), 90 "r"(FPSCR_RCHG), "r"(FPSCR_INIT)
81 "r" (FPSCR_RCHG), 91 :"memory");
82 "r" (FPSCR_INIT) 92
83 : "memory"); 93 disable_fpu();
84 94 release_fpu(regs);
85 disable_fpu();
86 release_fpu(regs);
87} 95}
88 96
89static void 97static void restore_fpu(struct task_struct *tsk)
90restore_fpu(struct task_struct *tsk)
91{ 98{
92 unsigned long dummy; 99 unsigned long dummy;
93 100
94 enable_fpu(); 101 enable_fpu();
95 asm volatile("lds %2, fpscr\n\t" 102 asm volatile ("lds %2, fpscr\n\t"
96 "fmov.s @%0+, fr0\n\t" 103 "fmov.s @%0+, fr0\n\t"
97 "fmov.s @%0+, fr1\n\t" 104 "fmov.s @%0+, fr1\n\t"
98 "fmov.s @%0+, fr2\n\t" 105 "fmov.s @%0+, fr2\n\t"
99 "fmov.s @%0+, fr3\n\t" 106 "fmov.s @%0+, fr3\n\t"
100 "fmov.s @%0+, fr4\n\t" 107 "fmov.s @%0+, fr4\n\t"
101 "fmov.s @%0+, fr5\n\t" 108 "fmov.s @%0+, fr5\n\t"
102 "fmov.s @%0+, fr6\n\t" 109 "fmov.s @%0+, fr6\n\t"
103 "fmov.s @%0+, fr7\n\t" 110 "fmov.s @%0+, fr7\n\t"
104 "fmov.s @%0+, fr8\n\t" 111 "fmov.s @%0+, fr8\n\t"
105 "fmov.s @%0+, fr9\n\t" 112 "fmov.s @%0+, fr9\n\t"
106 "fmov.s @%0+, fr10\n\t" 113 "fmov.s @%0+, fr10\n\t"
107 "fmov.s @%0+, fr11\n\t" 114 "fmov.s @%0+, fr11\n\t"
108 "fmov.s @%0+, fr12\n\t" 115 "fmov.s @%0+, fr12\n\t"
109 "fmov.s @%0+, fr13\n\t" 116 "fmov.s @%0+, fr13\n\t"
110 "fmov.s @%0+, fr14\n\t" 117 "fmov.s @%0+, fr14\n\t"
111 "fmov.s @%0+, fr15\n\t" 118 "fmov.s @%0+, fr15\n\t"
112 "frchg\n\t" 119 "frchg\n\t"
113 "fmov.s @%0+, fr0\n\t" 120 "fmov.s @%0+, fr0\n\t"
114 "fmov.s @%0+, fr1\n\t" 121 "fmov.s @%0+, fr1\n\t"
115 "fmov.s @%0+, fr2\n\t" 122 "fmov.s @%0+, fr2\n\t"
116 "fmov.s @%0+, fr3\n\t" 123 "fmov.s @%0+, fr3\n\t"
117 "fmov.s @%0+, fr4\n\t" 124 "fmov.s @%0+, fr4\n\t"
118 "fmov.s @%0+, fr5\n\t" 125 "fmov.s @%0+, fr5\n\t"
119 "fmov.s @%0+, fr6\n\t" 126 "fmov.s @%0+, fr6\n\t"
120 "fmov.s @%0+, fr7\n\t" 127 "fmov.s @%0+, fr7\n\t"
121 "fmov.s @%0+, fr8\n\t" 128 "fmov.s @%0+, fr8\n\t"
122 "fmov.s @%0+, fr9\n\t" 129 "fmov.s @%0+, fr9\n\t"
123 "fmov.s @%0+, fr10\n\t" 130 "fmov.s @%0+, fr10\n\t"
124 "fmov.s @%0+, fr11\n\t" 131 "fmov.s @%0+, fr11\n\t"
125 "fmov.s @%0+, fr12\n\t" 132 "fmov.s @%0+, fr12\n\t"
126 "fmov.s @%0+, fr13\n\t" 133 "fmov.s @%0+, fr13\n\t"
127 "fmov.s @%0+, fr14\n\t" 134 "fmov.s @%0+, fr14\n\t"
128 "fmov.s @%0+, fr15\n\t" 135 "fmov.s @%0+, fr15\n\t"
129 "frchg\n\t" 136 "frchg\n\t"
130 "lds.l @%0+, fpscr\n\t" 137 "lds.l @%0+, fpscr\n\t"
131 "lds.l @%0+, fpul\n\t" 138 "lds.l @%0+, fpul\n\t"
132 : "=r" (dummy) 139 :"=r" (dummy)
133 : "0" (&tsk->thread.fpu), "r" (FPSCR_RCHG) 140 :"0"(&tsk->thread.fpu), "r"(FPSCR_RCHG)
134 : "memory"); 141 :"memory");
135 disable_fpu(); 142 disable_fpu();
136} 143}
137 144
138/* 145/*
139 * Load the FPU with signalling NANS. This bit pattern we're using 146 * Load the FPU with signalling NANS. This bit pattern we're using
140 * has the property that no matter wether considered as single or as 147 * has the property that no matter wether considered as single or as
141 * double precision represents signaling NANS. 148 * double precision represents signaling NANS.
142 */ 149 */
143 150
144static void 151static void fpu_init(void)
145fpu_init(void)
146{ 152{
147 enable_fpu(); 153 enable_fpu();
148 asm volatile("lds %0, fpul\n\t" 154 asm volatile ( "lds %0, fpul\n\t"
149 "lds %1, fpscr\n\t" 155 "lds %1, fpscr\n\t"
150 "fsts fpul, fr0\n\t" 156 "fsts fpul, fr0\n\t"
151 "fsts fpul, fr1\n\t" 157 "fsts fpul, fr1\n\t"
152 "fsts fpul, fr2\n\t" 158 "fsts fpul, fr2\n\t"
153 "fsts fpul, fr3\n\t" 159 "fsts fpul, fr3\n\t"
154 "fsts fpul, fr4\n\t" 160 "fsts fpul, fr4\n\t"
155 "fsts fpul, fr5\n\t" 161 "fsts fpul, fr5\n\t"
156 "fsts fpul, fr6\n\t" 162 "fsts fpul, fr6\n\t"
157 "fsts fpul, fr7\n\t" 163 "fsts fpul, fr7\n\t"
158 "fsts fpul, fr8\n\t" 164 "fsts fpul, fr8\n\t"
159 "fsts fpul, fr9\n\t" 165 "fsts fpul, fr9\n\t"
160 "fsts fpul, fr10\n\t" 166 "fsts fpul, fr10\n\t"
161 "fsts fpul, fr11\n\t" 167 "fsts fpul, fr11\n\t"
162 "fsts fpul, fr12\n\t" 168 "fsts fpul, fr12\n\t"
163 "fsts fpul, fr13\n\t" 169 "fsts fpul, fr13\n\t"
164 "fsts fpul, fr14\n\t" 170 "fsts fpul, fr14\n\t"
165 "fsts fpul, fr15\n\t" 171 "fsts fpul, fr15\n\t"
166 "frchg\n\t" 172 "frchg\n\t"
167 "fsts fpul, fr0\n\t" 173 "fsts fpul, fr0\n\t"
168 "fsts fpul, fr1\n\t" 174 "fsts fpul, fr1\n\t"
169 "fsts fpul, fr2\n\t" 175 "fsts fpul, fr2\n\t"
170 "fsts fpul, fr3\n\t" 176 "fsts fpul, fr3\n\t"
171 "fsts fpul, fr4\n\t" 177 "fsts fpul, fr4\n\t"
172 "fsts fpul, fr5\n\t" 178 "fsts fpul, fr5\n\t"
173 "fsts fpul, fr6\n\t" 179 "fsts fpul, fr6\n\t"
174 "fsts fpul, fr7\n\t" 180 "fsts fpul, fr7\n\t"
175 "fsts fpul, fr8\n\t" 181 "fsts fpul, fr8\n\t"
176 "fsts fpul, fr9\n\t" 182 "fsts fpul, fr9\n\t"
177 "fsts fpul, fr10\n\t" 183 "fsts fpul, fr10\n\t"
178 "fsts fpul, fr11\n\t" 184 "fsts fpul, fr11\n\t"
179 "fsts fpul, fr12\n\t" 185 "fsts fpul, fr12\n\t"
180 "fsts fpul, fr13\n\t" 186 "fsts fpul, fr13\n\t"
181 "fsts fpul, fr14\n\t" 187 "fsts fpul, fr14\n\t"
182 "fsts fpul, fr15\n\t" 188 "fsts fpul, fr15\n\t"
183 "frchg\n\t" 189 "frchg\n\t"
184 "lds %2, fpscr\n\t" 190 "lds %2, fpscr\n\t"
185 : /* no output */ 191 : /* no output */
186 : "r" (0), "r" (FPSCR_RCHG), "r" (FPSCR_INIT)); 192 :"r" (0), "r"(FPSCR_RCHG), "r"(FPSCR_INIT));
187 disable_fpu(); 193 disable_fpu();
188} 194}
189 195
190/** 196/**
191 * denormal_to_double - Given denormalized float number, 197 * denormal_to_double - Given denormalized float number,
192 * store double float 198 * store double float
193 * 199 *
194 * @fpu: Pointer to sh_fpu_hard structure 200 * @fpu: Pointer to sh_fpu_hard structure
195 * @n: Index to FP register 201 * @n: Index to FP register
196 */ 202 */
197static void 203static void denormal_to_double(struct sh_fpu_hard_struct *fpu, int n)
198denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
199{ 204{
200 unsigned long du, dl; 205 unsigned long du, dl;
201 unsigned long x = fpu->fpul; 206 unsigned long x = fpu->fpul;
@@ -212,7 +217,7 @@ denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
212 dl = x << 29; 217 dl = x << 29;
213 218
214 fpu->fp_regs[n] = du; 219 fpu->fp_regs[n] = du;
215 fpu->fp_regs[n+1] = dl; 220 fpu->fp_regs[n + 1] = dl;
216 } 221 }
217} 222}
218 223
@@ -223,68 +228,191 @@ denormal_to_double (struct sh_fpu_hard_struct *fpu, int n)
223 * 228 *
224 * Returns 1 when it's handled (should not cause exception). 229 * Returns 1 when it's handled (should not cause exception).
225 */ 230 */
226static int 231static int ieee_fpe_handler(struct pt_regs *regs)
227ieee_fpe_handler (struct pt_regs *regs)
228{ 232{
229 unsigned short insn = *(unsigned short *) regs->pc; 233 unsigned short insn = *(unsigned short *)regs->pc;
230 unsigned short finsn; 234 unsigned short finsn;
231 unsigned long nextpc; 235 unsigned long nextpc;
232 int nib[4] = { 236 int nib[4] = {
233 (insn >> 12) & 0xf, 237 (insn >> 12) & 0xf,
234 (insn >> 8) & 0xf, 238 (insn >> 8) & 0xf,
235 (insn >> 4) & 0xf, 239 (insn >> 4) & 0xf,
236 insn & 0xf}; 240 insn & 0xf
237 241 };
238 if (nib[0] == 0xb || 242
239 (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb)) /* bsr & jsr */ 243 if (nib[0] == 0xb || (nib[0] == 0x4 && nib[2] == 0x0 && nib[3] == 0xb))
240 regs->pr = regs->pc + 4; 244 regs->pr = regs->pc + 4; /* bsr & jsr */
241 245
242 if (nib[0] == 0xa || nib[0] == 0xb) { /* bra & bsr */ 246 if (nib[0] == 0xa || nib[0] == 0xb) {
243 nextpc = regs->pc + 4 + ((short) ((insn & 0xfff) << 4) >> 3); 247 /* bra & bsr */
244 finsn = *(unsigned short *) (regs->pc + 2); 248 nextpc = regs->pc + 4 + ((short)((insn & 0xfff) << 4) >> 3);
245 } else if (nib[0] == 0x8 && nib[1] == 0xd) { /* bt/s */ 249 finsn = *(unsigned short *)(regs->pc + 2);
250 } else if (nib[0] == 0x8 && nib[1] == 0xd) {
251 /* bt/s */
246 if (regs->sr & 1) 252 if (regs->sr & 1)
247 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); 253 nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1);
248 else 254 else
249 nextpc = regs->pc + 4; 255 nextpc = regs->pc + 4;
250 finsn = *(unsigned short *) (regs->pc + 2); 256 finsn = *(unsigned short *)(regs->pc + 2);
251 } else if (nib[0] == 0x8 && nib[1] == 0xf) { /* bf/s */ 257 } else if (nib[0] == 0x8 && nib[1] == 0xf) {
258 /* bf/s */
252 if (regs->sr & 1) 259 if (regs->sr & 1)
253 nextpc = regs->pc + 4; 260 nextpc = regs->pc + 4;
254 else 261 else
255 nextpc = regs->pc + 4 + ((char) (insn & 0xff) << 1); 262 nextpc = regs->pc + 4 + ((char)(insn & 0xff) << 1);
256 finsn = *(unsigned short *) (regs->pc + 2); 263 finsn = *(unsigned short *)(regs->pc + 2);
257 } else if (nib[0] == 0x4 && nib[3] == 0xb && 264 } else if (nib[0] == 0x4 && nib[3] == 0xb &&
258 (nib[2] == 0x0 || nib[2] == 0x2)) { /* jmp & jsr */ 265 (nib[2] == 0x0 || nib[2] == 0x2)) {
266 /* jmp & jsr */
259 nextpc = regs->regs[nib[1]]; 267 nextpc = regs->regs[nib[1]];
260 finsn = *(unsigned short *) (regs->pc + 2); 268 finsn = *(unsigned short *)(regs->pc + 2);
261 } else if (nib[0] == 0x0 && nib[3] == 0x3 && 269 } else if (nib[0] == 0x0 && nib[3] == 0x3 &&
262 (nib[2] == 0x0 || nib[2] == 0x2)) { /* braf & bsrf */ 270 (nib[2] == 0x0 || nib[2] == 0x2)) {
271 /* braf & bsrf */
263 nextpc = regs->pc + 4 + regs->regs[nib[1]]; 272 nextpc = regs->pc + 4 + regs->regs[nib[1]];
264 finsn = *(unsigned short *) (regs->pc + 2); 273 finsn = *(unsigned short *)(regs->pc + 2);
265 } else if (insn == 0x000b) { /* rts */ 274 } else if (insn == 0x000b) {
275 /* rts */
266 nextpc = regs->pr; 276 nextpc = regs->pr;
267 finsn = *(unsigned short *) (regs->pc + 2); 277 finsn = *(unsigned short *)(regs->pc + 2);
268 } else { 278 } else {
269 nextpc = regs->pc + instruction_size(insn); 279 nextpc = regs->pc + instruction_size(insn);
270 finsn = insn; 280 finsn = insn;
271 } 281 }
272 282
273 if ((finsn & 0xf1ff) == 0xf0ad) { /* fcnvsd */ 283 if ((finsn & 0xf1ff) == 0xf0ad) {
284 /* fcnvsd */
274 struct task_struct *tsk = current; 285 struct task_struct *tsk = current;
275 286
276 save_fpu(tsk, regs); 287 save_fpu(tsk, regs);
277 if ((tsk->thread.fpu.hard.fpscr & (1 << 17))) { 288 if ((tsk->thread.fpu.hard.fpscr & FPSCR_CAUSE_ERROR))
278 /* FPU error */ 289 /* FPU error */
279 denormal_to_double (&tsk->thread.fpu.hard, 290 denormal_to_double(&tsk->thread.fpu.hard,
280 (finsn >> 8) & 0xf); 291 (finsn >> 8) & 0xf);
281 tsk->thread.fpu.hard.fpscr &= 292 else
282 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK); 293 return 0;
283 grab_fpu(regs); 294
284 restore_fpu(tsk); 295 regs->pc = nextpc;
285 set_tsk_thread_flag(tsk, TIF_USEDFPU); 296 return 1;
297 } else if ((finsn & 0xf00f) == 0xf002) {
298 /* fmul */
299 struct task_struct *tsk = current;
300 int fpscr;
301 int n, m, prec;
302 unsigned int hx, hy;
303
304 n = (finsn >> 8) & 0xf;
305 m = (finsn >> 4) & 0xf;
306 hx = tsk->thread.fpu.hard.fp_regs[n];
307 hy = tsk->thread.fpu.hard.fp_regs[m];
308 fpscr = tsk->thread.fpu.hard.fpscr;
309 prec = fpscr & FPSCR_DBL_PRECISION;
310
311 if ((fpscr & FPSCR_CAUSE_ERROR)
312 && (prec && ((hx & 0x7fffffff) < 0x00100000
313 || (hy & 0x7fffffff) < 0x00100000))) {
314 long long llx, lly;
315
316 /* FPU error because of denormal (doubles) */
317 llx = ((long long)hx << 32)
318 | tsk->thread.fpu.hard.fp_regs[n + 1];
319 lly = ((long long)hy << 32)
320 | tsk->thread.fpu.hard.fp_regs[m + 1];
321 llx = float64_mul(llx, lly);
322 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
323 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
324 } else if ((fpscr & FPSCR_CAUSE_ERROR)
325 && (!prec && ((hx & 0x7fffffff) < 0x00800000
326 || (hy & 0x7fffffff) < 0x00800000))) {
327 /* FPU error because of denormal (floats) */
328 hx = float32_mul(hx, hy);
329 tsk->thread.fpu.hard.fp_regs[n] = hx;
330 } else
331 return 0;
332
333 regs->pc = nextpc;
334 return 1;
335 } else if ((finsn & 0xf00e) == 0xf000) {
336 /* fadd, fsub */
337 struct task_struct *tsk = current;
338 int fpscr;
339 int n, m, prec;
340 unsigned int hx, hy;
341
342 n = (finsn >> 8) & 0xf;
343 m = (finsn >> 4) & 0xf;
344 hx = tsk->thread.fpu.hard.fp_regs[n];
345 hy = tsk->thread.fpu.hard.fp_regs[m];
346 fpscr = tsk->thread.fpu.hard.fpscr;
347 prec = fpscr & FPSCR_DBL_PRECISION;
348
349 if ((fpscr & FPSCR_CAUSE_ERROR)
350 && (prec && ((hx & 0x7fffffff) < 0x00100000
351 || (hy & 0x7fffffff) < 0x00100000))) {
352 long long llx, lly;
353
354 /* FPU error because of denormal (doubles) */
355 llx = ((long long)hx << 32)
356 | tsk->thread.fpu.hard.fp_regs[n + 1];
357 lly = ((long long)hy << 32)
358 | tsk->thread.fpu.hard.fp_regs[m + 1];
359 if ((finsn & 0xf00f) == 0xf000)
360 llx = float64_add(llx, lly);
361 else
362 llx = float64_sub(llx, lly);
363 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
364 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
365 } else if ((fpscr & FPSCR_CAUSE_ERROR)
366 && (!prec && ((hx & 0x7fffffff) < 0x00800000
367 || (hy & 0x7fffffff) < 0x00800000))) {
368 /* FPU error because of denormal (floats) */
369 if ((finsn & 0xf00f) == 0xf000)
370 hx = float32_add(hx, hy);
371 else
372 hx = float32_sub(hx, hy);
373 tsk->thread.fpu.hard.fp_regs[n] = hx;
374 } else
375 return 0;
376
377 regs->pc = nextpc;
378 return 1;
379 } else if ((finsn & 0xf003) == 0xf003) {
380 /* fdiv */
381 struct task_struct *tsk = current;
382 int fpscr;
383 int n, m, prec;
384 unsigned int hx, hy;
385
386 n = (finsn >> 8) & 0xf;
387 m = (finsn >> 4) & 0xf;
388 hx = tsk->thread.fpu.hard.fp_regs[n];
389 hy = tsk->thread.fpu.hard.fp_regs[m];
390 fpscr = tsk->thread.fpu.hard.fpscr;
391 prec = fpscr & FPSCR_DBL_PRECISION;
392
393 if ((fpscr & FPSCR_CAUSE_ERROR)
394 && (prec && ((hx & 0x7fffffff) < 0x00100000
395 || (hy & 0x7fffffff) < 0x00100000))) {
396 long long llx, lly;
397
398 /* FPU error because of denormal (doubles) */
399 llx = ((long long)hx << 32)
400 | tsk->thread.fpu.hard.fp_regs[n + 1];
401 lly = ((long long)hy << 32)
402 | tsk->thread.fpu.hard.fp_regs[m + 1];
403
404 llx = float64_div(llx, lly);
405
406 tsk->thread.fpu.hard.fp_regs[n] = llx >> 32;
407 tsk->thread.fpu.hard.fp_regs[n + 1] = llx & 0xffffffff;
408 } else if ((fpscr & FPSCR_CAUSE_ERROR)
409 && (!prec && ((hx & 0x7fffffff) < 0x00800000
410 || (hy & 0x7fffffff) < 0x00800000))) {
411 /* FPU error because of denormal (floats) */
412 hx = float32_div(hx, hy);
413 tsk->thread.fpu.hard.fp_regs[n] = hx;
286 } else 414 } else
287 force_sig(SIGFPE, tsk); 415 return 0;
288 416
289 regs->pc = nextpc; 417 regs->pc = nextpc;
290 return 1; 418 return 1;
@@ -293,27 +421,48 @@ ieee_fpe_handler (struct pt_regs *regs)
293 return 0; 421 return 0;
294} 422}
295 423
296asmlinkage void 424void float_raise(unsigned int flags)
297do_fpu_error(unsigned long r4, unsigned long r5, unsigned long r6, 425{
298 unsigned long r7, struct pt_regs __regs) 426 fpu_exception_flags |= flags;
427}
428
429int float_rounding_mode(void)
299{ 430{
300 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
301 struct task_struct *tsk = current; 431 struct task_struct *tsk = current;
432 int roundingMode = FPSCR_ROUNDING_MODE(tsk->thread.fpu.hard.fpscr);
433 return roundingMode;
434}
302 435
303 if (ieee_fpe_handler(regs)) 436BUILD_TRAP_HANDLER(fpu_error)
304 return; 437{
438 struct task_struct *tsk = current;
439 TRAP_HANDLER_DECL;
305 440
306 regs->pc += 2;
307 save_fpu(tsk, regs); 441 save_fpu(tsk, regs);
442 fpu_exception_flags = 0;
443 if (ieee_fpe_handler(regs)) {
444 tsk->thread.fpu.hard.fpscr &=
445 ~(FPSCR_CAUSE_MASK | FPSCR_FLAG_MASK);
446 tsk->thread.fpu.hard.fpscr |= fpu_exception_flags;
447 /* Set the FPSCR flag as well as cause bits - simply
448 * replicate the cause */
449 tsk->thread.fpu.hard.fpscr |= (fpu_exception_flags >> 10);
450 grab_fpu(regs);
451 restore_fpu(tsk);
452 set_tsk_thread_flag(tsk, TIF_USEDFPU);
453 if ((((tsk->thread.fpu.hard.fpscr & FPSCR_ENABLE_MASK) >> 7) &
454 (fpu_exception_flags >> 2)) == 0) {
455 return;
456 }
457 }
458
308 force_sig(SIGFPE, tsk); 459 force_sig(SIGFPE, tsk);
309} 460}
310 461
311asmlinkage void 462BUILD_TRAP_HANDLER(fpu_state_restore)
312do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6,
313 unsigned long r7, struct pt_regs __regs)
314{ 463{
315 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
316 struct task_struct *tsk = current; 464 struct task_struct *tsk = current;
465 TRAP_HANDLER_DECL;
317 466
318 grab_fpu(regs); 467 grab_fpu(regs);
319 if (!user_mode(regs)) { 468 if (!user_mode(regs)) {
@@ -324,7 +473,7 @@ do_fpu_state_restore(unsigned long r4, unsigned long r5, unsigned long r6,
324 if (used_math()) { 473 if (used_math()) {
325 /* Using the FPU again. */ 474 /* Using the FPU again. */
326 restore_fpu(tsk); 475 restore_fpu(tsk);
327 } else { 476 } else {
328 /* First time FPU user. */ 477 /* First time FPU user. */
329 fpu_init(); 478 fpu_init();
330 set_used_math(); 479 set_used_math();
diff --git a/arch/sh/kernel/cpu/sh4/probe.c b/arch/sh/kernel/cpu/sh4/probe.c
index bc9c28a69bf1..f2b9238cda04 100644
--- a/arch/sh/kernel/cpu/sh4/probe.c
+++ b/arch/sh/kernel/cpu/sh4/probe.c
@@ -98,6 +98,8 @@ int __init detect_cpu_and_cache_system(void)
98 case 0x200A: 98 case 0x200A:
99 if (prr == 0x61) 99 if (prr == 0x61)
100 boot_cpu_data.type = CPU_SH7781; 100 boot_cpu_data.type = CPU_SH7781;
101 else if (prr == 0xa1)
102 boot_cpu_data.type = CPU_SH7763;
101 else 103 else
102 boot_cpu_data.type = CPU_SH7780; 104 boot_cpu_data.type = CPU_SH7780;
103 105
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7750.c b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
index 523f68a9ce0e..ae3603aca615 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7750.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7750.c
@@ -126,12 +126,6 @@ static struct intc_group groups[] __initdata = {
126 INTC_GROUP(REF, REF_RCMI, REF_ROVI), 126 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
127}; 127};
128 128
129static struct intc_prio priorities[] __initdata = {
130 INTC_PRIO(SCIF, 3),
131 INTC_PRIO(SCI1, 3),
132 INTC_PRIO(DMAC, 7),
133};
134
135static struct intc_prio_reg prio_registers[] __initdata = { 129static struct intc_prio_reg prio_registers[] __initdata = {
136 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } }, 130 { 0xffd00004, 0, 16, 4, /* IPRA */ { TMU0, TMU1, TMU2, RTC } },
137 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } }, 131 { 0xffd00008, 0, 16, 4, /* IPRB */ { WDT, REF, SCI1, 0 } },
@@ -143,7 +137,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
143}; 137};
144 138
145static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups, 139static DECLARE_INTC_DESC(intc_desc, "sh7750", vectors, groups,
146 priorities, NULL, prio_registers, NULL); 140 NULL, prio_registers, NULL);
147 141
148/* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */ 142/* SH7750, SH7750S, SH7751 and SH7091 all have 4-channel DMA controllers */
149#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 143#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
@@ -163,7 +157,7 @@ static struct intc_group groups_dma4[] __initdata = {
163 157
164static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4", 158static DECLARE_INTC_DESC(intc_desc_dma4, "sh7750_dma4",
165 vectors_dma4, groups_dma4, 159 vectors_dma4, groups_dma4,
166 priorities, NULL, prio_registers, NULL); 160 NULL, prio_registers, NULL);
167#endif 161#endif
168 162
169/* SH7750R and SH7751R both have 8-channel DMA controllers */ 163/* SH7750R and SH7751R both have 8-channel DMA controllers */
@@ -184,7 +178,7 @@ static struct intc_group groups_dma8[] __initdata = {
184 178
185static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8", 179static DECLARE_INTC_DESC(intc_desc_dma8, "sh7750_dma8",
186 vectors_dma8, groups_dma8, 180 vectors_dma8, groups_dma8,
187 priorities, NULL, prio_registers, NULL); 181 NULL, prio_registers, NULL);
188#endif 182#endif
189 183
190/* SH7750R, SH7751 and SH7751R all have two extra timer channels */ 184/* SH7750R, SH7751 and SH7751R all have two extra timer channels */
@@ -205,7 +199,7 @@ static struct intc_mask_reg mask_registers[] __initdata = {
205}; 199};
206 200
207static DECLARE_INTC_DESC(intc_desc_tmu34, "sh7750_tmu34", 201static DECLARE_INTC_DESC(intc_desc_tmu34, "sh7750_tmu34",
208 vectors_tmu34, NULL, priorities, 202 vectors_tmu34, NULL,
209 mask_registers, prio_registers, NULL); 203 mask_registers, prio_registers, NULL);
210#endif 204#endif
211 205
@@ -216,7 +210,7 @@ static struct intc_vect vectors_irlm[] __initdata = {
216}; 210};
217 211
218static DECLARE_INTC_DESC(intc_desc_irlm, "sh7750_irlm", vectors_irlm, NULL, 212static DECLARE_INTC_DESC(intc_desc_irlm, "sh7750_irlm", vectors_irlm, NULL,
219 priorities, NULL, prio_registers, NULL); 213 NULL, prio_registers, NULL);
220 214
221/* SH7751 and SH7751R both have PCI */ 215/* SH7751 and SH7751R both have PCI */
222#if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R) 216#if defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7751R)
@@ -233,7 +227,7 @@ static struct intc_group groups_pci[] __initdata = {
233}; 227};
234 228
235static DECLARE_INTC_DESC(intc_desc_pci, "sh7750_pci", vectors_pci, groups_pci, 229static DECLARE_INTC_DESC(intc_desc_pci, "sh7750_pci", vectors_pci, groups_pci,
236 priorities, mask_registers, prio_registers, NULL); 230 mask_registers, prio_registers, NULL);
237#endif 231#endif
238 232
239#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \ 233#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
diff --git a/arch/sh/kernel/cpu/sh4/setup-sh7760.c b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
index 7a898cb1d940..85f81579b97e 100644
--- a/arch/sh/kernel/cpu/sh4/setup-sh7760.c
+++ b/arch/sh/kernel/cpu/sh4/setup-sh7760.c
@@ -92,15 +92,6 @@ static struct intc_group groups[] __initdata = {
92 INTC_GROUP(REF, REF_RCMI, REF_ROVI), 92 INTC_GROUP(REF, REF_RCMI, REF_ROVI),
93}; 93};
94 94
95static struct intc_prio priorities[] __initdata = {
96 INTC_PRIO(SCIF0, 3),
97 INTC_PRIO(SCIF1, 3),
98 INTC_PRIO(SCIF2, 3),
99 INTC_PRIO(SIM, 3),
100 INTC_PRIO(DMAC, 7),
101 INTC_PRIO(DMABRG, 13),
102};
103
104static struct intc_mask_reg mask_registers[] __initdata = { 95static struct intc_mask_reg mask_registers[] __initdata = {
105 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */ 96 { 0xfe080040, 0xfe080060, 32, /* INTMSK00 / INTMSKCLR00 */
106 { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21, 97 { IRQ4, IRQ5, IRQ6, IRQ7, 0, 0, HCAN20, HCAN21,
@@ -132,7 +123,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
132}; 123};
133 124
134static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups, 125static DECLARE_INTC_DESC(intc_desc, "sh7760", vectors, groups,
135 priorities, mask_registers, prio_registers, NULL); 126 mask_registers, prio_registers, NULL);
136 127
137static struct intc_vect vectors_irq[] __initdata = { 128static struct intc_vect vectors_irq[] __initdata = {
138 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0), 129 INTC_VECT(IRL0, 0x240), INTC_VECT(IRL1, 0x2a0),
@@ -140,7 +131,7 @@ static struct intc_vect vectors_irq[] __initdata = {
140}; 131};
141 132
142static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups, 133static DECLARE_INTC_DESC(intc_desc_irq, "sh7760-irq", vectors_irq, groups,
143 priorities, mask_registers, prio_registers, NULL); 134 mask_registers, prio_registers, NULL);
144 135
145static struct plat_sci_port sci_platform_data[] = { 136static struct plat_sci_port sci_platform_data[] = {
146 { 137 {
diff --git a/arch/sh/kernel/cpu/sh4/softfloat.c b/arch/sh/kernel/cpu/sh4/softfloat.c
new file mode 100644
index 000000000000..7b2d337ee412
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4/softfloat.c
@@ -0,0 +1,892 @@
1/*
2 * Floating point emulation support for subnormalised numbers on SH4
3 * architecture This file is derived from the SoftFloat IEC/IEEE
4 * Floating-point Arithmetic Package, Release 2 the original license of
5 * which is reproduced below.
6 *
7 * ========================================================================
8 *
9 * This C source file is part of the SoftFloat IEC/IEEE Floating-point
10 * Arithmetic Package, Release 2.
11 *
12 * Written by John R. Hauser. This work was made possible in part by the
13 * International Computer Science Institute, located at Suite 600, 1947 Center
14 * Street, Berkeley, California 94704. Funding was partially provided by the
15 * National Science Foundation under grant MIP-9311980. The original version
16 * of this code was written as part of a project to build a fixed-point vector
17 * processor in collaboration with the University of California at Berkeley,
18 * overseen by Profs. Nelson Morgan and John Wawrzynek. More information
19 * is available through the web page `http://HTTP.CS.Berkeley.EDU/~jhauser/
20 * arithmetic/softfloat.html'.
21 *
22 * THIS SOFTWARE IS DISTRIBUTED AS IS, FOR FREE. Although reasonable effort
23 * has been made to avoid it, THIS SOFTWARE MAY CONTAIN FAULTS THAT WILL AT
24 * TIMES RESULT IN INCORRECT BEHAVIOR. USE OF THIS SOFTWARE IS RESTRICTED TO
25 * PERSONS AND ORGANIZATIONS WHO CAN AND WILL TAKE FULL RESPONSIBILITY FOR ANY
26 * AND ALL LOSSES, COSTS, OR OTHER PROBLEMS ARISING FROM ITS USE.
27 *
28 * Derivative works are acceptable, even for commercial purposes, so long as
29 * (1) they include prominent notice that the work is derivative, and (2) they
30 * include prominent notice akin to these three paragraphs for those parts of
31 * this code that are retained.
32 *
33 * ========================================================================
34 *
35 * SH4 modifications by Ismail Dhaoui <ismail.dhaoui@st.com>
36 * and Kamel Khelifi <kamel.khelifi@st.com>
37 */
38#include <linux/kernel.h>
39#include <asm/cpu/fpu.h>
40
41#define LIT64( a ) a##LL
42
43typedef char flag;
44typedef unsigned char uint8;
45typedef signed char int8;
46typedef int uint16;
47typedef int int16;
48typedef unsigned int uint32;
49typedef signed int int32;
50
51typedef unsigned long long int bits64;
52typedef signed long long int sbits64;
53
54typedef unsigned char bits8;
55typedef signed char sbits8;
56typedef unsigned short int bits16;
57typedef signed short int sbits16;
58typedef unsigned int bits32;
59typedef signed int sbits32;
60
61typedef unsigned long long int uint64;
62typedef signed long long int int64;
63
64typedef unsigned long int float32;
65typedef unsigned long long float64;
66
67extern void float_raise(unsigned int flags); /* in fpu.c */
68extern int float_rounding_mode(void); /* in fpu.c */
69
70inline bits64 extractFloat64Frac(float64 a);
71inline flag extractFloat64Sign(float64 a);
72inline int16 extractFloat64Exp(float64 a);
73inline int16 extractFloat32Exp(float32 a);
74inline flag extractFloat32Sign(float32 a);
75inline bits32 extractFloat32Frac(float32 a);
76inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig);
77inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr);
78inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig);
79inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr);
80float64 float64_sub(float64 a, float64 b);
81float32 float32_sub(float32 a, float32 b);
82float32 float32_add(float32 a, float32 b);
83float64 float64_add(float64 a, float64 b);
84float64 float64_div(float64 a, float64 b);
85float32 float32_div(float32 a, float32 b);
86float32 float32_mul(float32 a, float32 b);
87float64 float64_mul(float64 a, float64 b);
88inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
89 bits64 * z1Ptr);
90inline void sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
91 bits64 * z1Ptr);
92inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr);
93
94static int8 countLeadingZeros32(bits32 a);
95static int8 countLeadingZeros64(bits64 a);
96static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp,
97 bits64 zSig);
98static float64 subFloat64Sigs(float64 a, float64 b, flag zSign);
99static float64 addFloat64Sigs(float64 a, float64 b, flag zSign);
100static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig);
101static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp,
102 bits32 zSig);
103static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig);
104static float32 subFloat32Sigs(float32 a, float32 b, flag zSign);
105static float32 addFloat32Sigs(float32 a, float32 b, flag zSign);
106static void normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr,
107 bits64 * zSigPtr);
108static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b);
109static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
110 bits32 * zSigPtr);
111
112inline bits64 extractFloat64Frac(float64 a)
113{
114 return a & LIT64(0x000FFFFFFFFFFFFF);
115}
116
117inline flag extractFloat64Sign(float64 a)
118{
119 return a >> 63;
120}
121
122inline int16 extractFloat64Exp(float64 a)
123{
124 return (a >> 52) & 0x7FF;
125}
126
127inline int16 extractFloat32Exp(float32 a)
128{
129 return (a >> 23) & 0xFF;
130}
131
132inline flag extractFloat32Sign(float32 a)
133{
134 return a >> 31;
135}
136
137inline bits32 extractFloat32Frac(float32 a)
138{
139 return a & 0x007FFFFF;
140}
141
142inline float64 packFloat64(flag zSign, int16 zExp, bits64 zSig)
143{
144 return (((bits64) zSign) << 63) + (((bits64) zExp) << 52) + zSig;
145}
146
147inline void shift64RightJamming(bits64 a, int16 count, bits64 * zPtr)
148{
149 bits64 z;
150
151 if (count == 0) {
152 z = a;
153 } else if (count < 64) {
154 z = (a >> count) | ((a << ((-count) & 63)) != 0);
155 } else {
156 z = (a != 0);
157 }
158 *zPtr = z;
159}
160
161static int8 countLeadingZeros32(bits32 a)
162{
163 static const int8 countLeadingZerosHigh[] = {
164 8, 7, 6, 6, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 4, 4,
165 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3,
166 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
167 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2,
168 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
169 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
170 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
171 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
172 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
173 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
174 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
175 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
176 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
177 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
178 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
179 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
180 };
181 int8 shiftCount;
182
183 shiftCount = 0;
184 if (a < 0x10000) {
185 shiftCount += 16;
186 a <<= 16;
187 }
188 if (a < 0x1000000) {
189 shiftCount += 8;
190 a <<= 8;
191 }
192 shiftCount += countLeadingZerosHigh[a >> 24];
193 return shiftCount;
194
195}
196
197static int8 countLeadingZeros64(bits64 a)
198{
199 int8 shiftCount;
200
201 shiftCount = 0;
202 if (a < ((bits64) 1) << 32) {
203 shiftCount += 32;
204 } else {
205 a >>= 32;
206 }
207 shiftCount += countLeadingZeros32(a);
208 return shiftCount;
209
210}
211
212static float64 normalizeRoundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig)
213{
214 int8 shiftCount;
215
216 shiftCount = countLeadingZeros64(zSig) - 1;
217 return roundAndPackFloat64(zSign, zExp - shiftCount,
218 zSig << shiftCount);
219
220}
221
222static float64 subFloat64Sigs(float64 a, float64 b, flag zSign)
223{
224 int16 aExp, bExp, zExp;
225 bits64 aSig, bSig, zSig;
226 int16 expDiff;
227
228 aSig = extractFloat64Frac(a);
229 aExp = extractFloat64Exp(a);
230 bSig = extractFloat64Frac(b);
231 bExp = extractFloat64Exp(b);
232 expDiff = aExp - bExp;
233 aSig <<= 10;
234 bSig <<= 10;
235 if (0 < expDiff)
236 goto aExpBigger;
237 if (expDiff < 0)
238 goto bExpBigger;
239 if (aExp == 0) {
240 aExp = 1;
241 bExp = 1;
242 }
243 if (bSig < aSig)
244 goto aBigger;
245 if (aSig < bSig)
246 goto bBigger;
247 return packFloat64(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0);
248 bExpBigger:
249 if (bExp == 0x7FF) {
250 return packFloat64(zSign ^ 1, 0x7FF, 0);
251 }
252 if (aExp == 0) {
253 ++expDiff;
254 } else {
255 aSig |= LIT64(0x4000000000000000);
256 }
257 shift64RightJamming(aSig, -expDiff, &aSig);
258 bSig |= LIT64(0x4000000000000000);
259 bBigger:
260 zSig = bSig - aSig;
261 zExp = bExp;
262 zSign ^= 1;
263 goto normalizeRoundAndPack;
264 aExpBigger:
265 if (aExp == 0x7FF) {
266 return a;
267 }
268 if (bExp == 0) {
269 --expDiff;
270 } else {
271 bSig |= LIT64(0x4000000000000000);
272 }
273 shift64RightJamming(bSig, expDiff, &bSig);
274 aSig |= LIT64(0x4000000000000000);
275 aBigger:
276 zSig = aSig - bSig;
277 zExp = aExp;
278 normalizeRoundAndPack:
279 --zExp;
280 return normalizeRoundAndPackFloat64(zSign, zExp, zSig);
281
282}
283static float64 addFloat64Sigs(float64 a, float64 b, flag zSign)
284{
285 int16 aExp, bExp, zExp;
286 bits64 aSig, bSig, zSig;
287 int16 expDiff;
288
289 aSig = extractFloat64Frac(a);
290 aExp = extractFloat64Exp(a);
291 bSig = extractFloat64Frac(b);
292 bExp = extractFloat64Exp(b);
293 expDiff = aExp - bExp;
294 aSig <<= 9;
295 bSig <<= 9;
296 if (0 < expDiff) {
297 if (aExp == 0x7FF) {
298 return a;
299 }
300 if (bExp == 0) {
301 --expDiff;
302 } else {
303 bSig |= LIT64(0x2000000000000000);
304 }
305 shift64RightJamming(bSig, expDiff, &bSig);
306 zExp = aExp;
307 } else if (expDiff < 0) {
308 if (bExp == 0x7FF) {
309 return packFloat64(zSign, 0x7FF, 0);
310 }
311 if (aExp == 0) {
312 ++expDiff;
313 } else {
314 aSig |= LIT64(0x2000000000000000);
315 }
316 shift64RightJamming(aSig, -expDiff, &aSig);
317 zExp = bExp;
318 } else {
319 if (aExp == 0x7FF) {
320 return a;
321 }
322 if (aExp == 0)
323 return packFloat64(zSign, 0, (aSig + bSig) >> 9);
324 zSig = LIT64(0x4000000000000000) + aSig + bSig;
325 zExp = aExp;
326 goto roundAndPack;
327 }
328 aSig |= LIT64(0x2000000000000000);
329 zSig = (aSig + bSig) << 1;
330 --zExp;
331 if ((sbits64) zSig < 0) {
332 zSig = aSig + bSig;
333 ++zExp;
334 }
335 roundAndPack:
336 return roundAndPackFloat64(zSign, zExp, zSig);
337
338}
339
340inline float32 packFloat32(flag zSign, int16 zExp, bits32 zSig)
341{
342 return (((bits32) zSign) << 31) + (((bits32) zExp) << 23) + zSig;
343}
344
345inline void shift32RightJamming(bits32 a, int16 count, bits32 * zPtr)
346{
347 bits32 z;
348 if (count == 0) {
349 z = a;
350 } else if (count < 32) {
351 z = (a >> count) | ((a << ((-count) & 31)) != 0);
352 } else {
353 z = (a != 0);
354 }
355 *zPtr = z;
356}
357
358static float32 roundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig)
359{
360 flag roundNearestEven;
361 int8 roundIncrement, roundBits;
362 flag isTiny;
363
364 /* SH4 has only 2 rounding modes - round to nearest and round to zero */
365 roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST);
366 roundIncrement = 0x40;
367 if (!roundNearestEven) {
368 roundIncrement = 0;
369 }
370 roundBits = zSig & 0x7F;
371 if (0xFD <= (bits16) zExp) {
372 if ((0xFD < zExp)
373 || ((zExp == 0xFD)
374 && ((sbits32) (zSig + roundIncrement) < 0))
375 ) {
376 float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT);
377 return packFloat32(zSign, 0xFF,
378 0) - (roundIncrement == 0);
379 }
380 if (zExp < 0) {
381 isTiny = (zExp < -1)
382 || (zSig + roundIncrement < 0x80000000);
383 shift32RightJamming(zSig, -zExp, &zSig);
384 zExp = 0;
385 roundBits = zSig & 0x7F;
386 if (isTiny && roundBits)
387 float_raise(FPSCR_CAUSE_UNDERFLOW);
388 }
389 }
390 if (roundBits)
391 float_raise(FPSCR_CAUSE_INEXACT);
392 zSig = (zSig + roundIncrement) >> 7;
393 zSig &= ~(((roundBits ^ 0x40) == 0) & roundNearestEven);
394 if (zSig == 0)
395 zExp = 0;
396 return packFloat32(zSign, zExp, zSig);
397
398}
399
400static float32 normalizeRoundAndPackFloat32(flag zSign, int16 zExp, bits32 zSig)
401{
402 int8 shiftCount;
403
404 shiftCount = countLeadingZeros32(zSig) - 1;
405 return roundAndPackFloat32(zSign, zExp - shiftCount,
406 zSig << shiftCount);
407}
408
409static float64 roundAndPackFloat64(flag zSign, int16 zExp, bits64 zSig)
410{
411 flag roundNearestEven;
412 int16 roundIncrement, roundBits;
413 flag isTiny;
414
415 /* SH4 has only 2 rounding modes - round to nearest and round to zero */
416 roundNearestEven = (float_rounding_mode() == FPSCR_RM_NEAREST);
417 roundIncrement = 0x200;
418 if (!roundNearestEven) {
419 roundIncrement = 0;
420 }
421 roundBits = zSig & 0x3FF;
422 if (0x7FD <= (bits16) zExp) {
423 if ((0x7FD < zExp)
424 || ((zExp == 0x7FD)
425 && ((sbits64) (zSig + roundIncrement) < 0))
426 ) {
427 float_raise(FPSCR_CAUSE_OVERFLOW | FPSCR_CAUSE_INEXACT);
428 return packFloat64(zSign, 0x7FF,
429 0) - (roundIncrement == 0);
430 }
431 if (zExp < 0) {
432 isTiny = (zExp < -1)
433 || (zSig + roundIncrement <
434 LIT64(0x8000000000000000));
435 shift64RightJamming(zSig, -zExp, &zSig);
436 zExp = 0;
437 roundBits = zSig & 0x3FF;
438 if (isTiny && roundBits)
439 float_raise(FPSCR_CAUSE_UNDERFLOW);
440 }
441 }
442 if (roundBits)
443 float_raise(FPSCR_CAUSE_INEXACT);
444 zSig = (zSig + roundIncrement) >> 10;
445 zSig &= ~(((roundBits ^ 0x200) == 0) & roundNearestEven);
446 if (zSig == 0)
447 zExp = 0;
448 return packFloat64(zSign, zExp, zSig);
449
450}
451
452static float32 subFloat32Sigs(float32 a, float32 b, flag zSign)
453{
454 int16 aExp, bExp, zExp;
455 bits32 aSig, bSig, zSig;
456 int16 expDiff;
457
458 aSig = extractFloat32Frac(a);
459 aExp = extractFloat32Exp(a);
460 bSig = extractFloat32Frac(b);
461 bExp = extractFloat32Exp(b);
462 expDiff = aExp - bExp;
463 aSig <<= 7;
464 bSig <<= 7;
465 if (0 < expDiff)
466 goto aExpBigger;
467 if (expDiff < 0)
468 goto bExpBigger;
469 if (aExp == 0) {
470 aExp = 1;
471 bExp = 1;
472 }
473 if (bSig < aSig)
474 goto aBigger;
475 if (aSig < bSig)
476 goto bBigger;
477 return packFloat32(float_rounding_mode() == FPSCR_RM_ZERO, 0, 0);
478 bExpBigger:
479 if (bExp == 0xFF) {
480 return packFloat32(zSign ^ 1, 0xFF, 0);
481 }
482 if (aExp == 0) {
483 ++expDiff;
484 } else {
485 aSig |= 0x40000000;
486 }
487 shift32RightJamming(aSig, -expDiff, &aSig);
488 bSig |= 0x40000000;
489 bBigger:
490 zSig = bSig - aSig;
491 zExp = bExp;
492 zSign ^= 1;
493 goto normalizeRoundAndPack;
494 aExpBigger:
495 if (aExp == 0xFF) {
496 return a;
497 }
498 if (bExp == 0) {
499 --expDiff;
500 } else {
501 bSig |= 0x40000000;
502 }
503 shift32RightJamming(bSig, expDiff, &bSig);
504 aSig |= 0x40000000;
505 aBigger:
506 zSig = aSig - bSig;
507 zExp = aExp;
508 normalizeRoundAndPack:
509 --zExp;
510 return normalizeRoundAndPackFloat32(zSign, zExp, zSig);
511
512}
513
514static float32 addFloat32Sigs(float32 a, float32 b, flag zSign)
515{
516 int16 aExp, bExp, zExp;
517 bits32 aSig, bSig, zSig;
518 int16 expDiff;
519
520 aSig = extractFloat32Frac(a);
521 aExp = extractFloat32Exp(a);
522 bSig = extractFloat32Frac(b);
523 bExp = extractFloat32Exp(b);
524 expDiff = aExp - bExp;
525 aSig <<= 6;
526 bSig <<= 6;
527 if (0 < expDiff) {
528 if (aExp == 0xFF) {
529 return a;
530 }
531 if (bExp == 0) {
532 --expDiff;
533 } else {
534 bSig |= 0x20000000;
535 }
536 shift32RightJamming(bSig, expDiff, &bSig);
537 zExp = aExp;
538 } else if (expDiff < 0) {
539 if (bExp == 0xFF) {
540 return packFloat32(zSign, 0xFF, 0);
541 }
542 if (aExp == 0) {
543 ++expDiff;
544 } else {
545 aSig |= 0x20000000;
546 }
547 shift32RightJamming(aSig, -expDiff, &aSig);
548 zExp = bExp;
549 } else {
550 if (aExp == 0xFF) {
551 return a;
552 }
553 if (aExp == 0)
554 return packFloat32(zSign, 0, (aSig + bSig) >> 6);
555 zSig = 0x40000000 + aSig + bSig;
556 zExp = aExp;
557 goto roundAndPack;
558 }
559 aSig |= 0x20000000;
560 zSig = (aSig + bSig) << 1;
561 --zExp;
562 if ((sbits32) zSig < 0) {
563 zSig = aSig + bSig;
564 ++zExp;
565 }
566 roundAndPack:
567 return roundAndPackFloat32(zSign, zExp, zSig);
568
569}
570
571float64 float64_sub(float64 a, float64 b)
572{
573 flag aSign, bSign;
574
575 aSign = extractFloat64Sign(a);
576 bSign = extractFloat64Sign(b);
577 if (aSign == bSign) {
578 return subFloat64Sigs(a, b, aSign);
579 } else {
580 return addFloat64Sigs(a, b, aSign);
581 }
582
583}
584
585float32 float32_sub(float32 a, float32 b)
586{
587 flag aSign, bSign;
588
589 aSign = extractFloat32Sign(a);
590 bSign = extractFloat32Sign(b);
591 if (aSign == bSign) {
592 return subFloat32Sigs(a, b, aSign);
593 } else {
594 return addFloat32Sigs(a, b, aSign);
595 }
596
597}
598
599float32 float32_add(float32 a, float32 b)
600{
601 flag aSign, bSign;
602
603 aSign = extractFloat32Sign(a);
604 bSign = extractFloat32Sign(b);
605 if (aSign == bSign) {
606 return addFloat32Sigs(a, b, aSign);
607 } else {
608 return subFloat32Sigs(a, b, aSign);
609 }
610
611}
612
613float64 float64_add(float64 a, float64 b)
614{
615 flag aSign, bSign;
616
617 aSign = extractFloat64Sign(a);
618 bSign = extractFloat64Sign(b);
619 if (aSign == bSign) {
620 return addFloat64Sigs(a, b, aSign);
621 } else {
622 return subFloat64Sigs(a, b, aSign);
623 }
624}
625
626static void
627normalizeFloat64Subnormal(bits64 aSig, int16 * zExpPtr, bits64 * zSigPtr)
628{
629 int8 shiftCount;
630
631 shiftCount = countLeadingZeros64(aSig) - 11;
632 *zSigPtr = aSig << shiftCount;
633 *zExpPtr = 1 - shiftCount;
634}
635
636inline void add128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
637 bits64 * z1Ptr)
638{
639 bits64 z1;
640
641 z1 = a1 + b1;
642 *z1Ptr = z1;
643 *z0Ptr = a0 + b0 + (z1 < a1);
644}
645
646inline void
647sub128(bits64 a0, bits64 a1, bits64 b0, bits64 b1, bits64 * z0Ptr,
648 bits64 * z1Ptr)
649{
650 *z1Ptr = a1 - b1;
651 *z0Ptr = a0 - b0 - (a1 < b1);
652}
653
654static bits64 estimateDiv128To64(bits64 a0, bits64 a1, bits64 b)
655{
656 bits64 b0, b1;
657 bits64 rem0, rem1, term0, term1;
658 bits64 z;
659 if (b <= a0)
660 return LIT64(0xFFFFFFFFFFFFFFFF);
661 b0 = b >> 32;
662 z = (b0 << 32 <= a0) ? LIT64(0xFFFFFFFF00000000) : (a0 / b0) << 32;
663 mul64To128(b, z, &term0, &term1);
664 sub128(a0, a1, term0, term1, &rem0, &rem1);
665 while (((sbits64) rem0) < 0) {
666 z -= LIT64(0x100000000);
667 b1 = b << 32;
668 add128(rem0, rem1, b0, b1, &rem0, &rem1);
669 }
670 rem0 = (rem0 << 32) | (rem1 >> 32);
671 z |= (b0 << 32 <= rem0) ? 0xFFFFFFFF : rem0 / b0;
672 return z;
673}
674
675inline void mul64To128(bits64 a, bits64 b, bits64 * z0Ptr, bits64 * z1Ptr)
676{
677 bits32 aHigh, aLow, bHigh, bLow;
678 bits64 z0, zMiddleA, zMiddleB, z1;
679
680 aLow = a;
681 aHigh = a >> 32;
682 bLow = b;
683 bHigh = b >> 32;
684 z1 = ((bits64) aLow) * bLow;
685 zMiddleA = ((bits64) aLow) * bHigh;
686 zMiddleB = ((bits64) aHigh) * bLow;
687 z0 = ((bits64) aHigh) * bHigh;
688 zMiddleA += zMiddleB;
689 z0 += (((bits64) (zMiddleA < zMiddleB)) << 32) + (zMiddleA >> 32);
690 zMiddleA <<= 32;
691 z1 += zMiddleA;
692 z0 += (z1 < zMiddleA);
693 *z1Ptr = z1;
694 *z0Ptr = z0;
695
696}
697
698static void normalizeFloat32Subnormal(bits32 aSig, int16 * zExpPtr,
699 bits32 * zSigPtr)
700{
701 int8 shiftCount;
702
703 shiftCount = countLeadingZeros32(aSig) - 8;
704 *zSigPtr = aSig << shiftCount;
705 *zExpPtr = 1 - shiftCount;
706
707}
708
709float64 float64_div(float64 a, float64 b)
710{
711 flag aSign, bSign, zSign;
712 int16 aExp, bExp, zExp;
713 bits64 aSig, bSig, zSig;
714 bits64 rem0, rem1;
715 bits64 term0, term1;
716
717 aSig = extractFloat64Frac(a);
718 aExp = extractFloat64Exp(a);
719 aSign = extractFloat64Sign(a);
720 bSig = extractFloat64Frac(b);
721 bExp = extractFloat64Exp(b);
722 bSign = extractFloat64Sign(b);
723 zSign = aSign ^ bSign;
724 if (aExp == 0x7FF) {
725 if (bExp == 0x7FF) {
726 }
727 return packFloat64(zSign, 0x7FF, 0);
728 }
729 if (bExp == 0x7FF) {
730 return packFloat64(zSign, 0, 0);
731 }
732 if (bExp == 0) {
733 if (bSig == 0) {
734 if ((aExp | aSig) == 0) {
735 float_raise(FPSCR_CAUSE_INVALID);
736 }
737 return packFloat64(zSign, 0x7FF, 0);
738 }
739 normalizeFloat64Subnormal(bSig, &bExp, &bSig);
740 }
741 if (aExp == 0) {
742 if (aSig == 0)
743 return packFloat64(zSign, 0, 0);
744 normalizeFloat64Subnormal(aSig, &aExp, &aSig);
745 }
746 zExp = aExp - bExp + 0x3FD;
747 aSig = (aSig | LIT64(0x0010000000000000)) << 10;
748 bSig = (bSig | LIT64(0x0010000000000000)) << 11;
749 if (bSig <= (aSig + aSig)) {
750 aSig >>= 1;
751 ++zExp;
752 }
753 zSig = estimateDiv128To64(aSig, 0, bSig);
754 if ((zSig & 0x1FF) <= 2) {
755 mul64To128(bSig, zSig, &term0, &term1);
756 sub128(aSig, 0, term0, term1, &rem0, &rem1);
757 while ((sbits64) rem0 < 0) {
758 --zSig;
759 add128(rem0, rem1, 0, bSig, &rem0, &rem1);
760 }
761 zSig |= (rem1 != 0);
762 }
763 return roundAndPackFloat64(zSign, zExp, zSig);
764
765}
766
767float32 float32_div(float32 a, float32 b)
768{
769 flag aSign, bSign, zSign;
770 int16 aExp, bExp, zExp;
771 bits32 aSig, bSig, zSig;
772
773 aSig = extractFloat32Frac(a);
774 aExp = extractFloat32Exp(a);
775 aSign = extractFloat32Sign(a);
776 bSig = extractFloat32Frac(b);
777 bExp = extractFloat32Exp(b);
778 bSign = extractFloat32Sign(b);
779 zSign = aSign ^ bSign;
780 if (aExp == 0xFF) {
781 if (bExp == 0xFF) {
782 }
783 return packFloat32(zSign, 0xFF, 0);
784 }
785 if (bExp == 0xFF) {
786 return packFloat32(zSign, 0, 0);
787 }
788 if (bExp == 0) {
789 if (bSig == 0) {
790 return packFloat32(zSign, 0xFF, 0);
791 }
792 normalizeFloat32Subnormal(bSig, &bExp, &bSig);
793 }
794 if (aExp == 0) {
795 if (aSig == 0)
796 return packFloat32(zSign, 0, 0);
797 normalizeFloat32Subnormal(aSig, &aExp, &aSig);
798 }
799 zExp = aExp - bExp + 0x7D;
800 aSig = (aSig | 0x00800000) << 7;
801 bSig = (bSig | 0x00800000) << 8;
802 if (bSig <= (aSig + aSig)) {
803 aSig >>= 1;
804 ++zExp;
805 }
806 zSig = (((bits64) aSig) << 32) / bSig;
807 if ((zSig & 0x3F) == 0) {
808 zSig |= (((bits64) bSig) * zSig != ((bits64) aSig) << 32);
809 }
810 return roundAndPackFloat32(zSign, zExp, zSig);
811
812}
813
814float32 float32_mul(float32 a, float32 b)
815{
816 char aSign, bSign, zSign;
817 int aExp, bExp, zExp;
818 unsigned int aSig, bSig;
819 unsigned long long zSig64;
820 unsigned int zSig;
821
822 aSig = extractFloat32Frac(a);
823 aExp = extractFloat32Exp(a);
824 aSign = extractFloat32Sign(a);
825 bSig = extractFloat32Frac(b);
826 bExp = extractFloat32Exp(b);
827 bSign = extractFloat32Sign(b);
828 zSign = aSign ^ bSign;
829 if (aExp == 0) {
830 if (aSig == 0)
831 return packFloat32(zSign, 0, 0);
832 normalizeFloat32Subnormal(aSig, &aExp, &aSig);
833 }
834 if (bExp == 0) {
835 if (bSig == 0)
836 return packFloat32(zSign, 0, 0);
837 normalizeFloat32Subnormal(bSig, &bExp, &bSig);
838 }
839 if ((bExp == 0xff && bSig == 0) || (aExp == 0xff && aSig == 0))
840 return roundAndPackFloat32(zSign, 0xff, 0);
841
842 zExp = aExp + bExp - 0x7F;
843 aSig = (aSig | 0x00800000) << 7;
844 bSig = (bSig | 0x00800000) << 8;
845 shift64RightJamming(((unsigned long long)aSig) * bSig, 32, &zSig64);
846 zSig = zSig64;
847 if (0 <= (signed int)(zSig << 1)) {
848 zSig <<= 1;
849 --zExp;
850 }
851 return roundAndPackFloat32(zSign, zExp, zSig);
852
853}
854
855float64 float64_mul(float64 a, float64 b)
856{
857 char aSign, bSign, zSign;
858 int aExp, bExp, zExp;
859 unsigned long long int aSig, bSig, zSig0, zSig1;
860
861 aSig = extractFloat64Frac(a);
862 aExp = extractFloat64Exp(a);
863 aSign = extractFloat64Sign(a);
864 bSig = extractFloat64Frac(b);
865 bExp = extractFloat64Exp(b);
866 bSign = extractFloat64Sign(b);
867 zSign = aSign ^ bSign;
868
869 if (aExp == 0) {
870 if (aSig == 0)
871 return packFloat64(zSign, 0, 0);
872 normalizeFloat64Subnormal(aSig, &aExp, &aSig);
873 }
874 if (bExp == 0) {
875 if (bSig == 0)
876 return packFloat64(zSign, 0, 0);
877 normalizeFloat64Subnormal(bSig, &bExp, &bSig);
878 }
879 if ((aExp == 0x7ff && aSig == 0) || (bExp == 0x7ff && bSig == 0))
880 return roundAndPackFloat64(zSign, 0x7ff, 0);
881
882 zExp = aExp + bExp - 0x3FF;
883 aSig = (aSig | 0x0010000000000000LL) << 10;
884 bSig = (bSig | 0x0010000000000000LL) << 11;
885 mul64To128(aSig, bSig, &zSig0, &zSig1);
886 zSig0 |= (zSig1 != 0);
887 if (0 <= (signed long long int)(zSig0 << 1)) {
888 zSig0 <<= 1;
889 --zExp;
890 }
891 return roundAndPackFloat64(zSign, zExp, zSig0);
892}
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile
index 24539873943a..08ac6387bf17 100644
--- a/arch/sh/kernel/cpu/sh4a/Makefile
+++ b/arch/sh/kernel/cpu/sh4a/Makefile
@@ -3,6 +3,7 @@
3# 3#
4 4
5# CPU subtype setup 5# CPU subtype setup
6obj-$(CONFIG_CPU_SUBTYPE_SH7763) += setup-sh7763.o
6obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o 7obj-$(CONFIG_CPU_SUBTYPE_SH7770) += setup-sh7770.o
7obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o 8obj-$(CONFIG_CPU_SUBTYPE_SH7780) += setup-sh7780.o
8obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o 9obj-$(CONFIG_CPU_SUBTYPE_SH7785) += setup-sh7785.o
@@ -14,6 +15,7 @@ obj-$(CONFIG_CPU_SUBTYPE_SHX3) += setup-shx3.o
14smp-$(CONFIG_CPU_SUBTYPE_SHX3) := smp-shx3.o 15smp-$(CONFIG_CPU_SUBTYPE_SHX3) := smp-shx3.o
15 16
16# Primary on-chip clocks (common) 17# Primary on-chip clocks (common)
18clock-$(CONFIG_CPU_SUBTYPE_SH7763) := clock-sh7763.o
17clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o 19clock-$(CONFIG_CPU_SUBTYPE_SH7770) := clock-sh7770.o
18clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o 20clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o
19clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o 21clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7763.c b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
new file mode 100644
index 000000000000..45889d412c80
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/clock-sh7763.c
@@ -0,0 +1,126 @@
1/*
2 * arch/sh/kernel/cpu/sh4a/clock-sh7763.c
3 *
4 * SH7763 support for the clock framework
5 *
6 * Copyright (C) 2005 Paul Mundt
7 * Copyright (C) 2007 Yoshihiro Shimoda
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <asm/clock.h>
16#include <asm/freq.h>
17#include <asm/io.h>
18
19static int bfc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
20static int p0fc_divisors[] = { 1, 1, 1, 8, 1, 1, 1, 1 };
21static int p1fc_divisors[] = { 1, 1, 1, 16, 1, 1, 1, 1 };
22static int cfc_divisors[] = { 1, 1, 4, 1, 1, 1, 1, 1 };
23
24static void master_clk_init(struct clk *clk)
25{
26 clk->rate *= p0fc_divisors[(ctrl_inl(FRQCR) >> 4) & 0x07];
27}
28
29static struct clk_ops sh7763_master_clk_ops = {
30 .init = master_clk_init,
31};
32
33static void module_clk_recalc(struct clk *clk)
34{
35 int idx = ((ctrl_inl(FRQCR) >> 4) & 0x07);
36 clk->rate = clk->parent->rate / p0fc_divisors[idx];
37}
38
39static struct clk_ops sh7763_module_clk_ops = {
40 .recalc = module_clk_recalc,
41};
42
43static void bus_clk_recalc(struct clk *clk)
44{
45 int idx = ((ctrl_inl(FRQCR) >> 16) & 0x07);
46 clk->rate = clk->parent->rate / bfc_divisors[idx];
47}
48
49static struct clk_ops sh7763_bus_clk_ops = {
50 .recalc = bus_clk_recalc,
51};
52
53static void cpu_clk_recalc(struct clk *clk)
54{
55 clk->rate = clk->parent->rate;
56}
57
58static struct clk_ops sh7763_cpu_clk_ops = {
59 .recalc = cpu_clk_recalc,
60};
61
62static struct clk_ops *sh7763_clk_ops[] = {
63 &sh7763_master_clk_ops,
64 &sh7763_module_clk_ops,
65 &sh7763_bus_clk_ops,
66 &sh7763_cpu_clk_ops,
67};
68
69void __init arch_init_clk_ops(struct clk_ops **ops, int idx)
70{
71 if (idx < ARRAY_SIZE(sh7763_clk_ops))
72 *ops = sh7763_clk_ops[idx];
73}
74
75static void shyway_clk_recalc(struct clk *clk)
76{
77 int idx = ((ctrl_inl(FRQCR) >> 20) & 0x07);
78 clk->rate = clk->parent->rate / cfc_divisors[idx];
79}
80
81static struct clk_ops sh7763_shyway_clk_ops = {
82 .recalc = shyway_clk_recalc,
83};
84
85static struct clk sh7763_shyway_clk = {
86 .name = "shyway_clk",
87 .flags = CLK_ALWAYS_ENABLED,
88 .ops = &sh7763_shyway_clk_ops,
89};
90
91/*
92 * Additional SH7763-specific on-chip clocks that aren't already part of the
93 * clock framework
94 */
95static struct clk *sh7763_onchip_clocks[] = {
96 &sh7763_shyway_clk,
97};
98
99static int __init sh7763_clk_init(void)
100{
101 struct clk *clk = clk_get(NULL, "master_clk");
102 int i;
103
104 for (i = 0; i < ARRAY_SIZE(sh7763_onchip_clocks); i++) {
105 struct clk *clkp = sh7763_onchip_clocks[i];
106
107 clkp->parent = clk;
108 clk_register(clkp);
109 clk_enable(clkp);
110 }
111
112 /*
113 * Now that we have the rest of the clocks registered, we need to
114 * force the parent clock to propagate so that these clocks will
115 * automatically figure out their rate. We cheat by handing the
116 * parent clock its current rate and forcing child propagation.
117 */
118 clk_set_rate(clk, clk_get_rate(clk));
119
120 clk_put(clk);
121
122 return 0;
123}
124
125arch_initcall(sh7763_clk_init);
126
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
index b9c6547c4a90..73c778d40d13 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7722.c
@@ -157,14 +157,6 @@ static struct intc_group groups[] __initdata = {
157 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3), 157 INTC_GROUP(SDHI, SDHI0, SDHI1, SDHI2, SDHI3),
158}; 158};
159 159
160static struct intc_prio priorities[] __initdata = {
161 INTC_PRIO(SCIF0, 3),
162 INTC_PRIO(SCIF1, 3),
163 INTC_PRIO(SCIF2, 3),
164 INTC_PRIO(TMU0, 2),
165 INTC_PRIO(TMU1, 2),
166};
167
168static struct intc_mask_reg mask_registers[] __initdata = { 160static struct intc_mask_reg mask_registers[] __initdata = {
169 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */ 161 { 0xa4080080, 0xa40800c0, 8, /* IMR0 / IMCR0 */
170 { } }, 162 { } },
@@ -217,7 +209,7 @@ static struct intc_sense_reg sense_registers[] __initdata = {
217 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 209 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
218}; 210};
219 211
220static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups, priorities, 212static DECLARE_INTC_DESC(intc_desc, "sh7722", vectors, groups,
221 mask_registers, prio_registers, sense_registers); 213 mask_registers, prio_registers, sense_registers);
222 214
223void __init plat_irq_setup(void) 215void __init plat_irq_setup(void)
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7763.c b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
new file mode 100644
index 000000000000..eabd5386812d
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7763.c
@@ -0,0 +1,390 @@
1/*
2 * SH7763 Setup
3 *
4 * Copyright (C) 2006 Paul Mundt
5 * Copyright (C) 2007 Yoshihiro Shimoda
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/platform_device.h>
12#include <linux/init.h>
13#include <linux/serial.h>
14#include <linux/io.h>
15#include <asm/sci.h>
16
17static struct resource rtc_resources[] = {
18 [0] = {
19 .start = 0xffe80000,
20 .end = 0xffe80000 + 0x58 - 1,
21 .flags = IORESOURCE_IO,
22 },
23 [1] = {
24 /* Period IRQ */
25 .start = 21,
26 .flags = IORESOURCE_IRQ,
27 },
28 [2] = {
29 /* Carry IRQ */
30 .start = 22,
31 .flags = IORESOURCE_IRQ,
32 },
33 [3] = {
34 /* Alarm IRQ */
35 .start = 20,
36 .flags = IORESOURCE_IRQ,
37 },
38};
39
40static struct platform_device rtc_device = {
41 .name = "sh-rtc",
42 .id = -1,
43 .num_resources = ARRAY_SIZE(rtc_resources),
44 .resource = rtc_resources,
45};
46
47static struct plat_sci_port sci_platform_data[] = {
48 {
49 .mapbase = 0xffe00000,
50 .flags = UPF_BOOT_AUTOCONF,
51 .type = PORT_SCIF,
52 .irqs = { 40, 41, 43, 42 },
53 }, {
54 .mapbase = 0xffe08000,
55 .flags = UPF_BOOT_AUTOCONF,
56 .type = PORT_SCIF,
57 .irqs = { 76, 77, 79, 78 },
58 }, {
59 .flags = 0,
60 }
61};
62
63static struct platform_device sci_device = {
64 .name = "sh-sci",
65 .id = -1,
66 .dev = {
67 .platform_data = sci_platform_data,
68 },
69};
70
71static struct resource usb_ohci_resources[] = {
72 [0] = {
73 .start = 0xffec8000,
74 .end = 0xffec80ff,
75 .flags = IORESOURCE_MEM,
76 },
77 [1] = {
78 .start = 83,
79 .end = 83,
80 .flags = IORESOURCE_IRQ,
81 },
82};
83
84static u64 usb_ohci_dma_mask = 0xffffffffUL;
85static struct platform_device usb_ohci_device = {
86 .name = "sh_ohci",
87 .id = -1,
88 .dev = {
89 .dma_mask = &usb_ohci_dma_mask,
90 .coherent_dma_mask = 0xffffffff,
91 },
92 .num_resources = ARRAY_SIZE(usb_ohci_resources),
93 .resource = usb_ohci_resources,
94};
95
96static struct resource usbf_resources[] = {
97 [0] = {
98 .start = 0xffec0000,
99 .end = 0xffec00ff,
100 .flags = IORESOURCE_MEM,
101 },
102 [1] = {
103 .start = 84,
104 .end = 84,
105 .flags = IORESOURCE_IRQ,
106 },
107};
108
109static struct platform_device usbf_device = {
110 .name = "sh_udc",
111 .id = -1,
112 .dev = {
113 .dma_mask = NULL,
114 .coherent_dma_mask = 0xffffffff,
115 },
116 .num_resources = ARRAY_SIZE(usbf_resources),
117 .resource = usbf_resources,
118};
119
120static struct platform_device *sh7763_devices[] __initdata = {
121 &rtc_device,
122 &sci_device,
123 &usb_ohci_device,
124 &usbf_device,
125};
126
127static int __init sh7763_devices_setup(void)
128{
129 return platform_add_devices(sh7763_devices,
130 ARRAY_SIZE(sh7763_devices));
131}
132__initcall(sh7763_devices_setup);
133
134enum {
135 UNUSED = 0,
136
137 /* interrupt sources */
138
139 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
140 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
141 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
142 IRL_HHLL, IRL_HHLH, IRL_HHHL,
143
144 IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7,
145 RTC_ATI, RTC_PRI, RTC_CUI,
146 WDT, TMU0, TMU1, TMU2, TMU2_TICPI,
147 HUDI, LCDC,
148 DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2, DMAC0_DMINT3, DMAC0_DMAE,
149 SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI,
150 DMAC0_DMINT4, DMAC0_DMINT5,
151 IIC0, IIC1,
152 CMT,
153 GEINT0, GEINT1, GEINT2,
154 HAC,
155 PCISERR, PCIINTA, PCIINTB, PCIINTC, PCIINTD,
156 PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0,
157 STIF0, STIF1,
158 SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI,
159 SIOF0, SIOF1, SIOF2,
160 USBH, USBFI0, USBFI1,
161 TPU, PCC,
162 MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY,
163 SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND,
164 TMU3, TMU4, TMU5, ADC, SSI0, SSI1, SSI2, SSI3,
165 SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI,
166 GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3,
167
168 /* interrupt groups */
169
170 TMU012, TMU345, RTC, DMAC, SCIF0, GETHER, PCIC5,
171 SCIF1, USBF, MMCIF, SIM, SCIF2, GPIO,
172};
173
174static struct intc_vect vectors[] __initdata = {
175 INTC_VECT(RTC_ATI, 0x480), INTC_VECT(RTC_PRI, 0x4a0),
176 INTC_VECT(RTC_CUI, 0x4c0),
177 INTC_VECT(WDT, 0x560), INTC_VECT(TMU0, 0x580),
178 INTC_VECT(TMU1, 0x5a0), INTC_VECT(TMU2, 0x5c0),
179 INTC_VECT(TMU2_TICPI, 0x5e0), INTC_VECT(HUDI, 0x600),
180 INTC_VECT(LCDC, 0x620),
181 INTC_VECT(DMAC0_DMINT0, 0x640), INTC_VECT(DMAC0_DMINT1, 0x660),
182 INTC_VECT(DMAC0_DMINT2, 0x680), INTC_VECT(DMAC0_DMINT3, 0x6a0),
183 INTC_VECT(DMAC0_DMAE, 0x6c0),
184 INTC_VECT(SCIF0_ERI, 0x700), INTC_VECT(SCIF0_RXI, 0x720),
185 INTC_VECT(SCIF0_BRI, 0x740), INTC_VECT(SCIF0_TXI, 0x760),
186 INTC_VECT(DMAC0_DMINT4, 0x780), INTC_VECT(DMAC0_DMINT5, 0x7a0),
187 INTC_VECT(IIC0, 0x8A0), INTC_VECT(IIC1, 0x8C0),
188 INTC_VECT(CMT, 0x900), INTC_VECT(GEINT0, 0x920),
189 INTC_VECT(GEINT1, 0x940), INTC_VECT(GEINT2, 0x960),
190 INTC_VECT(HAC, 0x980),
191 INTC_VECT(PCISERR, 0xa00), INTC_VECT(PCIINTA, 0xa20),
192 INTC_VECT(PCIINTB, 0xa40), INTC_VECT(PCIINTC, 0xa60),
193 INTC_VECT(PCIINTD, 0xa80), INTC_VECT(PCIERR, 0xaa0),
194 INTC_VECT(PCIPWD3, 0xac0), INTC_VECT(PCIPWD2, 0xae0),
195 INTC_VECT(PCIPWD1, 0xb00), INTC_VECT(PCIPWD0, 0xb20),
196 INTC_VECT(STIF0, 0xb40), INTC_VECT(STIF1, 0xb60),
197 INTC_VECT(SCIF1_ERI, 0xb80), INTC_VECT(SCIF1_RXI, 0xba0),
198 INTC_VECT(SCIF1_BRI, 0xbc0), INTC_VECT(SCIF1_TXI, 0xbe0),
199 INTC_VECT(SIOF0, 0xc00), INTC_VECT(SIOF1, 0xc20),
200 INTC_VECT(USBH, 0xc60), INTC_VECT(USBFI0, 0xc80),
201 INTC_VECT(USBFI1, 0xca0),
202 INTC_VECT(TPU, 0xcc0), INTC_VECT(PCC, 0xce0),
203 INTC_VECT(MMCIF_FSTAT, 0xd00), INTC_VECT(MMCIF_TRAN, 0xd20),
204 INTC_VECT(MMCIF_ERR, 0xd40), INTC_VECT(MMCIF_FRDY, 0xd60),
205 INTC_VECT(SIM_ERI, 0xd80), INTC_VECT(SIM_RXI, 0xda0),
206 INTC_VECT(SIM_TXI, 0xdc0), INTC_VECT(SIM_TEND, 0xde0),
207 INTC_VECT(TMU3, 0xe00), INTC_VECT(TMU4, 0xe20),
208 INTC_VECT(TMU5, 0xe40), INTC_VECT(ADC, 0xe60),
209 INTC_VECT(SSI0, 0xe80), INTC_VECT(SSI1, 0xea0),
210 INTC_VECT(SSI2, 0xec0), INTC_VECT(SSI3, 0xee0),
211 INTC_VECT(SCIF1_ERI, 0xf00), INTC_VECT(SCIF1_RXI, 0xf20),
212 INTC_VECT(SCIF1_BRI, 0xf40), INTC_VECT(SCIF1_TXI, 0xf60),
213 INTC_VECT(GPIO_CH0, 0xf80), INTC_VECT(GPIO_CH1, 0xfa0),
214 INTC_VECT(GPIO_CH2, 0xfc0), INTC_VECT(GPIO_CH3, 0xfe0),
215};
216
217static struct intc_group groups[] __initdata = {
218 INTC_GROUP(TMU012, TMU0, TMU1, TMU2, TMU2_TICPI),
219 INTC_GROUP(TMU345, TMU3, TMU4, TMU5),
220 INTC_GROUP(RTC, RTC_ATI, RTC_PRI, RTC_CUI),
221 INTC_GROUP(DMAC, DMAC0_DMINT0, DMAC0_DMINT1, DMAC0_DMINT2,
222 DMAC0_DMINT3, DMAC0_DMINT4, DMAC0_DMINT5, DMAC0_DMAE),
223 INTC_GROUP(SCIF0, SCIF0_ERI, SCIF0_RXI, SCIF0_BRI, SCIF0_TXI),
224 INTC_GROUP(GETHER, GEINT0, GEINT1, GEINT2),
225 INTC_GROUP(PCIC5, PCIERR, PCIPWD3, PCIPWD2, PCIPWD1, PCIPWD0),
226 INTC_GROUP(SCIF1, SCIF1_ERI, SCIF1_RXI, SCIF1_BRI, SCIF1_TXI),
227 INTC_GROUP(USBF, USBFI0, USBFI1),
228 INTC_GROUP(MMCIF, MMCIF_FSTAT, MMCIF_TRAN, MMCIF_ERR, MMCIF_FRDY),
229 INTC_GROUP(SIM, SIM_ERI, SIM_RXI, SIM_TXI, SIM_TEND),
230 INTC_GROUP(SCIF2, SCIF2_ERI, SCIF2_RXI, SCIF2_BRI, SCIF2_TXI),
231 INTC_GROUP(GPIO, GPIO_CH0, GPIO_CH1, GPIO_CH2, GPIO_CH3),
232};
233
234static struct intc_prio priorities[] __initdata = {
235 INTC_PRIO(SCIF0, 3),
236 INTC_PRIO(SCIF1, 3),
237 INTC_PRIO(SCIF2, 3),
238};
239
240static struct intc_mask_reg mask_registers[] __initdata = {
241 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
242 { 0, 0, 0, 0, 0, 0, GPIO, 0,
243 SSI0, MMCIF, 0, SIOF0, PCIC5, PCIINTD, PCIINTC, PCIINTB,
244 PCIINTA, PCISERR, HAC, CMT, 0, 0, 0, DMAC,
245 HUDI, 0, WDT, SCIF1, SCIF0, RTC, TMU345, TMU012 } },
246 { 0xffd400d0, 0xffd400d4, 32, /* INT2MSKR1 / INT2MSKCR1 */
247 { 0, 0, 0, 0, 0, 0, SCIF2, USBF,
248 0, 0, STIF1, STIF0, 0, 0, USBH, GETHER,
249 PCC, 0, 0, ADC, TPU, SIM, SIOF2, SIOF1,
250 LCDC, 0, IIC1, IIC0, SSI3, SSI2, SSI1, 0 } },
251};
252
253static struct intc_prio_reg prio_registers[] __initdata = {
254 { 0xffd40000, 0, 32, 8, /* INT2PRI0 */ { TMU0, TMU1,
255 TMU2, TMU2_TICPI } },
256 { 0xffd40004, 0, 32, 8, /* INT2PRI1 */ { TMU3, TMU4, TMU5, RTC } },
257 { 0xffd40008, 0, 32, 8, /* INT2PRI2 */ { SCIF0, SCIF1, WDT } },
258 { 0xffd4000c, 0, 32, 8, /* INT2PRI3 */ { HUDI, DMAC, ADC } },
259 { 0xffd40010, 0, 32, 8, /* INT2PRI4 */ { CMT, HAC,
260 PCISERR, PCIINTA } },
261 { 0xffd40014, 0, 32, 8, /* INT2PRI5 */ { PCIINTB, PCIINTC,
262 PCIINTD, PCIC5 } },
263 { 0xffd40018, 0, 32, 8, /* INT2PRI6 */ { SIOF0, USBF, MMCIF, SSI0 } },
264 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { SCIF2, GPIO } },
265 { 0xffd400a0, 0, 32, 8, /* INT2PRI8 */ { SSI3, SSI2, SSI1, 0 } },
266 { 0xffd400a4, 0, 32, 8, /* INT2PRI9 */ { LCDC, 0, IIC1, IIC0 } },
267 { 0xffd400a8, 0, 32, 8, /* INT2PRI10 */ { TPU, SIM, SIOF2, SIOF1 } },
268 { 0xffd400ac, 0, 32, 8, /* INT2PRI11 */ { PCC } },
269 { 0xffd400b0, 0, 32, 8, /* INT2PRI12 */ { 0, 0, USBH, GETHER } },
270 { 0xffd400b4, 0, 32, 8, /* INT2PRI13 */ { 0, 0, STIF1, STIF0 } },
271};
272
273static DECLARE_INTC_DESC(intc_desc, "sh7763", vectors, groups, priorities,
274 mask_registers, prio_registers, NULL);
275
276/* Support for external interrupt pins in IRQ mode */
277
278static struct intc_vect irq_vectors[] __initdata = {
279 INTC_VECT(IRQ0, 0x240), INTC_VECT(IRQ1, 0x280),
280 INTC_VECT(IRQ2, 0x2c0), INTC_VECT(IRQ3, 0x300),
281 INTC_VECT(IRQ4, 0x340), INTC_VECT(IRQ5, 0x380),
282 INTC_VECT(IRQ6, 0x3c0), INTC_VECT(IRQ7, 0x200),
283};
284
285static struct intc_mask_reg irq_mask_registers[] __initdata = {
286 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
287 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
288};
289
290static struct intc_prio_reg irq_prio_registers[] __initdata = {
291 { 0xffd00010, 0, 32, 4, /* INTPRI */ { IRQ0, IRQ1, IRQ2, IRQ3,
292 IRQ4, IRQ5, IRQ6, IRQ7 } },
293};
294
295static struct intc_sense_reg irq_sense_registers[] __initdata = {
296 { 0xffd0001c, 32, 2, /* ICR1 */ { IRQ0, IRQ1, IRQ2, IRQ3,
297 IRQ4, IRQ5, IRQ6, IRQ7 } },
298};
299
300static DECLARE_INTC_DESC(intc_irq_desc, "sh7763-irq", irq_vectors,
301 NULL, NULL, irq_mask_registers, irq_prio_registers,
302 irq_sense_registers);
303
304/* External interrupt pins in IRL mode */
305
306static struct intc_vect irl_vectors[] __initdata = {
307 INTC_VECT(IRL_LLLL, 0x200), INTC_VECT(IRL_LLLH, 0x220),
308 INTC_VECT(IRL_LLHL, 0x240), INTC_VECT(IRL_LLHH, 0x260),
309 INTC_VECT(IRL_LHLL, 0x280), INTC_VECT(IRL_LHLH, 0x2a0),
310 INTC_VECT(IRL_LHHL, 0x2c0), INTC_VECT(IRL_LHHH, 0x2e0),
311 INTC_VECT(IRL_HLLL, 0x300), INTC_VECT(IRL_HLLH, 0x320),
312 INTC_VECT(IRL_HLHL, 0x340), INTC_VECT(IRL_HLHH, 0x360),
313 INTC_VECT(IRL_HHLL, 0x380), INTC_VECT(IRL_HHLH, 0x3a0),
314 INTC_VECT(IRL_HHHL, 0x3c0),
315};
316
317static struct intc_mask_reg irl3210_mask_registers[] __initdata = {
318 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
319 { IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
320 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
321 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
322 IRL_HHLL, IRL_HHLH, IRL_HHHL, } },
323};
324
325static struct intc_mask_reg irl7654_mask_registers[] __initdata = {
326 { 0xffd40080, 0xffd40084, 32, /* INTMSK2 / INTMSKCLR2 */
327 { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
328 IRL_LLLL, IRL_LLLH, IRL_LLHL, IRL_LLHH,
329 IRL_LHLL, IRL_LHLH, IRL_LHHL, IRL_LHHH,
330 IRL_HLLL, IRL_HLLH, IRL_HLHL, IRL_HLHH,
331 IRL_HHLL, IRL_HHLH, IRL_HHHL, } },
332};
333
334static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7763-irl7654", irl_vectors,
335 NULL, NULL, irl7654_mask_registers, NULL, NULL);
336
337static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7763-irl3210", irl_vectors,
338 NULL, NULL, irl3210_mask_registers, NULL, NULL);
339
340#define INTC_ICR0 0xffd00000
341#define INTC_INTMSK0 0xffd00044
342#define INTC_INTMSK1 0xffd00048
343#define INTC_INTMSK2 0xffd40080
344#define INTC_INTMSKCLR1 0xffd00068
345#define INTC_INTMSKCLR2 0xffd40084
346
347void __init plat_irq_setup(void)
348{
349 /* disable IRQ7-0 */
350 ctrl_outl(0xff000000, INTC_INTMSK0);
351
352 /* disable IRL3-0 + IRL7-4 */
353 ctrl_outl(0xc0000000, INTC_INTMSK1);
354 ctrl_outl(0xfffefffe, INTC_INTMSK2);
355
356 register_intc_controller(&intc_desc);
357}
358
359void __init plat_irq_setup_pins(int mode)
360{
361 switch (mode) {
362 case IRQ_MODE_IRQ:
363 /* select IRQ mode for IRL3-0 + IRL7-4 */
364 ctrl_outl(ctrl_inl(INTC_ICR0) | 0x00c00000, INTC_ICR0);
365 register_intc_controller(&intc_irq_desc);
366 break;
367 case IRQ_MODE_IRL7654:
368 /* enable IRL7-4 but don't provide any masking */
369 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
370 ctrl_outl(0x0000fffe, INTC_INTMSKCLR2);
371 break;
372 case IRQ_MODE_IRL3210:
373 /* enable IRL0-3 but don't provide any masking */
374 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
375 ctrl_outl(0xfffe0000, INTC_INTMSKCLR2);
376 break;
377 case IRQ_MODE_IRL7654_MASK:
378 /* enable IRL7-4 and mask using cpu intc controller */
379 ctrl_outl(0x40000000, INTC_INTMSKCLR1);
380 register_intc_controller(&intc_irl7654_desc);
381 break;
382 case IRQ_MODE_IRL3210_MASK:
383 /* enable IRL0-3 and mask using cpu intc controller */
384 ctrl_outl(0x80000000, INTC_INTMSKCLR1);
385 register_intc_controller(&intc_irl3210_desc);
386 break;
387 default:
388 BUG();
389 }
390}
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
index e8fd33ff0605..293004b526ff 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7780.c
@@ -168,11 +168,6 @@ static struct intc_group groups[] __initdata = {
168 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), 168 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
169}; 169};
170 170
171static struct intc_prio priorities[] __initdata = {
172 INTC_PRIO(SCIF0, 3),
173 INTC_PRIO(SCIF1, 3),
174};
175
176static struct intc_mask_reg mask_registers[] __initdata = { 171static struct intc_mask_reg mask_registers[] __initdata = {
177 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */ 172 { 0xffd40038, 0xffd4003c, 32, /* INT2MSKR / INT2MSKCR */
178 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL, 173 { 0, 0, 0, 0, 0, 0, GPIO, FLCTL,
@@ -195,7 +190,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
195 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } }, 190 { 0xffd4001c, 0, 32, 8, /* INT2PRI7 */ { FLCTL, GPIO } },
196}; 191};
197 192
198static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups, priorities, 193static DECLARE_INTC_DESC(intc_desc, "sh7780", vectors, groups,
199 mask_registers, prio_registers, NULL); 194 mask_registers, prio_registers, NULL);
200 195
201/* Support for external interrupt pins in IRQ mode */ 196/* Support for external interrupt pins in IRQ mode */
@@ -223,7 +218,7 @@ static struct intc_sense_reg irq_sense_registers[] __initdata = {
223}; 218};
224 219
225static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors, 220static DECLARE_INTC_DESC(intc_irq_desc, "sh7780-irq", irq_vectors,
226 NULL, NULL, irq_mask_registers, irq_prio_registers, 221 NULL, irq_mask_registers, irq_prio_registers,
227 irq_sense_registers); 222 irq_sense_registers);
228 223
229/* External interrupt pins in IRL mode */ 224/* External interrupt pins in IRL mode */
@@ -257,10 +252,10 @@ static struct intc_mask_reg irl7654_mask_registers[] __initdata = {
257}; 252};
258 253
259static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors, 254static DECLARE_INTC_DESC(intc_irl7654_desc, "sh7780-irl7654", irl_vectors,
260 NULL, NULL, irl7654_mask_registers, NULL, NULL); 255 NULL, irl7654_mask_registers, NULL, NULL);
261 256
262static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors, 257static DECLARE_INTC_DESC(intc_irl3210_desc, "sh7780-irl3210", irl_vectors,
263 NULL, NULL, irl3210_mask_registers, NULL, NULL); 258 NULL, irl3210_mask_registers, NULL, NULL);
264 259
265#define INTC_ICR0 0xffd00000 260#define INTC_ICR0 0xffd00000
266#define INTC_INTMSK0 0xffd00044 261#define INTC_INTMSK0 0xffd00044
diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
index 39b215d6cee5..74b60e96cdf4 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-sh7785.c
@@ -178,15 +178,6 @@ static struct intc_group groups[] __initdata = {
178 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3), 178 INTC_GROUP(GPIO, GPIOI0, GPIOI1, GPIOI2, GPIOI3),
179}; 179};
180 180
181static struct intc_prio priorities[] __initdata = {
182 INTC_PRIO(SCIF0, 3),
183 INTC_PRIO(SCIF1, 3),
184 INTC_PRIO(SCIF2, 3),
185 INTC_PRIO(SCIF3, 3),
186 INTC_PRIO(SCIF4, 3),
187 INTC_PRIO(SCIF5, 3),
188};
189
190static struct intc_mask_reg mask_registers[] __initdata = { 181static struct intc_mask_reg mask_registers[] __initdata = {
191 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */ 182 { 0xffd00044, 0xffd00064, 32, /* INTMSK0 / INTMSKCLR0 */
192 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } }, 183 { IRQ0, IRQ1, IRQ2, IRQ3, IRQ4, IRQ5, IRQ6, IRQ7 } },
@@ -227,7 +218,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
227 { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } }, 218 { 0xffd40024, 0, 32, 8, /* INT2PRI9 */ { DU, GDTA, } },
228}; 219};
229 220
230static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups, priorities, 221static DECLARE_INTC_DESC(intc_desc, "sh7785", vectors, groups,
231 mask_registers, prio_registers, NULL); 222 mask_registers, prio_registers, NULL);
232 223
233/* Support for external interrupt pins in IRQ mode */ 224/* Support for external interrupt pins in IRQ mode */
@@ -248,11 +239,11 @@ static struct intc_sense_reg sense_registers[] __initdata = {
248}; 239};
249 240
250static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123, 241static DECLARE_INTC_DESC(intc_desc_irq0123, "sh7785-irq0123", vectors_irq0123,
251 NULL, NULL, mask_registers, prio_registers, 242 NULL, mask_registers, prio_registers,
252 sense_registers); 243 sense_registers);
253 244
254static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567, 245static DECLARE_INTC_DESC(intc_desc_irq4567, "sh7785-irq4567", vectors_irq4567,
255 NULL, NULL, mask_registers, prio_registers, 246 NULL, mask_registers, prio_registers,
256 sense_registers); 247 sense_registers);
257 248
258/* External interrupt pins in IRL mode */ 249/* External interrupt pins in IRL mode */
@@ -280,10 +271,10 @@ static struct intc_vect vectors_irl4567[] __initdata = {
280}; 271};
281 272
282static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123, 273static DECLARE_INTC_DESC(intc_desc_irl0123, "sh7785-irl0123", vectors_irl0123,
283 NULL, NULL, mask_registers, NULL, NULL); 274 NULL, mask_registers, NULL, NULL);
284 275
285static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567, 276static DECLARE_INTC_DESC(intc_desc_irl4567, "sh7785-irl4567", vectors_irl4567,
286 NULL, NULL, mask_registers, NULL, NULL); 277 NULL, mask_registers, NULL, NULL);
287 278
288#define INTC_ICR0 0xffd00000 279#define INTC_ICR0 0xffd00000
289#define INTC_INTMSK0 0xffd00044 280#define INTC_INTMSK0 0xffd00044
diff --git a/arch/sh/kernel/cpu/sh4a/setup-shx3.c b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
index c6cdd7e3b049..4dc958b6b314 100644
--- a/arch/sh/kernel/cpu/sh4a/setup-shx3.c
+++ b/arch/sh/kernel/cpu/sh4a/setup-shx3.c
@@ -165,13 +165,6 @@ static struct intc_group groups[] __initdata = {
165 INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS), 165 INTC_GROUP(DTU3, DTU3_TEND, DTU3_AE, DTU3_TMISS),
166}; 166};
167 167
168static struct intc_prio priorities[] __initdata = {
169 INTC_PRIO(SCIF0, 3),
170 INTC_PRIO(SCIF1, 3),
171 INTC_PRIO(SCIF2, 3),
172 INTC_PRIO(SCIF3, 3),
173};
174
175static struct intc_mask_reg mask_registers[] __initdata = { 168static struct intc_mask_reg mask_registers[] __initdata = {
176 { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */ 169 { 0xfe410030, 0xfe410050, 32, /* CnINTMSK0 / CnINTMSKCLR0 */
177 { IRQ0, IRQ1, IRQ2, IRQ3 } }, 170 { IRQ0, IRQ1, IRQ2, IRQ3 } },
@@ -218,7 +211,7 @@ static struct intc_prio_reg prio_registers[] __initdata = {
218 INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) }, 211 INTICI3, INTICI2, INTICI1, INTICI0 }, INTC_SMP(4, 4) },
219}; 212};
220 213
221static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups, priorities, 214static DECLARE_INTC_DESC(intc_desc, "shx3", vectors, groups,
222 mask_registers, prio_registers, NULL); 215 mask_registers, prio_registers, NULL);
223 216
224/* Support for external interrupt pins in IRQ mode */ 217/* Support for external interrupt pins in IRQ mode */
@@ -232,8 +225,7 @@ static struct intc_sense_reg sense_registers[] __initdata = {
232}; 225};
233 226
234static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups, 227static DECLARE_INTC_DESC(intc_desc_irq, "shx3-irq", vectors_irq, groups,
235 priorities, mask_registers, prio_registers, 228 mask_registers, prio_registers, sense_registers);
236 sense_registers);
237 229
238/* External interrupt pins in IRL mode */ 230/* External interrupt pins in IRL mode */
239static struct intc_vect vectors_irl[] __initdata = { 231static struct intc_vect vectors_irl[] __initdata = {
@@ -248,7 +240,7 @@ static struct intc_vect vectors_irl[] __initdata = {
248}; 240};
249 241
250static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups, 242static DECLARE_INTC_DESC(intc_desc_irl, "shx3-irl", vectors_irl, groups,
251 priorities, mask_registers, prio_registers, NULL); 243 mask_registers, prio_registers, NULL);
252 244
253void __init plat_irq_setup_pins(int mode) 245void __init plat_irq_setup_pins(int mode)
254{ 246{
diff --git a/arch/sh/kernel/cpu/sh5/Makefile b/arch/sh/kernel/cpu/sh5/Makefile
new file mode 100644
index 000000000000..8646363e9ded
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh5/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the Linux/SuperH SH-5 backends.
3#
4obj-y := entry.o probe.o switchto.o
5
6obj-$(CONFIG_SH_FPU) += fpu.o
7obj-$(CONFIG_KALLSYMS) += unwind.o
diff --git a/arch/sh64/kernel/entry.S b/arch/sh/kernel/cpu/sh5/entry.S
index 7013fcb6665c..ba8750176d91 100644
--- a/arch/sh64/kernel/entry.S
+++ b/arch/sh/kernel/cpu/sh5/entry.S
@@ -1,21 +1,18 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/cpu/sh5/entry.S
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/entry.S
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2004, 2005 Paul Mundt 5 * Copyright (C) 2004 - 2007 Paul Mundt
10 * Copyright (C) 2003, 2004 Richard Curnow 6 * Copyright (C) 2003, 2004 Richard Curnow
11 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
12 */ 11 */
13
14#include <linux/errno.h> 12#include <linux/errno.h>
15#include <linux/sys.h> 13#include <linux/sys.h>
16 14#include <asm/cpu/registers.h>
17#include <asm/processor.h> 15#include <asm/processor.h>
18#include <asm/registers.h>
19#include <asm/unistd.h> 16#include <asm/unistd.h>
20#include <asm/thread_info.h> 17#include <asm/thread_info.h>
21#include <asm/asm-offsets.h> 18#include <asm/asm-offsets.h>
@@ -163,7 +160,7 @@ trap_jtable:
163 .long system_call /* 0x160 */ 160 .long system_call /* 0x160 */
164 .long do_reserved_inst /* 0x180 */ 161 .long do_reserved_inst /* 0x180 */
165 .long do_illegal_slot_inst /* 0x1A0 */ 162 .long do_illegal_slot_inst /* 0x1A0 */
166 .long do_NMI /* 0x1C0 */ 163 .long do_exception_error /* 0x1C0 - NMI */
167 .long do_exception_error /* 0x1E0 */ 164 .long do_exception_error /* 0x1E0 */
168 .rept 15 165 .rept 15
169 .long do_IRQ /* 0x200 - 0x3C0 */ 166 .long do_IRQ /* 0x200 - 0x3C0 */
@@ -434,7 +431,7 @@ reset_or_panic:
434 synco /* TAKum03020 (but probably a good idea anyway.) */ 431 synco /* TAKum03020 (but probably a good idea anyway.) */
435 putcon SP, DCR 432 putcon SP, DCR
436 /* First save r0-1 and tr0, as we need to use these */ 433 /* First save r0-1 and tr0, as we need to use these */
437 movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP 434 movi resvec_save_area-CONFIG_PAGE_OFFSET, SP
438 st.q SP, 0, r0 435 st.q SP, 0, r0
439 st.q SP, 8, r1 436 st.q SP, 8, r1
440 gettr tr0, r0 437 gettr tr0, r0
@@ -444,7 +441,7 @@ reset_or_panic:
444 getcon EXPEVT, r0 441 getcon EXPEVT, r0
445 movi RESET_CAUSE, r1 442 movi RESET_CAUSE, r1
446 sub r1, r0, r1 /* r1=0 if reset */ 443 sub r1, r0, r1 /* r1=0 if reset */
447 movi _stext-CONFIG_CACHED_MEMORY_OFFSET, r0 444 movi _stext-CONFIG_PAGE_OFFSET, r0
448 ori r0, 1, r0 445 ori r0, 1, r0
449 ptabs r0, tr0 446 ptabs r0, tr0
450 beqi r1, 0, tr0 /* Jump to start address if reset */ 447 beqi r1, 0, tr0 /* Jump to start address if reset */
@@ -456,7 +453,7 @@ reset_or_panic:
456 beqi r1, 0, tr0 /* jump if single step */ 453 beqi r1, 0, tr0 /* jump if single step */
457 454
458 /* Now jump to where we save the registers. */ 455 /* Now jump to where we save the registers. */
459 movi panic_stash_regs-CONFIG_CACHED_MEMORY_OFFSET, r1 456 movi panic_stash_regs-CONFIG_PAGE_OFFSET, r1
460 ptabs r1, tr0 457 ptabs r1, tr0
461 blink tr0, r63 458 blink tr0, r63
462 459
@@ -492,7 +489,7 @@ debug_exception:
492 */ 489 */
493 putcon SP, DCR 490 putcon SP, DCR
494 /* Save SSR & SPC, together with R0 & R1, as we need to use 2 regs. */ 491 /* Save SSR & SPC, together with R0 & R1, as we need to use 2 regs. */
495 movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP 492 movi resvec_save_area-CONFIG_PAGE_OFFSET, SP
496 493
497 /* With the MMU off, we are bypassing the cache, so purge any 494 /* With the MMU off, we are bypassing the cache, so purge any
498 * data that will be made stale by the following stores. 495 * data that will be made stale by the following stores.
@@ -560,7 +557,7 @@ debug_interrupt:
560 /* Save original stack pointer into KCR1 */ 557 /* Save original stack pointer into KCR1 */
561 synco 558 synco
562 putcon SP, KCR1 559 putcon SP, KCR1
563 movi resvec_save_area-CONFIG_CACHED_MEMORY_OFFSET, SP 560 movi resvec_save_area-CONFIG_PAGE_OFFSET, SP
564 ocbp SP, 0 561 ocbp SP, 0
565 ocbp SP, 32 562 ocbp SP, 32
566 synco 563 synco
@@ -609,7 +606,7 @@ debug_interrupt:
609 movi EVENT_FAULT_NOT_TLB, r4 606 movi EVENT_FAULT_NOT_TLB, r4
610 607
611 or SP, ZERO, r5 608 or SP, ZERO, r5
612 movi CONFIG_CACHED_MEMORY_OFFSET, r6 609 movi CONFIG_PAGE_OFFSET, r6
613 add r6, r5, r5 610 add r6, r5, r5
614 getcon KCR1, SP 611 getcon KCR1, SP
615 612
@@ -944,9 +941,6 @@ ret_with_reschedule:
944 getcon KCR0, r6 ! r6 contains current_thread_info 941 getcon KCR0, r6 ! r6 contains current_thread_info
945 ld.l r6, TI_FLAGS, r7 ! r7 contains current_thread_info->flags 942 ld.l r6, TI_FLAGS, r7 ! r7 contains current_thread_info->flags
946 943
947 ! FIXME:!!!
948 ! no handling of TIF_SYSCALL_TRACE yet!!
949
950 movi _TIF_NEED_RESCHED, r8 944 movi _TIF_NEED_RESCHED, r8
951 and r8, r7, r8 945 and r8, r7, r8
952 pta work_resched, tr0 946 pta work_resched, tr0
@@ -1282,14 +1276,17 @@ syscall_allowed:
1282 1276
1283 getcon KCR0, r2 1277 getcon KCR0, r2
1284 ld.l r2, TI_FLAGS, r4 1278 ld.l r2, TI_FLAGS, r4
1285 movi (1 << TIF_SYSCALL_TRACE), r6 1279 movi (_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | _TIF_SYSCALL_AUDIT), r6
1286 and r6, r4, r6 1280 and r6, r4, r6
1287 beq/l r6, ZERO, tr0 1281 beq/l r6, ZERO, tr0
1288 1282
1289 /* Trace it by calling syscall_trace before and after */ 1283 /* Trace it by calling syscall_trace before and after */
1290 movi syscall_trace, r4 1284 movi syscall_trace, r4
1285 or SP, ZERO, r2
1286 or ZERO, ZERO, r3
1291 ptabs r4, tr0 1287 ptabs r4, tr0
1292 blink tr0, LINK 1288 blink tr0, LINK
1289
1293 /* Reload syscall number as r5 is trashed by syscall_trace */ 1290 /* Reload syscall number as r5 is trashed by syscall_trace */
1294 ld.q SP, FRAME_S(FSYSCALL_ID), r5 1291 ld.q SP, FRAME_S(FSYSCALL_ID), r5
1295 andi r5, 0x1ff, r5 1292 andi r5, 0x1ff, r5
@@ -1323,6 +1320,8 @@ syscall_ret_trace:
1323 st.q SP, FRAME_R(9), r2 /* Save return value */ 1320 st.q SP, FRAME_R(9), r2 /* Save return value */
1324 1321
1325 movi syscall_trace, LINK 1322 movi syscall_trace, LINK
1323 or SP, ZERO, r2
1324 movi 1, r3
1326 ptabs LINK, tr0 1325 ptabs LINK, tr0
1327 blink tr0, LINK 1326 blink tr0, LINK
1328 1327
@@ -1368,7 +1367,7 @@ route_to_panic_handler:
1368 last-chance debugging, e.g. if no output wants to go to the console. 1367 last-chance debugging, e.g. if no output wants to go to the console.
1369 */ 1368 */
1370 1369
1371 movi panic_handler - CONFIG_CACHED_MEMORY_OFFSET, r1 1370 movi panic_handler - CONFIG_PAGE_OFFSET, r1
1372 ptabs r1, tr0 1371 ptabs r1, tr0
1373 pta 1f, tr1 1372 pta 1f, tr1
1374 gettr tr1, r0 1373 gettr tr1, r0
@@ -1410,7 +1409,7 @@ peek_real_address_q:
1410 andc r1, r36, r1 /* turn sr.mmu off in real mode section */ 1409 andc r1, r36, r1 /* turn sr.mmu off in real mode section */
1411 1410
1412 putcon r1, ssr 1411 putcon r1, ssr
1413 movi .peek0 - CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ 1412 movi .peek0 - CONFIG_PAGE_OFFSET, r36 /* real mode target address */
1414 movi 1f, r37 /* virtual mode return addr */ 1413 movi 1f, r37 /* virtual mode return addr */
1415 putcon r36, spc 1414 putcon r36, spc
1416 1415
@@ -1459,7 +1458,7 @@ poke_real_address_q:
1459 andc r1, r36, r1 /* turn sr.mmu off in real mode section */ 1458 andc r1, r36, r1 /* turn sr.mmu off in real mode section */
1460 1459
1461 putcon r1, ssr 1460 putcon r1, ssr
1462 movi .poke0-CONFIG_CACHED_MEMORY_OFFSET, r36 /* real mode target address */ 1461 movi .poke0-CONFIG_PAGE_OFFSET, r36 /* real mode target address */
1463 movi 1f, r37 /* virtual mode return addr */ 1462 movi 1f, r37 /* virtual mode return addr */
1464 putcon r36, spc 1463 putcon r36, spc
1465 1464
@@ -1956,7 +1955,7 @@ panic_stash_regs:
1956 getcon SSR,r3 1955 getcon SSR,r3
1957 getcon EXPEVT,r4 1956 getcon EXPEVT,r4
1958 /* Prepare to jump to C - physical address */ 1957 /* Prepare to jump to C - physical address */
1959 movi panic_handler-CONFIG_CACHED_MEMORY_OFFSET, r1 1958 movi panic_handler-CONFIG_PAGE_OFFSET, r1
1960 ori r1, 1, r1 1959 ori r1, 1, r1
1961 ptabs r1, tr0 1960 ptabs r1, tr0
1962 getcon DCR, SP 1961 getcon DCR, SP
@@ -2057,7 +2056,7 @@ trap_init:
2057 andi r19, -4, r19 /* reset MMUOFF + reserved */ 2056 andi r19, -4, r19 /* reset MMUOFF + reserved */
2058 /* For RESVEC exceptions we force the MMU off, which means we need the 2057 /* For RESVEC exceptions we force the MMU off, which means we need the
2059 physical address. */ 2058 physical address. */
2060 movi LRESVEC_block-CONFIG_CACHED_MEMORY_OFFSET, r20 2059 movi LRESVEC_block-CONFIG_PAGE_OFFSET, r20
2061 andi r20, -4, r20 /* reset reserved */ 2060 andi r20, -4, r20 /* reset reserved */
2062 ori r20, 1, r20 /* set MMUOFF */ 2061 ori r20, 1, r20 /* set MMUOFF */
2063 putcon r19, VBR 2062 putcon r19, VBR
diff --git a/arch/sh64/kernel/fpu.c b/arch/sh/kernel/cpu/sh5/fpu.c
index 8ad4ed6a6c9b..30b76a94abf2 100644
--- a/arch/sh64/kernel/fpu.c
+++ b/arch/sh/kernel/cpu/sh5/fpu.c
@@ -1,9 +1,5 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/cpu/sh5/fpu.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/fpu.c
7 * 3 *
8 * Copyright (C) 2001 Manuela Cirronis, Paolo Alberelli 4 * Copyright (C) 2001 Manuela Cirronis, Paolo Alberelli
9 * Copyright (C) 2002 STMicroelectronics Limited 5 * Copyright (C) 2002 STMicroelectronics Limited
@@ -12,8 +8,10 @@
12 * Started from SH4 version: 8 * Started from SH4 version:
13 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 9 * Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
14 * 10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
15 */ 14 */
16
17#include <linux/sched.h> 15#include <linux/sched.h>
18#include <linux/signal.h> 16#include <linux/signal.h>
19#include <asm/processor.h> 17#include <asm/processor.h>
@@ -30,12 +28,12 @@
30 28
31static union sh_fpu_union init_fpuregs = { 29static union sh_fpu_union init_fpuregs = {
32 .hard = { 30 .hard = {
33 .fp_regs = { [0 ... 63] = sNAN32 }, 31 .fp_regs = { [0 ... 63] = sNAN32 },
34 .fpscr = FPSCR_INIT 32 .fpscr = FPSCR_INIT
35 } 33 }
36}; 34};
37 35
38inline void fpsave(struct sh_fpu_hard_struct *fpregs) 36void save_fpu(struct task_struct *tsk, struct pt_regs *regs)
39{ 37{
40 asm volatile("fst.p %0, (0*8), fp0\n\t" 38 asm volatile("fst.p %0, (0*8), fp0\n\t"
41 "fst.p %0, (1*8), fp2\n\t" 39 "fst.p %0, (1*8), fp2\n\t"
@@ -73,11 +71,10 @@ inline void fpsave(struct sh_fpu_hard_struct *fpregs)
73 "fgetscr fr63\n\t" 71 "fgetscr fr63\n\t"
74 "fst.s %0, (32*8), fr63\n\t" 72 "fst.s %0, (32*8), fr63\n\t"
75 : /* no output */ 73 : /* no output */
76 : "r" (fpregs) 74 : "r" (&tsk->thread.fpu.hard)
77 : "memory"); 75 : "memory");
78} 76}
79 77
80
81static inline void 78static inline void
82fpload(struct sh_fpu_hard_struct *fpregs) 79fpload(struct sh_fpu_hard_struct *fpregs)
83{ 80{
@@ -152,11 +149,11 @@ do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
152 if (last_task_used_math == current) 149 if (last_task_used_math == current)
153 return; 150 return;
154 151
155 grab_fpu(); 152 enable_fpu();
156 if (last_task_used_math != NULL) { 153 if (last_task_used_math != NULL)
157 /* Other processes fpu state, save away */ 154 /* Other processes fpu state, save away */
158 fpsave(&last_task_used_math->thread.fpu.hard); 155 save_fpu(last_task_used_math, regs);
159 } 156
160 last_task_used_math = current; 157 last_task_used_math = current;
161 if (used_math()) { 158 if (used_math()) {
162 fpload(&current->thread.fpu.hard); 159 fpload(&current->thread.fpu.hard);
@@ -165,6 +162,5 @@ do_fpu_state_restore(unsigned long ex, struct pt_regs *regs)
165 fpload(&init_fpuregs.hard); 162 fpload(&init_fpuregs.hard);
166 set_used_math(); 163 set_used_math();
167 } 164 }
168 release_fpu(); 165 disable_fpu();
169} 166}
170
diff --git a/arch/sh/kernel/cpu/sh5/probe.c b/arch/sh/kernel/cpu/sh5/probe.c
new file mode 100644
index 000000000000..15d167fd0ae7
--- /dev/null
+++ b/arch/sh/kernel/cpu/sh5/probe.c
@@ -0,0 +1,76 @@
1/*
2 * arch/sh/kernel/cpu/sh5/probe.c
3 *
4 * CPU Subtype Probing for SH-5.
5 *
6 * Copyright (C) 2000, 2001 Paolo Alberelli
7 * Copyright (C) 2003 - 2007 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/string.h>
16#include <asm/processor.h>
17#include <asm/cache.h>
18
19int __init detect_cpu_and_cache_system(void)
20{
21 unsigned long long cir;
22
23 /* Do peeks in real mode to avoid having to set up a mapping for the
24 WPC registers. On SH5-101 cut2, such a mapping would be exposed to
25 an address translation erratum which would make it hard to set up
26 correctly. */
27 cir = peek_real_address_q(0x0d000008);
28 if ((cir & 0xffff) == 0x5103) {
29 boot_cpu_data.type = CPU_SH5_103;
30 } else if (((cir >> 32) & 0xffff) == 0x51e2) {
31 /* CPU.VCR aliased at CIR address on SH5-101 */
32 boot_cpu_data.type = CPU_SH5_101;
33 } else {
34 boot_cpu_data.type = CPU_SH_NONE;
35 }
36
37 /*
38 * First, setup some sane values for the I-cache.
39 */
40 boot_cpu_data.icache.ways = 4;
41 boot_cpu_data.icache.sets = 256;
42 boot_cpu_data.icache.linesz = L1_CACHE_BYTES;
43
44#if 0
45 /*
46 * FIXME: This can probably be cleaned up a bit as well.. for example,
47 * do we really need the way shift _and_ the way_step_shift ?? Judging
48 * by the existing code, I would guess no.. is there any valid reason
49 * why we need to be tracking this around?
50 */
51 boot_cpu_data.icache.way_shift = 13;
52 boot_cpu_data.icache.entry_shift = 5;
53 boot_cpu_data.icache.set_shift = 4;
54 boot_cpu_data.icache.way_step_shift = 16;
55 boot_cpu_data.icache.asid_shift = 2;
56
57 /*
58 * way offset = cache size / associativity, so just don't factor in
59 * associativity in the first place..
60 */
61 boot_cpu_data.icache.way_ofs = boot_cpu_data.icache.sets *
62 boot_cpu_data.icache.linesz;
63
64 boot_cpu_data.icache.asid_mask = 0x3fc;
65 boot_cpu_data.icache.idx_mask = 0x1fe0;
66 boot_cpu_data.icache.epn_mask = 0xffffe000;
67#endif
68
69 boot_cpu_data.icache.flags = 0;
70
71 /* A trivial starting point.. */
72 memcpy(&boot_cpu_data.dcache,
73 &boot_cpu_data.icache, sizeof(struct cache_info));
74
75 return 0;
76}
diff --git a/arch/sh64/kernel/switchto.S b/arch/sh/kernel/cpu/sh5/switchto.S
index 45b2d90eed7d..45c351b0f1ba 100644
--- a/arch/sh64/kernel/switchto.S
+++ b/arch/sh/kernel/cpu/sh5/switchto.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/kernel/switchto.S 2 * arch/sh/kernel/cpu/sh5/switchto.S
3 * 3 *
4 * sh64 context switch 4 * sh64 context switch
5 * 5 *
diff --git a/arch/sh64/kernel/unwind.c b/arch/sh/kernel/cpu/sh5/unwind.c
index 1214c78e3584..119c20afd4e5 100644
--- a/arch/sh64/kernel/unwind.c
+++ b/arch/sh/kernel/cpu/sh5/unwind.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/kernel/unwind.c 2 * arch/sh/kernel/cpu/sh5/unwind.c
3 * 3 *
4 * Copyright (C) 2004 Paul Mundt 4 * Copyright (C) 2004 Paul Mundt
5 * Copyright (C) 2004 Richard Curnow 5 * Copyright (C) 2004 Richard Curnow
diff --git a/arch/sh/kernel/dump_task.c b/arch/sh/kernel/dump_task.c
new file mode 100644
index 000000000000..4a8a4083ff0b
--- /dev/null
+++ b/arch/sh/kernel/dump_task.c
@@ -0,0 +1,31 @@
1#include <linux/elfcore.h>
2#include <linux/sched.h>
3
4/*
5 * Capture the user space registers if the task is not running (in user space)
6 */
7int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
8{
9 struct pt_regs ptregs;
10
11 ptregs = *task_pt_regs(tsk);
12 elf_core_copy_regs(regs, &ptregs);
13
14 return 1;
15}
16
17int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu)
18{
19 int fpvalid = 0;
20
21#if defined(CONFIG_SH_FPU)
22 fpvalid = !!tsk_used_math(tsk);
23 if (fpvalid) {
24 unlazy_fpu(tsk, task_pt_regs(tsk));
25 memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu));
26 }
27#endif
28
29 return fpvalid;
30}
31
diff --git a/arch/sh/kernel/early_printk.c b/arch/sh/kernel/early_printk.c
index 2f30977558ad..957f25611543 100644
--- a/arch/sh/kernel/early_printk.c
+++ b/arch/sh/kernel/early_printk.c
@@ -63,7 +63,8 @@ static struct console bios_console = {
63#include <linux/serial_core.h> 63#include <linux/serial_core.h>
64#include "../../../drivers/serial/sh-sci.h" 64#include "../../../drivers/serial/sh-sci.h"
65 65
66#if defined(CONFIG_CPU_SUBTYPE_SH7720) 66#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
67 defined(CONFIG_CPU_SUBTYPE_SH7721)
67#define EPK_SCSMR_VALUE 0x000 68#define EPK_SCSMR_VALUE 0x000
68#define EPK_SCBRR_VALUE 0x00C 69#define EPK_SCBRR_VALUE 0x00C
69#define EPK_FIFO_SIZE 64 70#define EPK_FIFO_SIZE 64
@@ -117,7 +118,8 @@ static struct console scif_console = {
117}; 118};
118 119
119#if !defined(CONFIG_SH_STANDARD_BIOS) 120#if !defined(CONFIG_SH_STANDARD_BIOS)
120#if defined(CONFIG_CPU_SUBTYPE_SH7720) 121#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
122 defined(CONFIG_CPU_SUBTYPE_SH7721)
121static void scif_sercon_init(char *s) 123static void scif_sercon_init(char *s)
122{ 124{
123 sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */ 125 sci_out(&scif_port, SCSCR, 0x0000); /* clear TE and RE */
@@ -208,10 +210,12 @@ static int __init setup_early_printk(char *buf)
208 if (!strncmp(buf, "serial", 6)) { 210 if (!strncmp(buf, "serial", 6)) {
209 early_console = &scif_console; 211 early_console = &scif_console;
210 212
211#if (defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720)) && \ 213#if !defined(CONFIG_SH_STANDARD_BIOS)
212 !defined(CONFIG_SH_STANDARD_BIOS) 214#if defined(CONFIG_CPU_SH4) || defined(CONFIG_CPU_SUBTYPE_SH7720) || \
215 defined(CONFIG_CPU_SUBTYPE_SH7721)
213 scif_sercon_init(buf + 6); 216 scif_sercon_init(buf + 6);
214#endif 217#endif
218#endif
215 } 219 }
216#endif 220#endif
217 221
diff --git a/arch/sh/kernel/entry-common.S b/arch/sh/kernel/entry-common.S
index e0317ed080c3..926b2e7b11c1 100644
--- a/arch/sh/kernel/entry-common.S
+++ b/arch/sh/kernel/entry-common.S
@@ -176,25 +176,6 @@ work_notifysig:
176 jmp @r1 176 jmp @r1
177 lds r0, pr 177 lds r0, pr
178work_resched: 178work_resched:
179#if defined(CONFIG_GUSA) && !defined(CONFIG_PREEMPT)
180 ! gUSA handling
181 mov.l @(OFF_SP,r15), r0 ! get user space stack pointer
182 mov r0, r1
183 shll r0
184 bf/s 1f
185 shll r0
186 bf/s 1f
187 mov #OFF_PC, r0
188 ! SP >= 0xc0000000 : gUSA mark
189 mov.l @(r0,r15), r2 ! get user space PC (program counter)
190 mov.l @(OFF_R0,r15), r3 ! end point
191 cmp/hs r3, r2 ! r2 >= r3?
192 bt 1f
193 add r3, r1 ! rewind point #2
194 mov.l r1, @(r0,r15) ! reset PC to rewind point #2
195 !
1961:
197#endif
198 mov.l 1f, r1 179 mov.l 1f, r1
199 jsr @r1 ! schedule 180 jsr @r1 ! schedule
200 nop 181 nop
@@ -224,7 +205,7 @@ work_resched:
224syscall_exit_work: 205syscall_exit_work:
225 ! r0: current_thread_info->flags 206 ! r0: current_thread_info->flags
226 ! r8: current_thread_info 207 ! r8: current_thread_info
227 tst #_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP, r0 208 tst #_TIF_SYSCALL_TRACE | _TIF_SINGLESTEP | _TIF_SYSCALL_AUDIT, r0
228 bt/s work_pending 209 bt/s work_pending
229 tst #_TIF_NEED_RESCHED, r0 210 tst #_TIF_NEED_RESCHED, r0
230#ifdef CONFIG_TRACE_IRQFLAGS 211#ifdef CONFIG_TRACE_IRQFLAGS
@@ -234,6 +215,8 @@ syscall_exit_work:
234#endif 215#endif
235 sti 216 sti
236 ! XXX setup arguments... 217 ! XXX setup arguments...
218 mov r15, r4
219 mov #1, r5
237 mov.l 4f, r0 ! do_syscall_trace 220 mov.l 4f, r0 ! do_syscall_trace
238 jsr @r0 221 jsr @r0
239 nop 222 nop
@@ -244,6 +227,8 @@ syscall_exit_work:
244syscall_trace_entry: 227syscall_trace_entry:
245 ! Yes it is traced. 228 ! Yes it is traced.
246 ! XXX setup arguments... 229 ! XXX setup arguments...
230 mov r15, r4
231 mov #0, r5
247 mov.l 4f, r11 ! Call do_syscall_trace which notifies 232 mov.l 4f, r11 ! Call do_syscall_trace which notifies
248 jsr @r11 ! superior (will chomp R[0-7]) 233 jsr @r11 ! superior (will chomp R[0-7])
249 nop 234 nop
@@ -366,7 +351,7 @@ ENTRY(system_call)
366 ! 351 !
367 get_current_thread_info r8, r10 352 get_current_thread_info r8, r10
368 mov.l @(TI_FLAGS,r8), r8 353 mov.l @(TI_FLAGS,r8), r8
369 mov #_TIF_SYSCALL_TRACE, r10 354 mov #(_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT), r10
370 tst r10, r8 355 tst r10, r8
371 bf syscall_trace_entry 356 bf syscall_trace_entry
372 ! 357 !
diff --git a/arch/sh/kernel/head.S b/arch/sh/kernel/head_32.S
index 3338239717f1..d67d7ed09f22 100644
--- a/arch/sh/kernel/head.S
+++ b/arch/sh/kernel/head_32.S
@@ -32,7 +32,11 @@ ENTRY(empty_zero_page)
32 .long 1 /* LOADER_TYPE */ 32 .long 1 /* LOADER_TYPE */
33 .long 0x00360000 /* INITRD_START */ 33 .long 0x00360000 /* INITRD_START */
34 .long 0x000a0000 /* INITRD_SIZE */ 34 .long 0x000a0000 /* INITRD_SIZE */
35 .long 0 35#ifdef CONFIG_32BIT
36 .long 0x53453f00 + 32 /* "SE?" = 32 bit */
37#else
38 .long 0x53453f00 + 29 /* "SE?" = 29 bit */
39#endif
361: 401:
37 .skip PAGE_SIZE - empty_zero_page - 1b 41 .skip PAGE_SIZE - empty_zero_page - 1b
38 42
diff --git a/arch/sh64/kernel/head.S b/arch/sh/kernel/head_64.S
index 186406d3ad9c..f42d4c0feb76 100644
--- a/arch/sh64/kernel/head.S
+++ b/arch/sh/kernel/head_64.S
@@ -1,32 +1,18 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/head_64.S
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/head.S
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003, 2004 Paul Mundt 5 * Copyright (C) 2003, 2004 Paul Mundt
10 * 6 *
11 * 7 * This file is subject to the terms and conditions of the GNU General Public
12 * benedict.gaster@superh.com: 2nd May 2002 8 * License. See the file "COPYING" in the main directory of this archive
13 * Moved definition of empty_zero_page to its own section allowing 9 * for more details.
14 * it to be placed at an absolute address known at load time.
15 *
16 * lethal@linux-sh.org: 9th May 2003
17 * Kill off GLOBAL_NAME() usage.
18 *
19 * lethal@linux-sh.org: 8th May 2004
20 * Add early SCIF console DTLB mapping.
21 */ 10 */
22
23
24#include <asm/page.h> 11#include <asm/page.h>
25#include <asm/mmu_context.h>
26#include <asm/cache.h> 12#include <asm/cache.h>
27#include <asm/tlb.h> 13#include <asm/tlb.h>
28#include <asm/processor.h> 14#include <asm/cpu/registers.h>
29#include <asm/registers.h> 15#include <asm/cpu/mmu_context.h>
30#include <asm/thread_info.h> 16#include <asm/thread_info.h>
31 17
32/* 18/*
@@ -41,9 +27,9 @@
41#define MMUDR_END DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP 27#define MMUDR_END DTLB_LAST_VAR_UNRESTRICTED+TLB_STEP
42#define MMUDR_STEP TLB_STEP 28#define MMUDR_STEP TLB_STEP
43 29
44/* Safety check : CONFIG_CACHED_MEMORY_OFFSET has to be a multiple of 512Mb */ 30/* Safety check : CONFIG_PAGE_OFFSET has to be a multiple of 512Mb */
45#if (CONFIG_CACHED_MEMORY_OFFSET & ((1UL<<29)-1)) 31#if (CONFIG_PAGE_OFFSET & ((1UL<<29)-1))
46#error "CONFIG_CACHED_MEMORY_OFFSET must be a multiple of 512Mb" 32#error "CONFIG_PAGE_OFFSET must be a multiple of 512Mb"
47#endif 33#endif
48 34
49/* 35/*
@@ -52,7 +38,7 @@
52/* Deal safely with the case where the base of RAM is not 512Mb aligned */ 38/* Deal safely with the case where the base of RAM is not 512Mb aligned */
53 39
54#define ALIGN_512M_MASK (0xffffffffe0000000) 40#define ALIGN_512M_MASK (0xffffffffe0000000)
55#define ALIGNED_EFFECTIVE ((CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK) 41#define ALIGNED_EFFECTIVE ((CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START) & ALIGN_512M_MASK)
56#define ALIGNED_PHYSICAL (CONFIG_MEMORY_START & ALIGN_512M_MASK) 42#define ALIGNED_PHYSICAL (CONFIG_MEMORY_START & ALIGN_512M_MASK)
57 43
58#define MMUIR_TEXT_H (0x0000000000000003 | ALIGNED_EFFECTIVE) 44#define MMUIR_TEXT_H (0x0000000000000003 | ALIGNED_EFFECTIVE)
@@ -66,23 +52,23 @@
66#define MMUDR_CACHED_L 0x000000000000015a | ALIGNED_PHYSICAL 52#define MMUDR_CACHED_L 0x000000000000015a | ALIGNED_PHYSICAL
67 /* 512 Mb, Cacheable, Write-back, read/write, Not User, Ph. Add. */ 53 /* 512 Mb, Cacheable, Write-back, read/write, Not User, Ph. Add. */
68 54
69#ifdef CONFIG_ICACHE_DISABLED 55#ifdef CONFIG_CACHE_OFF
70#define ICCR0_INIT_VAL ICCR0_OFF /* ICACHE off */ 56#define ICCR0_INIT_VAL ICCR0_OFF /* ICACHE off */
71#else 57#else
72#define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */ 58#define ICCR0_INIT_VAL ICCR0_ON | ICCR0_ICI /* ICE + ICI */
73#endif 59#endif
74#define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */ 60#define ICCR1_INIT_VAL ICCR1_NOLOCK /* No locking */
75 61
76#if defined (CONFIG_DCACHE_DISABLED) 62#if defined (CONFIG_CACHE_OFF)
77#define OCCR0_INIT_VAL OCCR0_OFF /* D-cache: off */ 63#define OCCR0_INIT_VAL OCCR0_OFF /* D-cache: off */
78#elif defined (CONFIG_DCACHE_WRITE_THROUGH) 64#elif defined (CONFIG_CACHE_WRITETHROUGH)
79#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WT /* D-cache: on, */ 65#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WT /* D-cache: on, */
80 /* WT, invalidate */ 66 /* WT, invalidate */
81#elif defined (CONFIG_DCACHE_WRITE_BACK) 67#elif defined (CONFIG_CACHE_WRITEBACK)
82#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* D-cache: on, */ 68#define OCCR0_INIT_VAL OCCR0_ON | OCCR0_OCI | OCCR0_WB /* D-cache: on, */
83 /* WB, invalidate */ 69 /* WB, invalidate */
84#else 70#else
85#error preprocessor flag CONFIG_DCACHE_... not recognized! 71#error preprocessor flag CONFIG_CACHE_... not recognized!
86#endif 72#endif
87 73
88#define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */ 74#define OCCR1_INIT_VAL OCCR1_NOLOCK /* No locking */
@@ -108,8 +94,8 @@ empty_zero_page:
108 .section .data, "aw" 94 .section .data, "aw"
109 .balign PAGE_SIZE 95 .balign PAGE_SIZE
110 96
111 .global swapper_pg_dir 97 .global mmu_pdtp_cache
112swapper_pg_dir: 98mmu_pdtp_cache:
113 .space PAGE_SIZE, 0 99 .space PAGE_SIZE, 0
114 100
115 .global empty_bad_page 101 .global empty_bad_page
@@ -368,5 +354,3 @@ hopeless:
368 * (r32) _start_kernel address 354 * (r32) _start_kernel address
369 */ 355 */
370 blink tr7, ZERO 356 blink tr7, ZERO
371
372
diff --git a/arch/sh/kernel/init_task.c b/arch/sh/kernel/init_task.c
index 4b449c4a6bad..f9bcc606127e 100644
--- a/arch/sh/kernel/init_task.c
+++ b/arch/sh/kernel/init_task.c
@@ -11,8 +11,8 @@ static struct fs_struct init_fs = INIT_FS;
11static struct files_struct init_files = INIT_FILES; 11static struct files_struct init_files = INIT_FILES;
12static struct signal_struct init_signals = INIT_SIGNALS(init_signals); 12static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
13static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand); 13static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
14struct pt_regs fake_swapper_regs;
14struct mm_struct init_mm = INIT_MM(init_mm); 15struct mm_struct init_mm = INIT_MM(init_mm);
15
16EXPORT_SYMBOL(init_mm); 16EXPORT_SYMBOL(init_mm);
17 17
18/* 18/*
@@ -22,7 +22,7 @@ EXPORT_SYMBOL(init_mm);
22 * way process stacks are handled. This is done by having a special 22 * way process stacks are handled. This is done by having a special
23 * "init_task" linker map entry.. 23 * "init_task" linker map entry..
24 */ 24 */
25union thread_union init_thread_union 25union thread_union init_thread_union
26 __attribute__((__section__(".data.init_task"))) = 26 __attribute__((__section__(".data.init_task"))) =
27 { INIT_THREAD_INFO(init_task) }; 27 { INIT_THREAD_INFO(init_task) };
28 28
diff --git a/arch/sh/kernel/io.c b/arch/sh/kernel/io.c
index 501fe03e3715..71c9fde2fd90 100644
--- a/arch/sh/kernel/io.c
+++ b/arch/sh/kernel/io.c
@@ -61,73 +61,6 @@ void memset_io(volatile void __iomem *dst, int c, unsigned long count)
61} 61}
62EXPORT_SYMBOL(memset_io); 62EXPORT_SYMBOL(memset_io);
63 63
64void __raw_readsl(unsigned long addr, void *datap, int len)
65{
66 u32 *data;
67
68 for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
69 *data++ = ctrl_inl(addr);
70
71 if (likely(len >= (0x20 >> 2))) {
72 int tmp2, tmp3, tmp4, tmp5, tmp6;
73
74 __asm__ __volatile__(
75 "1: \n\t"
76 "mov.l @%7, r0 \n\t"
77 "mov.l @%7, %2 \n\t"
78#ifdef CONFIG_CPU_SH4
79 "movca.l r0, @%0 \n\t"
80#else
81 "mov.l r0, @%0 \n\t"
82#endif
83 "mov.l @%7, %3 \n\t"
84 "mov.l @%7, %4 \n\t"
85 "mov.l @%7, %5 \n\t"
86 "mov.l @%7, %6 \n\t"
87 "mov.l @%7, r7 \n\t"
88 "mov.l @%7, r0 \n\t"
89 "mov.l %2, @(0x04,%0) \n\t"
90 "mov #0x20>>2, %2 \n\t"
91 "mov.l %3, @(0x08,%0) \n\t"
92 "sub %2, %1 \n\t"
93 "mov.l %4, @(0x0c,%0) \n\t"
94 "cmp/hi %1, %2 ! T if 32 > len \n\t"
95 "mov.l %5, @(0x10,%0) \n\t"
96 "mov.l %6, @(0x14,%0) \n\t"
97 "mov.l r7, @(0x18,%0) \n\t"
98 "mov.l r0, @(0x1c,%0) \n\t"
99 "bf.s 1b \n\t"
100 " add #0x20, %0 \n\t"
101 : "=&r" (data), "=&r" (len),
102 "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
103 "=&r" (tmp5), "=&r" (tmp6)
104 : "r"(addr), "0" (data), "1" (len)
105 : "r0", "r7", "t", "memory");
106 }
107
108 for (; len != 0; len--)
109 *data++ = ctrl_inl(addr);
110}
111EXPORT_SYMBOL(__raw_readsl);
112
113void __raw_writesl(unsigned long addr, const void *data, int len)
114{
115 if (likely(len != 0)) {
116 int tmp1;
117
118 __asm__ __volatile__ (
119 "1: \n\t"
120 "mov.l @%0+, %1 \n\t"
121 "dt %3 \n\t"
122 "bf.s 1b \n\t"
123 " mov.l %1, @%4 \n\t"
124 : "=&r" (data), "=&r" (tmp1)
125 : "0" (data), "r" (len), "r"(addr)
126 : "t", "memory");
127 }
128}
129EXPORT_SYMBOL(__raw_writesl);
130
131void __iomem *ioport_map(unsigned long port, unsigned int nr) 64void __iomem *ioport_map(unsigned long port, unsigned int nr)
132{ 65{
133 return sh_mv.mv_ioport_map(port, nr); 66 return sh_mv.mv_ioport_map(port, nr);
diff --git a/arch/sh/kernel/module.c b/arch/sh/kernel/module.c
index 142a4e5b7ebc..b3d0a03b4c76 100644
--- a/arch/sh/kernel/module.c
+++ b/arch/sh/kernel/module.c
@@ -1,5 +1,15 @@
1/* Kernel module help for SH. 1/* Kernel module help for SH.
2 2
3 SHcompact version by Kaz Kojima and Paul Mundt.
4
5 SHmedia bits:
6
7 Copyright 2004 SuperH (UK) Ltd
8 Author: Richard Curnow
9
10 Based on the sh version, and on code from the sh64-specific parts of
11 modutils, originally written by Richard Curnow and Ben Gaster.
12
3 This program is free software; you can redistribute it and/or modify 13 This program is free software; you can redistribute it and/or modify
4 it under the terms of the GNU General Public License as published by 14 it under the terms of the GNU General Public License as published by
5 the Free Software Foundation; either version 2 of the License, or 15 the Free Software Foundation; either version 2 of the License, or
@@ -21,12 +31,6 @@
21#include <linux/string.h> 31#include <linux/string.h>
22#include <linux/kernel.h> 32#include <linux/kernel.h>
23 33
24#if 0
25#define DEBUGP printk
26#else
27#define DEBUGP(fmt...)
28#endif
29
30void *module_alloc(unsigned long size) 34void *module_alloc(unsigned long size)
31{ 35{
32 if (size == 0) 36 if (size == 0)
@@ -52,6 +56,7 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,
52 return 0; 56 return 0;
53} 57}
54 58
59#ifdef CONFIG_SUPERH32
55#define COPY_UNALIGNED_WORD(sw, tw, align) \ 60#define COPY_UNALIGNED_WORD(sw, tw, align) \
56{ \ 61{ \
57 void *__s = &(sw), *__t = &(tw); \ 62 void *__s = &(sw), *__t = &(tw); \
@@ -74,6 +79,10 @@ int module_frob_arch_sections(Elf_Ehdr *hdr,
74 break; \ 79 break; \
75 } \ 80 } \
76} 81}
82#else
83/* One thing SHmedia doesn't screw up! */
84#define COPY_UNALIGNED_WORD(sw, tw, align) { (tw) = (sw); }
85#endif
77 86
78int apply_relocate_add(Elf32_Shdr *sechdrs, 87int apply_relocate_add(Elf32_Shdr *sechdrs,
79 const char *strtab, 88 const char *strtab,
@@ -89,8 +98,8 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
89 uint32_t value; 98 uint32_t value;
90 int align; 99 int align;
91 100
92 DEBUGP("Applying relocate section %u to %u\n", relsec, 101 pr_debug("Applying relocate section %u to %u\n", relsec,
93 sechdrs[relsec].sh_info); 102 sechdrs[relsec].sh_info);
94 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) { 103 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
95 /* This is where to make the change */ 104 /* This is where to make the change */
96 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr 105 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
@@ -102,17 +111,44 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
102 relocation = sym->st_value + rel[i].r_addend; 111 relocation = sym->st_value + rel[i].r_addend;
103 align = (int)location & 3; 112 align = (int)location & 3;
104 113
114#ifdef CONFIG_SUPERH64
115 /* For text addresses, bit2 of the st_other field indicates
116 * whether the symbol is SHmedia (1) or SHcompact (0). If
117 * SHmedia, the LSB of the symbol needs to be asserted
118 * for the CPU to be in SHmedia mode when it starts executing
119 * the branch target. */
120 relocation |= (sym->st_other & 4);
121#endif
122
105 switch (ELF32_R_TYPE(rel[i].r_info)) { 123 switch (ELF32_R_TYPE(rel[i].r_info)) {
106 case R_SH_DIR32: 124 case R_SH_DIR32:
107 COPY_UNALIGNED_WORD (*location, value, align); 125 COPY_UNALIGNED_WORD (*location, value, align);
108 value += relocation; 126 value += relocation;
109 COPY_UNALIGNED_WORD (value, *location, align); 127 COPY_UNALIGNED_WORD (value, *location, align);
110 break; 128 break;
111 case R_SH_REL32: 129 case R_SH_REL32:
112 relocation = (relocation - (Elf32_Addr) location); 130 relocation = (relocation - (Elf32_Addr) location);
113 COPY_UNALIGNED_WORD (*location, value, align); 131 COPY_UNALIGNED_WORD (*location, value, align);
114 value += relocation; 132 value += relocation;
115 COPY_UNALIGNED_WORD (value, *location, align); 133 COPY_UNALIGNED_WORD (value, *location, align);
134 break;
135 case R_SH_IMM_LOW16:
136 *location = (*location & ~0x3fffc00) |
137 ((relocation & 0xffff) << 10);
138 break;
139 case R_SH_IMM_MEDLOW16:
140 *location = (*location & ~0x3fffc00) |
141 (((relocation >> 16) & 0xffff) << 10);
142 break;
143 case R_SH_IMM_LOW16_PCREL:
144 relocation -= (Elf32_Addr) location;
145 *location = (*location & ~0x3fffc00) |
146 ((relocation & 0xffff) << 10);
147 break;
148 case R_SH_IMM_MEDLOW16_PCREL:
149 relocation -= (Elf32_Addr) location;
150 *location = (*location & ~0x3fffc00) |
151 (((relocation >> 16) & 0xffff) << 10);
116 break; 152 break;
117 default: 153 default:
118 printk(KERN_ERR "module %s: Unknown relocation: %u\n", 154 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
diff --git a/arch/sh/kernel/process.c b/arch/sh/kernel/process_32.c
index 6d7f2b07e491..9ab1926b9d10 100644
--- a/arch/sh/kernel/process.c
+++ b/arch/sh/kernel/process_32.c
@@ -230,34 +230,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
230 return fpvalid; 230 return fpvalid;
231} 231}
232 232
233/*
234 * Capture the user space registers if the task is not running (in user space)
235 */
236int dump_task_regs(struct task_struct *tsk, elf_gregset_t *regs)
237{
238 struct pt_regs ptregs;
239
240 ptregs = *task_pt_regs(tsk);
241 elf_core_copy_regs(regs, &ptregs);
242
243 return 1;
244}
245
246int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpu)
247{
248 int fpvalid = 0;
249
250#if defined(CONFIG_SH_FPU)
251 fpvalid = !!tsk_used_math(tsk);
252 if (fpvalid) {
253 unlazy_fpu(tsk, task_pt_regs(tsk));
254 memcpy(fpu, &tsk->thread.fpu.hard, sizeof(*fpu));
255 }
256#endif
257
258 return fpvalid;
259}
260
261asmlinkage void ret_from_fork(void); 233asmlinkage void ret_from_fork(void);
262 234
263int copy_thread(int nr, unsigned long clone_flags, unsigned long usp, 235int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
@@ -350,25 +322,6 @@ struct task_struct *__switch_to(struct task_struct *prev,
350 unlazy_fpu(prev, task_pt_regs(prev)); 322 unlazy_fpu(prev, task_pt_regs(prev));
351#endif 323#endif
352 324
353#if defined(CONFIG_GUSA) && defined(CONFIG_PREEMPT)
354 {
355 struct pt_regs *regs;
356
357 preempt_disable();
358 regs = task_pt_regs(prev);
359 if (user_mode(regs) && regs->regs[15] >= 0xc0000000) {
360 int offset = (int)regs->regs[15];
361
362 /* Reset stack pointer: clear critical region mark */
363 regs->regs[15] = regs->regs[1];
364 if (regs->pc < regs->regs[0])
365 /* Go to rewind point */
366 regs->pc = regs->regs[0] + offset;
367 }
368 preempt_enable_no_resched();
369 }
370#endif
371
372#ifdef CONFIG_MMU 325#ifdef CONFIG_MMU
373 /* 326 /*
374 * Restore the kernel mode register 327 * Restore the kernel mode register
@@ -510,49 +463,3 @@ asmlinkage void break_point_trap(void)
510 463
511 force_sig(SIGTRAP, current); 464 force_sig(SIGTRAP, current);
512} 465}
513
514/*
515 * Generic trap handler.
516 */
517asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5,
518 unsigned long r6, unsigned long r7,
519 struct pt_regs __regs)
520{
521 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
522
523 /* Rewind */
524 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
525
526 if (notify_die(DIE_TRAP, "debug trap", regs, 0, regs->tra & 0xff,
527 SIGTRAP) == NOTIFY_STOP)
528 return;
529
530 force_sig(SIGTRAP, current);
531}
532
533/*
534 * Special handler for BUG() traps.
535 */
536asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5,
537 unsigned long r6, unsigned long r7,
538 struct pt_regs __regs)
539{
540 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
541
542 /* Rewind */
543 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
544
545 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
546 SIGTRAP) == NOTIFY_STOP)
547 return;
548
549#ifdef CONFIG_BUG
550 if (__kernel_text_address(instruction_pointer(regs))) {
551 u16 insn = *(u16 *)instruction_pointer(regs);
552 if (insn == TRAPA_BUG_OPCODE)
553 handle_BUG(regs);
554 }
555#endif
556
557 force_sig(SIGTRAP, current);
558}
diff --git a/arch/sh64/kernel/process.c b/arch/sh/kernel/process_64.c
index 0761af4d2a42..cff3b7dc9c56 100644
--- a/arch/sh64/kernel/process.c
+++ b/arch/sh/kernel/process_64.c
@@ -1,12 +1,10 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/process_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 * 3 *
6 * arch/sh64/kernel/process.c 4 * This file handles the architecture-dependent parts of process handling..
7 * 5 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 6 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt 7 * Copyright (C) 2003 - 2007 Paul Mundt
10 * Copyright (C) 2003, 2004 Richard Curnow 8 * Copyright (C) 2003, 2004 Richard Curnow
11 * 9 *
12 * Started from SH3/4 version: 10 * Started from SH3/4 version:
@@ -15,10 +13,9 @@
15 * In turn started from i386 version: 13 * In turn started from i386 version:
16 * Copyright (C) 1995 Linus Torvalds 14 * Copyright (C) 1995 Linus Torvalds
17 * 15 *
18 */ 16 * This file is subject to the terms and conditions of the GNU General Public
19 17 * License. See the file "COPYING" in the main directory of this archive
20/* 18 * for more details.
21 * This file handles the architecture-dependent parts of process handling..
22 */ 19 */
23#include <linux/mm.h> 20#include <linux/mm.h>
24#include <linux/fs.h> 21#include <linux/fs.h>
@@ -27,8 +24,10 @@
27#include <linux/init.h> 24#include <linux/init.h>
28#include <linux/module.h> 25#include <linux/module.h>
29#include <linux/proc_fs.h> 26#include <linux/proc_fs.h>
27#include <linux/io.h>
30#include <asm/uaccess.h> 28#include <asm/uaccess.h>
31#include <asm/pgtable.h> 29#include <asm/pgtable.h>
30#include <asm/mmu_context.h>
32 31
33struct task_struct *last_task_used_math = NULL; 32struct task_struct *last_task_used_math = NULL;
34 33
@@ -106,9 +105,20 @@ void machine_halt(void)
106 105
107void machine_power_off(void) 106void machine_power_off(void)
108{ 107{
109 extern void enter_deep_standby(void); 108#if 0
109 /* Disable watchdog timer */
110 ctrl_outl(0xa5000000, WTCSR);
111 /* Configure deep standby on sleep */
112 ctrl_outl(0x03, STBCR);
113#endif
114
115 __asm__ __volatile__ (
116 "sleep\n\t"
117 "synci\n\t"
118 "nop;nop;nop;nop\n\t"
119 );
110 120
111 enter_deep_standby(); 121 panic("Unexpected wakeup!\n");
112} 122}
113 123
114void (*pm_power_off)(void) = machine_power_off; 124void (*pm_power_off)(void) = machine_power_off;
@@ -411,19 +421,22 @@ int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags)
411 */ 421 */
412void exit_thread(void) 422void exit_thread(void)
413{ 423{
414 /* See arch/sparc/kernel/process.c for the precedent for doing this -- RPC. 424 /*
415 425 * See arch/sparc/kernel/process.c for the precedent for doing
416 The SH-5 FPU save/restore approach relies on last_task_used_math 426 * this -- RPC.
417 pointing to a live task_struct. When another task tries to use the 427 *
418 FPU for the 1st time, the FPUDIS trap handling (see 428 * The SH-5 FPU save/restore approach relies on
419 arch/sh64/kernel/fpu.c) will save the existing FPU state to the 429 * last_task_used_math pointing to a live task_struct. When
420 FP regs field within last_task_used_math before re-loading the new 430 * another task tries to use the FPU for the 1st time, the FPUDIS
421 task's FPU state (or initialising it if the FPU has been used 431 * trap handling (see arch/sh/kernel/cpu/sh5/fpu.c) will save the
422 before). So if last_task_used_math is stale, and its page has already been 432 * existing FPU state to the FP regs field within
423 re-allocated for another use, the consequences are rather grim. Unless we 433 * last_task_used_math before re-loading the new task's FPU state
424 null it here, there is no other path through which it would get safely 434 * (or initialising it if the FPU has been used before). So if
425 nulled. */ 435 * last_task_used_math is stale, and its page has already been
426 436 * re-allocated for another use, the consequences are rather
437 * grim. Unless we null it here, there is no other path through
438 * which it would get safely nulled.
439 */
427#ifdef CONFIG_SH_FPU 440#ifdef CONFIG_SH_FPU
428 if (last_task_used_math == current) { 441 if (last_task_used_math == current) {
429 last_task_used_math = NULL; 442 last_task_used_math = NULL;
@@ -469,9 +482,9 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
469 fpvalid = !!tsk_used_math(tsk); 482 fpvalid = !!tsk_used_math(tsk);
470 if (fpvalid) { 483 if (fpvalid) {
471 if (current == last_task_used_math) { 484 if (current == last_task_used_math) {
472 grab_fpu(); 485 enable_fpu();
473 fpsave(&tsk->thread.fpu.hard); 486 save_fpu(tsk, regs);
474 release_fpu(); 487 disable_fpu();
475 last_task_used_math = 0; 488 last_task_used_math = 0;
476 regs->sr |= SR_FD; 489 regs->sr |= SR_FD;
477 } 490 }
@@ -496,9 +509,9 @@ int copy_thread(int nr, unsigned long clone_flags, unsigned long usp,
496 509
497#ifdef CONFIG_SH_FPU 510#ifdef CONFIG_SH_FPU
498 if(last_task_used_math == current) { 511 if(last_task_used_math == current) {
499 grab_fpu(); 512 enable_fpu();
500 fpsave(&current->thread.fpu.hard); 513 save_fpu(current, regs);
501 release_fpu(); 514 disable_fpu();
502 last_task_used_math = NULL; 515 last_task_used_math = NULL;
503 regs->sr |= SR_FD; 516 regs->sr |= SR_FD;
504 } 517 }
@@ -665,17 +678,14 @@ asids_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void
665 read_lock(&tasklist_lock); 678 read_lock(&tasklist_lock);
666 for_each_process(p) { 679 for_each_process(p) {
667 int pid = p->pid; 680 int pid = p->pid;
668 struct mm_struct *mm; 681
669 if (!pid) continue; 682 if (!pid)
670 mm = p->mm; 683 continue;
671 if (mm) { 684 if (p->mm)
672 unsigned long asid, context; 685 len += sprintf(buf+len, "%5d : %02lx\n", pid,
673 context = mm->context; 686 asid_cache(smp_processor_id()));
674 asid = (context & 0xff); 687 else
675 len += sprintf(buf+len, "%5d : %02lx\n", pid, asid);
676 } else {
677 len += sprintf(buf+len, "%5d : (none)\n", pid); 688 len += sprintf(buf+len, "%5d : (none)\n", pid);
678 }
679 } 689 }
680 read_unlock(&tasklist_lock); 690 read_unlock(&tasklist_lock);
681 *eof = 1; 691 *eof = 1;
diff --git a/arch/sh/kernel/ptrace.c b/arch/sh/kernel/ptrace_32.c
index ac725f0aeb72..ce0664a58b49 100644
--- a/arch/sh/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace_32.c
@@ -6,7 +6,7 @@
6 * edited by Linus Torvalds 6 * edited by Linus Torvalds
7 * 7 *
8 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 8 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
9 * 9 * Audit support: Yuichi Nakamura <ynakam@hitachisoft.jp>
10 */ 10 */
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/sched.h> 12#include <linux/sched.h>
@@ -19,6 +19,7 @@
19#include <linux/security.h> 19#include <linux/security.h>
20#include <linux/signal.h> 20#include <linux/signal.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/audit.h>
22#include <asm/uaccess.h> 23#include <asm/uaccess.h>
23#include <asm/pgtable.h> 24#include <asm/pgtable.h>
24#include <asm/system.h> 25#include <asm/system.h>
@@ -248,15 +249,20 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
248 return ret; 249 return ret;
249} 250}
250 251
251asmlinkage void do_syscall_trace(void) 252asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
252{ 253{
253 struct task_struct *tsk = current; 254 struct task_struct *tsk = current;
254 255
256 if (unlikely(current->audit_context) && entryexit)
257 audit_syscall_exit(AUDITSC_RESULT(regs->regs[0]),
258 regs->regs[0]);
259
255 if (!test_thread_flag(TIF_SYSCALL_TRACE) && 260 if (!test_thread_flag(TIF_SYSCALL_TRACE) &&
256 !test_thread_flag(TIF_SINGLESTEP)) 261 !test_thread_flag(TIF_SINGLESTEP))
257 return; 262 goto out;
258 if (!(tsk->ptrace & PT_PTRACED)) 263 if (!(tsk->ptrace & PT_PTRACED))
259 return; 264 goto out;
265
260 /* the 0x80 provides a way for the tracing parent to distinguish 266 /* the 0x80 provides a way for the tracing parent to distinguish
261 between a syscall stop and SIGTRAP delivery */ 267 between a syscall stop and SIGTRAP delivery */
262 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) && 268 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) &&
@@ -271,4 +277,11 @@ asmlinkage void do_syscall_trace(void)
271 send_sig(tsk->exit_code, tsk, 1); 277 send_sig(tsk->exit_code, tsk, 1);
272 tsk->exit_code = 0; 278 tsk->exit_code = 0;
273 } 279 }
280
281out:
282 if (unlikely(current->audit_context) && !entryexit)
283 audit_syscall_entry(AUDIT_ARCH_SH, regs->regs[3],
284 regs->regs[4], regs->regs[5],
285 regs->regs[6], regs->regs[7]);
286
274} 287}
diff --git a/arch/sh64/kernel/ptrace.c b/arch/sh/kernel/ptrace_64.c
index 8a2d339cf760..f6fbdfa6876d 100644
--- a/arch/sh64/kernel/ptrace.c
+++ b/arch/sh/kernel/ptrace_64.c
@@ -1,12 +1,8 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/ptrace_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/ptrace.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 - 2007 Paul Mundt
10 * 6 *
11 * Started from SH3/4 version: 7 * Started from SH3/4 version:
12 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka 8 * SuperH version: Copyright (C) 1999, 2000 Kaz Kojima & Niibe Yutaka
@@ -15,8 +11,10 @@
15 * By Ross Biro 1/23/92 11 * By Ross Biro 1/23/92
16 * edited by Linus Torvalds 12 * edited by Linus Torvalds
17 * 13 *
14 * This file is subject to the terms and conditions of the GNU General Public
15 * License. See the file "COPYING" in the main directory of this archive
16 * for more details.
18 */ 17 */
19
20#include <linux/kernel.h> 18#include <linux/kernel.h>
21#include <linux/rwsem.h> 19#include <linux/rwsem.h>
22#include <linux/sched.h> 20#include <linux/sched.h>
@@ -28,7 +26,7 @@
28#include <linux/user.h> 26#include <linux/user.h>
29#include <linux/signal.h> 27#include <linux/signal.h>
30#include <linux/syscalls.h> 28#include <linux/syscalls.h>
31 29#include <linux/audit.h>
32#include <asm/io.h> 30#include <asm/io.h>
33#include <asm/uaccess.h> 31#include <asm/uaccess.h>
34#include <asm/pgtable.h> 32#include <asm/pgtable.h>
@@ -74,9 +72,9 @@ get_fpu_long(struct task_struct *task, unsigned long addr)
74 } 72 }
75 73
76 if (last_task_used_math == task) { 74 if (last_task_used_math == task) {
77 grab_fpu(); 75 enable_fpu();
78 fpsave(&task->thread.fpu.hard); 76 save_fpu(task, regs);
79 release_fpu(); 77 disable_fpu();
80 last_task_used_math = 0; 78 last_task_used_math = 0;
81 regs->sr |= SR_FD; 79 regs->sr |= SR_FD;
82 } 80 }
@@ -110,9 +108,9 @@ put_fpu_long(struct task_struct *task, unsigned long addr, unsigned long data)
110 fpinit(&task->thread.fpu.hard); 108 fpinit(&task->thread.fpu.hard);
111 set_stopped_child_used_math(task); 109 set_stopped_child_used_math(task);
112 } else if (last_task_used_math == task) { 110 } else if (last_task_used_math == task) {
113 grab_fpu(); 111 enable_fpu();
114 fpsave(&task->thread.fpu.hard); 112 save_fpu(task, regs);
115 release_fpu(); 113 disable_fpu();
116 last_task_used_math = 0; 114 last_task_used_math = 0;
117 regs->sr |= SR_FD; 115 regs->sr |= SR_FD;
118 } 116 }
@@ -253,7 +251,6 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
253 251
254asmlinkage int sh64_ptrace(long request, long pid, long addr, long data) 252asmlinkage int sh64_ptrace(long request, long pid, long addr, long data)
255{ 253{
256 extern void poke_real_address_q(unsigned long long addr, unsigned long long data);
257#define WPC_DBRMODE 0x0d104008 254#define WPC_DBRMODE 0x0d104008
258 static int first_call = 1; 255 static int first_call = 1;
259 256
@@ -275,17 +272,23 @@ asmlinkage int sh64_ptrace(long request, long pid, long addr, long data)
275 return sys_ptrace(request, pid, addr, data); 272 return sys_ptrace(request, pid, addr, data);
276} 273}
277 274
278asmlinkage void syscall_trace(void) 275asmlinkage void syscall_trace(struct pt_regs *regs, int entryexit)
279{ 276{
280 struct task_struct *tsk = current; 277 struct task_struct *tsk = current;
281 278
282 if (!test_thread_flag(TIF_SYSCALL_TRACE)) 279 if (unlikely(current->audit_context) && entryexit)
283 return; 280 audit_syscall_exit(AUDITSC_RESULT(regs->regs[9]),
281 regs->regs[9]);
282
283 if (!test_thread_flag(TIF_SYSCALL_TRACE) &&
284 !test_thread_flag(TIF_SINGLESTEP))
285 goto out;
284 if (!(tsk->ptrace & PT_PTRACED)) 286 if (!(tsk->ptrace & PT_PTRACED))
285 return; 287 goto out;
288
289 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) &&
290 !test_thread_flag(TIF_SINGLESTEP) ? 0x80 : 0));
286 291
287 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
288 ? 0x80 : 0));
289 /* 292 /*
290 * this isn't the same as continuing with a signal, but it will do 293 * this isn't the same as continuing with a signal, but it will do
291 * for normal use. strace only continues with a signal if the 294 * for normal use. strace only continues with a signal if the
@@ -295,6 +298,12 @@ asmlinkage void syscall_trace(void)
295 send_sig(tsk->exit_code, tsk, 1); 298 send_sig(tsk->exit_code, tsk, 1);
296 tsk->exit_code = 0; 299 tsk->exit_code = 0;
297 } 300 }
301
302out:
303 if (unlikely(current->audit_context) && !entryexit)
304 audit_syscall_entry(AUDIT_ARCH_SH, regs->regs[1],
305 regs->regs[2], regs->regs[3],
306 regs->regs[4], regs->regs[5]);
298} 307}
299 308
300/* Called with interrupts disabled */ 309/* Called with interrupts disabled */
diff --git a/arch/sh/kernel/setup.c b/arch/sh/kernel/setup.c
index 4156aac8c27d..855cdf9d85b1 100644
--- a/arch/sh/kernel/setup.c
+++ b/arch/sh/kernel/setup.c
@@ -26,6 +26,7 @@
26#include <asm/uaccess.h> 26#include <asm/uaccess.h>
27#include <asm/io.h> 27#include <asm/io.h>
28#include <asm/page.h> 28#include <asm/page.h>
29#include <asm/elf.h>
29#include <asm/sections.h> 30#include <asm/sections.h>
30#include <asm/irq.h> 31#include <asm/irq.h>
31#include <asm/setup.h> 32#include <asm/setup.h>
@@ -78,12 +79,25 @@ EXPORT_SYMBOL(memory_start);
78unsigned long memory_end = 0; 79unsigned long memory_end = 0;
79EXPORT_SYMBOL(memory_end); 80EXPORT_SYMBOL(memory_end);
80 81
82int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
83
81static int __init early_parse_mem(char *p) 84static int __init early_parse_mem(char *p)
82{ 85{
83 unsigned long size; 86 unsigned long size;
84 87
85 memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; 88 memory_start = (unsigned long)__va(__MEMORY_START);
86 size = memparse(p, &p); 89 size = memparse(p, &p);
90
91 if (size > __MEMORY_SIZE) {
92 static char msg[] __initdata = KERN_ERR
93 "Using mem= to increase the size of kernel memory "
94 "is not allowed.\n"
95 " Recompile the kernel with the correct value for "
96 "CONFIG_MEMORY_SIZE.\n";
97 printk(msg);
98 return 0;
99 }
100
87 memory_end = memory_start + size; 101 memory_end = memory_start + size;
88 102
89 return 0; 103 return 0;
@@ -243,7 +257,7 @@ void __init setup_arch(char **cmdline_p)
243 data_resource.start = virt_to_phys(_etext); 257 data_resource.start = virt_to_phys(_etext);
244 data_resource.end = virt_to_phys(_edata)-1; 258 data_resource.end = virt_to_phys(_edata)-1;
245 259
246 memory_start = (unsigned long)PAGE_OFFSET+__MEMORY_START; 260 memory_start = (unsigned long)__va(__MEMORY_START);
247 if (!memory_end) 261 if (!memory_end)
248 memory_end = memory_start + __MEMORY_SIZE; 262 memory_end = memory_start + __MEMORY_SIZE;
249 263
@@ -294,20 +308,23 @@ void __init setup_arch(char **cmdline_p)
294} 308}
295 309
296static const char *cpu_name[] = { 310static const char *cpu_name[] = {
311 [CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
297 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619", 312 [CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
298 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706", 313 [CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
299 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708", 314 [CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
300 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710", 315 [CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
301 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720", 316 [CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
302 [CPU_SH7729] = "SH7729", [CPU_SH7750] = "SH7750", 317 [CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
303 [CPU_SH7750S] = "SH7750S", [CPU_SH7750R] = "SH7750R", 318 [CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
304 [CPU_SH7751] = "SH7751", [CPU_SH7751R] = "SH7751R", 319 [CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
305 [CPU_SH7760] = "SH7760", 320 [CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
306 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501", 321 [CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
307 [CPU_SH7770] = "SH7770", [CPU_SH7780] = "SH7780", 322 [CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
308 [CPU_SH7781] = "SH7781", [CPU_SH7343] = "SH7343", 323 [CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
309 [CPU_SH7785] = "SH7785", [CPU_SH7722] = "SH7722", 324 [CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
310 [CPU_SHX3] = "SH-X3", [CPU_SH_NONE] = "Unknown" 325 [CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
326 [CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
327 [CPU_SH_NONE] = "Unknown"
311}; 328};
312 329
313const char *get_cpu_subtype(struct sh_cpuinfo *c) 330const char *get_cpu_subtype(struct sh_cpuinfo *c)
@@ -410,7 +427,7 @@ static void *c_next(struct seq_file *m, void *v, loff_t *pos)
410static void c_stop(struct seq_file *m, void *v) 427static void c_stop(struct seq_file *m, void *v)
411{ 428{
412} 429}
413struct seq_operations cpuinfo_op = { 430const struct seq_operations cpuinfo_op = {
414 .start = c_start, 431 .start = c_start,
415 .next = c_next, 432 .next = c_next,
416 .stop = c_stop, 433 .stop = c_stop,
diff --git a/arch/sh/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms_32.c
index e1a6de9088b5..e1a6de9088b5 100644
--- a/arch/sh/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms_32.c
diff --git a/arch/sh64/kernel/sh_ksyms.c b/arch/sh/kernel/sh_ksyms_64.c
index b1705acc8e64..8004c38d3d37 100644
--- a/arch/sh64/kernel/sh_ksyms.c
+++ b/arch/sh/kernel/sh_ksyms_64.c
@@ -1,14 +1,12 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/sh_ksyms_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/sh_ksyms.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
10 */ 9 */
11
12#include <linux/rwsem.h> 10#include <linux/rwsem.h>
13#include <linux/module.h> 11#include <linux/module.h>
14#include <linux/smp.h> 12#include <linux/smp.h>
@@ -18,7 +16,6 @@
18#include <linux/in6.h> 16#include <linux/in6.h>
19#include <linux/interrupt.h> 17#include <linux/interrupt.h>
20#include <linux/screen_info.h> 18#include <linux/screen_info.h>
21
22#include <asm/semaphore.h> 19#include <asm/semaphore.h>
23#include <asm/processor.h> 20#include <asm/processor.h>
24#include <asm/uaccess.h> 21#include <asm/uaccess.h>
@@ -47,12 +44,8 @@ EXPORT_SYMBOL(__put_user_asm_l);
47EXPORT_SYMBOL(__get_user_asm_l); 44EXPORT_SYMBOL(__get_user_asm_l);
48EXPORT_SYMBOL(__copy_user); 45EXPORT_SYMBOL(__copy_user);
49EXPORT_SYMBOL(memcpy); 46EXPORT_SYMBOL(memcpy);
50EXPORT_SYMBOL(udelay);
51EXPORT_SYMBOL(__udelay); 47EXPORT_SYMBOL(__udelay);
52EXPORT_SYMBOL(ndelay);
53EXPORT_SYMBOL(__ndelay); 48EXPORT_SYMBOL(__ndelay);
54EXPORT_SYMBOL(flush_dcache_page);
55EXPORT_SYMBOL(sh64_page_clear);
56 49
57/* Ugh. These come in from libgcc.a at link time. */ 50/* Ugh. These come in from libgcc.a at link time. */
58#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name) 51#define DECLARE_EXPORT(name) extern void name(void);EXPORT_SYMBOL(name)
diff --git a/arch/sh/kernel/signal.c b/arch/sh/kernel/signal_32.c
index ca754fd42437..f6b5fbfe75c4 100644
--- a/arch/sh/kernel/signal.c
+++ b/arch/sh/kernel/signal_32.c
@@ -507,24 +507,6 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, siginfo_t *info,
507 ctrl_inw(regs->pc - 4)); 507 ctrl_inw(regs->pc - 4));
508 break; 508 break;
509 } 509 }
510#ifdef CONFIG_GUSA
511 } else {
512 /* gUSA handling */
513 preempt_disable();
514
515 if (regs->regs[15] >= 0xc0000000) {
516 int offset = (int)regs->regs[15];
517
518 /* Reset stack pointer: clear critical region mark */
519 regs->regs[15] = regs->regs[1];
520 if (regs->pc < regs->regs[0])
521 /* Go to rewind point #1 */
522 regs->pc = regs->regs[0] + offset -
523 instruction_size(ctrl_inw(regs->pc-4));
524 }
525
526 preempt_enable_no_resched();
527#endif
528 } 510 }
529 511
530 /* Set up the stack frame */ 512 /* Set up the stack frame */
diff --git a/arch/sh64/kernel/signal.c b/arch/sh/kernel/signal_64.c
index 79fc48cf54c6..80bde19d445b 100644
--- a/arch/sh64/kernel/signal.c
+++ b/arch/sh/kernel/signal_64.c
@@ -1,16 +1,13 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/signal_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/signal.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt 5 * Copyright (C) 2003 Paul Mundt
10 * Copyright (C) 2004 Richard Curnow 6 * Copyright (C) 2004 Richard Curnow
11 * 7 *
12 * Started from sh version. 8 * This file is subject to the terms and conditions of the GNU General Public
13 * 9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
14 */ 11 */
15#include <linux/rwsem.h> 12#include <linux/rwsem.h>
16#include <linux/sched.h> 13#include <linux/sched.h>
@@ -28,7 +25,7 @@
28#include <asm/ucontext.h> 25#include <asm/ucontext.h>
29#include <asm/uaccess.h> 26#include <asm/uaccess.h>
30#include <asm/pgtable.h> 27#include <asm/pgtable.h>
31 28#include <asm/cacheflush.h>
32 29
33#define REG_RET 9 30#define REG_RET 9
34#define REG_ARG1 2 31#define REG_ARG1 2
@@ -211,9 +208,9 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
211 return err; 208 return err;
212 209
213 if (current == last_task_used_math) { 210 if (current == last_task_used_math) {
214 grab_fpu(); 211 enable_fpu();
215 fpsave(&current->thread.fpu.hard); 212 save_fpu(current, regs);
216 release_fpu(); 213 disable_fpu();
217 last_task_used_math = NULL; 214 last_task_used_math = NULL;
218 regs->sr |= SR_FD; 215 regs->sr |= SR_FD;
219 } 216 }
@@ -227,10 +224,14 @@ setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
227#else 224#else
228static inline int 225static inline int
229restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) 226restore_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
230{} 227{
228 return 0;
229}
231static inline int 230static inline int
232setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc) 231setup_sigcontext_fpu(struct pt_regs *regs, struct sigcontext __user *sc)
233{} 232{
233 return 0;
234}
234#endif 235#endif
235 236
236static int 237static int
@@ -477,7 +478,7 @@ static void setup_frame(int sig, struct k_sigaction *ka,
477 goto give_sigsegv; 478 goto give_sigsegv;
478 479
479 /* Cohere the trampoline with the I-cache. */ 480 /* Cohere the trampoline with the I-cache. */
480 flush_cache_sigtramp(DEREF_REG_PR-1, DEREF_REG_PR-1+16); 481 flush_cache_sigtramp(DEREF_REG_PR-1);
481 } 482 }
482 483
483 /* 484 /*
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index d545a686a201..59cd2859ce9b 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -7,7 +7,6 @@
7 * 7 *
8 * Taken from i386 version. 8 * Taken from i386 version.
9 */ 9 */
10
11#include <linux/errno.h> 10#include <linux/errno.h>
12#include <linux/sched.h> 11#include <linux/sched.h>
13#include <linux/mm.h> 12#include <linux/mm.h>
@@ -27,28 +26,7 @@
27#include <asm/uaccess.h> 26#include <asm/uaccess.h>
28#include <asm/unistd.h> 27#include <asm/unistd.h>
29 28
30/*
31 * sys_pipe() is the normal C calling standard for creating
32 * a pipe. It's not the way Unix traditionally does this, though.
33 */
34asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
35 unsigned long r6, unsigned long r7,
36 struct pt_regs __regs)
37{
38 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
39 int fd[2];
40 int error;
41
42 error = do_pipe(fd);
43 if (!error) {
44 regs->regs[1] = fd[1];
45 return fd[0];
46 }
47 return error;
48}
49
50unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */ 29unsigned long shm_align_mask = PAGE_SIZE - 1; /* Sane caches */
51
52EXPORT_SYMBOL(shm_align_mask); 30EXPORT_SYMBOL(shm_align_mask);
53 31
54#ifdef CONFIG_MMU 32#ifdef CONFIG_MMU
@@ -140,7 +118,7 @@ full_search:
140#endif /* CONFIG_MMU */ 118#endif /* CONFIG_MMU */
141 119
142static inline long 120static inline long
143do_mmap2(unsigned long addr, unsigned long len, unsigned long prot, 121do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
144 unsigned long flags, int fd, unsigned long pgoff) 122 unsigned long flags, int fd, unsigned long pgoff)
145{ 123{
146 int error = -EBADF; 124 int error = -EBADF;
@@ -195,12 +173,13 @@ asmlinkage int sys_ipc(uint call, int first, int second,
195 if (call <= SEMCTL) 173 if (call <= SEMCTL)
196 switch (call) { 174 switch (call) {
197 case SEMOP: 175 case SEMOP:
198 return sys_semtimedop(first, (struct sembuf __user *)ptr, 176 return sys_semtimedop(first,
177 (struct sembuf __user *)ptr,
199 second, NULL); 178 second, NULL);
200 case SEMTIMEDOP: 179 case SEMTIMEDOP:
201 return sys_semtimedop(first, (struct sembuf __user *)ptr, 180 return sys_semtimedop(first,
202 second, 181 (struct sembuf __user *)ptr, second,
203 (const struct timespec __user *)fifth); 182 (const struct timespec __user *)fifth);
204 case SEMGET: 183 case SEMGET:
205 return sys_semget (first, second, third); 184 return sys_semget (first, second, third);
206 case SEMCTL: { 185 case SEMCTL: {
@@ -215,25 +194,28 @@ asmlinkage int sys_ipc(uint call, int first, int second,
215 return -EINVAL; 194 return -EINVAL;
216 } 195 }
217 196
218 if (call <= MSGCTL) 197 if (call <= MSGCTL)
219 switch (call) { 198 switch (call) {
220 case MSGSND: 199 case MSGSND:
221 return sys_msgsnd (first, (struct msgbuf __user *) ptr, 200 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
222 second, third); 201 second, third);
223 case MSGRCV: 202 case MSGRCV:
224 switch (version) { 203 switch (version) {
225 case 0: { 204 case 0:
205 {
226 struct ipc_kludge tmp; 206 struct ipc_kludge tmp;
207
227 if (!ptr) 208 if (!ptr)
228 return -EINVAL; 209 return -EINVAL;
229 210
230 if (copy_from_user(&tmp, 211 if (copy_from_user(&tmp,
231 (struct ipc_kludge __user *) ptr, 212 (struct ipc_kludge __user *) ptr,
232 sizeof (tmp))) 213 sizeof (tmp)))
233 return -EFAULT; 214 return -EFAULT;
215
234 return sys_msgrcv (first, tmp.msgp, second, 216 return sys_msgrcv (first, tmp.msgp, second,
235 tmp.msgtyp, third); 217 tmp.msgtyp, third);
236 } 218 }
237 default: 219 default:
238 return sys_msgrcv (first, 220 return sys_msgrcv (first,
239 (struct msgbuf __user *) ptr, 221 (struct msgbuf __user *) ptr,
@@ -247,7 +229,7 @@ asmlinkage int sys_ipc(uint call, int first, int second,
247 default: 229 default:
248 return -EINVAL; 230 return -EINVAL;
249 } 231 }
250 if (call <= SHMCTL) 232 if (call <= SHMCTL)
251 switch (call) { 233 switch (call) {
252 case SHMAT: 234 case SHMAT:
253 switch (version) { 235 switch (version) {
@@ -265,7 +247,7 @@ asmlinkage int sys_ipc(uint call, int first, int second,
265 return do_shmat (first, (char __user *) ptr, 247 return do_shmat (first, (char __user *) ptr,
266 second, (ulong *) third); 248 second, (ulong *) third);
267 } 249 }
268 case SHMDT: 250 case SHMDT:
269 return sys_shmdt ((char __user *)ptr); 251 return sys_shmdt ((char __user *)ptr);
270 case SHMGET: 252 case SHMGET:
271 return sys_shmget (first, second, third); 253 return sys_shmget (first, second, third);
@@ -275,7 +257,7 @@ asmlinkage int sys_ipc(uint call, int first, int second,
275 default: 257 default:
276 return -EINVAL; 258 return -EINVAL;
277 } 259 }
278 260
279 return -EINVAL; 261 return -EINVAL;
280} 262}
281 263
@@ -289,49 +271,3 @@ asmlinkage int sys_uname(struct old_utsname * name)
289 up_read(&uts_sem); 271 up_read(&uts_sem);
290 return err?-EFAULT:0; 272 return err?-EFAULT:0;
291} 273}
292
293asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char * buf,
294 size_t count, long dummy, loff_t pos)
295{
296 return sys_pread64(fd, buf, count, pos);
297}
298
299asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char * buf,
300 size_t count, long dummy, loff_t pos)
301{
302 return sys_pwrite64(fd, buf, count, pos);
303}
304
305asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1,
306 u32 len0, u32 len1, int advice)
307{
308#ifdef __LITTLE_ENDIAN__
309 return sys_fadvise64_64(fd, (u64)offset1 << 32 | offset0,
310 (u64)len1 << 32 | len0, advice);
311#else
312 return sys_fadvise64_64(fd, (u64)offset0 << 32 | offset1,
313 (u64)len0 << 32 | len1, advice);
314#endif
315}
316
317#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A)
318#define SYSCALL_ARG3 "trapa #0x23"
319#else
320#define SYSCALL_ARG3 "trapa #0x13"
321#endif
322
323/*
324 * Do a system call from kernel instead of calling sys_execve so we
325 * end up with proper pt_regs.
326 */
327int kernel_execve(const char *filename, char *const argv[], char *const envp[])
328{
329 register long __sc0 __asm__ ("r3") = __NR_execve;
330 register long __sc4 __asm__ ("r4") = (long) filename;
331 register long __sc5 __asm__ ("r5") = (long) argv;
332 register long __sc6 __asm__ ("r6") = (long) envp;
333 __asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0)
334 : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6)
335 : "memory");
336 return __sc0;
337}
diff --git a/arch/sh/kernel/sys_sh32.c b/arch/sh/kernel/sys_sh32.c
new file mode 100644
index 000000000000..125e493ead82
--- /dev/null
+++ b/arch/sh/kernel/sys_sh32.c
@@ -0,0 +1,84 @@
1#include <linux/errno.h>
2#include <linux/sched.h>
3#include <linux/mm.h>
4#include <linux/smp.h>
5#include <linux/sem.h>
6#include <linux/msg.h>
7#include <linux/shm.h>
8#include <linux/stat.h>
9#include <linux/syscalls.h>
10#include <linux/mman.h>
11#include <linux/file.h>
12#include <linux/utsname.h>
13#include <linux/module.h>
14#include <linux/fs.h>
15#include <linux/ipc.h>
16#include <asm/cacheflush.h>
17#include <asm/uaccess.h>
18#include <asm/unistd.h>
19
20/*
21 * sys_pipe() is the normal C calling standard for creating
22 * a pipe. It's not the way Unix traditionally does this, though.
23 */
24asmlinkage int sys_pipe(unsigned long r4, unsigned long r5,
25 unsigned long r6, unsigned long r7,
26 struct pt_regs __regs)
27{
28 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
29 int fd[2];
30 int error;
31
32 error = do_pipe(fd);
33 if (!error) {
34 regs->regs[1] = fd[1];
35 return fd[0];
36 }
37 return error;
38}
39
40asmlinkage ssize_t sys_pread_wrapper(unsigned int fd, char * buf,
41 size_t count, long dummy, loff_t pos)
42{
43 return sys_pread64(fd, buf, count, pos);
44}
45
46asmlinkage ssize_t sys_pwrite_wrapper(unsigned int fd, const char * buf,
47 size_t count, long dummy, loff_t pos)
48{
49 return sys_pwrite64(fd, buf, count, pos);
50}
51
52asmlinkage int sys_fadvise64_64_wrapper(int fd, u32 offset0, u32 offset1,
53 u32 len0, u32 len1, int advice)
54{
55#ifdef __LITTLE_ENDIAN__
56 return sys_fadvise64_64(fd, (u64)offset1 << 32 | offset0,
57 (u64)len1 << 32 | len0, advice);
58#else
59 return sys_fadvise64_64(fd, (u64)offset0 << 32 | offset1,
60 (u64)len0 << 32 | len1, advice);
61#endif
62}
63
64#if defined(CONFIG_CPU_SH2) || defined(CONFIG_CPU_SH2A)
65#define SYSCALL_ARG3 "trapa #0x23"
66#else
67#define SYSCALL_ARG3 "trapa #0x13"
68#endif
69
70/*
71 * Do a system call from kernel instead of calling sys_execve so we
72 * end up with proper pt_regs.
73 */
74int kernel_execve(const char *filename, char *const argv[], char *const envp[])
75{
76 register long __sc0 __asm__ ("r3") = __NR_execve;
77 register long __sc4 __asm__ ("r4") = (long) filename;
78 register long __sc5 __asm__ ("r5") = (long) argv;
79 register long __sc6 __asm__ ("r6") = (long) envp;
80 __asm__ __volatile__ (SYSCALL_ARG3 : "=z" (__sc0)
81 : "0" (__sc0), "r" (__sc4), "r" (__sc5), "r" (__sc6)
82 : "memory");
83 return __sc0;
84}
diff --git a/arch/sh/kernel/sys_sh64.c b/arch/sh/kernel/sys_sh64.c
new file mode 100644
index 000000000000..578004d71e02
--- /dev/null
+++ b/arch/sh/kernel/sys_sh64.c
@@ -0,0 +1,66 @@
1/*
2 * arch/sh/kernel/sys_sh64.c
3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 *
6 * This file contains various random system calls that
7 * have a non-standard calling sequence on the Linux/SH5
8 * platform.
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/errno.h>
15#include <linux/rwsem.h>
16#include <linux/sched.h>
17#include <linux/mm.h>
18#include <linux/fs.h>
19#include <linux/smp.h>
20#include <linux/sem.h>
21#include <linux/msg.h>
22#include <linux/shm.h>
23#include <linux/stat.h>
24#include <linux/mman.h>
25#include <linux/file.h>
26#include <linux/utsname.h>
27#include <linux/syscalls.h>
28#include <linux/ipc.h>
29#include <asm/uaccess.h>
30#include <asm/ptrace.h>
31#include <asm/unistd.h>
32
33/*
34 * sys_pipe() is the normal C calling standard for creating
35 * a pipe. It's not the way Unix traditionally does this, though.
36 */
37asmlinkage int sys_pipe(unsigned long * fildes)
38{
39 int fd[2];
40 int error;
41
42 error = do_pipe(fd);
43 if (!error) {
44 if (copy_to_user(fildes, fd, 2*sizeof(int)))
45 error = -EFAULT;
46 }
47 return error;
48}
49
50/*
51 * Do a system call from kernel instead of calling sys_execve so we
52 * end up with proper pt_regs.
53 */
54int kernel_execve(const char *filename, char *const argv[], char *const envp[])
55{
56 register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_execve);
57 register unsigned long __sc2 __asm__ ("r2") = (unsigned long) filename;
58 register unsigned long __sc3 __asm__ ("r3") = (unsigned long) argv;
59 register unsigned long __sc4 __asm__ ("r4") = (unsigned long) envp;
60 __asm__ __volatile__ ("trapa %1 !\t\t\t execve(%2,%3,%4)"
61 : "=r" (__sc0)
62 : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) );
63 __asm__ __volatile__ ("!dummy %0 %1 %2 %3"
64 : : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) : "memory");
65 return __sc0;
66}
diff --git a/arch/sh/kernel/syscalls.S b/arch/sh/kernel/syscalls_32.S
index 10bec45415ba..10bec45415ba 100644
--- a/arch/sh/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls_32.S
diff --git a/arch/sh64/kernel/syscalls.S b/arch/sh/kernel/syscalls_64.S
index abb94c05d07a..98a93efe3691 100644
--- a/arch/sh64/kernel/syscalls.S
+++ b/arch/sh/kernel/syscalls_64.S
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/kernel/syscalls.S 2 * arch/sh/kernel/syscalls_64.S
3 * 3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 * Copyright (C) 2004 - 2007 Paul Mundt 5 * Copyright (C) 2004 - 2007 Paul Mundt
diff --git a/arch/sh/kernel/time.c b/arch/sh/kernel/time_32.c
index 2bc04bfee738..2bc04bfee738 100644
--- a/arch/sh/kernel/time.c
+++ b/arch/sh/kernel/time_32.c
diff --git a/arch/sh64/kernel/time.c b/arch/sh/kernel/time_64.c
index 06f3c179e345..f819ba38a6ce 100644
--- a/arch/sh64/kernel/time.c
+++ b/arch/sh/kernel/time_64.c
@@ -1,20 +1,19 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/time_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/time.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003, 2004 Paul Mundt 5 * Copyright (C) 2003 - 2007 Paul Mundt
10 * Copyright (C) 2003 Richard Curnow 6 * Copyright (C) 2003 Richard Curnow
11 * 7 *
12 * Original TMU/RTC code taken from sh version. 8 * Original TMU/RTC code taken from sh version.
13 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka 9 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
14 * Some code taken from i386 version. 10 * Some code taken from i386 version.
15 * Copyright (C) 1991, 1992, 1995 Linus Torvalds 11 * Copyright (C) 1991, 1992, 1995 Linus Torvalds
12 *
13 * This file is subject to the terms and conditions of the GNU General Public
14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
16 */ 16 */
17
18#include <linux/errno.h> 17#include <linux/errno.h>
19#include <linux/rwsem.h> 18#include <linux/rwsem.h>
20#include <linux/sched.h> 19#include <linux/sched.h>
@@ -30,37 +29,27 @@
30#include <linux/smp.h> 29#include <linux/smp.h>
31#include <linux/module.h> 30#include <linux/module.h>
32#include <linux/bcd.h> 31#include <linux/bcd.h>
33 32#include <linux/timex.h>
34#include <asm/registers.h> /* required by inline __asm__ stmt. */ 33#include <linux/irq.h>
35 34#include <linux/io.h>
35#include <linux/platform_device.h>
36#include <asm/cpu/registers.h> /* required by inline __asm__ stmt. */
37#include <asm/cpu/irq.h>
38#include <asm/addrspace.h>
36#include <asm/processor.h> 39#include <asm/processor.h>
37#include <asm/uaccess.h> 40#include <asm/uaccess.h>
38#include <asm/io.h>
39#include <asm/irq.h>
40#include <asm/delay.h> 41#include <asm/delay.h>
41 42
42#include <linux/timex.h>
43#include <linux/irq.h>
44#include <asm/hardware.h>
45
46#define TMU_TOCR_INIT 0x00 43#define TMU_TOCR_INIT 0x00
47#define TMU0_TCR_INIT 0x0020 44#define TMU0_TCR_INIT 0x0020
48#define TMU_TSTR_INIT 1 45#define TMU_TSTR_INIT 1
49#define TMU_TSTR_OFF 0 46#define TMU_TSTR_OFF 0
50 47
51/* RCR1 Bits */ 48/* Real Time Clock */
52#define RCR1_CF 0x80 /* Carry Flag */ 49#define RTC_BLOCK_OFF 0x01040000
53#define RCR1_CIE 0x10 /* Carry Interrupt Enable */ 50#define RTC_BASE PHYS_PERIPHERAL_BLOCK + RTC_BLOCK_OFF
54#define RCR1_AIE 0x08 /* Alarm Interrupt Enable */ 51#define RTC_RCR1_CIE 0x10 /* Carry Interrupt Enable */
55#define RCR1_AF 0x01 /* Alarm Flag */ 52#define RTC_RCR1 (rtc_base + 0x38)
56
57/* RCR2 Bits */
58#define RCR2_PEF 0x80 /* PEriodic interrupt Flag */
59#define RCR2_PESMASK 0x70 /* Periodic interrupt Set */
60#define RCR2_RTCEN 0x08 /* ENable RTC */
61#define RCR2_ADJ 0x04 /* ADJustment (30-second) */
62#define RCR2_RESET 0x02 /* Reset bit */
63#define RCR2_START 0x01 /* Start bit */
64 53
65/* Clock, Power and Reset Controller */ 54/* Clock, Power and Reset Controller */
66#define CPRC_BLOCK_OFF 0x01010000 55#define CPRC_BLOCK_OFF 0x01010000
@@ -84,27 +73,6 @@
84#define TMU0_TCNT TMU0_BASE+0x4 /* Long access */ 73#define TMU0_TCNT TMU0_BASE+0x4 /* Long access */
85#define TMU0_TCR TMU0_BASE+0x8 /* Word access */ 74#define TMU0_TCR TMU0_BASE+0x8 /* Word access */
86 75
87/* Real Time Clock */
88#define RTC_BLOCK_OFF 0x01040000
89#define RTC_BASE PHYS_PERIPHERAL_BLOCK + RTC_BLOCK_OFF
90
91#define R64CNT rtc_base+0x00
92#define RSECCNT rtc_base+0x04
93#define RMINCNT rtc_base+0x08
94#define RHRCNT rtc_base+0x0c
95#define RWKCNT rtc_base+0x10
96#define RDAYCNT rtc_base+0x14
97#define RMONCNT rtc_base+0x18
98#define RYRCNT rtc_base+0x1c /* 16bit */
99#define RSECAR rtc_base+0x20
100#define RMINAR rtc_base+0x24
101#define RHRAR rtc_base+0x28
102#define RWKAR rtc_base+0x2c
103#define RDAYAR rtc_base+0x30
104#define RMONAR rtc_base+0x34
105#define RCR1 rtc_base+0x38
106#define RCR2 rtc_base+0x3c
107
108#define TICK_SIZE (tick_nsec / 1000) 76#define TICK_SIZE (tick_nsec / 1000)
109 77
110static unsigned long tmu_base, rtc_base; 78static unsigned long tmu_base, rtc_base;
@@ -236,47 +204,23 @@ int do_settimeofday(struct timespec *tv)
236} 204}
237EXPORT_SYMBOL(do_settimeofday); 205EXPORT_SYMBOL(do_settimeofday);
238 206
239static int set_rtc_time(unsigned long nowtime) 207/* Dummy RTC ops */
208static void null_rtc_get_time(struct timespec *tv)
240{ 209{
241 int retval = 0; 210 tv->tv_sec = mktime(2000, 1, 1, 0, 0, 0);
242 int real_seconds, real_minutes, cmos_minutes; 211 tv->tv_nsec = 0;
243 212}
244 ctrl_outb(RCR2_RESET, RCR2); /* Reset pre-scaler & stop RTC */
245
246 cmos_minutes = ctrl_inb(RMINCNT);
247 BCD_TO_BIN(cmos_minutes);
248
249 /*
250 * since we're only adjusting minutes and seconds,
251 * don't interfere with hour overflow. This avoids
252 * messing with unknown time zones but requires your
253 * RTC not to be off by more than 15 minutes
254 */
255 real_seconds = nowtime % 60;
256 real_minutes = nowtime / 60;
257 if (((abs(real_minutes - cmos_minutes) + 15)/30) & 1)
258 real_minutes += 30; /* correct for half hour time zone */
259 real_minutes %= 60;
260
261 if (abs(real_minutes - cmos_minutes) < 30) {
262 BIN_TO_BCD(real_seconds);
263 BIN_TO_BCD(real_minutes);
264 ctrl_outb(real_seconds, RSECCNT);
265 ctrl_outb(real_minutes, RMINCNT);
266 } else {
267 printk(KERN_WARNING
268 "set_rtc_time: can't update from %d to %d\n",
269 cmos_minutes, real_minutes);
270 retval = -1;
271 }
272
273 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start RTC */
274 213
275 return retval; 214static int null_rtc_set_time(const time_t secs)
215{
216 return 0;
276} 217}
277 218
219void (*rtc_sh_get_time)(struct timespec *) = null_rtc_get_time;
220int (*rtc_sh_set_time)(const time_t) = null_rtc_set_time;
221
278/* last time the RTC clock got updated */ 222/* last time the RTC clock got updated */
279static long last_rtc_update = 0; 223static long last_rtc_update;
280 224
281/* 225/*
282 * timer_interrupt() needs to keep up the real-time clock, 226 * timer_interrupt() needs to keep up the real-time clock,
@@ -296,11 +240,8 @@ static inline void do_timer_interrupt(void)
296 profile_tick(CPU_PROFILING); 240 profile_tick(CPU_PROFILING);
297 241
298#ifdef CONFIG_HEARTBEAT 242#ifdef CONFIG_HEARTBEAT
299 { 243 if (sh_mv.mv_heartbeat != NULL)
300 extern void heartbeat(void); 244 sh_mv.mv_heartbeat();
301
302 heartbeat();
303 }
304#endif 245#endif
305 246
306 /* 247 /*
@@ -312,10 +253,11 @@ static inline void do_timer_interrupt(void)
312 xtime.tv_sec > last_rtc_update + 660 && 253 xtime.tv_sec > last_rtc_update + 660 &&
313 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 && 254 (xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
314 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) { 255 (xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
315 if (set_rtc_time(xtime.tv_sec) == 0) 256 if (rtc_sh_set_time(xtime.tv_sec) == 0)
316 last_rtc_update = xtime.tv_sec; 257 last_rtc_update = xtime.tv_sec;
317 else 258 else
318 last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */ 259 /* do it again in 60 s */
260 last_rtc_update = xtime.tv_sec - 600;
319 } 261 }
320} 262}
321 263
@@ -347,50 +289,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
347 return IRQ_HANDLED; 289 return IRQ_HANDLED;
348} 290}
349 291
350static unsigned long get_rtc_time(void)
351{
352 unsigned int sec, min, hr, wk, day, mon, yr, yr100;
353
354 again:
355 do {
356 ctrl_outb(0, RCR1); /* Clear CF-bit */
357 sec = ctrl_inb(RSECCNT);
358 min = ctrl_inb(RMINCNT);
359 hr = ctrl_inb(RHRCNT);
360 wk = ctrl_inb(RWKCNT);
361 day = ctrl_inb(RDAYCNT);
362 mon = ctrl_inb(RMONCNT);
363 yr = ctrl_inw(RYRCNT);
364 yr100 = (yr >> 8);
365 yr &= 0xff;
366 } while ((ctrl_inb(RCR1) & RCR1_CF) != 0);
367
368 BCD_TO_BIN(yr100);
369 BCD_TO_BIN(yr);
370 BCD_TO_BIN(mon);
371 BCD_TO_BIN(day);
372 BCD_TO_BIN(hr);
373 BCD_TO_BIN(min);
374 BCD_TO_BIN(sec);
375
376 if (yr > 99 || mon < 1 || mon > 12 || day > 31 || day < 1 ||
377 hr > 23 || min > 59 || sec > 59) {
378 printk(KERN_ERR
379 "SH RTC: invalid value, resetting to 1 Jan 2000\n");
380 ctrl_outb(RCR2_RESET, RCR2); /* Reset & Stop */
381 ctrl_outb(0, RSECCNT);
382 ctrl_outb(0, RMINCNT);
383 ctrl_outb(0, RHRCNT);
384 ctrl_outb(6, RWKCNT);
385 ctrl_outb(1, RDAYCNT);
386 ctrl_outb(1, RMONCNT);
387 ctrl_outw(0x2000, RYRCNT);
388 ctrl_outb(RCR2_RTCEN|RCR2_START, RCR2); /* Start */
389 goto again;
390 }
391
392 return mktime(yr100 * 100 + yr, mon, day, hr, min, sec);
393}
394 292
395static __init unsigned int get_cpu_hz(void) 293static __init unsigned int get_cpu_hz(void)
396{ 294{
@@ -406,8 +304,8 @@ static __init unsigned int get_cpu_hz(void)
406 register unsigned long long __rtc_irq_flag __asm__ ("r3"); 304 register unsigned long long __rtc_irq_flag __asm__ ("r3");
407 305
408 local_irq_enable(); 306 local_irq_enable();
409 do {} while (ctrl_inb(R64CNT) != 0); 307 do {} while (ctrl_inb(rtc_base) != 0);
410 ctrl_outb(RCR1_CIE, RCR1); /* Enable carry interrupt */ 308 ctrl_outb(RTC_RCR1_CIE, RTC_RCR1); /* Enable carry interrupt */
411 309
412 /* 310 /*
413 * r3 is arbitrary. CDC does not support "=z". 311 * r3 is arbitrary. CDC does not support "=z".
@@ -449,28 +347,19 @@ static __init unsigned int get_cpu_hz(void)
449 347
450 count = ctc_val_init - ctc_val; /* CTC counts down */ 348 count = ctc_val_init - ctc_val; /* CTC counts down */
451 349
452#if defined (CONFIG_SH_SIMULATOR)
453 /*
454 * Let's pretend we are a 5MHz SH-5 to avoid a too
455 * little timer interval. Also to keep delay
456 * calibration within a reasonable time.
457 */
458 return 5000000;
459#else
460 /* 350 /*
461 * This really is count by the number of clock cycles 351 * This really is count by the number of clock cycles
462 * by the ratio between a complete R64CNT 352 * by the ratio between a complete R64CNT
463 * wrap-around (128) and CUI interrupt being raised (64). 353 * wrap-around (128) and CUI interrupt being raised (64).
464 */ 354 */
465 return count*2; 355 return count*2;
466#endif
467} 356}
468 357
469static irqreturn_t sh64_rtc_interrupt(int irq, void *dev_id) 358static irqreturn_t sh64_rtc_interrupt(int irq, void *dev_id)
470{ 359{
471 struct pt_regs *regs = get_irq_regs(); 360 struct pt_regs *regs = get_irq_regs();
472 361
473 ctrl_outb(0, RCR1); /* Disable Carry Interrupts */ 362 ctrl_outb(0, RTC_RCR1); /* Disable Carry Interrupts */
474 regs->regs[3] = 1; /* Using r3 */ 363 regs->regs[3] = 1; /* Using r3 */
475 364
476 return IRQ_HANDLED; 365 return IRQ_HANDLED;
@@ -513,8 +402,7 @@ void __init time_init(void)
513 panic("Unable to remap CPRC\n"); 402 panic("Unable to remap CPRC\n");
514 } 403 }
515 404
516 xtime.tv_sec = get_rtc_time(); 405 rtc_sh_get_time(&xtime);
517 xtime.tv_nsec = 0;
518 406
519 setup_irq(TIMER_IRQ, &irq0); 407 setup_irq(TIMER_IRQ, &irq0);
520 setup_irq(RTC_IRQ, &irq1); 408 setup_irq(RTC_IRQ, &irq1);
@@ -525,7 +413,7 @@ void __init time_init(void)
525 /* Note careful order of operations to maintain reasonable precision and avoid overflow. */ 413 /* Note careful order of operations to maintain reasonable precision and avoid overflow. */
526 scaled_recip_ctc_ticks_per_jiffy = ((1ULL << CTC_JIFFY_SCALE_SHIFT) / (unsigned long long)(cpu_clock / HZ)); 414 scaled_recip_ctc_ticks_per_jiffy = ((1ULL << CTC_JIFFY_SCALE_SHIFT) / (unsigned long long)(cpu_clock / HZ));
527 415
528 disable_irq(RTC_IRQ); 416 free_irq(RTC_IRQ, NULL);
529 417
530 printk("CPU clock: %d.%02dMHz\n", 418 printk("CPU clock: %d.%02dMHz\n",
531 (cpu_clock / 1000000), (cpu_clock % 1000000)/10000); 419 (cpu_clock / 1000000), (cpu_clock % 1000000)/10000);
@@ -591,3 +479,41 @@ void enter_deep_standby(void)
591 asm __volatile__ ("nop"); 479 asm __volatile__ ("nop");
592 panic("Unexpected wakeup!\n"); 480 panic("Unexpected wakeup!\n");
593} 481}
482
483static struct resource rtc_resources[] = {
484 [0] = {
485 /* RTC base, filled in by rtc_init */
486 .flags = IORESOURCE_IO,
487 },
488 [1] = {
489 /* Period IRQ */
490 .start = IRQ_PRI,
491 .flags = IORESOURCE_IRQ,
492 },
493 [2] = {
494 /* Carry IRQ */
495 .start = IRQ_CUI,
496 .flags = IORESOURCE_IRQ,
497 },
498 [3] = {
499 /* Alarm IRQ */
500 .start = IRQ_ATI,
501 .flags = IORESOURCE_IRQ,
502 },
503};
504
505static struct platform_device rtc_device = {
506 .name = "sh-rtc",
507 .id = -1,
508 .num_resources = ARRAY_SIZE(rtc_resources),
509 .resource = rtc_resources,
510};
511
512static int __init rtc_init(void)
513{
514 rtc_resources[0].start = rtc_base;
515 rtc_resources[0].end = rtc_resources[0].start + 0x58 - 1;
516
517 return platform_device_register(&rtc_device);
518}
519device_initcall(rtc_init);
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c
index 82de6895ade5..499e07beebe2 100644
--- a/arch/sh/kernel/timers/timer-cmt.c
+++ b/arch/sh/kernel/timers/timer-cmt.c
@@ -31,7 +31,9 @@
31#define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0) 31#define cmt_clock_enable() do { ctrl_outb(ctrl_inb(STBCR3) & ~0x10, STBCR3); } while(0)
32#define CMT_CMCSR_INIT 0x0040 32#define CMT_CMCSR_INIT 0x0040
33#define CMT_CMCSR_CALIB 0x0000 33#define CMT_CMCSR_CALIB 0x0000
34#elif defined(CONFIG_CPU_SUBTYPE_SH7206) 34#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7206) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7263)
35#define CMT_CMSTR 0xfffec000 37#define CMT_CMSTR 0xfffec000
36#define CMT_CMCSR_0 0xfffec002 38#define CMT_CMCSR_0 0xfffec002
37#define CMT_CMCNT_0 0xfffec004 39#define CMT_CMCNT_0 0xfffec004
diff --git a/arch/sh/kernel/timers/timer-tmu.c b/arch/sh/kernel/timers/timer-tmu.c
index 628ec9a15e38..8935570008d2 100644
--- a/arch/sh/kernel/timers/timer-tmu.c
+++ b/arch/sh/kernel/timers/timer-tmu.c
@@ -174,6 +174,7 @@ static int tmu_timer_init(void)
174 tmu_timer_stop(); 174 tmu_timer_stop();
175 175
176#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \ 176#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && \
177 !defined(CONFIG_CPU_SUBTYPE_SH7721) && \
177 !defined(CONFIG_CPU_SUBTYPE_SH7760) && \ 178 !defined(CONFIG_CPU_SUBTYPE_SH7760) && \
178 !defined(CONFIG_CPU_SUBTYPE_SH7785) && \ 179 !defined(CONFIG_CPU_SUBTYPE_SH7785) && \
179 !defined(CONFIG_CPU_SUBTYPE_SHX3) 180 !defined(CONFIG_CPU_SUBTYPE_SHX3)
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index cf99111cb33f..a3bdc68ef02c 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -1,947 +1,68 @@
1/*
2 * 'traps.c' handles hardware traps and faults after we have saved some
3 * state in 'entry.S'.
4 *
5 * SuperH version: Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Philipp Rumpf
7 * Copyright (C) 2000 David Howells
8 * Copyright (C) 2002 - 2007 Paul Mundt
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/kernel.h>
15#include <linux/ptrace.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/module.h>
19#include <linux/kallsyms.h>
20#include <linux/io.h>
21#include <linux/bug.h> 1#include <linux/bug.h>
22#include <linux/debug_locks.h> 2#include <linux/io.h>
3#include <linux/types.h>
23#include <linux/kdebug.h> 4#include <linux/kdebug.h>
24#include <linux/kexec.h> 5#include <linux/signal.h>
25#include <linux/limits.h> 6#include <linux/sched.h>
26#include <asm/system.h> 7#include <asm/system.h>
27#include <asm/uaccess.h>
28
29#ifdef CONFIG_SH_KGDB
30#include <asm/kgdb.h>
31#define CHK_REMOTE_DEBUG(regs) \
32{ \
33 if (kgdb_debug_hook && !user_mode(regs))\
34 (*kgdb_debug_hook)(regs); \
35}
36#else
37#define CHK_REMOTE_DEBUG(regs)
38#endif
39
40#ifdef CONFIG_CPU_SH2
41# define TRAP_RESERVED_INST 4
42# define TRAP_ILLEGAL_SLOT_INST 6
43# define TRAP_ADDRESS_ERROR 9
44# ifdef CONFIG_CPU_SH2A
45# define TRAP_DIVZERO_ERROR 17
46# define TRAP_DIVOVF_ERROR 18
47# endif
48#else
49#define TRAP_RESERVED_INST 12
50#define TRAP_ILLEGAL_SLOT_INST 13
51#endif
52
53static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
54{
55 unsigned long p;
56 int i;
57
58 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
59
60 for (p = bottom & ~31; p < top; ) {
61 printk("%04lx: ", p & 0xffff);
62
63 for (i = 0; i < 8; i++, p += 4) {
64 unsigned int val;
65
66 if (p < bottom || p >= top)
67 printk(" ");
68 else {
69 if (__get_user(val, (unsigned int __user *)p)) {
70 printk("\n");
71 return;
72 }
73 printk("%08x ", val);
74 }
75 }
76 printk("\n");
77 }
78}
79
80static DEFINE_SPINLOCK(die_lock);
81
82void die(const char * str, struct pt_regs * regs, long err)
83{
84 static int die_counter;
85
86 oops_enter();
87
88 console_verbose();
89 spin_lock_irq(&die_lock);
90 bust_spinlocks(1);
91
92 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
93
94 CHK_REMOTE_DEBUG(regs);
95 print_modules();
96 show_regs(regs);
97
98 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
99 task_pid_nr(current), task_stack_page(current) + 1);
100
101 if (!user_mode(regs) || in_interrupt())
102 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
103 (unsigned long)task_stack_page(current));
104
105 bust_spinlocks(0);
106 add_taint(TAINT_DIE);
107 spin_unlock_irq(&die_lock);
108
109 if (kexec_should_crash(current))
110 crash_kexec(regs);
111
112 if (in_interrupt())
113 panic("Fatal exception in interrupt");
114
115 if (panic_on_oops)
116 panic("Fatal exception");
117
118 oops_exit();
119 do_exit(SIGSEGV);
120}
121
122static inline void die_if_kernel(const char *str, struct pt_regs *regs,
123 long err)
124{
125 if (!user_mode(regs))
126 die(str, regs, err);
127}
128
129/*
130 * try and fix up kernelspace address errors
131 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
132 * - kernel/userspace interfaces cause a jump to an appropriate handler
133 * - other kernel errors are bad
134 * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault
135 */
136static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
137{
138 if (!user_mode(regs)) {
139 const struct exception_table_entry *fixup;
140 fixup = search_exception_tables(regs->pc);
141 if (fixup) {
142 regs->pc = fixup->fixup;
143 return 0;
144 }
145 die(str, regs, err);
146 }
147 return -EFAULT;
148}
149
150/*
151 * handle an instruction that does an unaligned memory access by emulating the
152 * desired behaviour
153 * - note that PC _may not_ point to the faulting instruction
154 * (if that instruction is in a branch delay slot)
155 * - return 0 if emulation okay, -EFAULT on existential error
156 */
157static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
158{
159 int ret, index, count;
160 unsigned long *rm, *rn;
161 unsigned char *src, *dst;
162
163 index = (instruction>>8)&15; /* 0x0F00 */
164 rn = &regs->regs[index];
165
166 index = (instruction>>4)&15; /* 0x00F0 */
167 rm = &regs->regs[index];
168
169 count = 1<<(instruction&3);
170
171 ret = -EFAULT;
172 switch (instruction>>12) {
173 case 0: /* mov.[bwl] to/from memory via r0+rn */
174 if (instruction & 8) {
175 /* from memory */
176 src = (unsigned char*) *rm;
177 src += regs->regs[0];
178 dst = (unsigned char*) rn;
179 *(unsigned long*)dst = 0;
180
181#ifdef __LITTLE_ENDIAN__
182 if (copy_from_user(dst, src, count))
183 goto fetch_fault;
184
185 if ((count == 2) && dst[1] & 0x80) {
186 dst[2] = 0xff;
187 dst[3] = 0xff;
188 }
189#else
190 dst += 4-count;
191
192 if (__copy_user(dst, src, count))
193 goto fetch_fault;
194
195 if ((count == 2) && dst[2] & 0x80) {
196 dst[0] = 0xff;
197 dst[1] = 0xff;
198 }
199#endif
200 } else {
201 /* to memory */
202 src = (unsigned char*) rm;
203#if !defined(__LITTLE_ENDIAN__)
204 src += 4-count;
205#endif
206 dst = (unsigned char*) *rn;
207 dst += regs->regs[0];
208
209 if (copy_to_user(dst, src, count))
210 goto fetch_fault;
211 }
212 ret = 0;
213 break;
214
215 case 1: /* mov.l Rm,@(disp,Rn) */
216 src = (unsigned char*) rm;
217 dst = (unsigned char*) *rn;
218 dst += (instruction&0x000F)<<2;
219
220 if (copy_to_user(dst,src,4))
221 goto fetch_fault;
222 ret = 0;
223 break;
224
225 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
226 if (instruction & 4)
227 *rn -= count;
228 src = (unsigned char*) rm;
229 dst = (unsigned char*) *rn;
230#if !defined(__LITTLE_ENDIAN__)
231 src += 4-count;
232#endif
233 if (copy_to_user(dst, src, count))
234 goto fetch_fault;
235 ret = 0;
236 break;
237
238 case 5: /* mov.l @(disp,Rm),Rn */
239 src = (unsigned char*) *rm;
240 src += (instruction&0x000F)<<2;
241 dst = (unsigned char*) rn;
242 *(unsigned long*)dst = 0;
243
244 if (copy_from_user(dst,src,4))
245 goto fetch_fault;
246 ret = 0;
247 break;
248 8
249 case 6: /* mov.[bwl] from memory, possibly with post-increment */ 9#ifdef CONFIG_BUG
250 src = (unsigned char*) *rm; 10static void handle_BUG(struct pt_regs *regs)
251 if (instruction & 4)
252 *rm += count;
253 dst = (unsigned char*) rn;
254 *(unsigned long*)dst = 0;
255
256#ifdef __LITTLE_ENDIAN__
257 if (copy_from_user(dst, src, count))
258 goto fetch_fault;
259
260 if ((count == 2) && dst[1] & 0x80) {
261 dst[2] = 0xff;
262 dst[3] = 0xff;
263 }
264#else
265 dst += 4-count;
266
267 if (copy_from_user(dst, src, count))
268 goto fetch_fault;
269
270 if ((count == 2) && dst[2] & 0x80) {
271 dst[0] = 0xff;
272 dst[1] = 0xff;
273 }
274#endif
275 ret = 0;
276 break;
277
278 case 8:
279 switch ((instruction&0xFF00)>>8) {
280 case 0x81: /* mov.w R0,@(disp,Rn) */
281 src = (unsigned char*) &regs->regs[0];
282#if !defined(__LITTLE_ENDIAN__)
283 src += 2;
284#endif
285 dst = (unsigned char*) *rm; /* called Rn in the spec */
286 dst += (instruction&0x000F)<<1;
287
288 if (copy_to_user(dst, src, 2))
289 goto fetch_fault;
290 ret = 0;
291 break;
292
293 case 0x85: /* mov.w @(disp,Rm),R0 */
294 src = (unsigned char*) *rm;
295 src += (instruction&0x000F)<<1;
296 dst = (unsigned char*) &regs->regs[0];
297 *(unsigned long*)dst = 0;
298
299#if !defined(__LITTLE_ENDIAN__)
300 dst += 2;
301#endif
302
303 if (copy_from_user(dst, src, 2))
304 goto fetch_fault;
305
306#ifdef __LITTLE_ENDIAN__
307 if (dst[1] & 0x80) {
308 dst[2] = 0xff;
309 dst[3] = 0xff;
310 }
311#else
312 if (dst[2] & 0x80) {
313 dst[0] = 0xff;
314 dst[1] = 0xff;
315 }
316#endif
317 ret = 0;
318 break;
319 }
320 break;
321 }
322 return ret;
323
324 fetch_fault:
325 /* Argh. Address not only misaligned but also non-existent.
326 * Raise an EFAULT and see if it's trapped
327 */
328 return die_if_no_fixup("Fault in unaligned fixup", regs, 0);
329}
330
331/*
332 * emulate the instruction in the delay slot
333 * - fetches the instruction from PC+2
334 */
335static inline int handle_unaligned_delayslot(struct pt_regs *regs)
336{ 11{
337 u16 instruction; 12 enum bug_trap_type tt;
338 13 tt = report_bug(regs->pc, regs);
339 if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) { 14 if (tt == BUG_TRAP_TYPE_WARN) {
340 /* the instruction-fetch faulted */ 15 regs->pc += instruction_size(regs->pc);
341 if (user_mode(regs)) 16 return;
342 return -EFAULT;
343
344 /* kernel */
345 die("delay-slot-insn faulting in handle_unaligned_delayslot",
346 regs, 0);
347 } 17 }
348 18
349 return handle_unaligned_ins(instruction,regs); 19 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
350} 20}
351 21
352/* 22int is_valid_bugaddr(unsigned long addr)
353 * handle an instruction that does an unaligned memory access
354 * - have to be careful of branch delay-slot instructions that fault
355 * SH3:
356 * - if the branch would be taken PC points to the branch
357 * - if the branch would not be taken, PC points to delay-slot
358 * SH4:
359 * - PC always points to delayed branch
360 * - return 0 if handled, -EFAULT if failed (may not return if in kernel)
361 */
362
363/* Macros to determine offset from current PC for branch instructions */
364/* Explicit type coercion is used to force sign extension where needed */
365#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
366#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
367
368/*
369 * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
370 * opcodes..
371 */
372#ifndef CONFIG_CPU_SH2A
373static int handle_unaligned_notify_count = 10;
374
375static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
376{ 23{
377 u_int rm; 24 return addr >= PAGE_OFFSET;
378 int ret, index;
379
380 index = (instruction>>8)&15; /* 0x0F00 */
381 rm = regs->regs[index];
382
383 /* shout about the first ten userspace fixups */
384 if (user_mode(regs) && handle_unaligned_notify_count>0) {
385 handle_unaligned_notify_count--;
386
387 printk(KERN_NOTICE "Fixing up unaligned userspace access "
388 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
389 current->comm, task_pid_nr(current),
390 (u16 *)regs->pc, instruction);
391 }
392
393 ret = -EFAULT;
394 switch (instruction&0xF000) {
395 case 0x0000:
396 if (instruction==0x000B) {
397 /* rts */
398 ret = handle_unaligned_delayslot(regs);
399 if (ret==0)
400 regs->pc = regs->pr;
401 }
402 else if ((instruction&0x00FF)==0x0023) {
403 /* braf @Rm */
404 ret = handle_unaligned_delayslot(regs);
405 if (ret==0)
406 regs->pc += rm + 4;
407 }
408 else if ((instruction&0x00FF)==0x0003) {
409 /* bsrf @Rm */
410 ret = handle_unaligned_delayslot(regs);
411 if (ret==0) {
412 regs->pr = regs->pc + 4;
413 regs->pc += rm + 4;
414 }
415 }
416 else {
417 /* mov.[bwl] to/from memory via r0+rn */
418 goto simple;
419 }
420 break;
421
422 case 0x1000: /* mov.l Rm,@(disp,Rn) */
423 goto simple;
424
425 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
426 goto simple;
427
428 case 0x4000:
429 if ((instruction&0x00FF)==0x002B) {
430 /* jmp @Rm */
431 ret = handle_unaligned_delayslot(regs);
432 if (ret==0)
433 regs->pc = rm;
434 }
435 else if ((instruction&0x00FF)==0x000B) {
436 /* jsr @Rm */
437 ret = handle_unaligned_delayslot(regs);
438 if (ret==0) {
439 regs->pr = regs->pc + 4;
440 regs->pc = rm;
441 }
442 }
443 else {
444 /* mov.[bwl] to/from memory via r0+rn */
445 goto simple;
446 }
447 break;
448
449 case 0x5000: /* mov.l @(disp,Rm),Rn */
450 goto simple;
451
452 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
453 goto simple;
454
455 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
456 switch (instruction&0x0F00) {
457 case 0x0100: /* mov.w R0,@(disp,Rm) */
458 goto simple;
459 case 0x0500: /* mov.w @(disp,Rm),R0 */
460 goto simple;
461 case 0x0B00: /* bf lab - no delayslot*/
462 break;
463 case 0x0F00: /* bf/s lab */
464 ret = handle_unaligned_delayslot(regs);
465 if (ret==0) {
466#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
467 if ((regs->sr & 0x00000001) != 0)
468 regs->pc += 4; /* next after slot */
469 else
470#endif
471 regs->pc += SH_PC_8BIT_OFFSET(instruction);
472 }
473 break;
474 case 0x0900: /* bt lab - no delayslot */
475 break;
476 case 0x0D00: /* bt/s lab */
477 ret = handle_unaligned_delayslot(regs);
478 if (ret==0) {
479#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
480 if ((regs->sr & 0x00000001) == 0)
481 regs->pc += 4; /* next after slot */
482 else
483#endif
484 regs->pc += SH_PC_8BIT_OFFSET(instruction);
485 }
486 break;
487 }
488 break;
489
490 case 0xA000: /* bra label */
491 ret = handle_unaligned_delayslot(regs);
492 if (ret==0)
493 regs->pc += SH_PC_12BIT_OFFSET(instruction);
494 break;
495
496 case 0xB000: /* bsr label */
497 ret = handle_unaligned_delayslot(regs);
498 if (ret==0) {
499 regs->pr = regs->pc + 4;
500 regs->pc += SH_PC_12BIT_OFFSET(instruction);
501 }
502 break;
503 }
504 return ret;
505
506 /* handle non-delay-slot instruction */
507 simple:
508 ret = handle_unaligned_ins(instruction,regs);
509 if (ret==0)
510 regs->pc += instruction_size(instruction);
511 return ret;
512} 25}
513#endif /* CONFIG_CPU_SH2A */
514
515#ifdef CONFIG_CPU_HAS_SR_RB
516#define lookup_exception_vector(x) \
517 __asm__ __volatile__ ("stc r2_bank, %0\n\t" : "=r" ((x)))
518#else
519#define lookup_exception_vector(x) \
520 __asm__ __volatile__ ("mov r4, %0\n\t" : "=r" ((x)))
521#endif 26#endif
522 27
523/* 28/*
524 * Handle various address error exceptions: 29 * Generic trap handler.
525 * - instruction address error:
526 * misaligned PC
527 * PC >= 0x80000000 in user mode
528 * - data address error (read and write)
529 * misaligned data access
530 * access to >= 0x80000000 is user mode
531 * Unfortuntaly we can't distinguish between instruction address error
532 * and data address errors caused by read accesses.
533 */ 30 */
534asmlinkage void do_address_error(struct pt_regs *regs, 31BUILD_TRAP_HANDLER(debug)
535 unsigned long writeaccess,
536 unsigned long address)
537{ 32{
538 unsigned long error_code = 0; 33 TRAP_HANDLER_DECL;
539 mm_segment_t oldfs;
540 siginfo_t info;
541#ifndef CONFIG_CPU_SH2A
542 u16 instruction;
543 int tmp;
544#endif
545
546 /* Intentional ifdef */
547#ifdef CONFIG_CPU_HAS_SR_RB
548 lookup_exception_vector(error_code);
549#endif
550
551 oldfs = get_fs();
552
553 if (user_mode(regs)) {
554 int si_code = BUS_ADRERR;
555
556 local_irq_enable();
557 34
558 /* bad PC is not something we can fix */ 35 /* Rewind */
559 if (regs->pc & 1) { 36 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
560 si_code = BUS_ADRALN;
561 goto uspace_segv;
562 }
563 37
564#ifndef CONFIG_CPU_SH2A 38 if (notify_die(DIE_TRAP, "debug trap", regs, 0, vec & 0xff,
565 set_fs(USER_DS); 39 SIGTRAP) == NOTIFY_STOP)
566 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) { 40 return;
567 /* Argh. Fault on the instruction itself.
568 This should never happen non-SMP
569 */
570 set_fs(oldfs);
571 goto uspace_segv;
572 }
573
574 tmp = handle_unaligned_access(instruction, regs);
575 set_fs(oldfs);
576
577 if (tmp==0)
578 return; /* sorted */
579#endif
580
581uspace_segv:
582 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
583 "access (PC %lx PR %lx)\n", current->comm, regs->pc,
584 regs->pr);
585
586 info.si_signo = SIGBUS;
587 info.si_errno = 0;
588 info.si_code = si_code;
589 info.si_addr = (void __user *)address;
590 force_sig_info(SIGBUS, &info, current);
591 } else {
592 if (regs->pc & 1)
593 die("unaligned program counter", regs, error_code);
594
595#ifndef CONFIG_CPU_SH2A
596 set_fs(KERNEL_DS);
597 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
598 /* Argh. Fault on the instruction itself.
599 This should never happen non-SMP
600 */
601 set_fs(oldfs);
602 die("insn faulting in do_address_error", regs, 0);
603 }
604
605 handle_unaligned_access(instruction, regs);
606 set_fs(oldfs);
607#else
608 printk(KERN_NOTICE "Killing process \"%s\" due to unaligned "
609 "access\n", current->comm);
610 41
611 force_sig(SIGSEGV, current); 42 force_sig(SIGTRAP, current);
612#endif
613 }
614} 43}
615 44
616#ifdef CONFIG_SH_DSP
617/* 45/*
618 * SH-DSP support gerg@snapgear.com. 46 * Special handler for BUG() traps.
619 */ 47 */
620int is_dsp_inst(struct pt_regs *regs) 48BUILD_TRAP_HANDLER(bug)
621{ 49{
622 unsigned short inst = 0; 50 TRAP_HANDLER_DECL;
623
624 /*
625 * Safe guard if DSP mode is already enabled or we're lacking
626 * the DSP altogether.
627 */
628 if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
629 return 0;
630
631 get_user(inst, ((unsigned short *) regs->pc));
632
633 inst &= 0xf000;
634
635 /* Check for any type of DSP or support instruction */
636 if ((inst == 0xf000) || (inst == 0x4000))
637 return 1;
638
639 return 0;
640}
641#else
642#define is_dsp_inst(regs) (0)
643#endif /* CONFIG_SH_DSP */
644 51
645#ifdef CONFIG_CPU_SH2A 52 /* Rewind */
646asmlinkage void do_divide_error(unsigned long r4, unsigned long r5, 53 regs->pc -= instruction_size(ctrl_inw(regs->pc - 4));
647 unsigned long r6, unsigned long r7,
648 struct pt_regs __regs)
649{
650 siginfo_t info;
651
652 switch (r4) {
653 case TRAP_DIVZERO_ERROR:
654 info.si_code = FPE_INTDIV;
655 break;
656 case TRAP_DIVOVF_ERROR:
657 info.si_code = FPE_INTOVF;
658 break;
659 }
660
661 force_sig_info(SIGFPE, &info, current);
662}
663#endif
664
665/* arch/sh/kernel/cpu/sh4/fpu.c */
666extern int do_fpu_inst(unsigned short, struct pt_regs *);
667extern asmlinkage void do_fpu_state_restore(unsigned long r4, unsigned long r5,
668 unsigned long r6, unsigned long r7, struct pt_regs __regs);
669
670asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
671 unsigned long r6, unsigned long r7,
672 struct pt_regs __regs)
673{
674 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
675 unsigned long error_code;
676 struct task_struct *tsk = current;
677
678#ifdef CONFIG_SH_FPU_EMU
679 unsigned short inst = 0;
680 int err;
681
682 get_user(inst, (unsigned short*)regs->pc);
683
684 err = do_fpu_inst(inst, regs);
685 if (!err) {
686 regs->pc += instruction_size(inst);
687 return;
688 }
689 /* not a FPU inst. */
690#endif
691 54
692#ifdef CONFIG_SH_DSP 55 if (notify_die(DIE_TRAP, "bug trap", regs, 0, TRAPA_BUG_OPCODE & 0xff,
693 /* Check if it's a DSP instruction */ 56 SIGTRAP) == NOTIFY_STOP)
694 if (is_dsp_inst(regs)) {
695 /* Enable DSP mode, and restart instruction. */
696 regs->sr |= SR_DSP;
697 return; 57 return;
698 }
699#endif
700
701 lookup_exception_vector(error_code);
702
703 local_irq_enable();
704 CHK_REMOTE_DEBUG(regs);
705 force_sig(SIGILL, tsk);
706 die_if_no_fixup("reserved instruction", regs, error_code);
707}
708
709#ifdef CONFIG_SH_FPU_EMU
710static int emulate_branch(unsigned short inst, struct pt_regs* regs)
711{
712 /*
713 * bfs: 8fxx: PC+=d*2+4;
714 * bts: 8dxx: PC+=d*2+4;
715 * bra: axxx: PC+=D*2+4;
716 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
717 * braf:0x23: PC+=Rn*2+4;
718 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
719 * jmp: 4x2b: PC=Rn;
720 * jsr: 4x0b: PC=Rn after PR=PC+4;
721 * rts: 000b: PC=PR;
722 */
723 if ((inst & 0xfd00) == 0x8d00) {
724 regs->pc += SH_PC_8BIT_OFFSET(inst);
725 return 0;
726 }
727
728 if ((inst & 0xe000) == 0xa000) {
729 regs->pc += SH_PC_12BIT_OFFSET(inst);
730 return 0;
731 }
732
733 if ((inst & 0xf0df) == 0x0003) {
734 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
735 return 0;
736 }
737
738 if ((inst & 0xf0df) == 0x400b) {
739 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
740 return 0;
741 }
742
743 if ((inst & 0xffff) == 0x000b) {
744 regs->pc = regs->pr;
745 return 0;
746 }
747
748 return 1;
749}
750#endif
751
752asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
753 unsigned long r6, unsigned long r7,
754 struct pt_regs __regs)
755{
756 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
757 unsigned long error_code;
758 struct task_struct *tsk = current;
759#ifdef CONFIG_SH_FPU_EMU
760 unsigned short inst = 0;
761
762 get_user(inst, (unsigned short *)regs->pc + 1);
763 if (!do_fpu_inst(inst, regs)) {
764 get_user(inst, (unsigned short *)regs->pc);
765 if (!emulate_branch(inst, regs))
766 return;
767 /* fault in branch.*/
768 }
769 /* not a FPU inst. */
770#endif
771
772 lookup_exception_vector(error_code);
773
774 local_irq_enable();
775 CHK_REMOTE_DEBUG(regs);
776 force_sig(SIGILL, tsk);
777 die_if_no_fixup("illegal slot instruction", regs, error_code);
778}
779
780asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
781 unsigned long r6, unsigned long r7,
782 struct pt_regs __regs)
783{
784 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
785 long ex;
786
787 lookup_exception_vector(ex);
788 die_if_kernel("exception", regs, ex);
789}
790
791#if defined(CONFIG_SH_STANDARD_BIOS)
792void *gdb_vbr_vector;
793
794static inline void __init gdb_vbr_init(void)
795{
796 register unsigned long vbr;
797
798 /*
799 * Read the old value of the VBR register to initialise
800 * the vector through which debug and BIOS traps are
801 * delegated by the Linux trap handler.
802 */
803 asm volatile("stc vbr, %0" : "=r" (vbr));
804
805 gdb_vbr_vector = (void *)(vbr + 0x100);
806 printk("Setting GDB trap vector to 0x%08lx\n",
807 (unsigned long)gdb_vbr_vector);
808}
809#endif
810
811void __cpuinit per_cpu_trap_init(void)
812{
813 extern void *vbr_base;
814
815#ifdef CONFIG_SH_STANDARD_BIOS
816 if (raw_smp_processor_id() == 0)
817 gdb_vbr_init();
818#endif
819
820 /* NOTE: The VBR value should be at P1
821 (or P2, virtural "fixed" address space).
822 It's definitely should not in physical address. */
823
824 asm volatile("ldc %0, vbr"
825 : /* no output */
826 : "r" (&vbr_base)
827 : "memory");
828}
829
830void *set_exception_table_vec(unsigned int vec, void *handler)
831{
832 extern void *exception_handling_table[];
833 void *old_handler;
834
835 old_handler = exception_handling_table[vec];
836 exception_handling_table[vec] = handler;
837 return old_handler;
838}
839
840extern asmlinkage void address_error_handler(unsigned long r4, unsigned long r5,
841 unsigned long r6, unsigned long r7,
842 struct pt_regs __regs);
843
844void __init trap_init(void)
845{
846 set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
847 set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
848
849#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
850 defined(CONFIG_SH_FPU_EMU)
851 /*
852 * For SH-4 lacking an FPU, treat floating point instructions as
853 * reserved. They'll be handled in the math-emu case, or faulted on
854 * otherwise.
855 */
856 set_exception_table_evt(0x800, do_reserved_inst);
857 set_exception_table_evt(0x820, do_illegal_slot_inst);
858#elif defined(CONFIG_SH_FPU)
859#ifdef CONFIG_CPU_SUBTYPE_SHX3
860 set_exception_table_evt(0xd80, do_fpu_state_restore);
861 set_exception_table_evt(0xda0, do_fpu_state_restore);
862#else
863 set_exception_table_evt(0x800, do_fpu_state_restore);
864 set_exception_table_evt(0x820, do_fpu_state_restore);
865#endif
866#endif
867
868#ifdef CONFIG_CPU_SH2
869 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_handler);
870#endif
871#ifdef CONFIG_CPU_SH2A
872 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
873 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
874#endif
875
876 /* Setup VBR for boot cpu */
877 per_cpu_trap_init();
878}
879 58
880#ifdef CONFIG_BUG 59#ifdef CONFIG_BUG
881void handle_BUG(struct pt_regs *regs) 60 if (__kernel_text_address(instruction_pointer(regs))) {
882{ 61 opcode_t insn = *(opcode_t *)instruction_pointer(regs);
883 enum bug_trap_type tt; 62 if (insn == TRAPA_BUG_OPCODE)
884 tt = report_bug(regs->pc, regs); 63 handle_BUG(regs);
885 if (tt == BUG_TRAP_TYPE_WARN) {
886 regs->pc += 2;
887 return;
888 } 64 }
889
890 die("Kernel BUG", regs, TRAPA_BUG_OPCODE & 0xff);
891}
892
893int is_valid_bugaddr(unsigned long addr)
894{
895 return addr >= PAGE_OFFSET;
896}
897#endif
898
899void show_trace(struct task_struct *tsk, unsigned long *sp,
900 struct pt_regs *regs)
901{
902 unsigned long addr;
903
904 if (regs && user_mode(regs))
905 return;
906
907 printk("\nCall trace: ");
908#ifdef CONFIG_KALLSYMS
909 printk("\n");
910#endif 65#endif
911 66
912 while (!kstack_end(sp)) { 67 force_sig(SIGTRAP, current);
913 addr = *sp++;
914 if (kernel_text_address(addr))
915 print_ip_sym(addr);
916 }
917
918 printk("\n");
919
920 if (!tsk)
921 tsk = current;
922
923 debug_show_held_locks(tsk);
924}
925
926void show_stack(struct task_struct *tsk, unsigned long *sp)
927{
928 unsigned long stack;
929
930 if (!tsk)
931 tsk = current;
932 if (tsk == current)
933 sp = (unsigned long *)current_stack_pointer;
934 else
935 sp = (unsigned long *)tsk->thread.sp;
936
937 stack = (unsigned long)sp;
938 dump_mem("Stack: ", stack, THREAD_SIZE +
939 (unsigned long)task_stack_page(tsk));
940 show_trace(tsk, sp, NULL);
941}
942
943void dump_stack(void)
944{
945 show_stack(NULL, NULL);
946} 68}
947EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh/kernel/traps_32.c b/arch/sh/kernel/traps_32.c
new file mode 100644
index 000000000000..2e58f7a6b746
--- /dev/null
+++ b/arch/sh/kernel/traps_32.c
@@ -0,0 +1,919 @@
1/*
2 * 'traps.c' handles hardware traps and faults after we have saved some
3 * state in 'entry.S'.
4 *
5 * SuperH version: Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000 Philipp Rumpf
7 * Copyright (C) 2000 David Howells
8 * Copyright (C) 2002 - 2007 Paul Mundt
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/kernel.h>
15#include <linux/ptrace.h>
16#include <linux/init.h>
17#include <linux/spinlock.h>
18#include <linux/module.h>
19#include <linux/kallsyms.h>
20#include <linux/io.h>
21#include <linux/bug.h>
22#include <linux/debug_locks.h>
23#include <linux/kdebug.h>
24#include <linux/kexec.h>
25#include <linux/limits.h>
26#include <asm/system.h>
27#include <asm/uaccess.h>
28
29#ifdef CONFIG_SH_KGDB
30#include <asm/kgdb.h>
31#define CHK_REMOTE_DEBUG(regs) \
32{ \
33 if (kgdb_debug_hook && !user_mode(regs))\
34 (*kgdb_debug_hook)(regs); \
35}
36#else
37#define CHK_REMOTE_DEBUG(regs)
38#endif
39
40#ifdef CONFIG_CPU_SH2
41# define TRAP_RESERVED_INST 4
42# define TRAP_ILLEGAL_SLOT_INST 6
43# define TRAP_ADDRESS_ERROR 9
44# ifdef CONFIG_CPU_SH2A
45# define TRAP_DIVZERO_ERROR 17
46# define TRAP_DIVOVF_ERROR 18
47# endif
48#else
49#define TRAP_RESERVED_INST 12
50#define TRAP_ILLEGAL_SLOT_INST 13
51#endif
52
53static void dump_mem(const char *str, unsigned long bottom, unsigned long top)
54{
55 unsigned long p;
56 int i;
57
58 printk("%s(0x%08lx to 0x%08lx)\n", str, bottom, top);
59
60 for (p = bottom & ~31; p < top; ) {
61 printk("%04lx: ", p & 0xffff);
62
63 for (i = 0; i < 8; i++, p += 4) {
64 unsigned int val;
65
66 if (p < bottom || p >= top)
67 printk(" ");
68 else {
69 if (__get_user(val, (unsigned int __user *)p)) {
70 printk("\n");
71 return;
72 }
73 printk("%08x ", val);
74 }
75 }
76 printk("\n");
77 }
78}
79
80static DEFINE_SPINLOCK(die_lock);
81
82void die(const char * str, struct pt_regs * regs, long err)
83{
84 static int die_counter;
85
86 oops_enter();
87
88 console_verbose();
89 spin_lock_irq(&die_lock);
90 bust_spinlocks(1);
91
92 printk("%s: %04lx [#%d]\n", str, err & 0xffff, ++die_counter);
93
94 CHK_REMOTE_DEBUG(regs);
95 print_modules();
96 show_regs(regs);
97
98 printk("Process: %s (pid: %d, stack limit = %p)\n", current->comm,
99 task_pid_nr(current), task_stack_page(current) + 1);
100
101 if (!user_mode(regs) || in_interrupt())
102 dump_mem("Stack: ", regs->regs[15], THREAD_SIZE +
103 (unsigned long)task_stack_page(current));
104
105 bust_spinlocks(0);
106 add_taint(TAINT_DIE);
107 spin_unlock_irq(&die_lock);
108
109 if (kexec_should_crash(current))
110 crash_kexec(regs);
111
112 if (in_interrupt())
113 panic("Fatal exception in interrupt");
114
115 if (panic_on_oops)
116 panic("Fatal exception");
117
118 oops_exit();
119 do_exit(SIGSEGV);
120}
121
122static inline void die_if_kernel(const char *str, struct pt_regs *regs,
123 long err)
124{
125 if (!user_mode(regs))
126 die(str, regs, err);
127}
128
129/*
130 * try and fix up kernelspace address errors
131 * - userspace errors just cause EFAULT to be returned, resulting in SEGV
132 * - kernel/userspace interfaces cause a jump to an appropriate handler
133 * - other kernel errors are bad
134 * - return 0 if fixed-up, -EFAULT if non-fatal (to the kernel) fault
135 */
136static int die_if_no_fixup(const char * str, struct pt_regs * regs, long err)
137{
138 if (!user_mode(regs)) {
139 const struct exception_table_entry *fixup;
140 fixup = search_exception_tables(regs->pc);
141 if (fixup) {
142 regs->pc = fixup->fixup;
143 return 0;
144 }
145 die(str, regs, err);
146 }
147 return -EFAULT;
148}
149
150/*
151 * handle an instruction that does an unaligned memory access by emulating the
152 * desired behaviour
153 * - note that PC _may not_ point to the faulting instruction
154 * (if that instruction is in a branch delay slot)
155 * - return 0 if emulation okay, -EFAULT on existential error
156 */
157static int handle_unaligned_ins(u16 instruction, struct pt_regs *regs)
158{
159 int ret, index, count;
160 unsigned long *rm, *rn;
161 unsigned char *src, *dst;
162
163 index = (instruction>>8)&15; /* 0x0F00 */
164 rn = &regs->regs[index];
165
166 index = (instruction>>4)&15; /* 0x00F0 */
167 rm = &regs->regs[index];
168
169 count = 1<<(instruction&3);
170
171 ret = -EFAULT;
172 switch (instruction>>12) {
173 case 0: /* mov.[bwl] to/from memory via r0+rn */
174 if (instruction & 8) {
175 /* from memory */
176 src = (unsigned char*) *rm;
177 src += regs->regs[0];
178 dst = (unsigned char*) rn;
179 *(unsigned long*)dst = 0;
180
181#ifdef __LITTLE_ENDIAN__
182 if (copy_from_user(dst, src, count))
183 goto fetch_fault;
184
185 if ((count == 2) && dst[1] & 0x80) {
186 dst[2] = 0xff;
187 dst[3] = 0xff;
188 }
189#else
190 dst += 4-count;
191
192 if (__copy_user(dst, src, count))
193 goto fetch_fault;
194
195 if ((count == 2) && dst[2] & 0x80) {
196 dst[0] = 0xff;
197 dst[1] = 0xff;
198 }
199#endif
200 } else {
201 /* to memory */
202 src = (unsigned char*) rm;
203#if !defined(__LITTLE_ENDIAN__)
204 src += 4-count;
205#endif
206 dst = (unsigned char*) *rn;
207 dst += regs->regs[0];
208
209 if (copy_to_user(dst, src, count))
210 goto fetch_fault;
211 }
212 ret = 0;
213 break;
214
215 case 1: /* mov.l Rm,@(disp,Rn) */
216 src = (unsigned char*) rm;
217 dst = (unsigned char*) *rn;
218 dst += (instruction&0x000F)<<2;
219
220 if (copy_to_user(dst,src,4))
221 goto fetch_fault;
222 ret = 0;
223 break;
224
225 case 2: /* mov.[bwl] to memory, possibly with pre-decrement */
226 if (instruction & 4)
227 *rn -= count;
228 src = (unsigned char*) rm;
229 dst = (unsigned char*) *rn;
230#if !defined(__LITTLE_ENDIAN__)
231 src += 4-count;
232#endif
233 if (copy_to_user(dst, src, count))
234 goto fetch_fault;
235 ret = 0;
236 break;
237
238 case 5: /* mov.l @(disp,Rm),Rn */
239 src = (unsigned char*) *rm;
240 src += (instruction&0x000F)<<2;
241 dst = (unsigned char*) rn;
242 *(unsigned long*)dst = 0;
243
244 if (copy_from_user(dst,src,4))
245 goto fetch_fault;
246 ret = 0;
247 break;
248
249 case 6: /* mov.[bwl] from memory, possibly with post-increment */
250 src = (unsigned char*) *rm;
251 if (instruction & 4)
252 *rm += count;
253 dst = (unsigned char*) rn;
254 *(unsigned long*)dst = 0;
255
256#ifdef __LITTLE_ENDIAN__
257 if (copy_from_user(dst, src, count))
258 goto fetch_fault;
259
260 if ((count == 2) && dst[1] & 0x80) {
261 dst[2] = 0xff;
262 dst[3] = 0xff;
263 }
264#else
265 dst += 4-count;
266
267 if (copy_from_user(dst, src, count))
268 goto fetch_fault;
269
270 if ((count == 2) && dst[2] & 0x80) {
271 dst[0] = 0xff;
272 dst[1] = 0xff;
273 }
274#endif
275 ret = 0;
276 break;
277
278 case 8:
279 switch ((instruction&0xFF00)>>8) {
280 case 0x81: /* mov.w R0,@(disp,Rn) */
281 src = (unsigned char*) &regs->regs[0];
282#if !defined(__LITTLE_ENDIAN__)
283 src += 2;
284#endif
285 dst = (unsigned char*) *rm; /* called Rn in the spec */
286 dst += (instruction&0x000F)<<1;
287
288 if (copy_to_user(dst, src, 2))
289 goto fetch_fault;
290 ret = 0;
291 break;
292
293 case 0x85: /* mov.w @(disp,Rm),R0 */
294 src = (unsigned char*) *rm;
295 src += (instruction&0x000F)<<1;
296 dst = (unsigned char*) &regs->regs[0];
297 *(unsigned long*)dst = 0;
298
299#if !defined(__LITTLE_ENDIAN__)
300 dst += 2;
301#endif
302
303 if (copy_from_user(dst, src, 2))
304 goto fetch_fault;
305
306#ifdef __LITTLE_ENDIAN__
307 if (dst[1] & 0x80) {
308 dst[2] = 0xff;
309 dst[3] = 0xff;
310 }
311#else
312 if (dst[2] & 0x80) {
313 dst[0] = 0xff;
314 dst[1] = 0xff;
315 }
316#endif
317 ret = 0;
318 break;
319 }
320 break;
321 }
322 return ret;
323
324 fetch_fault:
325 /* Argh. Address not only misaligned but also non-existent.
326 * Raise an EFAULT and see if it's trapped
327 */
328 return die_if_no_fixup("Fault in unaligned fixup", regs, 0);
329}
330
331/*
332 * emulate the instruction in the delay slot
333 * - fetches the instruction from PC+2
334 */
335static inline int handle_unaligned_delayslot(struct pt_regs *regs)
336{
337 u16 instruction;
338
339 if (copy_from_user(&instruction, (u16 *)(regs->pc+2), 2)) {
340 /* the instruction-fetch faulted */
341 if (user_mode(regs))
342 return -EFAULT;
343
344 /* kernel */
345 die("delay-slot-insn faulting in handle_unaligned_delayslot",
346 regs, 0);
347 }
348
349 return handle_unaligned_ins(instruction,regs);
350}
351
352/*
353 * handle an instruction that does an unaligned memory access
354 * - have to be careful of branch delay-slot instructions that fault
355 * SH3:
356 * - if the branch would be taken PC points to the branch
357 * - if the branch would not be taken, PC points to delay-slot
358 * SH4:
359 * - PC always points to delayed branch
360 * - return 0 if handled, -EFAULT if failed (may not return if in kernel)
361 */
362
363/* Macros to determine offset from current PC for branch instructions */
364/* Explicit type coercion is used to force sign extension where needed */
365#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
366#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
367
368/*
369 * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
370 * opcodes..
371 */
372#ifndef CONFIG_CPU_SH2A
373static int handle_unaligned_notify_count = 10;
374
375static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
376{
377 u_int rm;
378 int ret, index;
379
380 index = (instruction>>8)&15; /* 0x0F00 */
381 rm = regs->regs[index];
382
383 /* shout about the first ten userspace fixups */
384 if (user_mode(regs) && handle_unaligned_notify_count>0) {
385 handle_unaligned_notify_count--;
386
387 printk(KERN_NOTICE "Fixing up unaligned userspace access "
388 "in \"%s\" pid=%d pc=0x%p ins=0x%04hx\n",
389 current->comm, task_pid_nr(current),
390 (u16 *)regs->pc, instruction);
391 }
392
393 ret = -EFAULT;
394 switch (instruction&0xF000) {
395 case 0x0000:
396 if (instruction==0x000B) {
397 /* rts */
398 ret = handle_unaligned_delayslot(regs);
399 if (ret==0)
400 regs->pc = regs->pr;
401 }
402 else if ((instruction&0x00FF)==0x0023) {
403 /* braf @Rm */
404 ret = handle_unaligned_delayslot(regs);
405 if (ret==0)
406 regs->pc += rm + 4;
407 }
408 else if ((instruction&0x00FF)==0x0003) {
409 /* bsrf @Rm */
410 ret = handle_unaligned_delayslot(regs);
411 if (ret==0) {
412 regs->pr = regs->pc + 4;
413 regs->pc += rm + 4;
414 }
415 }
416 else {
417 /* mov.[bwl] to/from memory via r0+rn */
418 goto simple;
419 }
420 break;
421
422 case 0x1000: /* mov.l Rm,@(disp,Rn) */
423 goto simple;
424
425 case 0x2000: /* mov.[bwl] to memory, possibly with pre-decrement */
426 goto simple;
427
428 case 0x4000:
429 if ((instruction&0x00FF)==0x002B) {
430 /* jmp @Rm */
431 ret = handle_unaligned_delayslot(regs);
432 if (ret==0)
433 regs->pc = rm;
434 }
435 else if ((instruction&0x00FF)==0x000B) {
436 /* jsr @Rm */
437 ret = handle_unaligned_delayslot(regs);
438 if (ret==0) {
439 regs->pr = regs->pc + 4;
440 regs->pc = rm;
441 }
442 }
443 else {
444 /* mov.[bwl] to/from memory via r0+rn */
445 goto simple;
446 }
447 break;
448
449 case 0x5000: /* mov.l @(disp,Rm),Rn */
450 goto simple;
451
452 case 0x6000: /* mov.[bwl] from memory, possibly with post-increment */
453 goto simple;
454
455 case 0x8000: /* bf lab, bf/s lab, bt lab, bt/s lab */
456 switch (instruction&0x0F00) {
457 case 0x0100: /* mov.w R0,@(disp,Rm) */
458 goto simple;
459 case 0x0500: /* mov.w @(disp,Rm),R0 */
460 goto simple;
461 case 0x0B00: /* bf lab - no delayslot*/
462 break;
463 case 0x0F00: /* bf/s lab */
464 ret = handle_unaligned_delayslot(regs);
465 if (ret==0) {
466#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
467 if ((regs->sr & 0x00000001) != 0)
468 regs->pc += 4; /* next after slot */
469 else
470#endif
471 regs->pc += SH_PC_8BIT_OFFSET(instruction);
472 }
473 break;
474 case 0x0900: /* bt lab - no delayslot */
475 break;
476 case 0x0D00: /* bt/s lab */
477 ret = handle_unaligned_delayslot(regs);
478 if (ret==0) {
479#if defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)
480 if ((regs->sr & 0x00000001) == 0)
481 regs->pc += 4; /* next after slot */
482 else
483#endif
484 regs->pc += SH_PC_8BIT_OFFSET(instruction);
485 }
486 break;
487 }
488 break;
489
490 case 0xA000: /* bra label */
491 ret = handle_unaligned_delayslot(regs);
492 if (ret==0)
493 regs->pc += SH_PC_12BIT_OFFSET(instruction);
494 break;
495
496 case 0xB000: /* bsr label */
497 ret = handle_unaligned_delayslot(regs);
498 if (ret==0) {
499 regs->pr = regs->pc + 4;
500 regs->pc += SH_PC_12BIT_OFFSET(instruction);
501 }
502 break;
503 }
504 return ret;
505
506 /* handle non-delay-slot instruction */
507 simple:
508 ret = handle_unaligned_ins(instruction,regs);
509 if (ret==0)
510 regs->pc += instruction_size(instruction);
511 return ret;
512}
513#endif /* CONFIG_CPU_SH2A */
514
515#ifdef CONFIG_CPU_HAS_SR_RB
516#define lookup_exception_vector(x) \
517 __asm__ __volatile__ ("stc r2_bank, %0\n\t" : "=r" ((x)))
518#else
519#define lookup_exception_vector(x) \
520 __asm__ __volatile__ ("mov r4, %0\n\t" : "=r" ((x)))
521#endif
522
523/*
524 * Handle various address error exceptions:
525 * - instruction address error:
526 * misaligned PC
527 * PC >= 0x80000000 in user mode
528 * - data address error (read and write)
529 * misaligned data access
530 * access to >= 0x80000000 is user mode
531 * Unfortuntaly we can't distinguish between instruction address error
532 * and data address errors caused by read accesses.
533 */
534asmlinkage void do_address_error(struct pt_regs *regs,
535 unsigned long writeaccess,
536 unsigned long address)
537{
538 unsigned long error_code = 0;
539 mm_segment_t oldfs;
540 siginfo_t info;
541#ifndef CONFIG_CPU_SH2A
542 u16 instruction;
543 int tmp;
544#endif
545
546 /* Intentional ifdef */
547#ifdef CONFIG_CPU_HAS_SR_RB
548 lookup_exception_vector(error_code);
549#endif
550
551 oldfs = get_fs();
552
553 if (user_mode(regs)) {
554 int si_code = BUS_ADRERR;
555
556 local_irq_enable();
557
558 /* bad PC is not something we can fix */
559 if (regs->pc & 1) {
560 si_code = BUS_ADRALN;
561 goto uspace_segv;
562 }
563
564#ifndef CONFIG_CPU_SH2A
565 set_fs(USER_DS);
566 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
567 /* Argh. Fault on the instruction itself.
568 This should never happen non-SMP
569 */
570 set_fs(oldfs);
571 goto uspace_segv;
572 }
573
574 tmp = handle_unaligned_access(instruction, regs);
575 set_fs(oldfs);
576
577 if (tmp==0)
578 return; /* sorted */
579#endif
580
581uspace_segv:
582 printk(KERN_NOTICE "Sending SIGBUS to \"%s\" due to unaligned "
583 "access (PC %lx PR %lx)\n", current->comm, regs->pc,
584 regs->pr);
585
586 info.si_signo = SIGBUS;
587 info.si_errno = 0;
588 info.si_code = si_code;
589 info.si_addr = (void __user *)address;
590 force_sig_info(SIGBUS, &info, current);
591 } else {
592 if (regs->pc & 1)
593 die("unaligned program counter", regs, error_code);
594
595#ifndef CONFIG_CPU_SH2A
596 set_fs(KERNEL_DS);
597 if (copy_from_user(&instruction, (u16 *)(regs->pc), 2)) {
598 /* Argh. Fault on the instruction itself.
599 This should never happen non-SMP
600 */
601 set_fs(oldfs);
602 die("insn faulting in do_address_error", regs, 0);
603 }
604
605 handle_unaligned_access(instruction, regs);
606 set_fs(oldfs);
607#else
608 printk(KERN_NOTICE "Killing process \"%s\" due to unaligned "
609 "access\n", current->comm);
610
611 force_sig(SIGSEGV, current);
612#endif
613 }
614}
615
616#ifdef CONFIG_SH_DSP
617/*
618 * SH-DSP support gerg@snapgear.com.
619 */
620int is_dsp_inst(struct pt_regs *regs)
621{
622 unsigned short inst = 0;
623
624 /*
625 * Safe guard if DSP mode is already enabled or we're lacking
626 * the DSP altogether.
627 */
628 if (!(current_cpu_data.flags & CPU_HAS_DSP) || (regs->sr & SR_DSP))
629 return 0;
630
631 get_user(inst, ((unsigned short *) regs->pc));
632
633 inst &= 0xf000;
634
635 /* Check for any type of DSP or support instruction */
636 if ((inst == 0xf000) || (inst == 0x4000))
637 return 1;
638
639 return 0;
640}
641#else
642#define is_dsp_inst(regs) (0)
643#endif /* CONFIG_SH_DSP */
644
645#ifdef CONFIG_CPU_SH2A
646asmlinkage void do_divide_error(unsigned long r4, unsigned long r5,
647 unsigned long r6, unsigned long r7,
648 struct pt_regs __regs)
649{
650 siginfo_t info;
651
652 switch (r4) {
653 case TRAP_DIVZERO_ERROR:
654 info.si_code = FPE_INTDIV;
655 break;
656 case TRAP_DIVOVF_ERROR:
657 info.si_code = FPE_INTOVF;
658 break;
659 }
660
661 force_sig_info(SIGFPE, &info, current);
662}
663#endif
664
665asmlinkage void do_reserved_inst(unsigned long r4, unsigned long r5,
666 unsigned long r6, unsigned long r7,
667 struct pt_regs __regs)
668{
669 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
670 unsigned long error_code;
671 struct task_struct *tsk = current;
672
673#ifdef CONFIG_SH_FPU_EMU
674 unsigned short inst = 0;
675 int err;
676
677 get_user(inst, (unsigned short*)regs->pc);
678
679 err = do_fpu_inst(inst, regs);
680 if (!err) {
681 regs->pc += instruction_size(inst);
682 return;
683 }
684 /* not a FPU inst. */
685#endif
686
687#ifdef CONFIG_SH_DSP
688 /* Check if it's a DSP instruction */
689 if (is_dsp_inst(regs)) {
690 /* Enable DSP mode, and restart instruction. */
691 regs->sr |= SR_DSP;
692 return;
693 }
694#endif
695
696 lookup_exception_vector(error_code);
697
698 local_irq_enable();
699 CHK_REMOTE_DEBUG(regs);
700 force_sig(SIGILL, tsk);
701 die_if_no_fixup("reserved instruction", regs, error_code);
702}
703
704#ifdef CONFIG_SH_FPU_EMU
705static int emulate_branch(unsigned short inst, struct pt_regs* regs)
706{
707 /*
708 * bfs: 8fxx: PC+=d*2+4;
709 * bts: 8dxx: PC+=d*2+4;
710 * bra: axxx: PC+=D*2+4;
711 * bsr: bxxx: PC+=D*2+4 after PR=PC+4;
712 * braf:0x23: PC+=Rn*2+4;
713 * bsrf:0x03: PC+=Rn*2+4 after PR=PC+4;
714 * jmp: 4x2b: PC=Rn;
715 * jsr: 4x0b: PC=Rn after PR=PC+4;
716 * rts: 000b: PC=PR;
717 */
718 if ((inst & 0xfd00) == 0x8d00) {
719 regs->pc += SH_PC_8BIT_OFFSET(inst);
720 return 0;
721 }
722
723 if ((inst & 0xe000) == 0xa000) {
724 regs->pc += SH_PC_12BIT_OFFSET(inst);
725 return 0;
726 }
727
728 if ((inst & 0xf0df) == 0x0003) {
729 regs->pc += regs->regs[(inst & 0x0f00) >> 8] + 4;
730 return 0;
731 }
732
733 if ((inst & 0xf0df) == 0x400b) {
734 regs->pc = regs->regs[(inst & 0x0f00) >> 8];
735 return 0;
736 }
737
738 if ((inst & 0xffff) == 0x000b) {
739 regs->pc = regs->pr;
740 return 0;
741 }
742
743 return 1;
744}
745#endif
746
747asmlinkage void do_illegal_slot_inst(unsigned long r4, unsigned long r5,
748 unsigned long r6, unsigned long r7,
749 struct pt_regs __regs)
750{
751 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
752 unsigned long error_code;
753 struct task_struct *tsk = current;
754#ifdef CONFIG_SH_FPU_EMU
755 unsigned short inst = 0;
756
757 get_user(inst, (unsigned short *)regs->pc + 1);
758 if (!do_fpu_inst(inst, regs)) {
759 get_user(inst, (unsigned short *)regs->pc);
760 if (!emulate_branch(inst, regs))
761 return;
762 /* fault in branch.*/
763 }
764 /* not a FPU inst. */
765#endif
766
767 lookup_exception_vector(error_code);
768
769 local_irq_enable();
770 CHK_REMOTE_DEBUG(regs);
771 force_sig(SIGILL, tsk);
772 die_if_no_fixup("illegal slot instruction", regs, error_code);
773}
774
775asmlinkage void do_exception_error(unsigned long r4, unsigned long r5,
776 unsigned long r6, unsigned long r7,
777 struct pt_regs __regs)
778{
779 struct pt_regs *regs = RELOC_HIDE(&__regs, 0);
780 long ex;
781
782 lookup_exception_vector(ex);
783 die_if_kernel("exception", regs, ex);
784}
785
786#if defined(CONFIG_SH_STANDARD_BIOS)
787void *gdb_vbr_vector;
788
789static inline void __init gdb_vbr_init(void)
790{
791 register unsigned long vbr;
792
793 /*
794 * Read the old value of the VBR register to initialise
795 * the vector through which debug and BIOS traps are
796 * delegated by the Linux trap handler.
797 */
798 asm volatile("stc vbr, %0" : "=r" (vbr));
799
800 gdb_vbr_vector = (void *)(vbr + 0x100);
801 printk("Setting GDB trap vector to 0x%08lx\n",
802 (unsigned long)gdb_vbr_vector);
803}
804#endif
805
806void __cpuinit per_cpu_trap_init(void)
807{
808 extern void *vbr_base;
809
810#ifdef CONFIG_SH_STANDARD_BIOS
811 if (raw_smp_processor_id() == 0)
812 gdb_vbr_init();
813#endif
814
815 /* NOTE: The VBR value should be at P1
816 (or P2, virtural "fixed" address space).
817 It's definitely should not in physical address. */
818
819 asm volatile("ldc %0, vbr"
820 : /* no output */
821 : "r" (&vbr_base)
822 : "memory");
823}
824
825void *set_exception_table_vec(unsigned int vec, void *handler)
826{
827 extern void *exception_handling_table[];
828 void *old_handler;
829
830 old_handler = exception_handling_table[vec];
831 exception_handling_table[vec] = handler;
832 return old_handler;
833}
834
835void __init trap_init(void)
836{
837 set_exception_table_vec(TRAP_RESERVED_INST, do_reserved_inst);
838 set_exception_table_vec(TRAP_ILLEGAL_SLOT_INST, do_illegal_slot_inst);
839
840#if defined(CONFIG_CPU_SH4) && !defined(CONFIG_SH_FPU) || \
841 defined(CONFIG_SH_FPU_EMU)
842 /*
843 * For SH-4 lacking an FPU, treat floating point instructions as
844 * reserved. They'll be handled in the math-emu case, or faulted on
845 * otherwise.
846 */
847 set_exception_table_evt(0x800, do_reserved_inst);
848 set_exception_table_evt(0x820, do_illegal_slot_inst);
849#elif defined(CONFIG_SH_FPU)
850#ifdef CONFIG_CPU_SUBTYPE_SHX3
851 set_exception_table_evt(0xd80, fpu_state_restore_trap_handler);
852 set_exception_table_evt(0xda0, fpu_state_restore_trap_handler);
853#else
854 set_exception_table_evt(0x800, fpu_state_restore_trap_handler);
855 set_exception_table_evt(0x820, fpu_state_restore_trap_handler);
856#endif
857#endif
858
859#ifdef CONFIG_CPU_SH2
860 set_exception_table_vec(TRAP_ADDRESS_ERROR, address_error_trap_handler);
861#endif
862#ifdef CONFIG_CPU_SH2A
863 set_exception_table_vec(TRAP_DIVZERO_ERROR, do_divide_error);
864 set_exception_table_vec(TRAP_DIVOVF_ERROR, do_divide_error);
865#endif
866
867 /* Setup VBR for boot cpu */
868 per_cpu_trap_init();
869}
870
871void show_trace(struct task_struct *tsk, unsigned long *sp,
872 struct pt_regs *regs)
873{
874 unsigned long addr;
875
876 if (regs && user_mode(regs))
877 return;
878
879 printk("\nCall trace: ");
880#ifdef CONFIG_KALLSYMS
881 printk("\n");
882#endif
883
884 while (!kstack_end(sp)) {
885 addr = *sp++;
886 if (kernel_text_address(addr))
887 print_ip_sym(addr);
888 }
889
890 printk("\n");
891
892 if (!tsk)
893 tsk = current;
894
895 debug_show_held_locks(tsk);
896}
897
898void show_stack(struct task_struct *tsk, unsigned long *sp)
899{
900 unsigned long stack;
901
902 if (!tsk)
903 tsk = current;
904 if (tsk == current)
905 sp = (unsigned long *)current_stack_pointer;
906 else
907 sp = (unsigned long *)tsk->thread.sp;
908
909 stack = (unsigned long)sp;
910 dump_mem("Stack: ", stack, THREAD_SIZE +
911 (unsigned long)task_stack_page(tsk));
912 show_trace(tsk, sp, NULL);
913}
914
915void dump_stack(void)
916{
917 show_stack(NULL, NULL);
918}
919EXPORT_SYMBOL(dump_stack);
diff --git a/arch/sh64/kernel/traps.c b/arch/sh/kernel/traps_64.c
index f32df3831f45..c0b3c6f6edb5 100644
--- a/arch/sh64/kernel/traps.c
+++ b/arch/sh/kernel/traps_64.c
@@ -1,19 +1,13 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/kernel/traps_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/traps.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003, 2004 Paul Mundt 5 * Copyright (C) 2003, 2004 Paul Mundt
10 * Copyright (C) 2003, 2004 Richard Curnow 6 * Copyright (C) 2003, 2004 Richard Curnow
11 * 7 *
12 */ 8 * This file is subject to the terms and conditions of the GNU General Public
13 9 * License. See the file "COPYING" in the main directory of this archive
14/* 10 * for more details.
15 * 'Traps.c' handles hardware traps and faults after we have saved some
16 * state in 'entry.S'.
17 */ 11 */
18#include <linux/sched.h> 12#include <linux/sched.h>
19#include <linux/kernel.h> 13#include <linux/kernel.h>
@@ -244,7 +238,6 @@ DO_ERROR(12, SIGILL, "reserved instruction", reserved_inst, current)
244/* Called with interrupts disabled */ 238/* Called with interrupts disabled */
245asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs) 239asmlinkage void do_exception_error(unsigned long ex, struct pt_regs *regs)
246{ 240{
247 PLS();
248 show_excp_regs(__FUNCTION__, -1, -1, regs); 241 show_excp_regs(__FUNCTION__, -1, -1, regs);
249 die_if_kernel("exception", regs, ex); 242 die_if_kernel("exception", regs, ex);
250} 243}
@@ -618,9 +611,9 @@ static int misaligned_fpu_load(struct pt_regs *regs,
618 context switch the registers into memory so they can be 611 context switch the registers into memory so they can be
619 indexed by register number. */ 612 indexed by register number. */
620 if (last_task_used_math == current) { 613 if (last_task_used_math == current) {
621 grab_fpu(); 614 enable_fpu();
622 fpsave(&current->thread.fpu.hard); 615 save_fpu(current, regs);
623 release_fpu(); 616 disable_fpu();
624 last_task_used_math = NULL; 617 last_task_used_math = NULL;
625 regs->sr |= SR_FD; 618 regs->sr |= SR_FD;
626 } 619 }
@@ -691,9 +684,9 @@ static int misaligned_fpu_store(struct pt_regs *regs,
691 context switch the registers into memory so they can be 684 context switch the registers into memory so they can be
692 indexed by register number. */ 685 indexed by register number. */
693 if (last_task_used_math == current) { 686 if (last_task_used_math == current) {
694 grab_fpu(); 687 enable_fpu();
695 fpsave(&current->thread.fpu.hard); 688 save_fpu(current, regs);
696 release_fpu(); 689 disable_fpu();
697 last_task_used_math = NULL; 690 last_task_used_math = NULL;
698 regs->sr |= SR_FD; 691 regs->sr |= SR_FD;
699 } 692 }
diff --git a/arch/sh/kernel/vmlinux.lds.S b/arch/sh/kernel/vmlinux.lds.S
index 0956fb3681a3..d7d4991f32af 100644
--- a/arch/sh/kernel/vmlinux.lds.S
+++ b/arch/sh/kernel/vmlinux.lds.S
@@ -1,138 +1,5 @@
1/* 1#ifdef CONFIG_SUPERH32
2 * ld script to make SuperH Linux kernel 2# include "vmlinux_32.lds.S"
3 * Written by Niibe Yutaka
4 */
5#include <asm/thread_info.h>
6#include <asm/cache.h>
7#include <asm-generic/vmlinux.lds.h>
8
9#ifdef CONFIG_CPU_LITTLE_ENDIAN
10OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
11#else 3#else
12OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux") 4# include "vmlinux_64.lds.S"
13#endif 5#endif
14OUTPUT_ARCH(sh)
15ENTRY(_start)
16SECTIONS
17{
18 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
19 _text = .; /* Text and read-only data */
20
21 .empty_zero_page : {
22 *(.empty_zero_page)
23 } = 0
24
25 .text : {
26 *(.text.head)
27 TEXT_TEXT
28 SCHED_TEXT
29 LOCK_TEXT
30 KPROBES_TEXT
31 *(.fixup)
32 *(.gnu.warning)
33 } = 0x0009
34
35 . = ALIGN(16); /* Exception table */
36 __start___ex_table = .;
37 __ex_table : { *(__ex_table) }
38 __stop___ex_table = .;
39
40 _etext = .; /* End of text section */
41
42 BUG_TABLE
43 NOTES
44 RO_DATA(PAGE_SIZE)
45
46 . = ALIGN(THREAD_SIZE);
47 .data : { /* Data */
48 *(.data.init_task)
49
50 . = ALIGN(L1_CACHE_BYTES);
51 *(.data.cacheline_aligned)
52
53 . = ALIGN(L1_CACHE_BYTES);
54 *(.data.read_mostly)
55
56 . = ALIGN(PAGE_SIZE);
57 *(.data.page_aligned)
58
59 __nosave_begin = .;
60 *(.data.nosave)
61 . = ALIGN(PAGE_SIZE);
62 __nosave_end = .;
63
64 DATA_DATA
65 CONSTRUCTORS
66 }
67
68 _edata = .; /* End of data section */
69
70 . = ALIGN(PAGE_SIZE); /* Init code and data */
71 __init_begin = .;
72 _sinittext = .;
73 .init.text : { *(.init.text) }
74 _einittext = .;
75 .init.data : { *(.init.data) }
76
77 . = ALIGN(16);
78 __setup_start = .;
79 .init.setup : { *(.init.setup) }
80 __setup_end = .;
81
82 __initcall_start = .;
83 .initcall.init : {
84 INITCALLS
85 }
86 __initcall_end = .;
87 __con_initcall_start = .;
88 .con_initcall.init : { *(.con_initcall.init) }
89 __con_initcall_end = .;
90
91 SECURITY_INIT
92
93#ifdef CONFIG_BLK_DEV_INITRD
94 . = ALIGN(PAGE_SIZE);
95 __initramfs_start = .;
96 .init.ramfs : { *(.init.ramfs) }
97 __initramfs_end = .;
98#endif
99
100 . = ALIGN(4);
101 __machvec_start = .;
102 .machvec.init : { *(.machvec.init) }
103 __machvec_end = .;
104
105 PERCPU(PAGE_SIZE)
106
107 /*
108 * .exit.text is discarded at runtime, not link time, to deal with
109 * references from __bug_table
110 */
111 .exit.text : { *(.exit.text) }
112 .exit.data : { *(.exit.data) }
113
114 . = ALIGN(PAGE_SIZE);
115 .bss : {
116 __init_end = .;
117 __bss_start = .; /* BSS */
118 *(.bss.page_aligned)
119 *(.bss)
120 *(COMMON)
121 . = ALIGN(4);
122 _ebss = .; /* uClinux MTD sucks */
123 _end = . ;
124 }
125
126 /*
127 * When something in the kernel is NOT compiled as a module, the
128 * module cleanup code and data are put into these segments. Both
129 * can then be thrown away, as cleanup code is never called unless
130 * it's a module.
131 */
132 /DISCARD/ : {
133 *(.exitcall.exit)
134 }
135
136 STABS_DEBUG
137 DWARF_DEBUG
138}
diff --git a/arch/sh/kernel/vmlinux_32.lds.S b/arch/sh/kernel/vmlinux_32.lds.S
new file mode 100644
index 000000000000..d549fac6d3e7
--- /dev/null
+++ b/arch/sh/kernel/vmlinux_32.lds.S
@@ -0,0 +1,152 @@
1/*
2 * ld script to make SuperH Linux kernel
3 * Written by Niibe Yutaka
4 */
5#include <asm/thread_info.h>
6#include <asm/cache.h>
7#include <asm-generic/vmlinux.lds.h>
8
9#ifdef CONFIG_CPU_LITTLE_ENDIAN
10OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
11#else
12OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-shbig-linux")
13#endif
14OUTPUT_ARCH(sh)
15ENTRY(_start)
16SECTIONS
17{
18#ifdef CONFIG_32BIT
19 . = CONFIG_PAGE_OFFSET + CONFIG_ZERO_PAGE_OFFSET;
20#else
21 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + CONFIG_ZERO_PAGE_OFFSET;
22#endif
23
24 _text = .; /* Text and read-only data */
25
26 .empty_zero_page : {
27 *(.empty_zero_page)
28 } = 0
29
30 .text : {
31 *(.text.head)
32 TEXT_TEXT
33 SCHED_TEXT
34 LOCK_TEXT
35 KPROBES_TEXT
36 *(.fixup)
37 *(.gnu.warning)
38 } = 0x0009
39
40 . = ALIGN(16); /* Exception table */
41 __start___ex_table = .;
42 __ex_table : { *(__ex_table) }
43 __stop___ex_table = .;
44
45 _etext = .; /* End of text section */
46
47 BUG_TABLE
48 NOTES
49 RO_DATA(PAGE_SIZE)
50
51 /*
52 * Code which must be executed uncached and the associated data
53 */
54 . = ALIGN(PAGE_SIZE);
55 __uncached_start = .;
56 .uncached.text : { *(.uncached.text) }
57 .uncached.data : { *(.uncached.data) }
58 __uncached_end = .;
59
60 . = ALIGN(THREAD_SIZE);
61 .data : { /* Data */
62 *(.data.init_task)
63
64 . = ALIGN(L1_CACHE_BYTES);
65 *(.data.cacheline_aligned)
66
67 . = ALIGN(L1_CACHE_BYTES);
68 *(.data.read_mostly)
69
70 . = ALIGN(PAGE_SIZE);
71 *(.data.page_aligned)
72
73 __nosave_begin = .;
74 *(.data.nosave)
75 . = ALIGN(PAGE_SIZE);
76 __nosave_end = .;
77
78 DATA_DATA
79 CONSTRUCTORS
80 }
81
82 _edata = .; /* End of data section */
83
84 . = ALIGN(PAGE_SIZE); /* Init code and data */
85 __init_begin = .;
86 _sinittext = .;
87 .init.text : { *(.init.text) }
88 _einittext = .;
89 .init.data : { *(.init.data) }
90
91 . = ALIGN(16);
92 __setup_start = .;
93 .init.setup : { *(.init.setup) }
94 __setup_end = .;
95
96 __initcall_start = .;
97 .initcall.init : {
98 INITCALLS
99 }
100 __initcall_end = .;
101 __con_initcall_start = .;
102 .con_initcall.init : { *(.con_initcall.init) }
103 __con_initcall_end = .;
104
105 SECURITY_INIT
106
107#ifdef CONFIG_BLK_DEV_INITRD
108 . = ALIGN(PAGE_SIZE);
109 __initramfs_start = .;
110 .init.ramfs : { *(.init.ramfs) }
111 __initramfs_end = .;
112#endif
113
114 . = ALIGN(4);
115 __machvec_start = .;
116 .machvec.init : { *(.machvec.init) }
117 __machvec_end = .;
118
119 PERCPU(PAGE_SIZE)
120
121 /*
122 * .exit.text is discarded at runtime, not link time, to deal with
123 * references from __bug_table
124 */
125 .exit.text : { *(.exit.text) }
126 .exit.data : { *(.exit.data) }
127
128 . = ALIGN(PAGE_SIZE);
129 .bss : {
130 __init_end = .;
131 __bss_start = .; /* BSS */
132 *(.bss.page_aligned)
133 *(.bss)
134 *(COMMON)
135 . = ALIGN(4);
136 _ebss = .; /* uClinux MTD sucks */
137 _end = . ;
138 }
139
140 /*
141 * When something in the kernel is NOT compiled as a module, the
142 * module cleanup code and data are put into these segments. Both
143 * can then be thrown away, as cleanup code is never called unless
144 * it's a module.
145 */
146 /DISCARD/ : {
147 *(.exitcall.exit)
148 }
149
150 STABS_DEBUG
151 DWARF_DEBUG
152}
diff --git a/arch/sh/kernel/vmlinux_64.lds.S b/arch/sh/kernel/vmlinux_64.lds.S
new file mode 100644
index 000000000000..2fd0f7401484
--- /dev/null
+++ b/arch/sh/kernel/vmlinux_64.lds.S
@@ -0,0 +1,164 @@
1/*
2 * ld script to make SH64 Linux kernel
3 *
4 * Copyright (C) 2000, 2001 Paolo Alberelli
5 *
6 * benedict.gaster@superh.com: 2nd May 2002
7 * Add definition of empty_zero_page to be the first page of kernel image.
8 *
9 * benedict.gaster@superh.com: 3rd May 2002
10 * Added support for ramdisk, removing statically linked romfs at the
11 * same time.
12 *
13 * lethal@linux-sh.org: 9th May 2003
14 * Kill off GLOBAL_NAME() usage and other CDC-isms.
15 *
16 * lethal@linux-sh.org: 19th May 2003
17 * Remove support for ancient toolchains.
18 *
19 * This file is subject to the terms and conditions of the GNU General Public
20 * License. See the file "COPYING" in the main directory of this archive
21 * for more details.
22 */
23#include <asm/page.h>
24#include <asm/cache.h>
25#include <asm/thread_info.h>
26
27#define LOAD_OFFSET CONFIG_PAGE_OFFSET
28#include <asm-generic/vmlinux.lds.h>
29
30OUTPUT_ARCH(sh:sh5)
31
32#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
33
34ENTRY(__start)
35SECTIONS
36{
37 . = CONFIG_PAGE_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE;
38 _text = .; /* Text and read-only data */
39
40 .empty_zero_page : C_PHYS(.empty_zero_page) {
41 *(.empty_zero_page)
42 } = 0
43
44 .text : C_PHYS(.text) {
45 *(.text.head)
46 TEXT_TEXT
47 *(.text64)
48 *(.text..SHmedia32)
49 SCHED_TEXT
50 LOCK_TEXT
51 KPROBES_TEXT
52 *(.fixup)
53 *(.gnu.warning)
54#ifdef CONFIG_LITTLE_ENDIAN
55 } = 0x6ff0fff0
56#else
57 } = 0xf0fff06f
58#endif
59
60 /* We likely want __ex_table to be Cache Line aligned */
61 . = ALIGN(L1_CACHE_BYTES); /* Exception table */
62 __start___ex_table = .;
63 __ex_table : C_PHYS(__ex_table) { *(__ex_table) }
64 __stop___ex_table = .;
65
66 _etext = .; /* End of text section */
67
68 BUG_TABLE
69 NOTES
70 RO_DATA(PAGE_SIZE)
71
72 . = ALIGN(THREAD_SIZE);
73 .data : C_PHYS(.data) { /* Data */
74 *(.data.init_task)
75
76 . = ALIGN(L1_CACHE_BYTES);
77 *(.data.cacheline_aligned)
78
79 . = ALIGN(L1_CACHE_BYTES);
80 *(.data.read_mostly)
81
82 . = ALIGN(PAGE_SIZE);
83 *(.data.page_aligned)
84
85 __nosave_begin = .;
86 *(.data.nosave)
87 . = ALIGN(PAGE_SIZE);
88 __nosave_end = .;
89
90 DATA_DATA
91 CONSTRUCTORS
92 }
93
94 _edata = .; /* End of data section */
95
96 . = ALIGN(PAGE_SIZE); /* Init code and data */
97 __init_begin = .;
98 _sinittext = .;
99 .init.text : C_PHYS(.init.text) { *(.init.text) }
100 _einittext = .;
101 .init.data : C_PHYS(.init.data) { *(.init.data) }
102 . = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */
103 __setup_start = .;
104 .init.setup : C_PHYS(.init.setup) { *(.init.setup) }
105 __setup_end = .;
106 __initcall_start = .;
107 .initcall.init : C_PHYS(.initcall.init) {
108 INITCALLS
109 }
110 __initcall_end = .;
111 __con_initcall_start = .;
112 .con_initcall.init : C_PHYS(.con_initcall.init) {
113 *(.con_initcall.init)
114 }
115 __con_initcall_end = .;
116
117 SECURITY_INIT
118
119#ifdef CONFIG_BLK_DEV_INITRD
120 . = ALIGN(PAGE_SIZE);
121 __initramfs_start = .;
122 .init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) }
123 __initramfs_end = .;
124#endif
125
126 . = ALIGN(8);
127 __machvec_start = .;
128 .machvec.init : C_PHYS(.machvec.init) { *(.machvec.init) }
129 __machvec_end = .;
130
131 PERCPU(PAGE_SIZE)
132
133 /*
134 * .exit.text is discarded at runtime, not link time, to deal with
135 * references from __bug_table
136 */
137 .exit.text : C_PHYS(.exit.text) { *(.exit.text) }
138 .exit.data : C_PHYS(.exit.data) { *(.exit.data) }
139
140 . = ALIGN(PAGE_SIZE);
141 .bss : C_PHYS(.bss) {
142 __init_end = .;
143 __bss_start = .; /* BSS */
144 *(.bss.page_aligned)
145 *(.bss)
146 *(COMMON)
147 . = ALIGN(4);
148 _ebss = .; /* uClinux MTD sucks */
149 _end = . ;
150 }
151
152 /*
153 * When something in the kernel is NOT compiled as a module, the
154 * module cleanup code and data are put into these segments. Both
155 * can then be thrown away, as cleanup code is never called unless
156 * it's a module.
157 */
158 /DISCARD/ : {
159 *(.exitcall.exit)
160 }
161
162 STABS_DEBUG
163 DWARF_DEBUG
164}
diff --git a/arch/sh/lib/Makefile b/arch/sh/lib/Makefile
index 9dc7b6985052..ebb55d1149f5 100644
--- a/arch/sh/lib/Makefile
+++ b/arch/sh/lib/Makefile
@@ -2,12 +2,13 @@
2# Makefile for SuperH-specific library files.. 2# Makefile for SuperH-specific library files..
3# 3#
4 4
5lib-y = delay.o memset.o memmove.o memchr.o \ 5lib-y = delay.o io.o memset.o memmove.o memchr.o \
6 checksum.o strlen.o div64.o div64-generic.o 6 checksum.o strlen.o div64.o div64-generic.o
7 7
8memcpy-y := memcpy.o 8memcpy-y := memcpy.o
9memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o 9memcpy-$(CONFIG_CPU_SH4) := memcpy-sh4.o
10 10
11lib-y += $(memcpy-y) 11lib-$(CONFIG_MMU) += copy_page.o clear_page.o
12lib-y += $(memcpy-y)
12 13
13EXTRA_CFLAGS += -Werror 14EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/clear_page.S b/arch/sh/lib/clear_page.S
index 7a7c81ee3f01..3539123fe517 100644
--- a/arch/sh/mm/clear_page.S
+++ b/arch/sh/lib/clear_page.S
@@ -9,10 +9,10 @@
9#include <asm/page.h> 9#include <asm/page.h>
10 10
11/* 11/*
12 * clear_page_slow 12 * clear_page
13 * @to: P1 address 13 * @to: P1 address
14 * 14 *
15 * void clear_page_slow(void *to) 15 * void clear_page(void *to)
16 */ 16 */
17 17
18/* 18/*
@@ -20,7 +20,7 @@
20 * r4 --- to 20 * r4 --- to
21 * r5 --- to + PAGE_SIZE 21 * r5 --- to + PAGE_SIZE
22 */ 22 */
23ENTRY(clear_page_slow) 23ENTRY(clear_page)
24 mov r4,r5 24 mov r4,r5
25 mov.l .Llimit,r0 25 mov.l .Llimit,r0
26 add r0,r5 26 add r0,r5
@@ -50,6 +50,8 @@ ENTRY(clear_page_slow)
50 ! 50 !
51 rts 51 rts
52 nop 52 nop
53
54 .balign 4
53.Llimit: .long (PAGE_SIZE-28) 55.Llimit: .long (PAGE_SIZE-28)
54 56
55ENTRY(__clear_user) 57ENTRY(__clear_user)
diff --git a/arch/sh/mm/copy_page.S b/arch/sh/lib/copy_page.S
index 40685018b952..e002b91c8752 100644
--- a/arch/sh/mm/copy_page.S
+++ b/arch/sh/lib/copy_page.S
@@ -9,11 +9,11 @@
9#include <asm/page.h> 9#include <asm/page.h>
10 10
11/* 11/*
12 * copy_page_slow 12 * copy_page
13 * @to: P1 address 13 * @to: P1 address
14 * @from: P1 address 14 * @from: P1 address
15 * 15 *
16 * void copy_page_slow(void *to, void *from) 16 * void copy_page(void *to, void *from)
17 */ 17 */
18 18
19/* 19/*
@@ -23,7 +23,7 @@
23 * r10 --- to 23 * r10 --- to
24 * r11 --- from 24 * r11 --- from
25 */ 25 */
26ENTRY(copy_page_slow) 26ENTRY(copy_page)
27 mov.l r8,@-r15 27 mov.l r8,@-r15
28 mov.l r10,@-r15 28 mov.l r10,@-r15
29 mov.l r11,@-r15 29 mov.l r11,@-r15
@@ -68,8 +68,9 @@ ENTRY(copy_page_slow)
68 rts 68 rts
69 nop 69 nop
70 70
71 .align 2 71 .balign 4
72.Lpsz: .long PAGE_SIZE 72.Lpsz: .long PAGE_SIZE
73
73/* 74/*
74 * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n); 75 * __kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
75 * Return the number of bytes NOT copied 76 * Return the number of bytes NOT copied
diff --git a/arch/sh/lib/io.c b/arch/sh/lib/io.c
new file mode 100644
index 000000000000..4f54ec43516f
--- /dev/null
+++ b/arch/sh/lib/io.c
@@ -0,0 +1,82 @@
1/*
2 * arch/sh/lib/io.c - SH32 optimized I/O routines
3 *
4 * Copyright (C) 2000 Stuart Menefy
5 * Copyright (C) 2005 Paul Mundt
6 *
7 * Provide real functions which expand to whatever the header file defined.
8 * Also definitions of machine independent IO functions.
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <linux/module.h>
15#include <linux/io.h>
16
17void __raw_readsl(unsigned long addr, void *datap, int len)
18{
19 u32 *data;
20
21 for (data = datap; (len != 0) && (((u32)data & 0x1f) != 0); len--)
22 *data++ = ctrl_inl(addr);
23
24 if (likely(len >= (0x20 >> 2))) {
25 int tmp2, tmp3, tmp4, tmp5, tmp6;
26
27 __asm__ __volatile__(
28 "1: \n\t"
29 "mov.l @%7, r0 \n\t"
30 "mov.l @%7, %2 \n\t"
31#ifdef CONFIG_CPU_SH4
32 "movca.l r0, @%0 \n\t"
33#else
34 "mov.l r0, @%0 \n\t"
35#endif
36 "mov.l @%7, %3 \n\t"
37 "mov.l @%7, %4 \n\t"
38 "mov.l @%7, %5 \n\t"
39 "mov.l @%7, %6 \n\t"
40 "mov.l @%7, r7 \n\t"
41 "mov.l @%7, r0 \n\t"
42 "mov.l %2, @(0x04,%0) \n\t"
43 "mov #0x20>>2, %2 \n\t"
44 "mov.l %3, @(0x08,%0) \n\t"
45 "sub %2, %1 \n\t"
46 "mov.l %4, @(0x0c,%0) \n\t"
47 "cmp/hi %1, %2 ! T if 32 > len \n\t"
48 "mov.l %5, @(0x10,%0) \n\t"
49 "mov.l %6, @(0x14,%0) \n\t"
50 "mov.l r7, @(0x18,%0) \n\t"
51 "mov.l r0, @(0x1c,%0) \n\t"
52 "bf.s 1b \n\t"
53 " add #0x20, %0 \n\t"
54 : "=&r" (data), "=&r" (len),
55 "=&r" (tmp2), "=&r" (tmp3), "=&r" (tmp4),
56 "=&r" (tmp5), "=&r" (tmp6)
57 : "r"(addr), "0" (data), "1" (len)
58 : "r0", "r7", "t", "memory");
59 }
60
61 for (; len != 0; len--)
62 *data++ = ctrl_inl(addr);
63}
64EXPORT_SYMBOL(__raw_readsl);
65
66void __raw_writesl(unsigned long addr, const void *data, int len)
67{
68 if (likely(len != 0)) {
69 int tmp1;
70
71 __asm__ __volatile__ (
72 "1: \n\t"
73 "mov.l @%0+, %1 \n\t"
74 "dt %3 \n\t"
75 "bf.s 1b \n\t"
76 " mov.l %1, @%4 \n\t"
77 : "=&r" (data), "=&r" (tmp1)
78 : "0" (data), "r" (len), "r"(addr)
79 : "t", "memory");
80 }
81}
82EXPORT_SYMBOL(__raw_writesl);
diff --git a/arch/sh64/lib/.gitignore b/arch/sh/lib64/.gitignore
index 3508c2cb23c4..3508c2cb23c4 100644
--- a/arch/sh64/lib/.gitignore
+++ b/arch/sh/lib64/.gitignore
diff --git a/arch/sh/lib64/Makefile b/arch/sh/lib64/Makefile
new file mode 100644
index 000000000000..9950966923a0
--- /dev/null
+++ b/arch/sh/lib64/Makefile
@@ -0,0 +1,15 @@
1#
2# Makefile for the SH-5 specific library files..
3#
4# Copyright (C) 2000, 2001 Paolo Alberelli
5# Copyright (C) 2003 Paul Mundt
6#
7# This file is subject to the terms and conditions of the GNU General Public
8# License. See the file "COPYING" in the main directory of this archive
9# for more details.
10#
11
12# Panic should really be compiled as PIC
13lib-y := udelay.o c-checksum.o dbg.o panic.o memcpy.o copy_user_memcpy.o \
14 copy_page.o clear_page.o
15
diff --git a/arch/sh64/lib/c-checksum.c b/arch/sh/lib64/c-checksum.c
index 053137abd8a0..5dfbd8b5e558 100644
--- a/arch/sh64/lib/c-checksum.c
+++ b/arch/sh/lib64/c-checksum.c
@@ -1,12 +1,9 @@
1/* 1/*
2 * arch/sh64/lib/c-checksum.c 2 * arch/sh/lib64/c-checksum.c
3 * 3 *
4 * This file contains network checksum routines that are better done 4 * This file contains network checksum routines that are better done
5 * in an architecture-specific manner due to speed.. 5 * in an architecture-specific manner due to speed..
6 */ 6 */
7
8#undef DEBUG
9
10#include <linux/string.h> 7#include <linux/string.h>
11#include <linux/errno.h> 8#include <linux/errno.h>
12#include <linux/kernel.h> 9#include <linux/kernel.h>
diff --git a/arch/sh64/lib/page_clear.S b/arch/sh/lib64/clear_page.S
index ac0111d669a3..007ab48ecc1c 100644
--- a/arch/sh64/lib/page_clear.S
+++ b/arch/sh/lib64/clear_page.S
@@ -25,8 +25,8 @@
25 .little 25 .little
26 26
27 .balign 8 27 .balign 8
28 .global sh64_page_clear 28 .global clear_page
29sh64_page_clear: 29clear_page:
30 pta/l 1f, tr1 30 pta/l 1f, tr1
31 pta/l 2f, tr2 31 pta/l 2f, tr2
32 ptabs/l r18, tr0 32 ptabs/l r18, tr0
diff --git a/arch/sh64/lib/page_copy.S b/arch/sh/lib64/copy_page.S
index e159c3cd2582..0ec6fca63b56 100644
--- a/arch/sh64/lib/page_copy.S
+++ b/arch/sh/lib64/copy_page.S
@@ -10,8 +10,8 @@
10 of SH5-101 cut2 eval chip with Cayman board DDR memory. 10 of SH5-101 cut2 eval chip with Cayman board DDR memory.
11 11
12 Parameters: 12 Parameters:
13 r2 : source effective address (start of page) 13 r2 : destination effective address (start of page)
14 r3 : destination effective address (start of page) 14 r3 : source effective address (start of page)
15 15
16 Always copies 4096 bytes. 16 Always copies 4096 bytes.
17 17
@@ -27,10 +27,10 @@
27 .little 27 .little
28 28
29 .balign 8 29 .balign 8
30 .global sh64_page_copy 30 .global copy_page
31sh64_page_copy: 31copy_page:
32 32
33 /* Copy 4096 bytes worth of data from r2 to r3. 33 /* Copy 4096 bytes worth of data from r3 to r2.
34 Do prefetches 4 lines ahead. 34 Do prefetches 4 lines ahead.
35 Do alloco 2 lines ahead */ 35 Do alloco 2 lines ahead */
36 36
@@ -41,21 +41,21 @@ sh64_page_copy:
41 41
42#if 0 42#if 0
43 /* TAKum03020 */ 43 /* TAKum03020 */
44 ld.q r2, 0x00, r63 44 ld.q r3, 0x00, r63
45 ld.q r2, 0x20, r63 45 ld.q r3, 0x20, r63
46 ld.q r2, 0x40, r63 46 ld.q r3, 0x40, r63
47 ld.q r2, 0x60, r63 47 ld.q r3, 0x60, r63
48#endif 48#endif
49 alloco r3, 0x00 49 alloco r2, 0x00
50 synco ! TAKum03020 50 synco ! TAKum03020
51 alloco r3, 0x20 51 alloco r2, 0x20
52 synco ! TAKum03020 52 synco ! TAKum03020
53 53
54 movi 3968, r6 54 movi 3968, r6
55 add r3, r6, r6 55 add r2, r6, r6
56 addi r6, 64, r7 56 addi r6, 64, r7
57 addi r7, 64, r8 57 addi r7, 64, r8
58 sub r2, r3, r60 58 sub r3, r2, r60
59 addi r60, 8, r61 59 addi r60, 8, r61
60 addi r61, 8, r62 60 addi r61, 8, r62
61 addi r62, 8, r23 61 addi r62, 8, r23
@@ -67,25 +67,23 @@ sh64_page_copy:
671: 671:
68#if 0 68#if 0
69 /* TAKum03020 */ 69 /* TAKum03020 */
70 bge/u r3, r6, tr2 ! skip prefetch for last 4 lines 70 bge/u r2, r6, tr2 ! skip prefetch for last 4 lines
71 ldx.q r3, r22, r63 ! prefetch 4 lines hence 71 ldx.q r2, r22, r63 ! prefetch 4 lines hence
72#endif 72#endif
732: 732:
74 bge/u r3, r7, tr3 ! skip alloco for last 2 lines 74 bge/u r2, r7, tr3 ! skip alloco for last 2 lines
75 alloco r3, 0x40 ! alloc destination line 2 lines ahead 75 alloco r2, 0x40 ! alloc destination line 2 lines ahead
76 synco ! TAKum03020 76 synco ! TAKum03020
773: 773:
78 ldx.q r3, r60, r36 78 ldx.q r2, r60, r36
79 ldx.q r3, r61, r37 79 ldx.q r2, r61, r37
80 ldx.q r3, r62, r38 80 ldx.q r2, r62, r38
81 ldx.q r3, r23, r39 81 ldx.q r2, r23, r39
82 st.q r3, 0, r36 82 st.q r2, 0, r36
83 st.q r3, 8, r37 83 st.q r2, 8, r37
84 st.q r3, 16, r38 84 st.q r2, 16, r38
85 st.q r3, 24, r39 85 st.q r2, 24, r39
86 addi r3, 32, r3 86 addi r2, 32, r2
87 bgt/l r8, r3, tr1 87 bgt/l r8, r2, tr1
88 88
89 blink tr0, r63 ! return 89 blink tr0, r63 ! return
90
91
diff --git a/arch/sh64/lib/copy_user_memcpy.S b/arch/sh/lib64/copy_user_memcpy.S
index 2a62816d2ddd..2a62816d2ddd 100644
--- a/arch/sh64/lib/copy_user_memcpy.S
+++ b/arch/sh/lib64/copy_user_memcpy.S
diff --git a/arch/sh64/lib/dbg.c b/arch/sh/lib64/dbg.c
index 97816e0baf19..75825ef6e084 100644
--- a/arch/sh64/lib/dbg.c
+++ b/arch/sh/lib64/dbg.c
@@ -2,7 +2,7 @@
2-- 2--
3-- Identity : Linux50 Debug Funcions 3-- Identity : Linux50 Debug Funcions
4-- 4--
5-- File : arch/sh64/lib/dbg.C 5-- File : arch/sh/lib64/dbg.c
6-- 6--
7-- Copyright 2000, 2001 STMicroelectronics Limited. 7-- Copyright 2000, 2001 STMicroelectronics Limited.
8-- Copyright 2004 Richard Curnow (evt_debug etc) 8-- Copyright 2004 Richard Curnow (evt_debug etc)
diff --git a/arch/sh64/lib/memcpy.c b/arch/sh/lib64/memcpy.c
index fba436a92bfa..fba436a92bfa 100644
--- a/arch/sh64/lib/memcpy.c
+++ b/arch/sh/lib64/memcpy.c
diff --git a/arch/sh64/lib/panic.c b/arch/sh/lib64/panic.c
index c9eb1cb50d97..ff559e2a96f7 100644
--- a/arch/sh64/lib/panic.c
+++ b/arch/sh/lib64/panic.c
@@ -8,7 +8,7 @@
8 8
9#include <linux/kernel.h> 9#include <linux/kernel.h>
10#include <asm/io.h> 10#include <asm/io.h>
11#include <asm/registers.h> 11#include <asm/cpu/registers.h>
12 12
13/* THIS IS A PHYSICAL ADDRESS */ 13/* THIS IS A PHYSICAL ADDRESS */
14#define HDSP2534_ADDR (0x04002100) 14#define HDSP2534_ADDR (0x04002100)
diff --git a/arch/sh64/lib/udelay.c b/arch/sh/lib64/udelay.c
index 327653914007..23c7d17fb9f7 100644
--- a/arch/sh64/lib/udelay.c
+++ b/arch/sh/lib64/udelay.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/lib/udelay.c 2 * arch/sh/lib64/udelay.c
3 * 3 *
4 * Delay routines, using a pre-computed "loops_per_jiffy" value. 4 * Delay routines, using a pre-computed "loops_per_jiffy" value.
5 * 5 *
@@ -13,8 +13,6 @@
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include <asm/param.h> 14#include <asm/param.h>
15 15
16extern unsigned long loops_per_jiffy;
17
18/* 16/*
19 * Use only for very small delays (< 1 msec). 17 * Use only for very small delays (< 1 msec).
20 * 18 *
@@ -49,11 +47,10 @@ void __ndelay(unsigned long long nsecs, unsigned long lpj)
49 47
50void udelay(unsigned long usecs) 48void udelay(unsigned long usecs)
51{ 49{
52 __udelay(usecs, loops_per_jiffy); 50 __udelay(usecs, cpu_data[raw_smp_processor_id()].loops_per_jiffy);
53} 51}
54 52
55void ndelay(unsigned long nsecs) 53void ndelay(unsigned long nsecs)
56{ 54{
57 __ndelay(nsecs, loops_per_jiffy); 55 __ndelay(nsecs, cpu_data[raw_smp_processor_id()].loops_per_jiffy);
58} 56}
59
diff --git a/arch/sh/mm/Kconfig b/arch/sh/mm/Kconfig
index 1265f204f7d1..f549b8cd2501 100644
--- a/arch/sh/mm/Kconfig
+++ b/arch/sh/mm/Kconfig
@@ -1,193 +1,3 @@
1#
2# Processor families
3#
4config CPU_SH2
5 bool
6
7config CPU_SH2A
8 bool
9 select CPU_SH2
10
11config CPU_SH3
12 bool
13 select CPU_HAS_INTEVT
14 select CPU_HAS_SR_RB
15
16config CPU_SH4
17 bool
18 select CPU_HAS_INTEVT
19 select CPU_HAS_SR_RB
20 select CPU_HAS_PTEA if !CPU_SH4A || CPU_SHX2
21 select CPU_HAS_FPU if !CPU_SH4AL_DSP
22
23config CPU_SH4A
24 bool
25 select CPU_SH4
26
27config CPU_SH4AL_DSP
28 bool
29 select CPU_SH4A
30 select CPU_HAS_DSP
31
32config CPU_SHX2
33 bool
34
35config CPU_SHX3
36 bool
37
38choice
39 prompt "Processor sub-type selection"
40
41#
42# Processor subtypes
43#
44
45# SH-2 Processor Support
46
47config CPU_SUBTYPE_SH7619
48 bool "Support SH7619 processor"
49 select CPU_SH2
50
51# SH-2A Processor Support
52
53config CPU_SUBTYPE_SH7206
54 bool "Support SH7206 processor"
55 select CPU_SH2A
56
57# SH-3 Processor Support
58
59config CPU_SUBTYPE_SH7705
60 bool "Support SH7705 processor"
61 select CPU_SH3
62
63config CPU_SUBTYPE_SH7706
64 bool "Support SH7706 processor"
65 select CPU_SH3
66 help
67 Select SH7706 if you have a 133 Mhz SH-3 HD6417706 CPU.
68
69config CPU_SUBTYPE_SH7707
70 bool "Support SH7707 processor"
71 select CPU_SH3
72 help
73 Select SH7707 if you have a 60 Mhz SH-3 HD6417707 CPU.
74
75config CPU_SUBTYPE_SH7708
76 bool "Support SH7708 processor"
77 select CPU_SH3
78 help
79 Select SH7708 if you have a 60 Mhz SH-3 HD6417708S or
80 if you have a 100 Mhz SH-3 HD6417708R CPU.
81
82config CPU_SUBTYPE_SH7709
83 bool "Support SH7709 processor"
84 select CPU_SH3
85 help
86 Select SH7709 if you have a 80 Mhz SH-3 HD6417709 CPU.
87
88config CPU_SUBTYPE_SH7710
89 bool "Support SH7710 processor"
90 select CPU_SH3
91 select CPU_HAS_DSP
92 help
93 Select SH7710 if you have a SH3-DSP SH7710 CPU.
94
95config CPU_SUBTYPE_SH7712
96 bool "Support SH7712 processor"
97 select CPU_SH3
98 select CPU_HAS_DSP
99 help
100 Select SH7712 if you have a SH3-DSP SH7712 CPU.
101
102config CPU_SUBTYPE_SH7720
103 bool "Support SH7720 processor"
104 select CPU_SH3
105 select CPU_HAS_DSP
106 help
107 Select SH7720 if you have a SH3-DSP SH7720 CPU.
108
109# SH-4 Processor Support
110
111config CPU_SUBTYPE_SH7750
112 bool "Support SH7750 processor"
113 select CPU_SH4
114 help
115 Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
116
117config CPU_SUBTYPE_SH7091
118 bool "Support SH7091 processor"
119 select CPU_SH4
120 help
121 Select SH7091 if you have an SH-4 based Sega device (such as
122 the Dreamcast, Naomi, and Naomi 2).
123
124config CPU_SUBTYPE_SH7750R
125 bool "Support SH7750R processor"
126 select CPU_SH4
127
128config CPU_SUBTYPE_SH7750S
129 bool "Support SH7750S processor"
130 select CPU_SH4
131
132config CPU_SUBTYPE_SH7751
133 bool "Support SH7751 processor"
134 select CPU_SH4
135 help
136 Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
137 or if you have a HD6417751R CPU.
138
139config CPU_SUBTYPE_SH7751R
140 bool "Support SH7751R processor"
141 select CPU_SH4
142
143config CPU_SUBTYPE_SH7760
144 bool "Support SH7760 processor"
145 select CPU_SH4
146
147config CPU_SUBTYPE_SH4_202
148 bool "Support SH4-202 processor"
149 select CPU_SH4
150
151# SH-4A Processor Support
152
153config CPU_SUBTYPE_SH7770
154 bool "Support SH7770 processor"
155 select CPU_SH4A
156
157config CPU_SUBTYPE_SH7780
158 bool "Support SH7780 processor"
159 select CPU_SH4A
160
161config CPU_SUBTYPE_SH7785
162 bool "Support SH7785 processor"
163 select CPU_SH4A
164 select CPU_SHX2
165 select ARCH_SPARSEMEM_ENABLE
166 select SYS_SUPPORTS_NUMA
167
168config CPU_SUBTYPE_SHX3
169 bool "Support SH-X3 processor"
170 select CPU_SH4A
171 select CPU_SHX3
172 select ARCH_SPARSEMEM_ENABLE
173 select SYS_SUPPORTS_NUMA
174 select SYS_SUPPORTS_SMP
175
176# SH4AL-DSP Processor Support
177
178config CPU_SUBTYPE_SH7343
179 bool "Support SH7343 processor"
180 select CPU_SH4AL_DSP
181
182config CPU_SUBTYPE_SH7722
183 bool "Support SH7722 processor"
184 select CPU_SH4AL_DSP
185 select CPU_SHX2
186 select ARCH_SPARSEMEM_ENABLE
187 select SYS_SUPPORTS_NUMA
188
189endchoice
190
191menu "Memory management options" 1menu "Memory management options"
192 2
193config QUICKLIST 3config QUICKLIST
@@ -207,7 +17,8 @@ config MMU
207 17
208config PAGE_OFFSET 18config PAGE_OFFSET
209 hex 19 hex
210 default "0x80000000" if MMU 20 default "0x80000000" if MMU && SUPERH32
21 default "0x20000000" if MMU && SUPERH64
211 default "0x00000000" 22 default "0x00000000"
212 23
213config MEMORY_START 24config MEMORY_START
@@ -228,17 +39,28 @@ config MEMORY_START
228 39
229config MEMORY_SIZE 40config MEMORY_SIZE
230 hex "Physical memory size" 41 hex "Physical memory size"
231 default "0x00400000" 42 default "0x04000000"
232 help 43 help
233 This sets the default memory size assumed by your SH kernel. It can 44 This sets the default memory size assumed by your SH kernel. It can
234 be overridden as normal by the 'mem=' argument on the kernel command 45 be overridden as normal by the 'mem=' argument on the kernel command
235 line. If unsure, consult your board specifications or just leave it 46 line. If unsure, consult your board specifications or just leave it
236 as 0x00400000 which was the default value before this became 47 as 0x04000000 which was the default value before this became
237 configurable. 48 configurable.
238 49
50# Physical addressing modes
51
52config 29BIT
53 def_bool !32BIT
54 depends on SUPERH32
55
239config 32BIT 56config 32BIT
57 bool
58 default y if CPU_SH5
59
60config PMB
240 bool "Support 32-bit physical addressing through PMB" 61 bool "Support 32-bit physical addressing through PMB"
241 depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785) 62 depends on MMU && (CPU_SUBTYPE_SH7780 || CPU_SUBTYPE_SH7785)
63 select 32BIT
242 default y 64 default y
243 help 65 help
244 If you say Y here, physical addressing will be extended to 66 If you say Y here, physical addressing will be extended to
@@ -256,7 +78,7 @@ config X2TLB
256 78
257config VSYSCALL 79config VSYSCALL
258 bool "Support vsyscall page" 80 bool "Support vsyscall page"
259 depends on MMU 81 depends on MMU && (CPU_SH3 || CPU_SH4)
260 default y 82 default y
261 help 83 help
262 This will enable support for the kernel mapping a vDSO page 84 This will enable support for the kernel mapping a vDSO page
@@ -335,7 +157,7 @@ config PAGE_SIZE_8KB
335 157
336config PAGE_SIZE_64KB 158config PAGE_SIZE_64KB
337 bool "64kB" 159 bool "64kB"
338 depends on CPU_SH4 160 depends on CPU_SH4 || CPU_SH5
339 help 161 help
340 This enables support for 64kB pages, possible on all SH-4 162 This enables support for 64kB pages, possible on all SH-4
341 CPUs and later. 163 CPUs and later.
@@ -344,7 +166,7 @@ endchoice
344 166
345choice 167choice
346 prompt "HugeTLB page size" 168 prompt "HugeTLB page size"
347 depends on HUGETLB_PAGE && CPU_SH4 && MMU 169 depends on HUGETLB_PAGE && (CPU_SH4 || CPU_SH5) && MMU
348 default HUGETLB_PAGE_SIZE_64K 170 default HUGETLB_PAGE_SIZE_64K
349 171
350config HUGETLB_PAGE_SIZE_64K 172config HUGETLB_PAGE_SIZE_64K
@@ -365,6 +187,10 @@ config HUGETLB_PAGE_SIZE_64MB
365 bool "64MB" 187 bool "64MB"
366 depends on X2TLB 188 depends on X2TLB
367 189
190config HUGETLB_PAGE_SIZE_512MB
191 bool "512MB"
192 depends on CPU_SH5
193
368endchoice 194endchoice
369 195
370source "mm/Kconfig" 196source "mm/Kconfig"
@@ -392,12 +218,12 @@ config SH_DIRECT_MAPPED
392 218
393choice 219choice
394 prompt "Cache mode" 220 prompt "Cache mode"
395 default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 221 default CACHE_WRITEBACK if CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5
396 default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A) 222 default CACHE_WRITETHROUGH if (CPU_SH2 && !CPU_SH2A)
397 223
398config CACHE_WRITEBACK 224config CACHE_WRITEBACK
399 bool "Write-back" 225 bool "Write-back"
400 depends on CPU_SH2A || CPU_SH3 || CPU_SH4 226 depends on CPU_SH2A || CPU_SH3 || CPU_SH4 || CPU_SH5
401 227
402config CACHE_WRITETHROUGH 228config CACHE_WRITETHROUGH
403 bool "Write-through" 229 bool "Write-through"
diff --git a/arch/sh/mm/Makefile b/arch/sh/mm/Makefile
index aa44607f072d..9f4bc3d90b1e 100644
--- a/arch/sh/mm/Makefile
+++ b/arch/sh/mm/Makefile
@@ -1,37 +1,5 @@
1# 1ifeq ($(CONFIG_SUPERH32),y)
2# Makefile for the Linux SuperH-specific parts of the memory manager. 2include ${srctree}/arch/sh/mm/Makefile_32
3# 3else
4 4include ${srctree}/arch/sh/mm/Makefile_64
5obj-y := init.o extable.o consistent.o
6
7ifndef CONFIG_CACHE_OFF
8obj-$(CONFIG_CPU_SH2) += cache-sh2.o
9obj-$(CONFIG_CPU_SH3) += cache-sh3.o
10obj-$(CONFIG_CPU_SH4) += cache-sh4.o
11obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
12endif 5endif
13
14mmu-y := tlb-nommu.o pg-nommu.o
15mmu-$(CONFIG_MMU) := fault.o clear_page.o copy_page.o tlb-flush.o \
16 ioremap.o
17
18obj-y += $(mmu-y)
19
20ifdef CONFIG_DEBUG_FS
21obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
22endif
23
24ifdef CONFIG_MMU
25obj-$(CONFIG_CPU_SH3) += tlb-sh3.o
26obj-$(CONFIG_CPU_SH4) += tlb-sh4.o
27ifndef CONFIG_CACHE_OFF
28obj-$(CONFIG_CPU_SH4) += pg-sh4.o
29obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
30endif
31endif
32
33obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
34obj-$(CONFIG_32BIT) += pmb.o
35obj-$(CONFIG_NUMA) += numa.o
36
37EXTRA_CFLAGS += -Werror
diff --git a/arch/sh/mm/Makefile_32 b/arch/sh/mm/Makefile_32
new file mode 100644
index 000000000000..e295db60b91b
--- /dev/null
+++ b/arch/sh/mm/Makefile_32
@@ -0,0 +1,36 @@
1#
2# Makefile for the Linux SuperH-specific parts of the memory manager.
3#
4
5obj-y := init.o extable_32.o consistent.o
6
7ifndef CONFIG_CACHE_OFF
8obj-$(CONFIG_CPU_SH2) += cache-sh2.o
9obj-$(CONFIG_CPU_SH3) += cache-sh3.o
10obj-$(CONFIG_CPU_SH4) += cache-sh4.o
11obj-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
12endif
13
14mmu-y := tlb-nommu.o pg-nommu.o
15mmu-$(CONFIG_MMU) := fault_32.o tlbflush_32.o ioremap_32.o
16
17obj-y += $(mmu-y)
18
19ifdef CONFIG_DEBUG_FS
20obj-$(CONFIG_CPU_SH4) += cache-debugfs.o
21endif
22
23ifdef CONFIG_MMU
24obj-$(CONFIG_CPU_SH3) += tlb-sh3.o
25obj-$(CONFIG_CPU_SH4) += tlb-sh4.o
26ifndef CONFIG_CACHE_OFF
27obj-$(CONFIG_CPU_SH4) += pg-sh4.o
28obj-$(CONFIG_SH7705_CACHE_32KB) += pg-sh7705.o
29endif
30endif
31
32obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
33obj-$(CONFIG_PMB) += pmb.o
34obj-$(CONFIG_NUMA) += numa.o
35
36EXTRA_CFLAGS += -Werror
diff --git a/arch/sh64/mm/Makefile b/arch/sh/mm/Makefile_64
index d0e813632480..cbd6aa33c5ac 100644
--- a/arch/sh64/mm/Makefile
+++ b/arch/sh/mm/Makefile_64
@@ -1,24 +1,24 @@
1# 1#
2# This file is subject to the terms and conditions of the GNU General Public 2# Makefile for the Linux SuperH-specific parts of the memory manager.
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 2000, 2001 Paolo Alberelli
7# Copyright (C) 2003, 2004 Paul Mundt
8#
9# Makefile for the sh64-specific parts of the Linux memory manager.
10#
11# Note! Dependencies are done automagically by 'make dep', which also
12# removes any old dependencies. DON'T put your own dependencies here
13# unless it's something special (ie not a .c file).
14# 3#
15 4
16obj-y := cache.o consistent.o extable.o fault.o init.o ioremap.o \ 5obj-y := init.o extable_64.o consistent.o
17 tlbmiss.o tlb.o 6
7mmu-y := tlb-nommu.o pg-nommu.o
8mmu-$(CONFIG_MMU) := fault_64.o ioremap_64.o tlbflush_64.o tlb-sh5.o
9
10ifndef CONFIG_CACHE_OFF
11obj-y += cache-sh5.o
12endif
13
14obj-y += $(mmu-y)
18 15
19obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o 16obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
17obj-$(CONFIG_NUMA) += numa.o
18
19EXTRA_CFLAGS += -Werror
20 20
21# Special flags for tlbmiss.o. This puts restrictions on the number of 21# Special flags for fault_64.o. This puts restrictions on the number of
22# caller-save registers that the compiler can target when building this file. 22# caller-save registers that the compiler can target when building this file.
23# This is required because the code is called from a context in entry.S where 23# This is required because the code is called from a context in entry.S where
24# very few registers have been saved in the exception handler (for speed 24# very few registers have been saved in the exception handler (for speed
@@ -33,7 +33,7 @@ obj-$(CONFIG_HUGETLB_PAGE) += hugetlbpage.o
33# The resources not listed below are callee save, i.e. the compiler is free to 33# The resources not listed below are callee save, i.e. the compiler is free to
34# use any of them and will spill them to the stack itself. 34# use any of them and will spill them to the stack itself.
35 35
36CFLAGS_tlbmiss.o += -ffixed-r7 \ 36CFLAGS_fault_64.o += -ffixed-r7 \
37 -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \ 37 -ffixed-r8 -ffixed-r9 -ffixed-r10 -ffixed-r11 -ffixed-r12 \
38 -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \ 38 -ffixed-r13 -ffixed-r14 -ffixed-r16 -ffixed-r17 -ffixed-r19 \
39 -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \ 39 -ffixed-r20 -ffixed-r21 -ffixed-r22 -ffixed-r23 \
diff --git a/arch/sh/mm/cache-debugfs.c b/arch/sh/mm/cache-debugfs.c
index de6d2c9aa477..db6d950b6f5e 100644
--- a/arch/sh/mm/cache-debugfs.c
+++ b/arch/sh/mm/cache-debugfs.c
@@ -22,7 +22,8 @@ enum cache_type {
22 CACHE_TYPE_UNIFIED, 22 CACHE_TYPE_UNIFIED,
23}; 23};
24 24
25static int cache_seq_show(struct seq_file *file, void *iter) 25static int __uses_jump_to_uncached cache_seq_show(struct seq_file *file,
26 void *iter)
26{ 27{
27 unsigned int cache_type = (unsigned int)file->private; 28 unsigned int cache_type = (unsigned int)file->private;
28 struct cache_info *cache; 29 struct cache_info *cache;
@@ -34,11 +35,11 @@ static int cache_seq_show(struct seq_file *file, void *iter)
34 * Go uncached immediately so we don't skew the results any 35 * Go uncached immediately so we don't skew the results any
35 * more than we already are.. 36 * more than we already are..
36 */ 37 */
37 jump_to_P2(); 38 jump_to_uncached();
38 39
39 ccr = ctrl_inl(CCR); 40 ccr = ctrl_inl(CCR);
40 if ((ccr & CCR_CACHE_ENABLE) == 0) { 41 if ((ccr & CCR_CACHE_ENABLE) == 0) {
41 back_to_P1(); 42 back_to_cached();
42 43
43 seq_printf(file, "disabled\n"); 44 seq_printf(file, "disabled\n");
44 return 0; 45 return 0;
@@ -104,7 +105,7 @@ static int cache_seq_show(struct seq_file *file, void *iter)
104 addrstart += cache->way_incr; 105 addrstart += cache->way_incr;
105 } 106 }
106 107
107 back_to_P1(); 108 back_to_cached();
108 109
109 return 0; 110 return 0;
110} 111}
diff --git a/arch/sh/mm/cache-sh4.c b/arch/sh/mm/cache-sh4.c
index 226b190c5b9c..43d7ff6b6ec7 100644
--- a/arch/sh/mm/cache-sh4.c
+++ b/arch/sh/mm/cache-sh4.c
@@ -190,7 +190,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
190 * .. which happens to be the same behavior as flush_icache_range(). 190 * .. which happens to be the same behavior as flush_icache_range().
191 * So, we simply flush out a line. 191 * So, we simply flush out a line.
192 */ 192 */
193void flush_cache_sigtramp(unsigned long addr) 193void __uses_jump_to_uncached flush_cache_sigtramp(unsigned long addr)
194{ 194{
195 unsigned long v, index; 195 unsigned long v, index;
196 unsigned long flags; 196 unsigned long flags;
@@ -205,13 +205,13 @@ void flush_cache_sigtramp(unsigned long addr)
205 (v & boot_cpu_data.icache.entry_mask); 205 (v & boot_cpu_data.icache.entry_mask);
206 206
207 local_irq_save(flags); 207 local_irq_save(flags);
208 jump_to_P2(); 208 jump_to_uncached();
209 209
210 for (i = 0; i < boot_cpu_data.icache.ways; 210 for (i = 0; i < boot_cpu_data.icache.ways;
211 i++, index += boot_cpu_data.icache.way_incr) 211 i++, index += boot_cpu_data.icache.way_incr)
212 ctrl_outl(0, index); /* Clear out Valid-bit */ 212 ctrl_outl(0, index); /* Clear out Valid-bit */
213 213
214 back_to_P1(); 214 back_to_cached();
215 wmb(); 215 wmb();
216 local_irq_restore(flags); 216 local_irq_restore(flags);
217} 217}
@@ -256,12 +256,12 @@ void flush_dcache_page(struct page *page)
256} 256}
257 257
258/* TODO: Selective icache invalidation through IC address array.. */ 258/* TODO: Selective icache invalidation through IC address array.. */
259static inline void flush_icache_all(void) 259static inline void __uses_jump_to_uncached flush_icache_all(void)
260{ 260{
261 unsigned long flags, ccr; 261 unsigned long flags, ccr;
262 262
263 local_irq_save(flags); 263 local_irq_save(flags);
264 jump_to_P2(); 264 jump_to_uncached();
265 265
266 /* Flush I-cache */ 266 /* Flush I-cache */
267 ccr = ctrl_inl(CCR); 267 ccr = ctrl_inl(CCR);
@@ -269,11 +269,11 @@ static inline void flush_icache_all(void)
269 ctrl_outl(ccr, CCR); 269 ctrl_outl(ccr, CCR);
270 270
271 /* 271 /*
272 * back_to_P1() will take care of the barrier for us, don't add 272 * back_to_cached() will take care of the barrier for us, don't add
273 * another one! 273 * another one!
274 */ 274 */
275 275
276 back_to_P1(); 276 back_to_cached();
277 local_irq_restore(flags); 277 local_irq_restore(flags);
278} 278}
279 279
diff --git a/arch/sh64/mm/cache.c b/arch/sh/mm/cache-sh5.c
index 421487cfff4c..4617e3aeee73 100644
--- a/arch/sh64/mm/cache.c
+++ b/arch/sh/mm/cache-sh5.c
@@ -1,18 +1,15 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mm/cache-sh5.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/cache.c
7 * 3 *
8 * Original version Copyright (C) 2000, 2001 Paolo Alberelli 4 * Original version Copyright (C) 2000, 2001 Paolo Alberelli
9 * Second version Copyright (C) benedict.gaster@superh.com 2002 5 * Second version Copyright (C) benedict.gaster@superh.com 2002
10 * Third version Copyright Richard.Curnow@superh.com 2003 6 * Third version Copyright Richard.Curnow@superh.com 2003
11 * Hacks to third version Copyright (C) 2003 Paul Mundt 7 * Hacks to third version Copyright (C) 2003 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */ 12 */
13
14/****************************************************************************/
15
16#include <linux/init.h> 13#include <linux/init.h>
17#include <linux/mman.h> 14#include <linux/mman.h>
18#include <linux/mm.h> 15#include <linux/mm.h>
@@ -146,7 +143,7 @@ int __init sh64_cache_init(void)
146/* The following group of functions deal with mapping and unmapping a temporary 143/* The following group of functions deal with mapping and unmapping a temporary
147 page into the DTLB slot that have been set aside for our exclusive use. */ 144 page into the DTLB slot that have been set aside for our exclusive use. */
148/* In order to accomplish this, we use the generic interface for adding and 145/* In order to accomplish this, we use the generic interface for adding and
149 removing a wired slot entry as defined in arch/sh64/mm/tlb.c */ 146 removing a wired slot entry as defined in arch/sh/mm/tlb-sh5.c */
150/****************************************************************************/ 147/****************************************************************************/
151 148
152static unsigned long slot_own_flags; 149static unsigned long slot_own_flags;
diff --git a/arch/sh/mm/cache-sh7705.c b/arch/sh/mm/cache-sh7705.c
index 4896d7376926..22dacc778823 100644
--- a/arch/sh/mm/cache-sh7705.c
+++ b/arch/sh/mm/cache-sh7705.c
@@ -71,7 +71,7 @@ void flush_icache_range(unsigned long start, unsigned long end)
71/* 71/*
72 * Writeback&Invalidate the D-cache of the page 72 * Writeback&Invalidate the D-cache of the page
73 */ 73 */
74static void __flush_dcache_page(unsigned long phys) 74static void __uses_jump_to_uncached __flush_dcache_page(unsigned long phys)
75{ 75{
76 unsigned long ways, waysize, addrstart; 76 unsigned long ways, waysize, addrstart;
77 unsigned long flags; 77 unsigned long flags;
@@ -92,7 +92,7 @@ static void __flush_dcache_page(unsigned long phys)
92 * possible. 92 * possible.
93 */ 93 */
94 local_irq_save(flags); 94 local_irq_save(flags);
95 jump_to_P2(); 95 jump_to_uncached();
96 96
97 ways = current_cpu_data.dcache.ways; 97 ways = current_cpu_data.dcache.ways;
98 waysize = current_cpu_data.dcache.sets; 98 waysize = current_cpu_data.dcache.sets;
@@ -118,7 +118,7 @@ static void __flush_dcache_page(unsigned long phys)
118 addrstart += current_cpu_data.dcache.way_incr; 118 addrstart += current_cpu_data.dcache.way_incr;
119 } while (--ways); 119 } while (--ways);
120 120
121 back_to_P1(); 121 back_to_cached();
122 local_irq_restore(flags); 122 local_irq_restore(flags);
123} 123}
124 124
@@ -132,15 +132,15 @@ void flush_dcache_page(struct page *page)
132 __flush_dcache_page(PHYSADDR(page_address(page))); 132 __flush_dcache_page(PHYSADDR(page_address(page)));
133} 133}
134 134
135void flush_cache_all(void) 135void __uses_jump_to_uncached flush_cache_all(void)
136{ 136{
137 unsigned long flags; 137 unsigned long flags;
138 138
139 local_irq_save(flags); 139 local_irq_save(flags);
140 jump_to_P2(); 140 jump_to_uncached();
141 141
142 cache_wback_all(); 142 cache_wback_all();
143 back_to_P1(); 143 back_to_cached();
144 local_irq_restore(flags); 144 local_irq_restore(flags);
145} 145}
146 146
diff --git a/arch/sh/mm/consistent.c b/arch/sh/mm/consistent.c
index e220c29a3c00..7b2131c9eeda 100644
--- a/arch/sh/mm/consistent.c
+++ b/arch/sh/mm/consistent.c
@@ -1,7 +1,9 @@
1/* 1/*
2 * arch/sh/mm/consistent.c 2 * arch/sh/mm/consistent.c
3 * 3 *
4 * Copyright (C) 2004 Paul Mundt 4 * Copyright (C) 2004 - 2007 Paul Mundt
5 *
6 * Declared coherent memory functions based on arch/x86/kernel/pci-dma_32.c
5 * 7 *
6 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
@@ -13,58 +15,152 @@
13#include <asm/addrspace.h> 15#include <asm/addrspace.h>
14#include <asm/io.h> 16#include <asm/io.h>
15 17
16void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle) 18struct dma_coherent_mem {
19 void *virt_base;
20 u32 device_base;
21 int size;
22 int flags;
23 unsigned long *bitmap;
24};
25
26void *dma_alloc_coherent(struct device *dev, size_t size,
27 dma_addr_t *dma_handle, gfp_t gfp)
17{ 28{
18 struct page *page, *end, *free;
19 void *ret; 29 void *ret;
20 int order; 30 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
31 int order = get_order(size);
21 32
22 size = PAGE_ALIGN(size); 33 if (mem) {
23 order = get_order(size); 34 int page = bitmap_find_free_region(mem->bitmap, mem->size,
35 order);
36 if (page >= 0) {
37 *dma_handle = mem->device_base + (page << PAGE_SHIFT);
38 ret = mem->virt_base + (page << PAGE_SHIFT);
39 memset(ret, 0, size);
40 return ret;
41 }
42 if (mem->flags & DMA_MEMORY_EXCLUSIVE)
43 return NULL;
44 }
24 45
25 page = alloc_pages(gfp, order); 46 ret = (void *)__get_free_pages(gfp, order);
26 if (!page)
27 return NULL;
28 split_page(page, order);
29 47
30 ret = page_address(page); 48 if (ret != NULL) {
31 memset(ret, 0, size); 49 memset(ret, 0, size);
32 *handle = virt_to_phys(ret); 50 /*
51 * Pages from the page allocator may have data present in
52 * cache. So flush the cache before using uncached memory.
53 */
54 dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL);
55 *dma_handle = virt_to_phys(ret);
56 }
57 return ret;
58}
59EXPORT_SYMBOL(dma_alloc_coherent);
33 60
34 /* 61void dma_free_coherent(struct device *dev, size_t size,
35 * We must flush the cache before we pass it on to the device 62 void *vaddr, dma_addr_t dma_handle)
36 */ 63{
37 __flush_purge_region(ret, size); 64 struct dma_coherent_mem *mem = dev ? dev->dma_mem : NULL;
65 int order = get_order(size);
38 66
39 page = virt_to_page(ret); 67 if (mem && vaddr >= mem->virt_base && vaddr < (mem->virt_base + (mem->size << PAGE_SHIFT))) {
40 free = page + (size >> PAGE_SHIFT); 68 int page = (vaddr - mem->virt_base) >> PAGE_SHIFT;
41 end = page + (1 << order);
42 69
43 while (++page < end) { 70 bitmap_release_region(mem->bitmap, page, order);
44 /* Free any unused pages */ 71 } else {
45 if (page >= free) { 72 WARN_ON(irqs_disabled()); /* for portability */
46 __free_page(page); 73 BUG_ON(mem && mem->flags & DMA_MEMORY_EXCLUSIVE);
47 } 74 free_pages((unsigned long)vaddr, order);
48 } 75 }
76}
77EXPORT_SYMBOL(dma_free_coherent);
78
79int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
80 dma_addr_t device_addr, size_t size, int flags)
81{
82 void __iomem *mem_base = NULL;
83 int pages = size >> PAGE_SHIFT;
84 int bitmap_size = BITS_TO_LONGS(pages) * sizeof(long);
85
86 if ((flags & (DMA_MEMORY_MAP | DMA_MEMORY_IO)) == 0)
87 goto out;
88 if (!size)
89 goto out;
90 if (dev->dma_mem)
91 goto out;
92
93 /* FIXME: this routine just ignores DMA_MEMORY_INCLUDES_CHILDREN */
49 94
50 return P2SEGADDR(ret); 95 mem_base = ioremap_nocache(bus_addr, size);
96 if (!mem_base)
97 goto out;
98
99 dev->dma_mem = kmalloc(sizeof(struct dma_coherent_mem), GFP_KERNEL);
100 if (!dev->dma_mem)
101 goto out;
102 dev->dma_mem->bitmap = kzalloc(bitmap_size, GFP_KERNEL);
103 if (!dev->dma_mem->bitmap)
104 goto free1_out;
105
106 dev->dma_mem->virt_base = mem_base;
107 dev->dma_mem->device_base = device_addr;
108 dev->dma_mem->size = pages;
109 dev->dma_mem->flags = flags;
110
111 if (flags & DMA_MEMORY_MAP)
112 return DMA_MEMORY_MAP;
113
114 return DMA_MEMORY_IO;
115
116 free1_out:
117 kfree(dev->dma_mem);
118 out:
119 if (mem_base)
120 iounmap(mem_base);
121 return 0;
51} 122}
123EXPORT_SYMBOL(dma_declare_coherent_memory);
52 124
53void consistent_free(void *vaddr, size_t size) 125void dma_release_declared_memory(struct device *dev)
54{ 126{
55 unsigned long addr = P1SEGADDR((unsigned long)vaddr); 127 struct dma_coherent_mem *mem = dev->dma_mem;
56 struct page *page=virt_to_page(addr);
57 int num_pages=(size+PAGE_SIZE-1) >> PAGE_SHIFT;
58 int i;
59 128
60 for(i=0;i<num_pages;i++) { 129 if (!mem)
61 __free_page((page+i)); 130 return;
62 } 131 dev->dma_mem = NULL;
132 iounmap(mem->virt_base);
133 kfree(mem->bitmap);
134 kfree(mem);
63} 135}
136EXPORT_SYMBOL(dma_release_declared_memory);
64 137
65void consistent_sync(void *vaddr, size_t size, int direction) 138void *dma_mark_declared_memory_occupied(struct device *dev,
139 dma_addr_t device_addr, size_t size)
66{ 140{
67 void * p1addr = (void*) P1SEGADDR((unsigned long)vaddr); 141 struct dma_coherent_mem *mem = dev->dma_mem;
142 int pages = (size + (device_addr & ~PAGE_MASK) + PAGE_SIZE - 1) >> PAGE_SHIFT;
143 int pos, err;
144
145 if (!mem)
146 return ERR_PTR(-EINVAL);
147
148 pos = (device_addr - mem->device_base) >> PAGE_SHIFT;
149 err = bitmap_allocate_region(mem->bitmap, pos, get_order(pages));
150 if (err != 0)
151 return ERR_PTR(err);
152 return mem->virt_base + (pos << PAGE_SHIFT);
153}
154EXPORT_SYMBOL(dma_mark_declared_memory_occupied);
155
156void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
157 enum dma_data_direction direction)
158{
159#ifdef CONFIG_CPU_SH5
160 void *p1addr = vaddr;
161#else
162 void *p1addr = (void*) P1SEGADDR((unsigned long)vaddr);
163#endif
68 164
69 switch (direction) { 165 switch (direction) {
70 case DMA_FROM_DEVICE: /* invalidate only */ 166 case DMA_FROM_DEVICE: /* invalidate only */
@@ -80,8 +176,4 @@ void consistent_sync(void *vaddr, size_t size, int direction)
80 BUG(); 176 BUG();
81 } 177 }
82} 178}
83 179EXPORT_SYMBOL(dma_cache_sync);
84EXPORT_SYMBOL(consistent_alloc);
85EXPORT_SYMBOL(consistent_free);
86EXPORT_SYMBOL(consistent_sync);
87
diff --git a/arch/sh/mm/extable.c b/arch/sh/mm/extable_32.c
index c1cf4463d09d..c1cf4463d09d 100644
--- a/arch/sh/mm/extable.c
+++ b/arch/sh/mm/extable_32.c
diff --git a/arch/sh64/mm/extable.c b/arch/sh/mm/extable_64.c
index a2e6e0563772..f05499688d88 100644
--- a/arch/sh64/mm/extable.c
+++ b/arch/sh/mm/extable_64.c
@@ -1,14 +1,14 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mm/extable_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/extable.c
7 * 3 *
8 * Copyright (C) 2003 Richard Curnow 4 * Copyright (C) 2003 Richard Curnow
9 * Copyright (C) 2003, 2004 Paul Mundt 5 * Copyright (C) 2003, 2004 Paul Mundt
10 * 6 *
11 * Cloned from the 2.5 SH version.. 7 * Cloned from the 2.5 SH version..
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */ 12 */
13#include <linux/rwsem.h> 13#include <linux/rwsem.h>
14#include <linux/module.h> 14#include <linux/module.h>
@@ -21,13 +21,16 @@ static const struct exception_table_entry __copy_user_fixup_ex = {
21 .fixup = (unsigned long)&__copy_user_fixup, 21 .fixup = (unsigned long)&__copy_user_fixup,
22}; 22};
23 23
24/* Some functions that may trap due to a bad user-mode address have too many loads 24/*
25 and stores in them to make it at all practical to label each one and put them all in 25 * Some functions that may trap due to a bad user-mode address have too
26 the main exception table. 26 * many loads and stores in them to make it at all practical to label
27 27 * each one and put them all in the main exception table.
28 In particular, the fast memcpy routine is like this. It's fix-up is just to fall back 28 *
29 to a slow byte-at-a-time copy, which is handled the conventional way. So it's functionally 29 * In particular, the fast memcpy routine is like this. It's fix-up is
30 OK to just handle any trap occurring in the fast memcpy with that fixup. */ 30 * just to fall back to a slow byte-at-a-time copy, which is handled the
31 * conventional way. So it's functionally OK to just handle any trap
32 * occurring in the fast memcpy with that fixup.
33 */
31static const struct exception_table_entry *check_exception_ranges(unsigned long addr) 34static const struct exception_table_entry *check_exception_ranges(unsigned long addr)
32{ 35{
33 if ((addr >= (unsigned long)&copy_user_memcpy) && 36 if ((addr >= (unsigned long)&copy_user_memcpy) &&
@@ -77,4 +80,3 @@ int fixup_exception(struct pt_regs *regs)
77 80
78 return 0; 81 return 0;
79} 82}
80
diff --git a/arch/sh/mm/fault.c b/arch/sh/mm/fault_32.c
index 60d74f793a1d..33b43d20e9f6 100644
--- a/arch/sh/mm/fault.c
+++ b/arch/sh/mm/fault_32.c
@@ -172,7 +172,7 @@ no_context:
172 bust_spinlocks(1); 172 bust_spinlocks(1);
173 173
174 if (oops_may_print()) { 174 if (oops_may_print()) {
175 __typeof__(pte_val(__pte(0))) page; 175 unsigned long page;
176 176
177 if (address < PAGE_SIZE) 177 if (address < PAGE_SIZE)
178 printk(KERN_ALERT "Unable to handle kernel NULL " 178 printk(KERN_ALERT "Unable to handle kernel NULL "
diff --git a/arch/sh64/mm/tlbmiss.c b/arch/sh/mm/fault_64.c
index b767d6cff72f..399d53710d2f 100644
--- a/arch/sh64/mm/tlbmiss.c
+++ b/arch/sh/mm/fault_64.c
@@ -1,9 +1,5 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * The SH64 TLB miss.
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/tlbmiss.c
7 * 3 *
8 * Original code from fault.c 4 * Original code from fault.c
9 * Copyright (C) 2000, 2001 Paolo Alberelli 5 * Copyright (C) 2000, 2001 Paolo Alberelli
@@ -12,16 +8,20 @@
12 * Copyright (C) 2003 Richard.Curnow@superh.com 8 * Copyright (C) 2003 Richard.Curnow@superh.com
13 * 9 *
14 * IMPORTANT NOTES : 10 * IMPORTANT NOTES :
15 * The do_fast_page_fault function is called from a context in entry.S where very few registers 11 * The do_fast_page_fault function is called from a context in entry.S
16 * have been saved. In particular, the code in this file must be compiled not to use ANY 12 * where very few registers have been saved. In particular, the code in
17 * caller-save registers that are not part of the restricted save set. Also, it means that 13 * this file must be compiled not to use ANY caller-save registers that
18 * code in this file must not make calls to functions elsewhere in the kernel, or else the 14 * are not part of the restricted save set. Also, it means that code in
19 * excepting context will see corruption in its caller-save registers. Plus, the entry.S save 15 * this file must not make calls to functions elsewhere in the kernel, or
20 * area is non-reentrant, so this code has to run with SR.BL==1, i.e. no interrupts taken inside 16 * else the excepting context will see corruption in its caller-save
21 * it and panic on any exception. 17 * registers. Plus, the entry.S save area is non-reentrant, so this code
18 * has to run with SR.BL==1, i.e. no interrupts taken inside it and panic
19 * on any exception.
22 * 20 *
21 * This file is subject to the terms and conditions of the GNU General Public
22 * License. See the file "COPYING" in the main directory of this archive
23 * for more details.
23 */ 24 */
24
25#include <linux/signal.h> 25#include <linux/signal.h>
26#include <linux/sched.h> 26#include <linux/sched.h>
27#include <linux/kernel.h> 27#include <linux/kernel.h>
@@ -33,14 +33,13 @@
33#include <linux/mm.h> 33#include <linux/mm.h>
34#include <linux/smp.h> 34#include <linux/smp.h>
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36
37#include <asm/system.h> 36#include <asm/system.h>
38#include <asm/tlb.h> 37#include <asm/tlb.h>
39#include <asm/io.h> 38#include <asm/io.h>
40#include <asm/uaccess.h> 39#include <asm/uaccess.h>
41#include <asm/pgalloc.h> 40#include <asm/pgalloc.h>
42#include <asm/mmu_context.h> 41#include <asm/mmu_context.h>
43#include <asm/registers.h> /* required by inline asm statements */ 42#include <asm/cpu/registers.h>
44 43
45/* Callable from fault.c, so not static */ 44/* Callable from fault.c, so not static */
46inline void __do_tlb_refill(unsigned long address, 45inline void __do_tlb_refill(unsigned long address,
@@ -88,48 +87,47 @@ inline void __do_tlb_refill(unsigned long address,
88 87
89} 88}
90 89
91static int handle_vmalloc_fault(struct mm_struct *mm, unsigned long protection_flags, 90static int handle_vmalloc_fault(struct mm_struct *mm,
91 unsigned long protection_flags,
92 unsigned long long textaccess, 92 unsigned long long textaccess,
93 unsigned long address) 93 unsigned long address)
94{ 94{
95 pgd_t *dir; 95 pgd_t *dir;
96 pud_t *pud;
96 pmd_t *pmd; 97 pmd_t *pmd;
97 static pte_t *pte; 98 static pte_t *pte;
98 pte_t entry; 99 pte_t entry;
99 100
100 dir = pgd_offset_k(address); 101 dir = pgd_offset_k(address);
101 pmd = pmd_offset(dir, address);
102 102
103 if (pmd_none(*pmd)) { 103 pud = pud_offset(dir, address);
104 if (pud_none_or_clear_bad(pud))
104 return 0; 105 return 0;
105 }
106 106
107 if (pmd_bad(*pmd)) { 107 pmd = pmd_offset(pud, address);
108 pmd_clear(pmd); 108 if (pmd_none_or_clear_bad(pmd))
109 return 0; 109 return 0;
110 }
111 110
112 pte = pte_offset_kernel(pmd, address); 111 pte = pte_offset_kernel(pmd, address);
113 entry = *pte; 112 entry = *pte;
114 113
115 if (pte_none(entry) || !pte_present(entry)) { 114 if (pte_none(entry) || !pte_present(entry))
116 return 0; 115 return 0;
117 } 116 if ((pte_val(entry) & protection_flags) != protection_flags)
118
119 if ((pte_val(entry) & protection_flags) != protection_flags) {
120 return 0; 117 return 0;
121 }
122 118
123 __do_tlb_refill(address, textaccess, pte); 119 __do_tlb_refill(address, textaccess, pte);
124 120
125 return 1; 121 return 1;
126} 122}
127 123
128static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_flags, 124static int handle_tlbmiss(struct mm_struct *mm,
129 unsigned long long textaccess, 125 unsigned long long protection_flags,
130 unsigned long address) 126 unsigned long long textaccess,
127 unsigned long address)
131{ 128{
132 pgd_t *dir; 129 pgd_t *dir;
130 pud_t *pud;
133 pmd_t *pmd; 131 pmd_t *pmd;
134 pte_t *pte; 132 pte_t *pte;
135 pte_t entry; 133 pte_t entry;
@@ -144,49 +142,49 @@ static int handle_tlbmiss(struct mm_struct *mm, unsigned long long protection_fl
144 142
145 See how mm->pgd is allocated and initialised in pgd_alloc to see why 143 See how mm->pgd is allocated and initialised in pgd_alloc to see why
146 the next test is necessary. - RPC */ 144 the next test is necessary. - RPC */
147 if (address >= (unsigned long) TASK_SIZE) { 145 if (address >= (unsigned long) TASK_SIZE)
148 /* upper half - never has page table entries. */ 146 /* upper half - never has page table entries. */
149 return 0; 147 return 0;
150 } 148
151 dir = pgd_offset(mm, address); 149 dir = pgd_offset(mm, address);
152 if (pgd_none(*dir)) { 150 if (pgd_none(*dir) || !pgd_present(*dir))
153 return 0; 151 return 0;
154 } 152 if (!pgd_present(*dir))
155 if (!pgd_present(*dir)) {
156 return 0; 153 return 0;
157 }
158 154
159 pmd = pmd_offset(dir, address); 155 pud = pud_offset(dir, address);
160 if (pmd_none(*pmd)) { 156 if (pud_none(*pud) || !pud_present(*pud))
161 return 0; 157 return 0;
162 } 158
163 if (!pmd_present(*pmd)) { 159 pmd = pmd_offset(pud, address);
160 if (pmd_none(*pmd) || !pmd_present(*pmd))
164 return 0; 161 return 0;
165 } 162
166 pte = pte_offset_kernel(pmd, address); 163 pte = pte_offset_kernel(pmd, address);
167 entry = *pte; 164 entry = *pte;
168 if (pte_none(entry)) { 165
169 return 0; 166 if (pte_none(entry) || !pte_present(entry))
170 }
171 if (!pte_present(entry)) {
172 return 0; 167 return 0;
173 }
174 168
175 /* If the page doesn't have sufficient protection bits set to service the 169 /*
176 kind of fault being handled, there's not much point doing the TLB refill. 170 * If the page doesn't have sufficient protection bits set to
177 Punt the fault to the general handler. */ 171 * service the kind of fault being handled, there's not much
178 if ((pte_val(entry) & protection_flags) != protection_flags) { 172 * point doing the TLB refill. Punt the fault to the general
173 * handler.
174 */
175 if ((pte_val(entry) & protection_flags) != protection_flags)
179 return 0; 176 return 0;
180 }
181 177
182 __do_tlb_refill(address, textaccess, pte); 178 __do_tlb_refill(address, textaccess, pte);
183 179
184 return 1; 180 return 1;
185} 181}
186 182
187/* Put all this information into one structure so that everything is just arithmetic 183/*
188 relative to a single base address. This reduces the number of movi/shori pairs needed 184 * Put all this information into one structure so that everything is just
189 just to load addresses of static data. */ 185 * arithmetic relative to a single base address. This reduces the number
186 * of movi/shori pairs needed just to load addresses of static data.
187 */
190struct expevt_lookup { 188struct expevt_lookup {
191 unsigned short protection_flags[8]; 189 unsigned short protection_flags[8];
192 unsigned char is_text_access[8]; 190 unsigned char is_text_access[8];
@@ -216,7 +214,8 @@ static struct expevt_lookup expevt_lookup_table = {
216 general fault handling in fault.c which deals with mapping file-backed 214 general fault handling in fault.c which deals with mapping file-backed
217 pages, stack growth, segmentation faults, swapping etc etc) 215 pages, stack growth, segmentation faults, swapping etc etc)
218 */ 216 */
219asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long expevt, 217asmlinkage int do_fast_page_fault(unsigned long long ssr_md,
218 unsigned long long expevt,
220 unsigned long address) 219 unsigned long address)
221{ 220{
222 struct task_struct *tsk; 221 struct task_struct *tsk;
@@ -226,26 +225,23 @@ asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long
226 unsigned long long index; 225 unsigned long long index;
227 unsigned long long expevt4; 226 unsigned long long expevt4;
228 227
229 /* The next few lines implement a way of hashing EXPEVT into a small array index 228 /* The next few lines implement a way of hashing EXPEVT into a
230 which can be used to lookup parameters specific to the type of TLBMISS being 229 * small array index which can be used to lookup parameters
231 handled. Note: 230 * specific to the type of TLBMISS being handled.
232 ITLBMISS has EXPEVT==0xa40 231 *
233 RTLBMISS has EXPEVT==0x040 232 * Note:
234 WTLBMISS has EXPEVT==0x060 233 * ITLBMISS has EXPEVT==0xa40
235 */ 234 * RTLBMISS has EXPEVT==0x040
236 235 * WTLBMISS has EXPEVT==0x060
236 */
237 expevt4 = (expevt >> 4); 237 expevt4 = (expevt >> 4);
238 /* TODO : xor ssr_md into this expression too. Then we can check that PRU is set 238 /* TODO : xor ssr_md into this expression too. Then we can check
239 when it needs to be. */ 239 * that PRU is set when it needs to be. */
240 index = expevt4 ^ (expevt4 >> 5); 240 index = expevt4 ^ (expevt4 >> 5);
241 index &= 7; 241 index &= 7;
242 protection_flags = expevt_lookup_table.protection_flags[index]; 242 protection_flags = expevt_lookup_table.protection_flags[index];
243 textaccess = expevt_lookup_table.is_text_access[index]; 243 textaccess = expevt_lookup_table.is_text_access[index];
244 244
245#ifdef CONFIG_SH64_PROC_TLB
246 ++calls_to_do_fast_page_fault;
247#endif
248
249 /* SIM 245 /* SIM
250 * Note this is now called with interrupts still disabled 246 * Note this is now called with interrupts still disabled
251 * This is to cope with being called for a missing IO port 247 * This is to cope with being called for a missing IO port
@@ -262,18 +258,18 @@ asmlinkage int do_fast_page_fault(unsigned long long ssr_md, unsigned long long
262 258
263 if ((address >= VMALLOC_START && address < VMALLOC_END) || 259 if ((address >= VMALLOC_START && address < VMALLOC_END) ||
264 (address >= IOBASE_VADDR && address < IOBASE_END)) { 260 (address >= IOBASE_VADDR && address < IOBASE_END)) {
265 if (ssr_md) { 261 if (ssr_md)
266 /* Process-contexts can never have this address range mapped */ 262 /*
267 if (handle_vmalloc_fault(mm, protection_flags, textaccess, address)) { 263 * Process-contexts can never have this address
264 * range mapped
265 */
266 if (handle_vmalloc_fault(mm, protection_flags,
267 textaccess, address))
268 return 1; 268 return 1;
269 }
270 }
271 } else if (!in_interrupt() && mm) { 269 } else if (!in_interrupt() && mm) {
272 if (handle_tlbmiss(mm, protection_flags, textaccess, address)) { 270 if (handle_tlbmiss(mm, protection_flags, textaccess, address))
273 return 1; 271 return 1;
274 }
275 } 272 }
276 273
277 return 0; 274 return 0;
278} 275}
279
diff --git a/arch/sh/mm/init.c b/arch/sh/mm/init.c
index d5e160da64b2..2918c6b14659 100644
--- a/arch/sh/mm/init.c
+++ b/arch/sh/mm/init.c
@@ -23,9 +23,7 @@
23 23
24DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 24DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
25pgd_t swapper_pg_dir[PTRS_PER_PGD]; 25pgd_t swapper_pg_dir[PTRS_PER_PGD];
26 26unsigned long cached_to_uncached = 0;
27void (*copy_page)(void *from, void *to);
28void (*clear_page)(void *to);
29 27
30void show_mem(void) 28void show_mem(void)
31{ 29{
@@ -102,7 +100,8 @@ static void set_pte_phys(unsigned long addr, unsigned long phys, pgprot_t prot)
102 100
103 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot)); 101 set_pte(pte, pfn_pte(phys >> PAGE_SHIFT, prot));
104 102
105 flush_tlb_one(get_asid(), addr); 103 if (cached_to_uncached)
104 flush_tlb_one(get_asid(), addr);
106} 105}
107 106
108/* 107/*
@@ -131,6 +130,37 @@ void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
131 130
132 set_pte_phys(address, phys, prot); 131 set_pte_phys(address, phys, prot);
133} 132}
133
134void __init page_table_range_init(unsigned long start, unsigned long end,
135 pgd_t *pgd_base)
136{
137 pgd_t *pgd;
138 pud_t *pud;
139 pmd_t *pmd;
140 int pgd_idx;
141 unsigned long vaddr;
142
143 vaddr = start & PMD_MASK;
144 end = (end + PMD_SIZE - 1) & PMD_MASK;
145 pgd_idx = pgd_index(vaddr);
146 pgd = pgd_base + pgd_idx;
147
148 for ( ; (pgd_idx < PTRS_PER_PGD) && (vaddr != end); pgd++, pgd_idx++) {
149 BUG_ON(pgd_none(*pgd));
150 pud = pud_offset(pgd, 0);
151 BUG_ON(pud_none(*pud));
152 pmd = pmd_offset(pud, 0);
153
154 if (!pmd_present(*pmd)) {
155 pte_t *pte_table;
156 pte_table = (pte_t *)alloc_bootmem_low_pages(PAGE_SIZE);
157 memset(pte_table, 0, PAGE_SIZE);
158 pmd_populate_kernel(&init_mm, pmd, pte_table);
159 }
160
161 vaddr += PMD_SIZE;
162 }
163}
134#endif /* CONFIG_MMU */ 164#endif /* CONFIG_MMU */
135 165
136/* 166/*
@@ -150,6 +180,11 @@ void __init paging_init(void)
150 * check for a null value. */ 180 * check for a null value. */
151 set_TTB(swapper_pg_dir); 181 set_TTB(swapper_pg_dir);
152 182
183 /* Populate the relevant portions of swapper_pg_dir so that
184 * we can use the fixmap entries without calling kmalloc.
185 * pte's will be filled in by __set_fixmap(). */
186 page_table_range_init(FIXADDR_START, FIXADDR_TOP, swapper_pg_dir);
187
153 memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); 188 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
154 189
155 for_each_online_node(nid) { 190 for_each_online_node(nid) {
@@ -167,9 +202,22 @@ void __init paging_init(void)
167 } 202 }
168 203
169 free_area_init_nodes(max_zone_pfns); 204 free_area_init_nodes(max_zone_pfns);
205
206 /* Set up the uncached fixmap */
207 set_fixmap_nocache(FIX_UNCACHED, __pa(&__uncached_start));
208
209#ifdef CONFIG_29BIT
210 /*
211 * Handle trivial transitions between cached and uncached
212 * segments, making use of the 1:1 mapping relationship in
213 * 512MB lowmem.
214 */
215 cached_to_uncached = P2SEG - P1SEG;
216#endif
170} 217}
171 218
172static struct kcore_list kcore_mem, kcore_vmalloc; 219static struct kcore_list kcore_mem, kcore_vmalloc;
220int after_bootmem = 0;
173 221
174void __init mem_init(void) 222void __init mem_init(void)
175{ 223{
@@ -202,17 +250,7 @@ void __init mem_init(void)
202 memset(empty_zero_page, 0, PAGE_SIZE); 250 memset(empty_zero_page, 0, PAGE_SIZE);
203 __flush_wback_region(empty_zero_page, PAGE_SIZE); 251 __flush_wback_region(empty_zero_page, PAGE_SIZE);
204 252
205 /* 253 after_bootmem = 1;
206 * Setup wrappers for copy/clear_page(), these will get overridden
207 * later in the boot process if a better method is available.
208 */
209#ifdef CONFIG_MMU
210 copy_page = copy_page_slow;
211 clear_page = clear_page_slow;
212#else
213 copy_page = copy_page_nommu;
214 clear_page = clear_page_nommu;
215#endif
216 254
217 codesize = (unsigned long) &_etext - (unsigned long) &_text; 255 codesize = (unsigned long) &_etext - (unsigned long) &_text;
218 datasize = (unsigned long) &_edata - (unsigned long) &_etext; 256 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
diff --git a/arch/sh/mm/ioremap.c b/arch/sh/mm/ioremap_32.c
index 0c7b7e33abdc..0c7b7e33abdc 100644
--- a/arch/sh/mm/ioremap.c
+++ b/arch/sh/mm/ioremap_32.c
diff --git a/arch/sh64/mm/ioremap.c b/arch/sh/mm/ioremap_64.c
index 535304e6601f..e27d16519235 100644
--- a/arch/sh64/mm/ioremap.c
+++ b/arch/sh/mm/ioremap_64.c
@@ -1,30 +1,31 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mm/ioremap_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/ioremap.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003, 2004 Paul Mundt 5 * Copyright (C) 2003 - 2007 Paul Mundt
10 * 6 *
11 * Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly 7 * Mostly derived from arch/sh/mm/ioremap.c which, in turn is mostly
12 * derived from arch/i386/mm/ioremap.c . 8 * derived from arch/i386/mm/ioremap.c .
13 * 9 *
14 * (C) Copyright 1995 1996 Linus Torvalds 10 * (C) Copyright 1995 1996 Linus Torvalds
11 *
12 * This file is subject to the terms and conditions of the GNU General Public
13 * License. See the file "COPYING" in the main directory of this archive
14 * for more details.
15 */ 15 */
16#include <linux/kernel.h>
17#include <linux/slab.h>
18#include <linux/vmalloc.h> 16#include <linux/vmalloc.h>
19#include <linux/sched.h>
20#include <linux/string.h>
21#include <linux/io.h>
22#include <linux/ioport.h> 17#include <linux/ioport.h>
18#include <linux/module.h>
19#include <linux/mm.h>
20#include <linux/io.h>
23#include <linux/bootmem.h> 21#include <linux/bootmem.h>
24#include <linux/proc_fs.h> 22#include <linux/proc_fs.h>
25#include <linux/module.h> 23#include <asm/page.h>
26#include <asm/pgalloc.h> 24#include <asm/pgalloc.h>
25#include <asm/addrspace.h>
26#include <asm/cacheflush.h>
27#include <asm/tlbflush.h> 27#include <asm/tlbflush.h>
28#include <asm/mmu.h>
28 29
29static void shmedia_mapioaddr(unsigned long, unsigned long); 30static void shmedia_mapioaddr(unsigned long, unsigned long);
30static unsigned long shmedia_ioremap(struct resource *, u32, int); 31static unsigned long shmedia_ioremap(struct resource *, u32, int);
@@ -42,7 +43,8 @@ static unsigned long shmedia_ioremap(struct resource *, u32, int);
42 * have to convert them into an offset in a page-aligned mapping, but the 43 * have to convert them into an offset in a page-aligned mapping, but the
43 * caller shouldn't need to know that small detail. 44 * caller shouldn't need to know that small detail.
44 */ 45 */
45void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags) 46void *__ioremap(unsigned long phys_addr, unsigned long size,
47 unsigned long flags)
46{ 48{
47 void * addr; 49 void * addr;
48 struct vm_struct * area; 50 struct vm_struct * area;
@@ -83,7 +85,7 @@ void * __ioremap(unsigned long phys_addr, unsigned long size, unsigned long flag
83} 85}
84EXPORT_SYMBOL(__ioremap); 86EXPORT_SYMBOL(__ioremap);
85 87
86void iounmap(void *addr) 88void __iounmap(void *addr)
87{ 89{
88 struct vm_struct *area; 90 struct vm_struct *area;
89 91
@@ -96,7 +98,7 @@ void iounmap(void *addr)
96 98
97 kfree(area); 99 kfree(area);
98} 100}
99EXPORT_SYMBOL(iounmap); 101EXPORT_SYMBOL(__iounmap);
100 102
101static struct resource shmedia_iomap = { 103static struct resource shmedia_iomap = {
102 .name = "shmedia_iomap", 104 .name = "shmedia_iomap",
@@ -265,6 +267,7 @@ static __init_refok void *sh64_get_page(void)
265static void shmedia_mapioaddr(unsigned long pa, unsigned long va) 267static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
266{ 268{
267 pgd_t *pgdp; 269 pgd_t *pgdp;
270 pud_t *pudp;
268 pmd_t *pmdp; 271 pmd_t *pmdp;
269 pte_t *ptep, pte; 272 pte_t *ptep, pte;
270 pgprot_t prot; 273 pgprot_t prot;
@@ -274,11 +277,17 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
274 277
275 pgdp = pgd_offset_k(va); 278 pgdp = pgd_offset_k(va);
276 if (pgd_none(*pgdp) || !pgd_present(*pgdp)) { 279 if (pgd_none(*pgdp) || !pgd_present(*pgdp)) {
280 pudp = (pud_t *)sh64_get_page();
281 set_pgd(pgdp, __pgd((unsigned long)pudp | _KERNPG_TABLE));
282 }
283
284 pudp = pud_offset(pgdp, va);
285 if (pud_none(*pudp) || !pud_present(*pudp)) {
277 pmdp = (pmd_t *)sh64_get_page(); 286 pmdp = (pmd_t *)sh64_get_page();
278 set_pgd(pgdp, __pgd((unsigned long)pmdp | _KERNPG_TABLE)); 287 set_pud(pudp, __pud((unsigned long)pmdp | _KERNPG_TABLE));
279 } 288 }
280 289
281 pmdp = pmd_offset(pgdp, va); 290 pmdp = pmd_offset(pudp, va);
282 if (pmd_none(*pmdp) || !pmd_present(*pmdp) ) { 291 if (pmd_none(*pmdp) || !pmd_present(*pmdp) ) {
283 ptep = (pte_t *)sh64_get_page(); 292 ptep = (pte_t *)sh64_get_page();
284 set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE)); 293 set_pmd(pmdp, __pmd((unsigned long)ptep + _PAGE_TABLE));
@@ -302,12 +311,19 @@ static void shmedia_mapioaddr(unsigned long pa, unsigned long va)
302static void shmedia_unmapioaddr(unsigned long vaddr) 311static void shmedia_unmapioaddr(unsigned long vaddr)
303{ 312{
304 pgd_t *pgdp; 313 pgd_t *pgdp;
314 pud_t *pudp;
305 pmd_t *pmdp; 315 pmd_t *pmdp;
306 pte_t *ptep; 316 pte_t *ptep;
307 317
308 pgdp = pgd_offset_k(vaddr); 318 pgdp = pgd_offset_k(vaddr);
309 pmdp = pmd_offset(pgdp, vaddr); 319 if (pgd_none(*pgdp) || pgd_bad(*pgdp))
320 return;
321
322 pudp = pud_offset(pgdp, vaddr);
323 if (pud_none(*pudp) || pud_bad(*pudp))
324 return;
310 325
326 pmdp = pmd_offset(pudp, vaddr);
311 if (pmd_none(*pmdp) || pmd_bad(*pmdp)) 327 if (pmd_none(*pmdp) || pmd_bad(*pmdp))
312 return; 328 return;
313 329
diff --git a/arch/sh/mm/pg-nommu.c b/arch/sh/mm/pg-nommu.c
index d15221beaa16..677dd57f0877 100644
--- a/arch/sh/mm/pg-nommu.c
+++ b/arch/sh/mm/pg-nommu.c
@@ -14,12 +14,12 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <asm/page.h> 15#include <asm/page.h>
16 16
17void copy_page_nommu(void *to, void *from) 17void copy_page(void *to, void *from)
18{ 18{
19 memcpy(to, from, PAGE_SIZE); 19 memcpy(to, from, PAGE_SIZE);
20} 20}
21 21
22void clear_page_nommu(void *to) 22void clear_page(void *to)
23{ 23{
24 memset(to, 0, PAGE_SIZE); 24 memset(to, 0, PAGE_SIZE);
25} 25}
diff --git a/arch/sh/mm/pmb.c b/arch/sh/mm/pmb.c
index 1d45b82f0a63..ab81c602295f 100644
--- a/arch/sh/mm/pmb.c
+++ b/arch/sh/mm/pmb.c
@@ -27,6 +27,7 @@
27#include <asm/pgtable.h> 27#include <asm/pgtable.h>
28#include <asm/mmu.h> 28#include <asm/mmu.h>
29#include <asm/io.h> 29#include <asm/io.h>
30#include <asm/mmu_context.h>
30 31
31#define NR_PMB_ENTRIES 16 32#define NR_PMB_ENTRIES 16
32 33
@@ -162,18 +163,18 @@ repeat:
162 return 0; 163 return 0;
163} 164}
164 165
165int set_pmb_entry(struct pmb_entry *pmbe) 166int __uses_jump_to_uncached set_pmb_entry(struct pmb_entry *pmbe)
166{ 167{
167 int ret; 168 int ret;
168 169
169 jump_to_P2(); 170 jump_to_uncached();
170 ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry); 171 ret = __set_pmb_entry(pmbe->vpn, pmbe->ppn, pmbe->flags, &pmbe->entry);
171 back_to_P1(); 172 back_to_cached();
172 173
173 return ret; 174 return ret;
174} 175}
175 176
176void clear_pmb_entry(struct pmb_entry *pmbe) 177void __uses_jump_to_uncached clear_pmb_entry(struct pmb_entry *pmbe)
177{ 178{
178 unsigned int entry = pmbe->entry; 179 unsigned int entry = pmbe->entry;
179 unsigned long addr; 180 unsigned long addr;
@@ -187,7 +188,7 @@ void clear_pmb_entry(struct pmb_entry *pmbe)
187 entry >= NR_PMB_ENTRIES)) 188 entry >= NR_PMB_ENTRIES))
188 return; 189 return;
189 190
190 jump_to_P2(); 191 jump_to_uncached();
191 192
192 /* Clear V-bit */ 193 /* Clear V-bit */
193 addr = mk_pmb_addr(entry); 194 addr = mk_pmb_addr(entry);
@@ -196,7 +197,7 @@ void clear_pmb_entry(struct pmb_entry *pmbe)
196 addr = mk_pmb_data(entry); 197 addr = mk_pmb_data(entry);
197 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr); 198 ctrl_outl(ctrl_inl(addr) & ~PMB_V, addr);
198 199
199 back_to_P1(); 200 back_to_cached();
200 201
201 clear_bit(entry, &pmb_map); 202 clear_bit(entry, &pmb_map);
202} 203}
@@ -301,17 +302,17 @@ static void pmb_cache_ctor(struct kmem_cache *cachep, void *pmb)
301 pmbe->entry = PMB_NO_ENTRY; 302 pmbe->entry = PMB_NO_ENTRY;
302} 303}
303 304
304static int __init pmb_init(void) 305static int __uses_jump_to_uncached pmb_init(void)
305{ 306{
306 unsigned int nr_entries = ARRAY_SIZE(pmb_init_map); 307 unsigned int nr_entries = ARRAY_SIZE(pmb_init_map);
307 unsigned int entry; 308 unsigned int entry, i;
308 309
309 BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES)); 310 BUG_ON(unlikely(nr_entries >= NR_PMB_ENTRIES));
310 311
311 pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0, 312 pmb_cache = kmem_cache_create("pmb", sizeof(struct pmb_entry), 0,
312 SLAB_PANIC, pmb_cache_ctor); 313 SLAB_PANIC, pmb_cache_ctor);
313 314
314 jump_to_P2(); 315 jump_to_uncached();
315 316
316 /* 317 /*
317 * Ordering is important, P2 must be mapped in the PMB before we 318 * Ordering is important, P2 must be mapped in the PMB before we
@@ -329,7 +330,12 @@ static int __init pmb_init(void)
329 /* PMB.SE and UB[7] */ 330 /* PMB.SE and UB[7] */
330 ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR); 331 ctrl_outl((1 << 31) | (1 << 7), PMB_PASCR);
331 332
332 back_to_P1(); 333 /* Flush out the TLB */
334 i = ctrl_inl(MMUCR);
335 i |= MMUCR_TI;
336 ctrl_outl(i, MMUCR);
337
338 back_to_cached();
333 339
334 return 0; 340 return 0;
335} 341}
diff --git a/arch/sh/mm/tlb-nommu.c b/arch/sh/mm/tlb-nommu.c
index 1ccca7c0532e..15111bc7ddd6 100644
--- a/arch/sh/mm/tlb-nommu.c
+++ b/arch/sh/mm/tlb-nommu.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/mm.h> 11#include <linux/mm.h>
12#include <asm/pgtable.h>
12 13
13/* 14/*
14 * Nothing too terribly exciting here .. 15 * Nothing too terribly exciting here ..
@@ -49,3 +50,12 @@ void update_mmu_cache(struct vm_area_struct * vma,
49{ 50{
50 BUG(); 51 BUG();
51} 52}
53
54void __init page_table_range_init(unsigned long start, unsigned long end,
55 pgd_t *pgd_base)
56{
57}
58
59void __set_fixmap(enum fixed_addresses idx, unsigned long phys, pgprot_t prot)
60{
61}
diff --git a/arch/sh/mm/tlb-sh4.c b/arch/sh/mm/tlb-sh4.c
index 2d1dd6044307..f0c7b7397fa6 100644
--- a/arch/sh/mm/tlb-sh4.c
+++ b/arch/sh/mm/tlb-sh4.c
@@ -79,7 +79,8 @@ void update_mmu_cache(struct vm_area_struct * vma,
79 local_irq_restore(flags); 79 local_irq_restore(flags);
80} 80}
81 81
82void local_flush_tlb_one(unsigned long asid, unsigned long page) 82void __uses_jump_to_uncached local_flush_tlb_one(unsigned long asid,
83 unsigned long page)
83{ 84{
84 unsigned long addr, data; 85 unsigned long addr, data;
85 86
@@ -91,7 +92,7 @@ void local_flush_tlb_one(unsigned long asid, unsigned long page)
91 */ 92 */
92 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT; 93 addr = MMU_UTLB_ADDRESS_ARRAY | MMU_PAGE_ASSOC_BIT;
93 data = page | asid; /* VALID bit is off */ 94 data = page | asid; /* VALID bit is off */
94 jump_to_P2(); 95 jump_to_uncached();
95 ctrl_outl(data, addr); 96 ctrl_outl(data, addr);
96 back_to_P1(); 97 back_to_cached();
97} 98}
diff --git a/arch/sh64/mm/tlb.c b/arch/sh/mm/tlb-sh5.c
index d517e7d70340..f34274a1ded3 100644
--- a/arch/sh64/mm/tlb.c
+++ b/arch/sh/mm/tlb-sh5.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * arch/sh64/mm/tlb.c 2 * arch/sh/mm/tlb-sh5.c
3 * 3 *
4 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org> 4 * Copyright (C) 2003 Paul Mundt <lethal@linux-sh.org>
5 * Copyright (C) 2003 Richard Curnow <richard.curnow@superh.com> 5 * Copyright (C) 2003 Richard Curnow <richard.curnow@superh.com>
@@ -7,7 +7,6 @@
7 * This file is subject to the terms and conditions of the GNU General Public 7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 9 * for more details.
10 *
11 */ 10 */
12#include <linux/mm.h> 11#include <linux/mm.h>
13#include <linux/init.h> 12#include <linux/init.h>
@@ -163,4 +162,3 @@ inline void sh64_setup_tlb_slot(unsigned long long config_addr,
163 */ 162 */
164inline void sh64_teardown_tlb_slot(unsigned long long config_addr) 163inline void sh64_teardown_tlb_slot(unsigned long long config_addr)
165 __attribute__ ((alias("__flush_tlb_slot"))); 164 __attribute__ ((alias("__flush_tlb_slot")));
166
diff --git a/arch/sh/mm/tlb-flush.c b/arch/sh/mm/tlbflush_32.c
index 6f45c1f8a7fe..6f45c1f8a7fe 100644
--- a/arch/sh/mm/tlb-flush.c
+++ b/arch/sh/mm/tlbflush_32.c
diff --git a/arch/sh64/mm/fault.c b/arch/sh/mm/tlbflush_64.c
index 7c79a1ba8059..2a98c9ec88ff 100644
--- a/arch/sh64/mm/fault.c
+++ b/arch/sh/mm/tlbflush_64.c
@@ -1,16 +1,14 @@
1/* 1/*
2 * This file is subject to the terms and conditions of the GNU General Public 2 * arch/sh/mm/tlb-flush_64.c
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/fault.c
7 * 3 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli 4 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes) 5 * Copyright (C) 2003 Richard Curnow (/proc/tlb, bug fixes)
10 * Copyright (C) 2003 Paul Mundt 6 * Copyright (C) 2003 Paul Mundt
11 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
12 */ 11 */
13
14#include <linux/signal.h> 12#include <linux/signal.h>
15#include <linux/rwsem.h> 13#include <linux/rwsem.h>
16#include <linux/sched.h> 14#include <linux/sched.h>
@@ -23,39 +21,12 @@
23#include <linux/mm.h> 21#include <linux/mm.h>
24#include <linux/smp.h> 22#include <linux/smp.h>
25#include <linux/interrupt.h> 23#include <linux/interrupt.h>
26
27#include <asm/system.h> 24#include <asm/system.h>
28#include <asm/io.h> 25#include <asm/io.h>
29#include <asm/tlb.h> 26#include <asm/tlb.h>
30#include <asm/uaccess.h> 27#include <asm/uaccess.h>
31#include <asm/pgalloc.h> 28#include <asm/pgalloc.h>
32#include <asm/mmu_context.h> 29#include <asm/mmu_context.h>
33#include <asm/registers.h> /* required by inline asm statements */
34
35#if defined(CONFIG_SH64_PROC_TLB)
36#include <linux/init.h>
37#include <linux/proc_fs.h>
38/* Count numbers of tlb refills in each region */
39static unsigned long long calls_to_update_mmu_cache = 0ULL;
40static unsigned long long calls_to_flush_tlb_page = 0ULL;
41static unsigned long long calls_to_flush_tlb_range = 0ULL;
42static unsigned long long calls_to_flush_tlb_mm = 0ULL;
43static unsigned long long calls_to_flush_tlb_all = 0ULL;
44unsigned long long calls_to_do_slow_page_fault = 0ULL;
45unsigned long long calls_to_do_fast_page_fault = 0ULL;
46
47/* Count size of ranges for flush_tlb_range */
48static unsigned long long flush_tlb_range_1 = 0ULL;
49static unsigned long long flush_tlb_range_2 = 0ULL;
50static unsigned long long flush_tlb_range_3_4 = 0ULL;
51static unsigned long long flush_tlb_range_5_7 = 0ULL;
52static unsigned long long flush_tlb_range_8_11 = 0ULL;
53static unsigned long long flush_tlb_range_12_15 = 0ULL;
54static unsigned long long flush_tlb_range_16_up = 0ULL;
55
56static unsigned long long page_not_present = 0ULL;
57
58#endif
59 30
60extern void die(const char *,struct pt_regs *,long); 31extern void die(const char *,struct pt_regs *,long);
61 32
@@ -87,29 +58,27 @@ static inline void print_task(struct task_struct *tsk)
87static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address) 58static pte_t *lookup_pte(struct mm_struct *mm, unsigned long address)
88{ 59{
89 pgd_t *dir; 60 pgd_t *dir;
61 pud_t *pud;
90 pmd_t *pmd; 62 pmd_t *pmd;
91 pte_t *pte; 63 pte_t *pte;
92 pte_t entry; 64 pte_t entry;
93 65
94 dir = pgd_offset(mm, address); 66 dir = pgd_offset(mm, address);
95 if (pgd_none(*dir)) { 67 if (pgd_none(*dir))
96 return NULL; 68 return NULL;
97 }
98 69
99 pmd = pmd_offset(dir, address); 70 pud = pud_offset(dir, address);
100 if (pmd_none(*pmd)) { 71 if (pud_none(*pud))
72 return NULL;
73
74 pmd = pmd_offset(pud, address);
75 if (pmd_none(*pmd))
101 return NULL; 76 return NULL;
102 }
103 77
104 pte = pte_offset_kernel(pmd, address); 78 pte = pte_offset_kernel(pmd, address);
105 entry = *pte; 79 entry = *pte;
106 80 if (pte_none(entry) || !pte_present(entry))
107 if (pte_none(entry)) {
108 return NULL; 81 return NULL;
109 }
110 if (!pte_present(entry)) {
111 return NULL;
112 }
113 82
114 return pte; 83 return pte;
115} 84}
@@ -129,10 +98,6 @@ asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long writeaccess,
129 pte_t *pte; 98 pte_t *pte;
130 int fault; 99 int fault;
131 100
132#if defined(CONFIG_SH64_PROC_TLB)
133 ++calls_to_do_slow_page_fault;
134#endif
135
136 /* SIM 101 /* SIM
137 * Note this is now called with interrupts still disabled 102 * Note this is now called with interrupts still disabled
138 * This is to cope with being called for a missing IO port 103 * This is to cope with being called for a missing IO port
@@ -355,16 +320,9 @@ do_sigbus:
355 goto no_context; 320 goto no_context;
356} 321}
357 322
358
359void flush_tlb_all(void);
360
361void update_mmu_cache(struct vm_area_struct * vma, 323void update_mmu_cache(struct vm_area_struct * vma,
362 unsigned long address, pte_t pte) 324 unsigned long address, pte_t pte)
363{ 325{
364#if defined(CONFIG_SH64_PROC_TLB)
365 ++calls_to_update_mmu_cache;
366#endif
367
368 /* 326 /*
369 * This appears to get called once for every pte entry that gets 327 * This appears to get called once for every pte entry that gets
370 * established => I don't think it's efficient to try refilling the 328 * established => I don't think it's efficient to try refilling the
@@ -378,40 +336,29 @@ void update_mmu_cache(struct vm_area_struct * vma,
378 */ 336 */
379} 337}
380 338
381static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 339void local_flush_tlb_one(unsigned long asid, unsigned long page)
382{ 340{
383 unsigned long long match, pteh=0, lpage; 341 unsigned long long match, pteh=0, lpage;
384 unsigned long tlb; 342 unsigned long tlb;
385 struct mm_struct *mm;
386
387 mm = vma->vm_mm;
388
389 if (mm->context == NO_CONTEXT)
390 return;
391 343
392 /* 344 /*
393 * Sign-extend based on neff. 345 * Sign-extend based on neff.
394 */ 346 */
395 lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page; 347 lpage = (page & NEFF_SIGN) ? (page | NEFF_MASK) : page;
396 match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; 348 match = (asid << PTEH_ASID_SHIFT) | PTEH_VALID;
397 match |= lpage; 349 match |= lpage;
398 350
399 /* Do ITLB : don't bother for pages in non-exectutable VMAs */ 351 for_each_itlb_entry(tlb) {
400 if (vma->vm_flags & VM_EXEC) { 352 asm volatile ("getcfg %1, 0, %0"
401 for_each_itlb_entry(tlb) { 353 : "=r" (pteh)
402 asm volatile ("getcfg %1, 0, %0" 354 : "r" (tlb) );
403 : "=r" (pteh)
404 : "r" (tlb) );
405
406 if (pteh == match) {
407 __flush_tlb_slot(tlb);
408 break;
409 }
410 355
356 if (pteh == match) {
357 __flush_tlb_slot(tlb);
358 break;
411 } 359 }
412 } 360 }
413 361
414 /* Do DTLB : any page could potentially be in here. */
415 for_each_dtlb_entry(tlb) { 362 for_each_dtlb_entry(tlb) {
416 asm volatile ("getcfg %1, 0, %0" 363 asm volatile ("getcfg %1, 0, %0"
417 : "=r" (pteh) 364 : "=r" (pteh)
@@ -425,52 +372,29 @@ static void __flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
425 } 372 }
426} 373}
427 374
428void flush_tlb_page(struct vm_area_struct *vma, unsigned long page) 375void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
429{ 376{
430 unsigned long flags; 377 unsigned long flags;
431 378
432#if defined(CONFIG_SH64_PROC_TLB)
433 ++calls_to_flush_tlb_page;
434#endif
435
436 if (vma->vm_mm) { 379 if (vma->vm_mm) {
437 page &= PAGE_MASK; 380 page &= PAGE_MASK;
438 local_irq_save(flags); 381 local_irq_save(flags);
439 __flush_tlb_page(vma, page); 382 local_flush_tlb_one(get_asid(), page);
440 local_irq_restore(flags); 383 local_irq_restore(flags);
441 } 384 }
442} 385}
443 386
444void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, 387void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
445 unsigned long end) 388 unsigned long end)
446{ 389{
447 unsigned long flags; 390 unsigned long flags;
448 unsigned long long match, pteh=0, pteh_epn, pteh_low; 391 unsigned long long match, pteh=0, pteh_epn, pteh_low;
449 unsigned long tlb; 392 unsigned long tlb;
393 unsigned int cpu = smp_processor_id();
450 struct mm_struct *mm; 394 struct mm_struct *mm;
451 395
452 mm = vma->vm_mm; 396 mm = vma->vm_mm;
453 397 if (cpu_context(cpu, mm) == NO_CONTEXT)
454#if defined(CONFIG_SH64_PROC_TLB)
455 ++calls_to_flush_tlb_range;
456
457 {
458 unsigned long size = (end - 1) - start;
459 size >>= 12; /* divide by PAGE_SIZE */
460 size++; /* end=start+4096 => 1 page */
461 switch (size) {
462 case 1 : flush_tlb_range_1++; break;
463 case 2 : flush_tlb_range_2++; break;
464 case 3 ... 4 : flush_tlb_range_3_4++; break;
465 case 5 ... 7 : flush_tlb_range_5_7++; break;
466 case 8 ... 11 : flush_tlb_range_8_11++; break;
467 case 12 ... 15 : flush_tlb_range_12_15++; break;
468 default : flush_tlb_range_16_up++; break;
469 }
470 }
471#endif
472
473 if (mm->context == NO_CONTEXT)
474 return; 398 return;
475 399
476 local_irq_save(flags); 400 local_irq_save(flags);
@@ -478,7 +402,7 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
478 start &= PAGE_MASK; 402 start &= PAGE_MASK;
479 end &= PAGE_MASK; 403 end &= PAGE_MASK;
480 404
481 match = ((mm->context & MMU_CONTEXT_ASID_MASK) << PTEH_ASID_SHIFT) | PTEH_VALID; 405 match = (cpu_asid(cpu, mm) << PTEH_ASID_SHIFT) | PTEH_VALID;
482 406
483 /* Flush ITLB */ 407 /* Flush ITLB */
484 for_each_itlb_entry(tlb) { 408 for_each_itlb_entry(tlb) {
@@ -509,94 +433,43 @@ void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
509 local_irq_restore(flags); 433 local_irq_restore(flags);
510} 434}
511 435
512void flush_tlb_mm(struct mm_struct *mm) 436void local_flush_tlb_mm(struct mm_struct *mm)
513{ 437{
514 unsigned long flags; 438 unsigned long flags;
439 unsigned int cpu = smp_processor_id();
515 440
516#if defined(CONFIG_SH64_PROC_TLB) 441 if (cpu_context(cpu, mm) == NO_CONTEXT)
517 ++calls_to_flush_tlb_mm;
518#endif
519
520 if (mm->context == NO_CONTEXT)
521 return; 442 return;
522 443
523 local_irq_save(flags); 444 local_irq_save(flags);
524 445
525 mm->context=NO_CONTEXT; 446 cpu_context(cpu, mm) = NO_CONTEXT;
526 if(mm==current->mm) 447 if (mm == current->mm)
527 activate_context(mm); 448 activate_context(mm, cpu);
528 449
529 local_irq_restore(flags); 450 local_irq_restore(flags);
530
531} 451}
532 452
533void flush_tlb_all(void) 453void local_flush_tlb_all(void)
534{ 454{
535 /* Invalidate all, including shared pages, excluding fixed TLBs */ 455 /* Invalidate all, including shared pages, excluding fixed TLBs */
536
537 unsigned long flags, tlb; 456 unsigned long flags, tlb;
538 457
539#if defined(CONFIG_SH64_PROC_TLB)
540 ++calls_to_flush_tlb_all;
541#endif
542
543 local_irq_save(flags); 458 local_irq_save(flags);
544 459
545 /* Flush each ITLB entry */ 460 /* Flush each ITLB entry */
546 for_each_itlb_entry(tlb) { 461 for_each_itlb_entry(tlb)
547 __flush_tlb_slot(tlb); 462 __flush_tlb_slot(tlb);
548 }
549 463
550 /* Flush each DTLB entry */ 464 /* Flush each DTLB entry */
551 for_each_dtlb_entry(tlb) { 465 for_each_dtlb_entry(tlb)
552 __flush_tlb_slot(tlb); 466 __flush_tlb_slot(tlb);
553 }
554 467
555 local_irq_restore(flags); 468 local_irq_restore(flags);
556} 469}
557 470
558void flush_tlb_kernel_range(unsigned long start, unsigned long end) 471void local_flush_tlb_kernel_range(unsigned long start, unsigned long end)
559{ 472{
560 /* FIXME: Optimize this later.. */ 473 /* FIXME: Optimize this later.. */
561 flush_tlb_all(); 474 flush_tlb_all();
562} 475}
563
564#if defined(CONFIG_SH64_PROC_TLB)
565/* Procfs interface to read the performance information */
566
567static int
568tlb_proc_info(char *buf, char **start, off_t fpos, int length, int *eof, void *data)
569{
570 int len=0;
571 len += sprintf(buf+len, "do_fast_page_fault called %12lld times\n", calls_to_do_fast_page_fault);
572 len += sprintf(buf+len, "do_slow_page_fault called %12lld times\n", calls_to_do_slow_page_fault);
573 len += sprintf(buf+len, "update_mmu_cache called %12lld times\n", calls_to_update_mmu_cache);
574 len += sprintf(buf+len, "flush_tlb_page called %12lld times\n", calls_to_flush_tlb_page);
575 len += sprintf(buf+len, "flush_tlb_range called %12lld times\n", calls_to_flush_tlb_range);
576 len += sprintf(buf+len, "flush_tlb_mm called %12lld times\n", calls_to_flush_tlb_mm);
577 len += sprintf(buf+len, "flush_tlb_all called %12lld times\n", calls_to_flush_tlb_all);
578 len += sprintf(buf+len, "flush_tlb_range_sizes\n"
579 " 1 : %12lld\n"
580 " 2 : %12lld\n"
581 " 3 - 4 : %12lld\n"
582 " 5 - 7 : %12lld\n"
583 " 8 - 11 : %12lld\n"
584 "12 - 15 : %12lld\n"
585 "16+ : %12lld\n",
586 flush_tlb_range_1, flush_tlb_range_2, flush_tlb_range_3_4,
587 flush_tlb_range_5_7, flush_tlb_range_8_11, flush_tlb_range_12_15,
588 flush_tlb_range_16_up);
589 len += sprintf(buf+len, "page not present %12lld times\n", page_not_present);
590 *eof = 1;
591 return len;
592}
593
594static int __init register_proc_tlb(void)
595{
596 create_proc_read_entry("tlb", 0, NULL, tlb_proc_info, NULL);
597 return 0;
598}
599
600__initcall(register_proc_tlb);
601
602#endif
diff --git a/arch/sh/tools/mach-types b/arch/sh/tools/mach-types
index ff071693325c..25810670a0fa 100644
--- a/arch/sh/tools/mach-types
+++ b/arch/sh/tools/mach-types
@@ -29,7 +29,6 @@ HP6XX SH_HP6XX
29DREAMCAST SH_DREAMCAST 29DREAMCAST SH_DREAMCAST
30MPC1211 SH_MPC1211 30MPC1211 SH_MPC1211
31SNAPGEAR SH_SECUREEDGE5410 31SNAPGEAR SH_SECUREEDGE5410
32HS7751RVOIP SH_HS7751RVOIP
33EDOSK7705 SH_EDOSK7705 32EDOSK7705 SH_EDOSK7705
34SH4202_MICRODEV SH_SH4202_MICRODEV 33SH4202_MICRODEV SH_SH4202_MICRODEV
35SH03 SH_SH03 34SH03 SH_SH03
@@ -45,3 +44,4 @@ X3PROTO SH_X3PROTO
45MAGICPANELR2 SH_MAGIC_PANEL_R2 44MAGICPANELR2 SH_MAGIC_PANEL_R2
46R2D_PLUS RTS7751R2D_PLUS 45R2D_PLUS RTS7751R2D_PLUS
47R2D_1 RTS7751R2D_1 46R2D_1 RTS7751R2D_1
47CAYMAN SH_CAYMAN
diff --git a/arch/sh64/Kconfig b/arch/sh64/Kconfig
deleted file mode 100644
index 6884d5a518ad..000000000000
--- a/arch/sh64/Kconfig
+++ /dev/null
@@ -1,295 +0,0 @@
1#
2# For a description of the syntax of this configuration file,
3# see Documentation/kbuild/kconfig-language.txt.
4#
5
6mainmenu "Linux/SH64 Kernel Configuration"
7
8config SUPERH
9 bool
10 default y
11
12config SUPERH64
13 bool
14 default y
15
16config MMU
17 bool
18 default y
19
20config QUICKLIST
21 def_bool y
22
23config RWSEM_GENERIC_SPINLOCK
24 bool
25 default y
26
27config GENERIC_FIND_NEXT_BIT
28 bool
29 default y
30
31config GENERIC_HWEIGHT
32 bool
33 default y
34
35config GENERIC_CALIBRATE_DELAY
36 bool
37 default y
38
39config GENERIC_HARDIRQS
40 bool
41 default y
42
43config GENERIC_IRQ_PROBE
44 bool
45 default y
46
47config RWSEM_XCHGADD_ALGORITHM
48 bool
49
50config ARCH_HAS_ILOG2_U32
51 bool
52 default n
53
54config ARCH_HAS_ILOG2_U64
55 bool
56 default n
57
58config ARCH_NO_VIRT_TO_BUS
59 def_bool y
60
61source init/Kconfig
62
63menu "System type"
64
65choice
66 prompt "SuperH system type"
67 default SH_SIMULATOR
68
69config SH_SIMULATOR
70 bool "Simulator"
71
72config SH_CAYMAN
73 bool "Cayman"
74
75config SH_HARP
76 bool "ST50-Harp"
77
78endchoice
79
80choice
81 prompt "Processor family"
82 default CPU_SH5
83
84config CPU_SH5
85 bool "SH-5"
86
87endchoice
88
89choice
90 prompt "Processor type"
91
92config CPU_SUBTYPE_SH5_101
93 bool "SH5-101"
94 depends on CPU_SH5
95
96config CPU_SUBTYPE_SH5_103
97 bool "SH5-103"
98 depends on CPU_SH5
99
100endchoice
101
102choice
103 prompt "Endianness"
104 default LITTLE_ENDIAN
105
106config LITTLE_ENDIAN
107 bool "Little-Endian"
108
109config BIG_ENDIAN
110 bool "Big-Endian"
111
112endchoice
113
114config SH_FPU
115 bool "FPU support"
116 default y
117
118config SH64_FPU_DENORM_FLUSH
119 depends on SH_FPU
120 bool "Flush floating point denorms to zero"
121
122choice
123 prompt "Page table levels"
124 default SH64_PGTABLE_2_LEVEL
125
126config SH64_PGTABLE_2_LEVEL
127 bool "2"
128
129config SH64_PGTABLE_3_LEVEL
130 bool "3"
131
132endchoice
133
134choice
135 prompt "HugeTLB page size"
136 depends on HUGETLB_PAGE && MMU
137 default HUGETLB_PAGE_SIZE_64K
138
139config HUGETLB_PAGE_SIZE_64K
140 bool "64K"
141
142config HUGETLB_PAGE_SIZE_1MB
143 bool "1MB"
144
145config HUGETLB_PAGE_SIZE_512MB
146 bool "512MB"
147
148endchoice
149
150config SH64_USER_MISALIGNED_FIXUP
151 bool "Fixup misaligned loads/stores occurring in user mode"
152
153comment "Memory options"
154
155config CACHED_MEMORY_OFFSET
156 hex "Cached Area Offset"
157 default "20000000"
158
159config MEMORY_START
160 hex "Physical memory start address"
161 default "80000000"
162
163config MEMORY_SIZE_IN_MB
164 int "Memory size (in MB)"
165 default "8" if SH_SIMULATOR
166 default "64"
167
168comment "Cache options"
169
170choice
171 prompt "DCache mode"
172 default DCACHE_DISABLED if SH_SIMULATOR
173 default DCACHE_WRITE_BACK
174
175config DCACHE_WRITE_BACK
176 bool "Write-back"
177 depends on !SH_SIMULATOR
178
179config DCACHE_WRITE_THROUGH
180 bool "Write-through"
181 depends on !SH_SIMULATOR
182
183config DCACHE_DISABLED
184 bool "Disabled"
185
186endchoice
187
188config ICACHE_DISABLED
189 bool "ICache Disabling"
190
191config PCIDEVICE_MEMORY_START
192 hex
193 default "C0000000"
194
195config DEVICE_MEMORY_START
196 hex
197 default "E0000000"
198
199config FLASH_MEMORY_START
200 hex "Flash memory/on-chip devices start address"
201 default "00000000"
202
203config PCI_BLOCK_START
204 hex "PCI block start address"
205 default "40000000"
206
207comment "CPU Subtype specific options"
208
209config SH64_ID2815_WORKAROUND
210 bool "Include workaround for SH5-101 cut2 silicon defect ID2815"
211
212comment "Misc options"
213
214config HEARTBEAT
215 bool "Heartbeat LED"
216 depends on SH_CAYMAN
217
218config HDSP253_LED
219 bool "Support for HDSP-253 LED"
220 depends on SH_CAYMAN
221
222config SH_DMA
223 tristate "DMA controller (DMAC) support"
224
225config PREEMPT
226 bool "Preemptible Kernel (EXPERIMENTAL)"
227 depends on EXPERIMENTAL
228
229source "mm/Kconfig"
230
231endmenu
232
233menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
234
235config ISA
236 bool
237
238config SBUS
239 bool
240
241config PCI
242 bool "PCI support"
243 depends on SH_CAYMAN
244 help
245 Find out whether you have a PCI motherboard. PCI is the name of a
246 bus system, i.e. the way the CPU talks to the other stuff inside
247 your box. Other bus systems are ISA, EISA, MicroChannel (MCA) or
248 VESA. If you have PCI, say Y, otherwise N.
249
250 The PCI-HOWTO, available from
251 <http://www.tldp.org/docs.html#howto>, contains valuable
252 information about which PCI hardware does work under Linux and which
253 doesn't.
254
255config SH_PCIDMA_NONCOHERENT
256 bool "Cache and PCI noncoherent"
257 depends on PCI
258 default y
259 help
260 Enable this option if your platform does not have a CPU cache which
261 remains coherent with PCI DMA. It is safest to say 'Y', although you
262 will see better performance if you can say 'N', because the PCI DMA
263 code will not have to flush the CPU's caches. If you have a PCI host
264 bridge integrated with your SH CPU, refer carefully to the chip specs
265 to see if you can say 'N' here. Otherwise, leave it as 'Y'.
266
267source "drivers/pci/Kconfig"
268
269source "drivers/pcmcia/Kconfig"
270
271source "drivers/pci/hotplug/Kconfig"
272
273endmenu
274
275menu "Executable file formats"
276
277source "fs/Kconfig.binfmt"
278
279endmenu
280
281source "net/Kconfig"
282
283source "drivers/Kconfig"
284
285source "fs/Kconfig"
286
287source "kernel/Kconfig.instrumentation"
288
289source "arch/sh64/Kconfig.debug"
290
291source "security/Kconfig"
292
293source "crypto/Kconfig"
294
295source "lib/Kconfig"
diff --git a/arch/sh64/Kconfig.debug b/arch/sh64/Kconfig.debug
deleted file mode 100644
index 05c07c4e4ed6..000000000000
--- a/arch/sh64/Kconfig.debug
+++ /dev/null
@@ -1,33 +0,0 @@
1menu "Kernel hacking"
2
3source "lib/Kconfig.debug"
4
5config EARLY_PRINTK
6 bool "Early SCIF console support"
7
8config SH64_PROC_TLB
9 bool "Debug: report TLB fill/purge activity through /proc/tlb"
10 depends on PROC_FS
11
12config SH64_PROC_ASIDS
13 bool "Debug: report ASIDs through /proc/asids"
14 depends on PROC_FS
15
16config SH64_SR_WATCH
17 bool "Debug: set SR.WATCH to enable hardware watchpoints and trace"
18
19config POOR_MANS_STRACE
20 bool "Debug: enable rudimentary strace facility"
21 help
22 This option allows system calls to be traced to the console. It also
23 aids in detecting kernel stack underflow. It is useful for debugging
24 early-userland problems (e.g. init incurring fatal exceptions.)
25
26config SH_ALPHANUMERIC
27 bool "Enable debug outputs to on-board alphanumeric display"
28 depends on SH_CAYMAN
29
30config SH_NO_BSS_INIT
31 bool "Avoid zeroing BSS (to speed-up startup on suitable platforms)"
32
33endmenu
diff --git a/arch/sh64/Makefile b/arch/sh64/Makefile
deleted file mode 100644
index 8dac7e1a2be6..000000000000
--- a/arch/sh64/Makefile
+++ /dev/null
@@ -1,111 +0,0 @@
1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 2000, 2001 Paolo Alberelli
7# Copyright (C) 2003, 2004 Paul Mundt
8#
9# This file is included by the global makefile so that you can add your own
10# architecture-specific flags and dependencies. Remember to do have actions
11# for "archclean" and "archdep" for cleaning up and making dependencies for
12# this architecture
13#
14
15cpu-y := -mb
16cpu-$(CONFIG_LITTLE_ENDIAN) := -ml
17
18cpu-$(CONFIG_CPU_SH5) += -m5-32media-nofpu
19
20ifdef CONFIG_LITTLE_ENDIAN
21LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64'
22LDFLAGS += -EL -mshlelf32_linux
23else
24LDFLAGS_vmlinux += --defsym 'jiffies=jiffies_64+4'
25LDFLAGS += -EB -mshelf32_linux
26endif
27
28# No requirements for endianess support from AFLAGS, 'as' always run through gcc
29KBUILD_CFLAGS += $(cpu-y)
30
31LDFLAGS_vmlinux += --defsym phys_stext=_stext-$(CONFIG_CACHED_MEMORY_OFFSET) \
32 --defsym phys_stext_shmedia=phys_stext+1 \
33 -e phys_stext_shmedia
34
35OBJCOPYFLAGS := -O binary -R .note -R .comment -R .stab -R .stabstr -S
36
37#
38# arch/sh64/defconfig never had any hope of being
39# frequently updated, so use one that does
40#
41KBUILD_DEFCONFIG := cayman_defconfig
42
43KBUILD_IMAGE := arch/$(ARCH)/boot/zImage
44
45ifdef LOADADDR
46LINKFLAGS += -Ttext $(word 1,$(LOADADDR))
47endif
48
49machine-$(CONFIG_SH_CAYMAN) := cayman
50machine-$(CONFIG_SH_SIMULATOR) := sim
51machine-$(CONFIG_SH_HARP) := harp
52
53head-y := arch/$(ARCH)/kernel/head.o arch/$(ARCH)/kernel/init_task.o
54
55core-y += arch/sh64/kernel/ arch/sh64/mm/
56
57ifneq ($(machine-y),)
58core-y += arch/sh64/mach-$(machine-y)/
59endif
60
61LIBGCC := $(shell $(CC) $(KBUILD_CFLAGS) -print-libgcc-file-name)
62libs-y += arch/$(ARCH)/lib/ $(LIBGCC)
63
64drivers-$(CONFIG_OPROFILE) += arch/sh64/oprofile/
65
66boot := arch/$(ARCH)/boot
67
68zImage: vmlinux
69 $(Q)$(MAKE) $(build)=$(boot) $(boot)/$@
70
71compressed: zImage
72
73archclean:
74 $(Q)$(MAKE) $(clean)=$(boot)
75
76archprepare: arch/$(ARCH)/lib/syscalltab.h
77
78define filechk_gen-syscalltab
79 (set -e; \
80 echo "/*"; \
81 echo " * DO NOT MODIFY."; \
82 echo " *"; \
83 echo " * This file was generated by arch/$(ARCH)/Makefile"; \
84 echo " * Any changes will be reverted at build time."; \
85 echo " */"; \
86 echo ""; \
87 echo "#ifndef __SYSCALLTAB_H"; \
88 echo "#define __SYSCALLTAB_H"; \
89 echo ""; \
90 echo "#include <linux/kernel.h>"; \
91 echo ""; \
92 echo "struct syscall_info {"; \
93 echo " const char *name;"; \
94 echo "} syscall_info_table[] = {"; \
95 sed -e '/^.*\.long /!d;s// { "/;s/\(\([^/]*\)\/\)\{1\}.*/\2/; \
96 s/[ \t]*$$//g;s/$$/" },/;s/\("\)sys_/\1/g'; \
97 echo "};"; \
98 echo ""; \
99 echo "#define NUM_SYSCALL_INFO_ENTRIES ARRAY_SIZE(syscall_info_table)"; \
100 echo ""; \
101 echo "#endif /* __SYSCALLTAB_H */" )
102endef
103
104arch/$(ARCH)/lib/syscalltab.h: arch/sh64/kernel/syscalls.S
105 $(call filechk,gen-syscalltab)
106
107CLEAN_FILES += arch/$(ARCH)/lib/syscalltab.h
108
109define archhelp
110 @echo '* zImage - Compressed kernel image'
111endef
diff --git a/arch/sh64/boot/Makefile b/arch/sh64/boot/Makefile
deleted file mode 100644
index fb71087b7b8a..000000000000
--- a/arch/sh64/boot/Makefile
+++ /dev/null
@@ -1,20 +0,0 @@
1#
2# arch/sh64/boot/Makefile
3#
4# This file is subject to the terms and conditions of the GNU General Public
5# License. See the file "COPYING" in the main directory of this archive
6# for more details.
7#
8# Copyright (C) 2002 Stuart Menefy
9#
10
11targets := zImage
12subdir- := compressed
13
14$(obj)/zImage: $(obj)/compressed/vmlinux FORCE
15 $(call if_changed,objcopy)
16 @echo 'Kernel: $@ is ready'
17
18$(obj)/compressed/vmlinux: FORCE
19 $(Q)$(MAKE) $(build)=$(obj)/compressed $@
20
diff --git a/arch/sh64/boot/compressed/cache.c b/arch/sh64/boot/compressed/cache.c
deleted file mode 100644
index 708707355ffa..000000000000
--- a/arch/sh64/boot/compressed/cache.c
+++ /dev/null
@@ -1,39 +0,0 @@
1/*
2 * arch/shmedia/boot/compressed/cache.c -- simple cache management functions
3 *
4 * Code extracted from sh-ipl+g, sh-stub.c, which has the copyright:
5 *
6 * This is originally based on an m68k software stub written by Glenn
7 * Engel at HP, but has changed quite a bit.
8 *
9 * Modifications for the SH by Ben Lee and Steve Chamberlain
10 *
11****************************************************************************
12
13 THIS SOFTWARE IS NOT COPYRIGHTED
14
15 HP offers the following for use in the public domain. HP makes no
16 warranty with regard to the software or it's performance and the
17 user accepts the software "AS IS" with all faults.
18
19 HP DISCLAIMS ANY WARRANTIES, EXPRESS OR IMPLIED, WITH REGARD
20 TO THIS SOFTWARE INCLUDING BUT NOT LIMITED TO THE WARRANTIES
21 OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
22
23****************************************************************************/
24
25#define CACHE_ENABLE 0
26#define CACHE_DISABLE 1
27
28int cache_control(unsigned int command)
29{
30 volatile unsigned int *p = (volatile unsigned int *) 0x80000000;
31 int i;
32
33 for (i = 0; i < (32 * 1024); i += 32) {
34 (void *) *p;
35 p += (32 / sizeof (int));
36 }
37
38 return 0;
39}
diff --git a/arch/sh64/boot/compressed/install.sh b/arch/sh64/boot/compressed/install.sh
deleted file mode 100644
index 90589f0fec12..000000000000
--- a/arch/sh64/boot/compressed/install.sh
+++ /dev/null
@@ -1,56 +0,0 @@
1#!/bin/sh
2#
3# arch/sh/boot/install.sh
4#
5# This file is subject to the terms and conditions of the GNU General Public
6# License. See the file "COPYING" in the main directory of this archive
7# for more details.
8#
9# Copyright (C) 1995 by Linus Torvalds
10#
11# Adapted from code in arch/i386/boot/Makefile by H. Peter Anvin
12# Adapted from code in arch/i386/boot/install.sh by Russell King
13# Adapted from code in arch/arm/boot/install.sh by Stuart Menefy
14#
15# "make install" script for sh architecture
16#
17# Arguments:
18# $1 - kernel version
19# $2 - kernel image file
20# $3 - kernel map file
21# $4 - default install path (blank if root directory)
22#
23
24# User may have a custom install script
25
26if [ -x /sbin/installkernel ]; then
27 exec /sbin/installkernel "$@"
28fi
29
30if [ "$2" = "zImage" ]; then
31# Compressed install
32 echo "Installing compressed kernel"
33 if [ -f $4/vmlinuz-$1 ]; then
34 mv $4/vmlinuz-$1 $4/vmlinuz.old
35 fi
36
37 if [ -f $4/System.map-$1 ]; then
38 mv $4/System.map-$1 $4/System.old
39 fi
40
41 cat $2 > $4/vmlinuz-$1
42 cp $3 $4/System.map-$1
43else
44# Normal install
45 echo "Installing normal kernel"
46 if [ -f $4/vmlinux-$1 ]; then
47 mv $4/vmlinux-$1 $4/vmlinux.old
48 fi
49
50 if [ -f $4/System.map ]; then
51 mv $4/System.map $4/System.old
52 fi
53
54 cat $2 > $4/vmlinux-$1
55 cp $3 $4/System.map
56fi
diff --git a/arch/sh64/configs/harp_defconfig b/arch/sh64/configs/harp_defconfig
deleted file mode 100644
index ba302cd0c285..000000000000
--- a/arch/sh64/configs/harp_defconfig
+++ /dev/null
@@ -1,745 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc1
4# Fri Nov 2 14:35:57 2007
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH64=y
8CONFIG_MMU=y
9CONFIG_QUICKLIST=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# General setup
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_LOCK_KERNEL=y
27CONFIG_INIT_ENV_ARG_LIMIT=32
28CONFIG_LOCALVERSION=""
29CONFIG_LOCALVERSION_AUTO=y
30CONFIG_SWAP=y
31# CONFIG_SYSVIPC is not set
32CONFIG_POSIX_MQUEUE=y
33# CONFIG_BSD_PROCESS_ACCT is not set
34# CONFIG_TASKSTATS is not set
35# CONFIG_USER_NS is not set
36# CONFIG_AUDIT is not set
37# CONFIG_IKCONFIG is not set
38CONFIG_LOG_BUF_SHIFT=14
39# CONFIG_CGROUPS is not set
40CONFIG_FAIR_GROUP_SCHED=y
41CONFIG_FAIR_USER_SCHED=y
42# CONFIG_FAIR_CGROUP_SCHED is not set
43CONFIG_SYSFS_DEPRECATED=y
44# CONFIG_RELAY is not set
45# CONFIG_BLK_DEV_INITRD is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SYSCTL=y
48# CONFIG_EMBEDDED is not set
49CONFIG_UID16=y
50CONFIG_SYSCTL_SYSCALL=y
51CONFIG_KALLSYMS=y
52# CONFIG_KALLSYMS_ALL is not set
53# CONFIG_KALLSYMS_EXTRA_PASS is not set
54CONFIG_HOTPLUG=y
55CONFIG_PRINTK=y
56CONFIG_BUG=y
57CONFIG_ELF_CORE=y
58CONFIG_BASE_FULL=y
59CONFIG_FUTEX=y
60CONFIG_ANON_INODES=y
61CONFIG_EPOLL=y
62CONFIG_SIGNALFD=y
63CONFIG_EVENTFD=y
64CONFIG_SHMEM=y
65CONFIG_VM_EVENT_COUNTERS=y
66CONFIG_SLAB=y
67# CONFIG_SLUB is not set
68# CONFIG_SLOB is not set
69CONFIG_RT_MUTEXES=y
70# CONFIG_TINY_SHMEM is not set
71CONFIG_BASE_SMALL=0
72# CONFIG_MODULES is not set
73CONFIG_BLOCK=y
74# CONFIG_LBD is not set
75# CONFIG_BLK_DEV_IO_TRACE is not set
76# CONFIG_LSF is not set
77# CONFIG_BLK_DEV_BSG is not set
78
79#
80# IO Schedulers
81#
82CONFIG_IOSCHED_NOOP=y
83CONFIG_IOSCHED_AS=y
84CONFIG_IOSCHED_DEADLINE=y
85CONFIG_IOSCHED_CFQ=y
86# CONFIG_DEFAULT_AS is not set
87# CONFIG_DEFAULT_DEADLINE is not set
88CONFIG_DEFAULT_CFQ=y
89# CONFIG_DEFAULT_NOOP is not set
90CONFIG_DEFAULT_IOSCHED="cfq"
91
92#
93# System type
94#
95# CONFIG_SH_SIMULATOR is not set
96# CONFIG_SH_CAYMAN is not set
97CONFIG_SH_HARP=y
98CONFIG_CPU_SH5=y
99CONFIG_CPU_SUBTYPE_SH5_101=y
100# CONFIG_CPU_SUBTYPE_SH5_103 is not set
101CONFIG_LITTLE_ENDIAN=y
102# CONFIG_BIG_ENDIAN is not set
103CONFIG_SH_FPU=y
104# CONFIG_SH64_FPU_DENORM_FLUSH is not set
105CONFIG_SH64_PGTABLE_2_LEVEL=y
106# CONFIG_SH64_PGTABLE_3_LEVEL is not set
107CONFIG_HUGETLB_PAGE_SIZE_64K=y
108# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
109# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
110CONFIG_SH64_USER_MISALIGNED_FIXUP=y
111
112#
113# Memory options
114#
115CONFIG_CACHED_MEMORY_OFFSET=0x20000000
116CONFIG_MEMORY_START=0x80000000
117CONFIG_MEMORY_SIZE_IN_MB=128
118
119#
120# Cache options
121#
122CONFIG_DCACHE_WRITE_BACK=y
123# CONFIG_DCACHE_WRITE_THROUGH is not set
124# CONFIG_DCACHE_DISABLED is not set
125# CONFIG_ICACHE_DISABLED is not set
126CONFIG_PCIDEVICE_MEMORY_START=C0000000
127CONFIG_DEVICE_MEMORY_START=E0000000
128CONFIG_FLASH_MEMORY_START=0x00000000
129CONFIG_PCI_BLOCK_START=0x40000000
130
131#
132# CPU Subtype specific options
133#
134CONFIG_SH64_ID2815_WORKAROUND=y
135
136#
137# Misc options
138#
139# CONFIG_SH_DMA is not set
140CONFIG_PREEMPT=y
141CONFIG_SELECT_MEMORY_MODEL=y
142CONFIG_FLATMEM_MANUAL=y
143# CONFIG_DISCONTIGMEM_MANUAL is not set
144# CONFIG_SPARSEMEM_MANUAL is not set
145CONFIG_FLATMEM=y
146CONFIG_FLAT_NODE_MEM_MAP=y
147# CONFIG_SPARSEMEM_STATIC is not set
148# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
149CONFIG_SPLIT_PTLOCK_CPUS=4
150# CONFIG_RESOURCES_64BIT is not set
151CONFIG_ZONE_DMA_FLAG=0
152CONFIG_NR_QUICK=1
153
154#
155# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
156#
157# CONFIG_ARCH_SUPPORTS_MSI is not set
158# CONFIG_PCCARD is not set
159
160#
161# Executable file formats
162#
163CONFIG_BINFMT_ELF=y
164# CONFIG_BINFMT_MISC is not set
165
166#
167# Networking
168#
169CONFIG_NET=y
170
171#
172# Networking options
173#
174CONFIG_PACKET=y
175# CONFIG_PACKET_MMAP is not set
176CONFIG_UNIX=y
177CONFIG_XFRM=y
178# CONFIG_XFRM_USER is not set
179# CONFIG_XFRM_SUB_POLICY is not set
180# CONFIG_XFRM_MIGRATE is not set
181# CONFIG_NET_KEY is not set
182CONFIG_INET=y
183# CONFIG_IP_MULTICAST is not set
184# CONFIG_IP_ADVANCED_ROUTER is not set
185CONFIG_IP_FIB_HASH=y
186CONFIG_IP_PNP=y
187# CONFIG_IP_PNP_DHCP is not set
188# CONFIG_IP_PNP_BOOTP is not set
189# CONFIG_IP_PNP_RARP is not set
190# CONFIG_NET_IPIP is not set
191# CONFIG_NET_IPGRE is not set
192# CONFIG_ARPD is not set
193# CONFIG_SYN_COOKIES is not set
194# CONFIG_INET_AH is not set
195# CONFIG_INET_ESP is not set
196# CONFIG_INET_IPCOMP is not set
197# CONFIG_INET_XFRM_TUNNEL is not set
198# CONFIG_INET_TUNNEL is not set
199CONFIG_INET_XFRM_MODE_TRANSPORT=y
200CONFIG_INET_XFRM_MODE_TUNNEL=y
201CONFIG_INET_XFRM_MODE_BEET=y
202# CONFIG_INET_LRO is not set
203CONFIG_INET_DIAG=y
204CONFIG_INET_TCP_DIAG=y
205# CONFIG_TCP_CONG_ADVANCED is not set
206CONFIG_TCP_CONG_CUBIC=y
207CONFIG_DEFAULT_TCP_CONG="cubic"
208# CONFIG_TCP_MD5SIG is not set
209# CONFIG_IPV6 is not set
210# CONFIG_INET6_XFRM_TUNNEL is not set
211# CONFIG_INET6_TUNNEL is not set
212# CONFIG_NETWORK_SECMARK is not set
213# CONFIG_NETFILTER is not set
214# CONFIG_IP_DCCP is not set
215# CONFIG_IP_SCTP is not set
216# CONFIG_TIPC is not set
217# CONFIG_ATM is not set
218# CONFIG_BRIDGE is not set
219# CONFIG_VLAN_8021Q is not set
220# CONFIG_DECNET is not set
221# CONFIG_LLC2 is not set
222# CONFIG_IPX is not set
223# CONFIG_ATALK is not set
224# CONFIG_X25 is not set
225# CONFIG_LAPB is not set
226# CONFIG_ECONET is not set
227# CONFIG_WAN_ROUTER is not set
228# CONFIG_NET_SCHED is not set
229
230#
231# Network testing
232#
233# CONFIG_NET_PKTGEN is not set
234# CONFIG_HAMRADIO is not set
235# CONFIG_IRDA is not set
236# CONFIG_BT is not set
237# CONFIG_AF_RXRPC is not set
238
239#
240# Wireless
241#
242# CONFIG_CFG80211 is not set
243# CONFIG_WIRELESS_EXT is not set
244# CONFIG_MAC80211 is not set
245# CONFIG_IEEE80211 is not set
246# CONFIG_RFKILL is not set
247# CONFIG_NET_9P is not set
248
249#
250# Device Drivers
251#
252
253#
254# Generic Driver Options
255#
256CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
257CONFIG_STANDALONE=y
258CONFIG_PREVENT_FIRMWARE_BUILD=y
259# CONFIG_FW_LOADER is not set
260# CONFIG_DEBUG_DRIVER is not set
261# CONFIG_DEBUG_DEVRES is not set
262# CONFIG_SYS_HYPERVISOR is not set
263# CONFIG_CONNECTOR is not set
264# CONFIG_MTD is not set
265# CONFIG_PARPORT is not set
266CONFIG_BLK_DEV=y
267# CONFIG_BLK_DEV_COW_COMMON is not set
268CONFIG_BLK_DEV_LOOP=y
269# CONFIG_BLK_DEV_CRYPTOLOOP is not set
270# CONFIG_BLK_DEV_NBD is not set
271CONFIG_BLK_DEV_RAM=y
272CONFIG_BLK_DEV_RAM_COUNT=16
273CONFIG_BLK_DEV_RAM_SIZE=4096
274CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
275# CONFIG_CDROM_PKTCDVD is not set
276# CONFIG_ATA_OVER_ETH is not set
277CONFIG_MISC_DEVICES=y
278# CONFIG_EEPROM_93CX6 is not set
279# CONFIG_IDE is not set
280
281#
282# SCSI device support
283#
284# CONFIG_RAID_ATTRS is not set
285CONFIG_SCSI=y
286CONFIG_SCSI_DMA=y
287# CONFIG_SCSI_TGT is not set
288# CONFIG_SCSI_NETLINK is not set
289CONFIG_SCSI_PROC_FS=y
290
291#
292# SCSI support type (disk, tape, CD-ROM)
293#
294CONFIG_BLK_DEV_SD=y
295# CONFIG_CHR_DEV_ST is not set
296# CONFIG_CHR_DEV_OSST is not set
297# CONFIG_BLK_DEV_SR is not set
298# CONFIG_CHR_DEV_SG is not set
299# CONFIG_CHR_DEV_SCH is not set
300
301#
302# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
303#
304CONFIG_SCSI_MULTI_LUN=y
305# CONFIG_SCSI_CONSTANTS is not set
306# CONFIG_SCSI_LOGGING is not set
307# CONFIG_SCSI_SCAN_ASYNC is not set
308
309#
310# SCSI Transports
311#
312CONFIG_SCSI_SPI_ATTRS=y
313# CONFIG_SCSI_FC_ATTRS is not set
314# CONFIG_SCSI_ISCSI_ATTRS is not set
315# CONFIG_SCSI_SAS_LIBSAS is not set
316# CONFIG_SCSI_SRP_ATTRS is not set
317CONFIG_SCSI_LOWLEVEL=y
318# CONFIG_ISCSI_TCP is not set
319# CONFIG_SCSI_DEBUG is not set
320# CONFIG_ATA is not set
321# CONFIG_MD is not set
322CONFIG_NETDEVICES=y
323# CONFIG_NETDEVICES_MULTIQUEUE is not set
324# CONFIG_DUMMY is not set
325# CONFIG_BONDING is not set
326# CONFIG_MACVLAN is not set
327# CONFIG_EQUALIZER is not set
328# CONFIG_TUN is not set
329# CONFIG_VETH is not set
330# CONFIG_PHYLIB is not set
331CONFIG_NET_ETHERNET=y
332# CONFIG_MII is not set
333# CONFIG_STNIC is not set
334# CONFIG_SMC91X is not set
335# CONFIG_SMC911X is not set
336# CONFIG_IBM_NEW_EMAC_ZMII is not set
337# CONFIG_IBM_NEW_EMAC_RGMII is not set
338# CONFIG_IBM_NEW_EMAC_TAH is not set
339# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
340# CONFIG_B44 is not set
341CONFIG_NETDEV_1000=y
342CONFIG_NETDEV_10000=y
343
344#
345# Wireless LAN
346#
347# CONFIG_WLAN_PRE80211 is not set
348# CONFIG_WLAN_80211 is not set
349# CONFIG_WAN is not set
350# CONFIG_PPP is not set
351# CONFIG_SLIP is not set
352# CONFIG_SHAPER is not set
353# CONFIG_NETCONSOLE is not set
354# CONFIG_NETPOLL is not set
355# CONFIG_NET_POLL_CONTROLLER is not set
356# CONFIG_ISDN is not set
357# CONFIG_PHONE is not set
358
359#
360# Input device support
361#
362CONFIG_INPUT=y
363# CONFIG_INPUT_FF_MEMLESS is not set
364# CONFIG_INPUT_POLLDEV is not set
365
366#
367# Userland interfaces
368#
369CONFIG_INPUT_MOUSEDEV=y
370# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
371CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
372CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
373# CONFIG_INPUT_JOYDEV is not set
374# CONFIG_INPUT_EVDEV is not set
375# CONFIG_INPUT_EVBUG is not set
376
377#
378# Input Device Drivers
379#
380# CONFIG_INPUT_KEYBOARD is not set
381# CONFIG_INPUT_MOUSE is not set
382# CONFIG_INPUT_JOYSTICK is not set
383# CONFIG_INPUT_TABLET is not set
384# CONFIG_INPUT_TOUCHSCREEN is not set
385# CONFIG_INPUT_MISC is not set
386
387#
388# Hardware I/O ports
389#
390# CONFIG_SERIO is not set
391# CONFIG_GAMEPORT is not set
392
393#
394# Character devices
395#
396CONFIG_VT=y
397CONFIG_VT_CONSOLE=y
398CONFIG_HW_CONSOLE=y
399# CONFIG_VT_HW_CONSOLE_BINDING is not set
400# CONFIG_SERIAL_NONSTANDARD is not set
401
402#
403# Serial drivers
404#
405# CONFIG_SERIAL_8250 is not set
406
407#
408# Non-8250 serial port support
409#
410CONFIG_SERIAL_SH_SCI=y
411CONFIG_SERIAL_SH_SCI_NR_UARTS=2
412CONFIG_SERIAL_SH_SCI_CONSOLE=y
413CONFIG_SERIAL_CORE=y
414CONFIG_SERIAL_CORE_CONSOLE=y
415CONFIG_UNIX98_PTYS=y
416CONFIG_LEGACY_PTYS=y
417CONFIG_LEGACY_PTY_COUNT=256
418# CONFIG_IPMI_HANDLER is not set
419CONFIG_HW_RANDOM=y
420# CONFIG_R3964 is not set
421# CONFIG_RAW_DRIVER is not set
422# CONFIG_TCG_TPM is not set
423# CONFIG_I2C is not set
424
425#
426# SPI support
427#
428# CONFIG_SPI is not set
429# CONFIG_SPI_MASTER is not set
430# CONFIG_W1 is not set
431# CONFIG_POWER_SUPPLY is not set
432CONFIG_HWMON=y
433# CONFIG_HWMON_VID is not set
434# CONFIG_SENSORS_F71805F is not set
435# CONFIG_SENSORS_F71882FG is not set
436# CONFIG_SENSORS_IT87 is not set
437# CONFIG_SENSORS_PC87360 is not set
438# CONFIG_SENSORS_PC87427 is not set
439# CONFIG_SENSORS_SMSC47M1 is not set
440# CONFIG_SENSORS_SMSC47B397 is not set
441# CONFIG_SENSORS_VT1211 is not set
442# CONFIG_SENSORS_W83627HF is not set
443# CONFIG_SENSORS_W83627EHF is not set
444# CONFIG_HWMON_DEBUG_CHIP is not set
445CONFIG_WATCHDOG=y
446# CONFIG_WATCHDOG_NOWAYOUT is not set
447
448#
449# Watchdog Device Drivers
450#
451# CONFIG_SOFT_WATCHDOG is not set
452
453#
454# Sonics Silicon Backplane
455#
456CONFIG_SSB_POSSIBLE=y
457# CONFIG_SSB is not set
458
459#
460# Multifunction device drivers
461#
462# CONFIG_MFD_SM501 is not set
463
464#
465# Multimedia devices
466#
467# CONFIG_VIDEO_DEV is not set
468# CONFIG_DVB_CORE is not set
469CONFIG_DAB=y
470
471#
472# Graphics support
473#
474# CONFIG_VGASTATE is not set
475CONFIG_VIDEO_OUTPUT_CONTROL=y
476CONFIG_FB=y
477CONFIG_FIRMWARE_EDID=y
478# CONFIG_FB_DDC is not set
479# CONFIG_FB_CFB_FILLRECT is not set
480# CONFIG_FB_CFB_COPYAREA is not set
481# CONFIG_FB_CFB_IMAGEBLIT is not set
482# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
483# CONFIG_FB_SYS_FILLRECT is not set
484# CONFIG_FB_SYS_COPYAREA is not set
485# CONFIG_FB_SYS_IMAGEBLIT is not set
486# CONFIG_FB_SYS_FOPS is not set
487CONFIG_FB_DEFERRED_IO=y
488# CONFIG_FB_SVGALIB is not set
489# CONFIG_FB_MACMODES is not set
490# CONFIG_FB_BACKLIGHT is not set
491CONFIG_FB_MODE_HELPERS=y
492# CONFIG_FB_TILEBLITTING is not set
493
494#
495# Frame buffer hardware drivers
496#
497# CONFIG_FB_S1D13XXX is not set
498# CONFIG_FB_VIRTUAL is not set
499# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
500
501#
502# Display device support
503#
504# CONFIG_DISPLAY_SUPPORT is not set
505
506#
507# Console display driver support
508#
509CONFIG_DUMMY_CONSOLE=y
510CONFIG_FRAMEBUFFER_CONSOLE=y
511# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
512# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
513CONFIG_FONTS=y
514# CONFIG_FONT_8x8 is not set
515CONFIG_FONT_8x16=y
516# CONFIG_FONT_6x11 is not set
517# CONFIG_FONT_7x14 is not set
518# CONFIG_FONT_PEARL_8x8 is not set
519# CONFIG_FONT_ACORN_8x8 is not set
520# CONFIG_FONT_MINI_4x6 is not set
521# CONFIG_FONT_SUN8x16 is not set
522# CONFIG_FONT_SUN12x22 is not set
523# CONFIG_FONT_10x18 is not set
524CONFIG_LOGO=y
525# CONFIG_LOGO_LINUX_MONO is not set
526# CONFIG_LOGO_LINUX_VGA16 is not set
527# CONFIG_LOGO_LINUX_CLUT224 is not set
528# CONFIG_LOGO_SUPERH_MONO is not set
529# CONFIG_LOGO_SUPERH_VGA16 is not set
530CONFIG_LOGO_SUPERH_CLUT224=y
531
532#
533# Sound
534#
535# CONFIG_SOUND is not set
536CONFIG_HID_SUPPORT=y
537CONFIG_HID=y
538# CONFIG_HID_DEBUG is not set
539# CONFIG_HIDRAW is not set
540CONFIG_USB_SUPPORT=y
541CONFIG_USB_ARCH_HAS_HCD=y
542# CONFIG_USB_ARCH_HAS_OHCI is not set
543# CONFIG_USB_ARCH_HAS_EHCI is not set
544# CONFIG_USB is not set
545
546#
547# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
548#
549
550#
551# USB Gadget Support
552#
553# CONFIG_USB_GADGET is not set
554# CONFIG_MMC is not set
555# CONFIG_NEW_LEDS is not set
556# CONFIG_RTC_CLASS is not set
557
558#
559# Userspace I/O
560#
561# CONFIG_UIO is not set
562
563#
564# File systems
565#
566CONFIG_EXT2_FS=y
567# CONFIG_EXT2_FS_XATTR is not set
568# CONFIG_EXT2_FS_XIP is not set
569CONFIG_EXT3_FS=y
570CONFIG_EXT3_FS_XATTR=y
571# CONFIG_EXT3_FS_POSIX_ACL is not set
572# CONFIG_EXT3_FS_SECURITY is not set
573# CONFIG_EXT4DEV_FS is not set
574CONFIG_JBD=y
575# CONFIG_JBD_DEBUG is not set
576CONFIG_FS_MBCACHE=y
577# CONFIG_REISERFS_FS is not set
578# CONFIG_JFS_FS is not set
579# CONFIG_FS_POSIX_ACL is not set
580# CONFIG_XFS_FS is not set
581# CONFIG_GFS2_FS is not set
582# CONFIG_OCFS2_FS is not set
583CONFIG_MINIX_FS=y
584CONFIG_ROMFS_FS=y
585CONFIG_INOTIFY=y
586CONFIG_INOTIFY_USER=y
587# CONFIG_QUOTA is not set
588CONFIG_DNOTIFY=y
589# CONFIG_AUTOFS_FS is not set
590# CONFIG_AUTOFS4_FS is not set
591# CONFIG_FUSE_FS is not set
592
593#
594# CD-ROM/DVD Filesystems
595#
596# CONFIG_ISO9660_FS is not set
597# CONFIG_UDF_FS is not set
598
599#
600# DOS/FAT/NT Filesystems
601#
602# CONFIG_MSDOS_FS is not set
603# CONFIG_VFAT_FS is not set
604# CONFIG_NTFS_FS is not set
605
606#
607# Pseudo filesystems
608#
609CONFIG_PROC_FS=y
610CONFIG_PROC_KCORE=y
611CONFIG_PROC_SYSCTL=y
612CONFIG_SYSFS=y
613CONFIG_TMPFS=y
614# CONFIG_TMPFS_POSIX_ACL is not set
615CONFIG_HUGETLBFS=y
616CONFIG_HUGETLB_PAGE=y
617# CONFIG_CONFIGFS_FS is not set
618
619#
620# Miscellaneous filesystems
621#
622# CONFIG_ADFS_FS is not set
623# CONFIG_AFFS_FS is not set
624# CONFIG_HFS_FS is not set
625# CONFIG_HFSPLUS_FS is not set
626# CONFIG_BEFS_FS is not set
627# CONFIG_BFS_FS is not set
628# CONFIG_EFS_FS is not set
629# CONFIG_CRAMFS is not set
630# CONFIG_VXFS_FS is not set
631# CONFIG_HPFS_FS is not set
632# CONFIG_QNX4FS_FS is not set
633# CONFIG_SYSV_FS is not set
634# CONFIG_UFS_FS is not set
635CONFIG_NETWORK_FILESYSTEMS=y
636CONFIG_NFS_FS=y
637CONFIG_NFS_V3=y
638# CONFIG_NFS_V3_ACL is not set
639# CONFIG_NFS_V4 is not set
640# CONFIG_NFS_DIRECTIO is not set
641# CONFIG_NFSD is not set
642CONFIG_ROOT_NFS=y
643CONFIG_LOCKD=y
644CONFIG_LOCKD_V4=y
645CONFIG_NFS_COMMON=y
646CONFIG_SUNRPC=y
647# CONFIG_SUNRPC_BIND34 is not set
648# CONFIG_RPCSEC_GSS_KRB5 is not set
649# CONFIG_RPCSEC_GSS_SPKM3 is not set
650# CONFIG_SMB_FS is not set
651# CONFIG_CIFS is not set
652# CONFIG_NCP_FS is not set
653# CONFIG_CODA_FS is not set
654# CONFIG_AFS_FS is not set
655
656#
657# Partition Types
658#
659CONFIG_PARTITION_ADVANCED=y
660# CONFIG_ACORN_PARTITION is not set
661# CONFIG_OSF_PARTITION is not set
662# CONFIG_AMIGA_PARTITION is not set
663# CONFIG_ATARI_PARTITION is not set
664# CONFIG_MAC_PARTITION is not set
665CONFIG_MSDOS_PARTITION=y
666# CONFIG_BSD_DISKLABEL is not set
667# CONFIG_MINIX_SUBPARTITION is not set
668# CONFIG_SOLARIS_X86_PARTITION is not set
669# CONFIG_UNIXWARE_DISKLABEL is not set
670# CONFIG_LDM_PARTITION is not set
671# CONFIG_SGI_PARTITION is not set
672# CONFIG_ULTRIX_PARTITION is not set
673# CONFIG_SUN_PARTITION is not set
674# CONFIG_KARMA_PARTITION is not set
675# CONFIG_EFI_PARTITION is not set
676# CONFIG_SYSV68_PARTITION is not set
677# CONFIG_NLS is not set
678# CONFIG_DLM is not set
679CONFIG_INSTRUMENTATION=y
680# CONFIG_PROFILING is not set
681# CONFIG_MARKERS is not set
682
683#
684# Kernel hacking
685#
686# CONFIG_PRINTK_TIME is not set
687CONFIG_ENABLE_WARN_DEPRECATED=y
688CONFIG_ENABLE_MUST_CHECK=y
689CONFIG_MAGIC_SYSRQ=y
690# CONFIG_UNUSED_SYMBOLS is not set
691CONFIG_DEBUG_FS=y
692# CONFIG_HEADERS_CHECK is not set
693CONFIG_DEBUG_KERNEL=y
694# CONFIG_DEBUG_SHIRQ is not set
695CONFIG_DETECT_SOFTLOCKUP=y
696CONFIG_SCHED_DEBUG=y
697CONFIG_SCHEDSTATS=y
698# CONFIG_TIMER_STATS is not set
699# CONFIG_DEBUG_SLAB is not set
700# CONFIG_DEBUG_RT_MUTEXES is not set
701# CONFIG_RT_MUTEX_TESTER is not set
702# CONFIG_DEBUG_SPINLOCK is not set
703# CONFIG_DEBUG_MUTEXES is not set
704# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
705# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
706# CONFIG_DEBUG_KOBJECT is not set
707CONFIG_DEBUG_BUGVERBOSE=y
708# CONFIG_DEBUG_INFO is not set
709# CONFIG_DEBUG_VM is not set
710# CONFIG_DEBUG_LIST is not set
711# CONFIG_DEBUG_SG is not set
712CONFIG_FRAME_POINTER=y
713CONFIG_FORCED_INLINING=y
714# CONFIG_BOOT_PRINTK_DELAY is not set
715# CONFIG_FAULT_INJECTION is not set
716# CONFIG_SAMPLES is not set
717# CONFIG_EARLY_PRINTK is not set
718CONFIG_SH64_PROC_TLB=y
719CONFIG_SH64_PROC_ASIDS=y
720CONFIG_SH64_SR_WATCH=y
721# CONFIG_POOR_MANS_STRACE is not set
722# CONFIG_SH_NO_BSS_INIT is not set
723
724#
725# Security options
726#
727# CONFIG_KEYS is not set
728# CONFIG_SECURITY is not set
729# CONFIG_SECURITY_FILE_CAPABILITIES is not set
730# CONFIG_CRYPTO is not set
731
732#
733# Library routines
734#
735CONFIG_BITREVERSE=y
736# CONFIG_CRC_CCITT is not set
737# CONFIG_CRC16 is not set
738# CONFIG_CRC_ITU_T is not set
739CONFIG_CRC32=y
740# CONFIG_CRC7 is not set
741# CONFIG_LIBCRC32C is not set
742CONFIG_PLIST=y
743CONFIG_HAS_IOMEM=y
744CONFIG_HAS_IOPORT=y
745CONFIG_HAS_DMA=y
diff --git a/arch/sh64/configs/sim_defconfig b/arch/sh64/configs/sim_defconfig
deleted file mode 100644
index 18476cc522c3..000000000000
--- a/arch/sh64/configs/sim_defconfig
+++ /dev/null
@@ -1,558 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.24-rc1
4# Fri Nov 2 14:36:08 2007
5#
6CONFIG_SUPERH=y
7CONFIG_SUPERH64=y
8CONFIG_MMU=y
9CONFIG_QUICKLIST=y
10CONFIG_RWSEM_GENERIC_SPINLOCK=y
11CONFIG_GENERIC_FIND_NEXT_BIT=y
12CONFIG_GENERIC_HWEIGHT=y
13CONFIG_GENERIC_CALIBRATE_DELAY=y
14CONFIG_GENERIC_HARDIRQS=y
15CONFIG_GENERIC_IRQ_PROBE=y
16# CONFIG_ARCH_HAS_ILOG2_U32 is not set
17# CONFIG_ARCH_HAS_ILOG2_U64 is not set
18CONFIG_ARCH_NO_VIRT_TO_BUS=y
19CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
20
21#
22# General setup
23#
24CONFIG_EXPERIMENTAL=y
25CONFIG_BROKEN_ON_SMP=y
26CONFIG_LOCK_KERNEL=y
27CONFIG_INIT_ENV_ARG_LIMIT=32
28CONFIG_LOCALVERSION=""
29CONFIG_LOCALVERSION_AUTO=y
30CONFIG_SWAP=y
31# CONFIG_SYSVIPC is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33# CONFIG_USER_NS is not set
34# CONFIG_IKCONFIG is not set
35CONFIG_LOG_BUF_SHIFT=14
36# CONFIG_CGROUPS is not set
37CONFIG_FAIR_GROUP_SCHED=y
38CONFIG_FAIR_USER_SCHED=y
39# CONFIG_FAIR_CGROUP_SCHED is not set
40CONFIG_SYSFS_DEPRECATED=y
41# CONFIG_RELAY is not set
42# CONFIG_BLK_DEV_INITRD is not set
43# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
44CONFIG_SYSCTL=y
45# CONFIG_EMBEDDED is not set
46CONFIG_UID16=y
47CONFIG_SYSCTL_SYSCALL=y
48CONFIG_KALLSYMS=y
49# CONFIG_KALLSYMS_ALL is not set
50# CONFIG_KALLSYMS_EXTRA_PASS is not set
51CONFIG_HOTPLUG=y
52CONFIG_PRINTK=y
53CONFIG_BUG=y
54CONFIG_ELF_CORE=y
55CONFIG_BASE_FULL=y
56CONFIG_FUTEX=y
57CONFIG_ANON_INODES=y
58CONFIG_EPOLL=y
59CONFIG_SIGNALFD=y
60CONFIG_EVENTFD=y
61CONFIG_SHMEM=y
62CONFIG_VM_EVENT_COUNTERS=y
63CONFIG_SLAB=y
64# CONFIG_SLUB is not set
65# CONFIG_SLOB is not set
66CONFIG_RT_MUTEXES=y
67# CONFIG_TINY_SHMEM is not set
68CONFIG_BASE_SMALL=0
69# CONFIG_MODULES is not set
70CONFIG_BLOCK=y
71# CONFIG_LBD is not set
72# CONFIG_BLK_DEV_IO_TRACE is not set
73# CONFIG_LSF is not set
74# CONFIG_BLK_DEV_BSG is not set
75
76#
77# IO Schedulers
78#
79CONFIG_IOSCHED_NOOP=y
80CONFIG_IOSCHED_AS=y
81CONFIG_IOSCHED_DEADLINE=y
82CONFIG_IOSCHED_CFQ=y
83# CONFIG_DEFAULT_AS is not set
84# CONFIG_DEFAULT_DEADLINE is not set
85CONFIG_DEFAULT_CFQ=y
86# CONFIG_DEFAULT_NOOP is not set
87CONFIG_DEFAULT_IOSCHED="cfq"
88
89#
90# System type
91#
92CONFIG_SH_SIMULATOR=y
93# CONFIG_SH_CAYMAN is not set
94# CONFIG_SH_HARP is not set
95CONFIG_CPU_SH5=y
96CONFIG_CPU_SUBTYPE_SH5_101=y
97# CONFIG_CPU_SUBTYPE_SH5_103 is not set
98CONFIG_LITTLE_ENDIAN=y
99# CONFIG_BIG_ENDIAN is not set
100CONFIG_SH_FPU=y
101# CONFIG_SH64_FPU_DENORM_FLUSH is not set
102CONFIG_SH64_PGTABLE_2_LEVEL=y
103# CONFIG_SH64_PGTABLE_3_LEVEL is not set
104CONFIG_HUGETLB_PAGE_SIZE_64K=y
105# CONFIG_HUGETLB_PAGE_SIZE_1MB is not set
106# CONFIG_HUGETLB_PAGE_SIZE_512MB is not set
107CONFIG_SH64_USER_MISALIGNED_FIXUP=y
108
109#
110# Memory options
111#
112CONFIG_CACHED_MEMORY_OFFSET=0x20000000
113CONFIG_MEMORY_START=0x80000000
114CONFIG_MEMORY_SIZE_IN_MB=128
115
116#
117# Cache options
118#
119# CONFIG_DCACHE_WRITE_BACK is not set
120# CONFIG_DCACHE_WRITE_THROUGH is not set
121CONFIG_DCACHE_DISABLED=y
122# CONFIG_ICACHE_DISABLED is not set
123CONFIG_PCIDEVICE_MEMORY_START=C0000000
124CONFIG_DEVICE_MEMORY_START=E0000000
125CONFIG_FLASH_MEMORY_START=0x00000000
126CONFIG_PCI_BLOCK_START=0x40000000
127
128#
129# CPU Subtype specific options
130#
131CONFIG_SH64_ID2815_WORKAROUND=y
132
133#
134# Misc options
135#
136# CONFIG_SH_DMA is not set
137CONFIG_PREEMPT=y
138CONFIG_SELECT_MEMORY_MODEL=y
139CONFIG_FLATMEM_MANUAL=y
140# CONFIG_DISCONTIGMEM_MANUAL is not set
141# CONFIG_SPARSEMEM_MANUAL is not set
142CONFIG_FLATMEM=y
143CONFIG_FLAT_NODE_MEM_MAP=y
144# CONFIG_SPARSEMEM_STATIC is not set
145# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
146CONFIG_SPLIT_PTLOCK_CPUS=4
147# CONFIG_RESOURCES_64BIT is not set
148CONFIG_ZONE_DMA_FLAG=0
149CONFIG_NR_QUICK=1
150
151#
152# Bus options (PCI, PCMCIA, EISA, MCA, ISA)
153#
154# CONFIG_ARCH_SUPPORTS_MSI is not set
155# CONFIG_PCCARD is not set
156
157#
158# Executable file formats
159#
160CONFIG_BINFMT_ELF=y
161# CONFIG_BINFMT_MISC is not set
162
163#
164# Networking
165#
166# CONFIG_NET is not set
167
168#
169# Device Drivers
170#
171
172#
173# Generic Driver Options
174#
175CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
176CONFIG_STANDALONE=y
177CONFIG_PREVENT_FIRMWARE_BUILD=y
178# CONFIG_FW_LOADER is not set
179# CONFIG_DEBUG_DRIVER is not set
180# CONFIG_DEBUG_DEVRES is not set
181# CONFIG_SYS_HYPERVISOR is not set
182# CONFIG_MTD is not set
183# CONFIG_PARPORT is not set
184# CONFIG_BLK_DEV is not set
185# CONFIG_MISC_DEVICES is not set
186# CONFIG_IDE is not set
187
188#
189# SCSI device support
190#
191# CONFIG_RAID_ATTRS is not set
192CONFIG_SCSI=y
193CONFIG_SCSI_DMA=y
194# CONFIG_SCSI_TGT is not set
195# CONFIG_SCSI_NETLINK is not set
196CONFIG_SCSI_PROC_FS=y
197
198#
199# SCSI support type (disk, tape, CD-ROM)
200#
201CONFIG_BLK_DEV_SD=y
202# CONFIG_CHR_DEV_ST is not set
203# CONFIG_CHR_DEV_OSST is not set
204# CONFIG_BLK_DEV_SR is not set
205# CONFIG_CHR_DEV_SG is not set
206# CONFIG_CHR_DEV_SCH is not set
207
208#
209# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
210#
211CONFIG_SCSI_MULTI_LUN=y
212# CONFIG_SCSI_CONSTANTS is not set
213# CONFIG_SCSI_LOGGING is not set
214# CONFIG_SCSI_SCAN_ASYNC is not set
215
216#
217# SCSI Transports
218#
219CONFIG_SCSI_SPI_ATTRS=y
220# CONFIG_SCSI_FC_ATTRS is not set
221# CONFIG_SCSI_SAS_LIBSAS is not set
222# CONFIG_SCSI_SRP_ATTRS is not set
223CONFIG_SCSI_LOWLEVEL=y
224# CONFIG_SCSI_DEBUG is not set
225# CONFIG_ATA is not set
226# CONFIG_MD is not set
227# CONFIG_PHONE is not set
228
229#
230# Input device support
231#
232CONFIG_INPUT=y
233# CONFIG_INPUT_FF_MEMLESS is not set
234# CONFIG_INPUT_POLLDEV is not set
235
236#
237# Userland interfaces
238#
239CONFIG_INPUT_MOUSEDEV=y
240# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
241CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
242CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
243# CONFIG_INPUT_JOYDEV is not set
244# CONFIG_INPUT_EVDEV is not set
245# CONFIG_INPUT_EVBUG is not set
246
247#
248# Input Device Drivers
249#
250# CONFIG_INPUT_KEYBOARD is not set
251# CONFIG_INPUT_MOUSE is not set
252# CONFIG_INPUT_JOYSTICK is not set
253# CONFIG_INPUT_TABLET is not set
254# CONFIG_INPUT_TOUCHSCREEN is not set
255# CONFIG_INPUT_MISC is not set
256
257#
258# Hardware I/O ports
259#
260# CONFIG_SERIO is not set
261# CONFIG_GAMEPORT is not set
262
263#
264# Character devices
265#
266CONFIG_VT=y
267CONFIG_VT_CONSOLE=y
268CONFIG_HW_CONSOLE=y
269# CONFIG_VT_HW_CONSOLE_BINDING is not set
270# CONFIG_SERIAL_NONSTANDARD is not set
271
272#
273# Serial drivers
274#
275# CONFIG_SERIAL_8250 is not set
276
277#
278# Non-8250 serial port support
279#
280CONFIG_SERIAL_SH_SCI=y
281CONFIG_SERIAL_SH_SCI_NR_UARTS=2
282CONFIG_SERIAL_SH_SCI_CONSOLE=y
283CONFIG_SERIAL_CORE=y
284CONFIG_SERIAL_CORE_CONSOLE=y
285CONFIG_UNIX98_PTYS=y
286# CONFIG_LEGACY_PTYS is not set
287# CONFIG_IPMI_HANDLER is not set
288# CONFIG_HW_RANDOM is not set
289# CONFIG_R3964 is not set
290# CONFIG_RAW_DRIVER is not set
291# CONFIG_TCG_TPM is not set
292# CONFIG_I2C is not set
293
294#
295# SPI support
296#
297# CONFIG_SPI is not set
298# CONFIG_SPI_MASTER is not set
299# CONFIG_W1 is not set
300# CONFIG_POWER_SUPPLY is not set
301# CONFIG_HWMON is not set
302# CONFIG_WATCHDOG is not set
303
304#
305# Sonics Silicon Backplane
306#
307CONFIG_SSB_POSSIBLE=y
308# CONFIG_SSB is not set
309
310#
311# Multifunction device drivers
312#
313# CONFIG_MFD_SM501 is not set
314
315#
316# Multimedia devices
317#
318# CONFIG_VIDEO_DEV is not set
319CONFIG_DAB=y
320
321#
322# Graphics support
323#
324# CONFIG_VGASTATE is not set
325CONFIG_VIDEO_OUTPUT_CONTROL=y
326CONFIG_FB=y
327CONFIG_FIRMWARE_EDID=y
328# CONFIG_FB_DDC is not set
329# CONFIG_FB_CFB_FILLRECT is not set
330# CONFIG_FB_CFB_COPYAREA is not set
331# CONFIG_FB_CFB_IMAGEBLIT is not set
332# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
333# CONFIG_FB_SYS_FILLRECT is not set
334# CONFIG_FB_SYS_COPYAREA is not set
335# CONFIG_FB_SYS_IMAGEBLIT is not set
336# CONFIG_FB_SYS_FOPS is not set
337CONFIG_FB_DEFERRED_IO=y
338# CONFIG_FB_SVGALIB is not set
339# CONFIG_FB_MACMODES is not set
340# CONFIG_FB_BACKLIGHT is not set
341CONFIG_FB_MODE_HELPERS=y
342# CONFIG_FB_TILEBLITTING is not set
343
344#
345# Frame buffer hardware drivers
346#
347# CONFIG_FB_S1D13XXX is not set
348# CONFIG_FB_VIRTUAL is not set
349# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
350
351#
352# Display device support
353#
354# CONFIG_DISPLAY_SUPPORT is not set
355
356#
357# Console display driver support
358#
359CONFIG_DUMMY_CONSOLE=y
360CONFIG_FRAMEBUFFER_CONSOLE=y
361# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
362# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
363CONFIG_FONTS=y
364# CONFIG_FONT_8x8 is not set
365CONFIG_FONT_8x16=y
366# CONFIG_FONT_6x11 is not set
367# CONFIG_FONT_7x14 is not set
368# CONFIG_FONT_PEARL_8x8 is not set
369# CONFIG_FONT_ACORN_8x8 is not set
370# CONFIG_FONT_MINI_4x6 is not set
371# CONFIG_FONT_SUN8x16 is not set
372# CONFIG_FONT_SUN12x22 is not set
373# CONFIG_FONT_10x18 is not set
374CONFIG_LOGO=y
375# CONFIG_LOGO_LINUX_MONO is not set
376# CONFIG_LOGO_LINUX_VGA16 is not set
377# CONFIG_LOGO_LINUX_CLUT224 is not set
378# CONFIG_LOGO_SUPERH_MONO is not set
379# CONFIG_LOGO_SUPERH_VGA16 is not set
380CONFIG_LOGO_SUPERH_CLUT224=y
381
382#
383# Sound
384#
385# CONFIG_SOUND is not set
386# CONFIG_HID_SUPPORT is not set
387# CONFIG_USB_SUPPORT is not set
388# CONFIG_MMC is not set
389# CONFIG_NEW_LEDS is not set
390# CONFIG_RTC_CLASS is not set
391
392#
393# Userspace I/O
394#
395# CONFIG_UIO is not set
396
397#
398# File systems
399#
400CONFIG_EXT2_FS=y
401# CONFIG_EXT2_FS_XATTR is not set
402# CONFIG_EXT2_FS_XIP is not set
403CONFIG_EXT3_FS=y
404CONFIG_EXT3_FS_XATTR=y
405# CONFIG_EXT3_FS_POSIX_ACL is not set
406# CONFIG_EXT3_FS_SECURITY is not set
407# CONFIG_EXT4DEV_FS is not set
408CONFIG_JBD=y
409# CONFIG_JBD_DEBUG is not set
410CONFIG_FS_MBCACHE=y
411# CONFIG_REISERFS_FS is not set
412# CONFIG_JFS_FS is not set
413# CONFIG_FS_POSIX_ACL is not set
414# CONFIG_XFS_FS is not set
415# CONFIG_GFS2_FS is not set
416CONFIG_MINIX_FS=y
417CONFIG_ROMFS_FS=y
418CONFIG_INOTIFY=y
419CONFIG_INOTIFY_USER=y
420# CONFIG_QUOTA is not set
421CONFIG_DNOTIFY=y
422# CONFIG_AUTOFS_FS is not set
423# CONFIG_AUTOFS4_FS is not set
424# CONFIG_FUSE_FS is not set
425
426#
427# CD-ROM/DVD Filesystems
428#
429# CONFIG_ISO9660_FS is not set
430# CONFIG_UDF_FS is not set
431
432#
433# DOS/FAT/NT Filesystems
434#
435# CONFIG_MSDOS_FS is not set
436# CONFIG_VFAT_FS is not set
437# CONFIG_NTFS_FS is not set
438
439#
440# Pseudo filesystems
441#
442CONFIG_PROC_FS=y
443CONFIG_PROC_KCORE=y
444CONFIG_PROC_SYSCTL=y
445CONFIG_SYSFS=y
446CONFIG_TMPFS=y
447# CONFIG_TMPFS_POSIX_ACL is not set
448CONFIG_HUGETLBFS=y
449CONFIG_HUGETLB_PAGE=y
450# CONFIG_CONFIGFS_FS is not set
451
452#
453# Miscellaneous filesystems
454#
455# CONFIG_ADFS_FS is not set
456# CONFIG_AFFS_FS is not set
457# CONFIG_HFS_FS is not set
458# CONFIG_HFSPLUS_FS is not set
459# CONFIG_BEFS_FS is not set
460# CONFIG_BFS_FS is not set
461# CONFIG_EFS_FS is not set
462# CONFIG_CRAMFS is not set
463# CONFIG_VXFS_FS is not set
464# CONFIG_HPFS_FS is not set
465# CONFIG_QNX4FS_FS is not set
466# CONFIG_SYSV_FS is not set
467# CONFIG_UFS_FS is not set
468
469#
470# Partition Types
471#
472CONFIG_PARTITION_ADVANCED=y
473# CONFIG_ACORN_PARTITION is not set
474# CONFIG_OSF_PARTITION is not set
475# CONFIG_AMIGA_PARTITION is not set
476# CONFIG_ATARI_PARTITION is not set
477# CONFIG_MAC_PARTITION is not set
478CONFIG_MSDOS_PARTITION=y
479# CONFIG_BSD_DISKLABEL is not set
480# CONFIG_MINIX_SUBPARTITION is not set
481# CONFIG_SOLARIS_X86_PARTITION is not set
482# CONFIG_UNIXWARE_DISKLABEL is not set
483# CONFIG_LDM_PARTITION is not set
484# CONFIG_SGI_PARTITION is not set
485# CONFIG_ULTRIX_PARTITION is not set
486# CONFIG_SUN_PARTITION is not set
487# CONFIG_KARMA_PARTITION is not set
488# CONFIG_EFI_PARTITION is not set
489# CONFIG_SYSV68_PARTITION is not set
490# CONFIG_NLS is not set
491CONFIG_INSTRUMENTATION=y
492CONFIG_PROFILING=y
493# CONFIG_OPROFILE is not set
494# CONFIG_MARKERS is not set
495
496#
497# Kernel hacking
498#
499# CONFIG_PRINTK_TIME is not set
500CONFIG_ENABLE_WARN_DEPRECATED=y
501CONFIG_ENABLE_MUST_CHECK=y
502CONFIG_MAGIC_SYSRQ=y
503# CONFIG_UNUSED_SYMBOLS is not set
504CONFIG_DEBUG_FS=y
505# CONFIG_HEADERS_CHECK is not set
506CONFIG_DEBUG_KERNEL=y
507# CONFIG_DEBUG_SHIRQ is not set
508CONFIG_DETECT_SOFTLOCKUP=y
509CONFIG_SCHED_DEBUG=y
510CONFIG_SCHEDSTATS=y
511# CONFIG_TIMER_STATS is not set
512# CONFIG_DEBUG_SLAB is not set
513# CONFIG_DEBUG_RT_MUTEXES is not set
514# CONFIG_RT_MUTEX_TESTER is not set
515# CONFIG_DEBUG_SPINLOCK is not set
516# CONFIG_DEBUG_MUTEXES is not set
517# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
518# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
519# CONFIG_DEBUG_KOBJECT is not set
520CONFIG_DEBUG_BUGVERBOSE=y
521# CONFIG_DEBUG_INFO is not set
522# CONFIG_DEBUG_VM is not set
523# CONFIG_DEBUG_LIST is not set
524# CONFIG_DEBUG_SG is not set
525CONFIG_FRAME_POINTER=y
526CONFIG_FORCED_INLINING=y
527# CONFIG_BOOT_PRINTK_DELAY is not set
528# CONFIG_FAULT_INJECTION is not set
529# CONFIG_SAMPLES is not set
530# CONFIG_EARLY_PRINTK is not set
531CONFIG_SH64_PROC_TLB=y
532CONFIG_SH64_PROC_ASIDS=y
533CONFIG_SH64_SR_WATCH=y
534# CONFIG_POOR_MANS_STRACE is not set
535CONFIG_SH_NO_BSS_INIT=y
536
537#
538# Security options
539#
540# CONFIG_KEYS is not set
541# CONFIG_SECURITY is not set
542# CONFIG_SECURITY_FILE_CAPABILITIES is not set
543# CONFIG_CRYPTO is not set
544
545#
546# Library routines
547#
548CONFIG_BITREVERSE=y
549# CONFIG_CRC_CCITT is not set
550# CONFIG_CRC16 is not set
551# CONFIG_CRC_ITU_T is not set
552CONFIG_CRC32=y
553# CONFIG_CRC7 is not set
554# CONFIG_LIBCRC32C is not set
555CONFIG_PLIST=y
556CONFIG_HAS_IOMEM=y
557CONFIG_HAS_IOPORT=y
558CONFIG_HAS_DMA=y
diff --git a/arch/sh64/kernel/Makefile b/arch/sh64/kernel/Makefile
deleted file mode 100644
index e3467bda6167..000000000000
--- a/arch/sh64/kernel/Makefile
+++ /dev/null
@@ -1,36 +0,0 @@
1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 2000, 2001 Paolo Alberelli
7# Copyright (C) 2003 Paul Mundt
8#
9# Makefile for the Linux sh64 kernel.
10#
11# Note! Dependencies are done automagically by 'make dep', which also
12# removes any old dependencies. DON'T put your own dependencies here
13# unless it's something special (ie not a .c file).
14#
15
16extra-y := head.o init_task.o vmlinux.lds
17
18obj-y := process.o signal.o entry.o traps.o irq.o irq_intc.o \
19 ptrace.o setup.o time.o sys_sh64.o semaphore.o sh_ksyms.o \
20 switchto.o syscalls.o
21
22obj-$(CONFIG_HEARTBEAT) += led.o
23obj-$(CONFIG_SH_ALPHANUMERIC) += alphanum.o
24obj-$(CONFIG_SH_DMA) += dma.o
25obj-$(CONFIG_SH_FPU) += fpu.o
26obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
27obj-$(CONFIG_KALLSYMS) += unwind.o
28obj-$(CONFIG_PCI) += pcibios.o
29obj-$(CONFIG_MODULES) += module.o
30
31ifeq ($(CONFIG_PCI),y)
32obj-$(CONFIG_CPU_SH5) += pci_sh5.o
33endif
34
35USE_STANDARD_AS_RULE := true
36
diff --git a/arch/sh64/kernel/alphanum.c b/arch/sh64/kernel/alphanum.c
deleted file mode 100644
index d1619d95fbaa..000000000000
--- a/arch/sh64/kernel/alphanum.c
+++ /dev/null
@@ -1,43 +0,0 @@
1/*
2 * arch/sh64/kernel/alphanum.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine-independent functions for handling 8-digit alphanumeric display
10 * (e.g. Agilent HDSP-253x)
11 */
12#include <linux/stddef.h>
13#include <linux/sched.h>
14
15void mach_alphanum(int pos, unsigned char val);
16
17void print_seg(char *file, int line)
18{
19 int i;
20 unsigned int nibble;
21
22 for (i = 0; i < 5; i++) {
23 mach_alphanum(i, file[i]);
24 }
25
26 for (i = 0; i < 3; i++) {
27 nibble = ((line >> (i * 4)) & 0xf);
28 mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48));
29 }
30}
31
32void print_seg_num(unsigned num)
33{
34 int i;
35 unsigned int nibble;
36
37 for (i = 0; i < 8; i++) {
38 nibble = ((num >> (i * 4)) & 0xf);
39
40 mach_alphanum(7 - i, nibble + ((nibble > 9) ? 55 : 48));
41 }
42}
43
diff --git a/arch/sh64/kernel/asm-offsets.c b/arch/sh64/kernel/asm-offsets.c
deleted file mode 100644
index ca76537c16c0..000000000000
--- a/arch/sh64/kernel/asm-offsets.c
+++ /dev/null
@@ -1,33 +0,0 @@
1/*
2 * This program is used to generate definitions needed by
3 * assembly language modules.
4 *
5 * We use the technique used in the OSF Mach kernel code:
6 * generate asm statements containing #defines,
7 * compile this file to assembler, and then extract the
8 * #defines from the assembly-language output.
9 */
10
11#include <linux/stddef.h>
12#include <linux/types.h>
13#include <linux/mm.h>
14#include <asm/thread_info.h>
15
16#define DEFINE(sym, val) \
17 asm volatile("\n->" #sym " %0 " #val : : "i" (val))
18
19#define BLANK() asm volatile("\n->" : : )
20
21int main(void)
22{
23 /* offsets into the thread_info struct */
24 DEFINE(TI_TASK, offsetof(struct thread_info, task));
25 DEFINE(TI_EXEC_DOMAIN, offsetof(struct thread_info, exec_domain));
26 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
27 DEFINE(TI_PRE_COUNT, offsetof(struct thread_info, preempt_count));
28 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
29 DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
30 DEFINE(TI_RESTART_BLOCK,offsetof(struct thread_info, restart_block));
31
32 return 0;
33}
diff --git a/arch/sh64/kernel/dma.c b/arch/sh64/kernel/dma.c
deleted file mode 100644
index 32c6f0549bf1..000000000000
--- a/arch/sh64/kernel/dma.c
+++ /dev/null
@@ -1,297 +0,0 @@
1/*
2 * arch/sh64/kernel/dma.c
3 *
4 * DMA routines for the SH-5 DMAC.
5 *
6 * Copyright (C) 2003 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/interrupt.h>
15#include <linux/types.h>
16#include <linux/irq.h>
17#include <linux/spinlock.h>
18#include <linux/mm.h>
19#include <asm/hardware.h>
20#include <asm/dma.h>
21#include <asm/signal.h>
22#include <asm/errno.h>
23#include <asm/io.h>
24
25typedef struct {
26 unsigned long dev_addr;
27 unsigned long mem_addr;
28
29 unsigned int mode;
30 unsigned int count;
31} dma_info_t;
32
33static dma_info_t dma_info[MAX_DMA_CHANNELS];
34static DEFINE_SPINLOCK(dma_spin_lock);
35
36/* arch/sh64/kernel/irq_intc.c */
37extern void make_intc_irq(unsigned int irq);
38
39/* DMAC Interrupts */
40#define DMA_IRQ_DMTE0 18
41#define DMA_IRQ_DERR 22
42
43#define DMAC_COMMON_BASE (dmac_base + 0x08)
44#define DMAC_SAR_BASE (dmac_base + 0x10)
45#define DMAC_DAR_BASE (dmac_base + 0x18)
46#define DMAC_COUNT_BASE (dmac_base + 0x20)
47#define DMAC_CTRL_BASE (dmac_base + 0x28)
48#define DMAC_STATUS_BASE (dmac_base + 0x30)
49
50#define DMAC_SAR(n) (DMAC_SAR_BASE + ((n) * 0x28))
51#define DMAC_DAR(n) (DMAC_DAR_BASE + ((n) * 0x28))
52#define DMAC_COUNT(n) (DMAC_COUNT_BASE + ((n) * 0x28))
53#define DMAC_CTRL(n) (DMAC_CTRL_BASE + ((n) * 0x28))
54#define DMAC_STATUS(n) (DMAC_STATUS_BASE + ((n) * 0x28))
55
56/* DMAC.COMMON Bit Definitions */
57#define DMAC_COMMON_PR 0x00000001 /* Priority */
58 /* Bits 1-2 Reserved */
59#define DMAC_COMMON_ME 0x00000008 /* Master Enable */
60#define DMAC_COMMON_NMI 0x00000010 /* NMI Flag */
61 /* Bits 5-6 Reserved */
62#define DMAC_COMMON_ER 0x00000780 /* Error Response */
63#define DMAC_COMMON_AAE 0x00007800 /* Address Alignment Error */
64 /* Bits 15-63 Reserved */
65
66/* DMAC.SAR Bit Definitions */
67#define DMAC_SAR_ADDR 0xffffffff /* Source Address */
68
69/* DMAC.DAR Bit Definitions */
70#define DMAC_DAR_ADDR 0xffffffff /* Destination Address */
71
72/* DMAC.COUNT Bit Definitions */
73#define DMAC_COUNT_CNT 0xffffffff /* Transfer Count */
74
75/* DMAC.CTRL Bit Definitions */
76#define DMAC_CTRL_TS 0x00000007 /* Transfer Size */
77#define DMAC_CTRL_SI 0x00000018 /* Source Increment */
78#define DMAC_CTRL_DI 0x00000060 /* Destination Increment */
79#define DMAC_CTRL_RS 0x00000780 /* Resource Select */
80#define DMAC_CTRL_IE 0x00000800 /* Interrupt Enable */
81#define DMAC_CTRL_TE 0x00001000 /* Transfer Enable */
82 /* Bits 15-63 Reserved */
83
84/* DMAC.STATUS Bit Definitions */
85#define DMAC_STATUS_TE 0x00000001 /* Transfer End */
86#define DMAC_STATUS_AAE 0x00000002 /* Address Alignment Error */
87 /* Bits 2-63 Reserved */
88
89static unsigned long dmac_base;
90
91void set_dma_count(unsigned int chan, unsigned int count);
92void set_dma_addr(unsigned int chan, unsigned int addr);
93
94static irqreturn_t dma_mte(int irq, void *dev_id, struct pt_regs *regs)
95{
96 unsigned int chan = irq - DMA_IRQ_DMTE0;
97 dma_info_t *info = dma_info + chan;
98 u64 status;
99
100 if (info->mode & DMA_MODE_WRITE) {
101 sh64_out64(info->mem_addr & DMAC_SAR_ADDR, DMAC_SAR(chan));
102 } else {
103 sh64_out64(info->mem_addr & DMAC_DAR_ADDR, DMAC_DAR(chan));
104 }
105
106 set_dma_count(chan, info->count);
107
108 /* Clear the TE bit */
109 status = sh64_in64(DMAC_STATUS(chan));
110 status &= ~DMAC_STATUS_TE;
111 sh64_out64(status, DMAC_STATUS(chan));
112
113 return IRQ_HANDLED;
114}
115
116static struct irqaction irq_dmte = {
117 .handler = dma_mte,
118 .flags = IRQF_DISABLED,
119 .name = "DMA MTE",
120};
121
122static irqreturn_t dma_err(int irq, void *dev_id, struct pt_regs *regs)
123{
124 u64 tmp;
125 u8 chan;
126
127 printk(KERN_NOTICE "DMAC: Got a DMA Error!\n");
128
129 tmp = sh64_in64(DMAC_COMMON_BASE);
130
131 /* Check for the type of error */
132 if ((chan = tmp & DMAC_COMMON_AAE)) {
133 /* It's an address alignment error.. */
134 printk(KERN_NOTICE "DMAC: Alignment error on channel %d, ", chan);
135
136 printk(KERN_NOTICE "SAR: 0x%08llx, DAR: 0x%08llx, COUNT: %lld\n",
137 (sh64_in64(DMAC_SAR(chan)) & DMAC_SAR_ADDR),
138 (sh64_in64(DMAC_DAR(chan)) & DMAC_DAR_ADDR),
139 (sh64_in64(DMAC_COUNT(chan)) & DMAC_COUNT_CNT));
140
141 } else if ((chan = tmp & DMAC_COMMON_ER)) {
142 /* Something else went wrong.. */
143 printk(KERN_NOTICE "DMAC: Error on channel %d\n", chan);
144 }
145
146 /* Reset the ME bit to clear the interrupt */
147 tmp |= DMAC_COMMON_ME;
148 sh64_out64(tmp, DMAC_COMMON_BASE);
149
150 return IRQ_HANDLED;
151}
152
153static struct irqaction irq_derr = {
154 .handler = dma_err,
155 .flags = IRQF_DISABLED,
156 .name = "DMA Error",
157};
158
159static inline unsigned long calc_xmit_shift(unsigned int chan)
160{
161 return sh64_in64(DMAC_CTRL(chan)) & 0x03;
162}
163
164void setup_dma(unsigned int chan, dma_info_t *info)
165{
166 unsigned int irq = DMA_IRQ_DMTE0 + chan;
167 dma_info_t *dma = dma_info + chan;
168
169 make_intc_irq(irq);
170 setup_irq(irq, &irq_dmte);
171 dma = info;
172}
173
174void enable_dma(unsigned int chan)
175{
176 u64 ctrl;
177
178 ctrl = sh64_in64(DMAC_CTRL(chan));
179 ctrl |= DMAC_CTRL_TE;
180 sh64_out64(ctrl, DMAC_CTRL(chan));
181}
182
183void disable_dma(unsigned int chan)
184{
185 u64 ctrl;
186
187 ctrl = sh64_in64(DMAC_CTRL(chan));
188 ctrl &= ~DMAC_CTRL_TE;
189 sh64_out64(ctrl, DMAC_CTRL(chan));
190}
191
192void set_dma_mode(unsigned int chan, char mode)
193{
194 dma_info_t *info = dma_info + chan;
195
196 info->mode = mode;
197
198 set_dma_addr(chan, info->mem_addr);
199 set_dma_count(chan, info->count);
200}
201
202void set_dma_addr(unsigned int chan, unsigned int addr)
203{
204 dma_info_t *info = dma_info + chan;
205 unsigned long sar, dar;
206
207 info->mem_addr = addr;
208 sar = (info->mode & DMA_MODE_WRITE) ? info->mem_addr : info->dev_addr;
209 dar = (info->mode & DMA_MODE_WRITE) ? info->dev_addr : info->mem_addr;
210
211 sh64_out64(sar & DMAC_SAR_ADDR, DMAC_SAR(chan));
212 sh64_out64(dar & DMAC_SAR_ADDR, DMAC_DAR(chan));
213}
214
215void set_dma_count(unsigned int chan, unsigned int count)
216{
217 dma_info_t *info = dma_info + chan;
218 u64 tmp;
219
220 info->count = count;
221
222 tmp = (info->count >> calc_xmit_shift(chan)) & DMAC_COUNT_CNT;
223
224 sh64_out64(tmp, DMAC_COUNT(chan));
225}
226
227unsigned long claim_dma_lock(void)
228{
229 unsigned long flags;
230
231 spin_lock_irqsave(&dma_spin_lock, flags);
232
233 return flags;
234}
235
236void release_dma_lock(unsigned long flags)
237{
238 spin_unlock_irqrestore(&dma_spin_lock, flags);
239}
240
241int get_dma_residue(unsigned int chan)
242{
243 return sh64_in64(DMAC_COUNT(chan) << calc_xmit_shift(chan));
244}
245
246int __init init_dma(void)
247{
248 struct vcr_info vcr;
249 u64 tmp;
250
251 /* Remap the DMAC */
252 dmac_base = onchip_remap(PHYS_DMAC_BLOCK, 1024, "DMAC");
253 if (!dmac_base) {
254 printk(KERN_ERR "Unable to remap DMAC\n");
255 return -ENOMEM;
256 }
257
258 /* Report DMAC.VCR Info */
259 vcr = sh64_get_vcr_info(dmac_base);
260 printk("DMAC: Module ID: 0x%04x, Module version: 0x%04x\n",
261 vcr.mod_id, vcr.mod_vers);
262
263 /* Set the ME bit */
264 tmp = sh64_in64(DMAC_COMMON_BASE);
265 tmp |= DMAC_COMMON_ME;
266 sh64_out64(tmp, DMAC_COMMON_BASE);
267
268 /* Enable the DMAC Error Interrupt */
269 make_intc_irq(DMA_IRQ_DERR);
270 setup_irq(DMA_IRQ_DERR, &irq_derr);
271
272 return 0;
273}
274
275static void __exit exit_dma(void)
276{
277 onchip_unmap(dmac_base);
278 free_irq(DMA_IRQ_DERR, 0);
279}
280
281module_init(init_dma);
282module_exit(exit_dma);
283
284MODULE_AUTHOR("Paul Mundt");
285MODULE_DESCRIPTION("DMA API for SH-5 DMAC");
286MODULE_LICENSE("GPL");
287
288EXPORT_SYMBOL(setup_dma);
289EXPORT_SYMBOL(claim_dma_lock);
290EXPORT_SYMBOL(release_dma_lock);
291EXPORT_SYMBOL(enable_dma);
292EXPORT_SYMBOL(disable_dma);
293EXPORT_SYMBOL(set_dma_mode);
294EXPORT_SYMBOL(set_dma_addr);
295EXPORT_SYMBOL(set_dma_count);
296EXPORT_SYMBOL(get_dma_residue);
297
diff --git a/arch/sh64/kernel/early_printk.c b/arch/sh64/kernel/early_printk.c
deleted file mode 100644
index 4f9131123672..000000000000
--- a/arch/sh64/kernel/early_printk.c
+++ /dev/null
@@ -1,99 +0,0 @@
1/*
2 * arch/sh64/kernel/early_printk.c
3 *
4 * SH-5 Early SCIF console (cloned and hacked from sh implementation)
5 *
6 * Copyright (C) 2003, 2004 Paul Mundt <lethal@linux-sh.org>
7 * Copyright (C) 2002 M. R. Brown <mrbrown@0xd6.org>
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/console.h>
14#include <linux/tty.h>
15#include <linux/init.h>
16#include <asm/io.h>
17#include <asm/hardware.h>
18
19#define SCIF_BASE_ADDR 0x01030000
20#define SCIF_ADDR_SH5 PHYS_PERIPHERAL_BLOCK+SCIF_BASE_ADDR
21
22/*
23 * Fixed virtual address where SCIF is mapped (should already be done
24 * in arch/sh64/kernel/head.S!).
25 */
26#define SCIF_REG 0xfa030000
27
28enum {
29 SCIF_SCSMR2 = SCIF_REG + 0x00,
30 SCIF_SCBRR2 = SCIF_REG + 0x04,
31 SCIF_SCSCR2 = SCIF_REG + 0x08,
32 SCIF_SCFTDR2 = SCIF_REG + 0x0c,
33 SCIF_SCFSR2 = SCIF_REG + 0x10,
34 SCIF_SCFRDR2 = SCIF_REG + 0x14,
35 SCIF_SCFCR2 = SCIF_REG + 0x18,
36 SCIF_SCFDR2 = SCIF_REG + 0x1c,
37 SCIF_SCSPTR2 = SCIF_REG + 0x20,
38 SCIF_SCLSR2 = SCIF_REG + 0x24,
39};
40
41static void sh_console_putc(int c)
42{
43 while (!(ctrl_inw(SCIF_SCFSR2) & 0x20))
44 cpu_relax();
45
46 ctrl_outb(c, SCIF_SCFTDR2);
47 ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0x9f), SCIF_SCFSR2);
48
49 if (c == '\n')
50 sh_console_putc('\r');
51}
52
53static void sh_console_flush(void)
54{
55 ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2);
56
57 while (!(ctrl_inw(SCIF_SCFSR2) & 0x40))
58 cpu_relax();
59
60 ctrl_outw((ctrl_inw(SCIF_SCFSR2) & 0xbf), SCIF_SCFSR2);
61}
62
63static void sh_console_write(struct console *con, const char *s, unsigned count)
64{
65 while (count-- > 0)
66 sh_console_putc(*s++);
67
68 sh_console_flush();
69}
70
71static int __init sh_console_setup(struct console *con, char *options)
72{
73 con->cflag = CREAD | HUPCL | CLOCAL | B19200 | CS8;
74
75 return 0;
76}
77
78static struct console sh_console = {
79 .name = "scifcon",
80 .write = sh_console_write,
81 .setup = sh_console_setup,
82 .flags = CON_PRINTBUFFER | CON_BOOT,
83 .index = -1,
84};
85
86void __init enable_early_printk(void)
87{
88 ctrl_outb(0x2a, SCIF_SCBRR2); /* 19200bps */
89
90 ctrl_outw(0x04, SCIF_SCFCR2); /* Reset TFRST */
91 ctrl_outw(0x10, SCIF_SCFCR2); /* TTRG0=1 */
92
93 ctrl_outw(0, SCIF_SCSPTR2);
94 ctrl_outw(0x60, SCIF_SCFSR2);
95 ctrl_outw(0, SCIF_SCLSR2);
96 ctrl_outw(0x30, SCIF_SCSCR2);
97
98 register_console(&sh_console);
99}
diff --git a/arch/sh64/kernel/init_task.c b/arch/sh64/kernel/init_task.c
deleted file mode 100644
index deee8bfd3270..000000000000
--- a/arch/sh64/kernel/init_task.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/init_task.c
7 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt
10 *
11 */
12#include <linux/rwsem.h>
13#include <linux/mm.h>
14#include <linux/sched.h>
15#include <linux/init_task.h>
16#include <linux/mqueue.h>
17#include <linux/fs.h>
18#include <asm/uaccess.h>
19#include <asm/pgtable.h>
20
21static struct fs_struct init_fs = INIT_FS;
22static struct files_struct init_files = INIT_FILES;
23static struct signal_struct init_signals = INIT_SIGNALS(init_signals);
24static struct sighand_struct init_sighand = INIT_SIGHAND(init_sighand);
25struct mm_struct init_mm = INIT_MM(init_mm);
26
27struct pt_regs fake_swapper_regs;
28
29/*
30 * Initial thread structure.
31 *
32 * We need to make sure that this is THREAD_SIZE-byte aligned due
33 * to the way process stacks are handled. This is done by having a
34 * special "init_task" linker map entry..
35 */
36union thread_union init_thread_union
37 __attribute__((__section__(".data.init_task"))) =
38 { INIT_THREAD_INFO(init_task) };
39
40/*
41 * Initial task structure.
42 *
43 * All other task structs will be allocated on slabs in fork.c
44 */
45struct task_struct init_task = INIT_TASK(init_task);
46
diff --git a/arch/sh64/kernel/irq.c b/arch/sh64/kernel/irq.c
deleted file mode 100644
index 9412b7166700..000000000000
--- a/arch/sh64/kernel/irq.c
+++ /dev/null
@@ -1,115 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/irq.c
7 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt
10 *
11 */
12
13/*
14 * IRQs are in fact implemented a bit like signal handlers for the kernel.
15 * Naturally it's not a 1:1 relation, but there are similarities.
16 */
17
18#include <linux/errno.h>
19#include <linux/kernel_stat.h>
20#include <linux/signal.h>
21#include <linux/rwsem.h>
22#include <linux/sched.h>
23#include <linux/ioport.h>
24#include <linux/interrupt.h>
25#include <linux/timex.h>
26#include <linux/slab.h>
27#include <linux/random.h>
28#include <linux/smp.h>
29#include <linux/init.h>
30#include <linux/seq_file.h>
31#include <linux/bitops.h>
32#include <asm/system.h>
33#include <asm/io.h>
34#include <asm/smp.h>
35#include <asm/pgalloc.h>
36#include <asm/delay.h>
37#include <asm/irq.h>
38#include <linux/irq.h>
39
40void ack_bad_irq(unsigned int irq)
41{
42 printk("unexpected IRQ trap at irq %02x\n", irq);
43}
44
45#if defined(CONFIG_PROC_FS)
46int show_interrupts(struct seq_file *p, void *v)
47{
48 int i = *(loff_t *) v, j;
49 struct irqaction * action;
50 unsigned long flags;
51
52 if (i == 0) {
53 seq_puts(p, " ");
54 for_each_online_cpu(j)
55 seq_printf(p, "CPU%d ",j);
56 seq_putc(p, '\n');
57 }
58
59 if (i < NR_IRQS) {
60 spin_lock_irqsave(&irq_desc[i].lock, flags);
61 action = irq_desc[i].action;
62 if (!action)
63 goto unlock;
64 seq_printf(p, "%3d: ",i);
65 seq_printf(p, "%10u ", kstat_irqs(i));
66 seq_printf(p, " %14s", irq_desc[i].chip->typename);
67 seq_printf(p, " %s", action->name);
68
69 for (action=action->next; action; action = action->next)
70 seq_printf(p, ", %s", action->name);
71 seq_putc(p, '\n');
72unlock:
73 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
74 }
75 return 0;
76}
77#endif
78
79/*
80 * do_NMI handles all Non-Maskable Interrupts.
81 */
82asmlinkage void do_NMI(unsigned long vector_num, struct pt_regs * regs)
83{
84 if (regs->sr & 0x40000000)
85 printk("unexpected NMI trap in system mode\n");
86 else
87 printk("unexpected NMI trap in user mode\n");
88
89 /* No statistics */
90}
91
92/*
93 * do_IRQ handles all normal device IRQ's.
94 */
95asmlinkage int do_IRQ(unsigned long vector_num, struct pt_regs * regs)
96{
97 struct pt_regs *old_regs = set_irq_regs(regs);
98 int irq;
99
100 irq_enter();
101
102 irq = irq_demux(vector_num);
103
104 if (irq >= 0) {
105 __do_IRQ(irq);
106 } else {
107 printk("unexpected IRQ trap at vector %03lx\n", vector_num);
108 }
109
110 irq_exit();
111
112 set_irq_regs(old_regs);
113 return 1;
114}
115
diff --git a/arch/sh64/kernel/led.c b/arch/sh64/kernel/led.c
deleted file mode 100644
index e35d3f667fb4..000000000000
--- a/arch/sh64/kernel/led.c
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * arch/sh64/kernel/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Flash the LEDs
10 */
11#include <linux/stddef.h>
12#include <linux/sched.h>
13
14void mach_led(int pos, int val);
15
16/* acts like an actual heart beat -- ie thump-thump-pause... */
17void heartbeat(void)
18{
19 static unsigned int cnt = 0, period = 0, dist = 0;
20
21 if (cnt == 0 || cnt == dist) {
22 mach_led(-1, 1);
23 } else if (cnt == 7 || cnt == dist + 7) {
24 mach_led(-1, 0);
25 }
26
27 if (++cnt > period) {
28 cnt = 0;
29
30 /*
31 * The hyperbolic function below modifies the heartbeat period
32 * length in dependency of the current (5min) load. It goes
33 * through the points f(0)=126, f(1)=86, f(5)=51, f(inf)->30.
34 */
35 period = ((672 << FSHIFT) / (5 * avenrun[0] +
36 (7 << FSHIFT))) + 30;
37 dist = period / 4;
38 }
39}
40
diff --git a/arch/sh64/kernel/module.c b/arch/sh64/kernel/module.c
deleted file mode 100644
index 2598f6b88b44..000000000000
--- a/arch/sh64/kernel/module.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/* Kernel module help for sh64.
2
3 This program is free software; you can redistribute it and/or modify
4 it under the terms of the GNU General Public License as published by
5 the Free Software Foundation; either version 2 of the License, or
6 (at your option) any later version.
7
8 This program is distributed in the hope that it will be useful,
9 but WITHOUT ANY WARRANTY; without even the implied warranty of
10 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 GNU General Public License for more details.
12
13 You should have received a copy of the GNU General Public License
14 along with this program; if not, write to the Free Software
15 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
16
17 Copyright 2004 SuperH (UK) Ltd
18 Author: Richard Curnow
19
20 Based on the sh version, and on code from the sh64-specific parts of
21 modutils, originally written by Richard Curnow and Ben Gaster.
22
23*/
24#include <linux/moduleloader.h>
25#include <linux/elf.h>
26#include <linux/vmalloc.h>
27#include <linux/fs.h>
28#include <linux/string.h>
29#include <linux/kernel.h>
30
31#if 0
32#define DEBUGP printk
33#else
34#define DEBUGP(fmt...)
35#endif
36
37void *module_alloc(unsigned long size)
38{
39 if (size == 0)
40 return NULL;
41 return vmalloc(size);
42}
43
44
45/* Free memory returned from module_alloc */
46void module_free(struct module *mod, void *module_region)
47{
48 vfree(module_region);
49 /* FIXME: If module_region == mod->init_region, trim exception
50 table entries. */
51}
52
53/* We don't need anything special. */
54int module_frob_arch_sections(Elf_Ehdr *hdr,
55 Elf_Shdr *sechdrs,
56 char *secstrings,
57 struct module *mod)
58{
59 return 0;
60}
61
62int apply_relocate_add(Elf32_Shdr *sechdrs,
63 const char *strtab,
64 unsigned int symindex,
65 unsigned int relsec,
66 struct module *me)
67{
68 unsigned int i;
69 Elf32_Rela *rel = (void *)sechdrs[relsec].sh_addr;
70 Elf32_Sym *sym;
71 Elf32_Addr relocation;
72 uint32_t *location;
73 int align;
74 int is_shmedia;
75
76 DEBUGP("Applying relocate section %u to %u\n", relsec,
77 sechdrs[relsec].sh_info);
78 for (i = 0; i < sechdrs[relsec].sh_size / sizeof(*rel); i++) {
79 /* This is where to make the change */
80 location = (void *)sechdrs[sechdrs[relsec].sh_info].sh_addr
81 + rel[i].r_offset;
82 /* This is the symbol it is referring to. Note that all
83 undefined symbols have been resolved. */
84 sym = (Elf32_Sym *)sechdrs[symindex].sh_addr
85 + ELF32_R_SYM(rel[i].r_info);
86 relocation = sym->st_value + rel[i].r_addend;
87 align = (int)location & 3;
88
89 /* For text addresses, bit2 of the st_other field indicates
90 * whether the symbol is SHmedia (1) or SHcompact (0). If
91 * SHmedia, the LSB of the symbol needs to be asserted
92 * for the CPU to be in SHmedia mode when it starts executing
93 * the branch target. */
94 is_shmedia = (sym->st_other & 4) ? 1 : 0;
95 if (is_shmedia) {
96 relocation |= 1;
97 }
98
99 switch (ELF32_R_TYPE(rel[i].r_info)) {
100 case R_SH_DIR32:
101 DEBUGP("R_SH_DIR32 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
102 *location += relocation;
103 break;
104 case R_SH_REL32:
105 DEBUGP("R_SH_REL32 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
106 relocation -= (Elf32_Addr) location;
107 *location += relocation;
108 break;
109 case R_SH_IMM_LOW16:
110 DEBUGP("R_SH_IMM_LOW16 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
111 *location = (*location & ~0x3fffc00) |
112 ((relocation & 0xffff) << 10);
113 break;
114 case R_SH_IMM_MEDLOW16:
115 DEBUGP("R_SH_IMM_MEDLOW16 @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
116 *location = (*location & ~0x3fffc00) |
117 (((relocation >> 16) & 0xffff) << 10);
118 break;
119 case R_SH_IMM_LOW16_PCREL:
120 DEBUGP("R_SH_IMM_LOW16_PCREL @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
121 relocation -= (Elf32_Addr) location;
122 *location = (*location & ~0x3fffc00) |
123 ((relocation & 0xffff) << 10);
124 break;
125 case R_SH_IMM_MEDLOW16_PCREL:
126 DEBUGP("R_SH_IMM_MEDLOW16_PCREL @%08lx = %08lx\n", (unsigned long) location, (unsigned long) relocation);
127 relocation -= (Elf32_Addr) location;
128 *location = (*location & ~0x3fffc00) |
129 (((relocation >> 16) & 0xffff) << 10);
130 break;
131 default:
132 printk(KERN_ERR "module %s: Unknown relocation: %u\n",
133 me->name, ELF32_R_TYPE(rel[i].r_info));
134 return -ENOEXEC;
135 }
136 }
137 return 0;
138}
139
140int apply_relocate(Elf32_Shdr *sechdrs,
141 const char *strtab,
142 unsigned int symindex,
143 unsigned int relsec,
144 struct module *me)
145{
146 printk(KERN_ERR "module %s: REL RELOCATION unsupported\n",
147 me->name);
148 return -ENOEXEC;
149}
150
151int module_finalize(const Elf_Ehdr *hdr,
152 const Elf_Shdr *sechdrs,
153 struct module *me)
154{
155 return 0;
156}
157
158void module_arch_cleanup(struct module *mod)
159{
160}
161
diff --git a/arch/sh64/kernel/pci_sh5.c b/arch/sh64/kernel/pci_sh5.c
deleted file mode 100644
index b4d9534d2b0e..000000000000
--- a/arch/sh64/kernel/pci_sh5.c
+++ /dev/null
@@ -1,536 +0,0 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 * Copyright (C) 2003, 2004 Paul Mundt
4 * Copyright (C) 2004 Richard Curnow
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Support functions for the SH5 PCI hardware.
10 */
11
12#include <linux/kernel.h>
13#include <linux/rwsem.h>
14#include <linux/smp.h>
15#include <linux/interrupt.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20#include <linux/types.h>
21#include <asm/pci.h>
22#include <linux/irq.h>
23
24#include <asm/io.h>
25#include <asm/hardware.h>
26#include "pci_sh5.h"
27
28static unsigned long pcicr_virt;
29unsigned long pciio_virt;
30
31static void __init pci_fixup_ide_bases(struct pci_dev *d)
32{
33 int i;
34
35 /*
36 * PCI IDE controllers use non-standard I/O port decoding, respect it.
37 */
38 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
39 return;
40 printk("PCI: IDE base address fixup for %s\n", pci_name(d));
41 for(i=0; i<4; i++) {
42 struct resource *r = &d->resource[i];
43 if ((r->start & ~0x80) == 0x374) {
44 r->start |= 2;
45 r->end = r->start;
46 }
47 }
48}
49DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
50
51char * __devinit pcibios_setup(char *str)
52{
53 return str;
54}
55
56/* Rounds a number UP to the nearest power of two. Used for
57 * sizing the PCI window.
58 */
59static u32 __init r2p2(u32 num)
60{
61 int i = 31;
62 u32 tmp = num;
63
64 if (num == 0)
65 return 0;
66
67 do {
68 if (tmp & (1 << 31))
69 break;
70 i--;
71 tmp <<= 1;
72 } while (i >= 0);
73
74 tmp = 1 << i;
75 /* If the original number isn't a power of 2, round it up */
76 if (tmp != num)
77 tmp <<= 1;
78
79 return tmp;
80}
81
82extern unsigned long long memory_start, memory_end;
83
84int __init sh5pci_init(unsigned memStart, unsigned memSize)
85{
86 u32 lsr0;
87 u32 uval;
88
89 pcicr_virt = onchip_remap(SH5PCI_ICR_BASE, 1024, "PCICR");
90 if (!pcicr_virt) {
91 panic("Unable to remap PCICR\n");
92 }
93
94 pciio_virt = onchip_remap(SH5PCI_IO_BASE, 0x10000, "PCIIO");
95 if (!pciio_virt) {
96 panic("Unable to remap PCIIO\n");
97 }
98
99 pr_debug("Register base addres is 0x%08lx\n", pcicr_virt);
100
101 /* Clear snoop registers */
102 SH5PCI_WRITE(CSCR0, 0);
103 SH5PCI_WRITE(CSCR1, 0);
104
105 pr_debug("Wrote to reg\n");
106
107 /* Switch off interrupts */
108 SH5PCI_WRITE(INTM, 0);
109 SH5PCI_WRITE(AINTM, 0);
110 SH5PCI_WRITE(PINTM, 0);
111
112 /* Set bus active, take it out of reset */
113 uval = SH5PCI_READ(CR);
114
115 /* Set command Register */
116 SH5PCI_WRITE(CR, uval | CR_LOCK_MASK | CR_CFINT| CR_FTO | CR_PFE | CR_PFCS | CR_BMAM);
117
118 uval=SH5PCI_READ(CR);
119 pr_debug("CR is actually 0x%08x\n",uval);
120
121 /* Allow it to be a master */
122 /* NB - WE DISABLE I/O ACCESS to stop overlap */
123 /* set WAIT bit to enable stepping, an attempt to improve stability */
124 SH5PCI_WRITE_SHORT(CSR_CMD,
125 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_WAIT);
126
127 /*
128 ** Set translation mapping memory in order to convert the address
129 ** used for the main bus, to the PCI internal address.
130 */
131 SH5PCI_WRITE(MBR,0x40000000);
132
133 /* Always set the max size 512M */
134 SH5PCI_WRITE(MBMR, PCISH5_MEM_SIZCONV(512*1024*1024));
135
136 /*
137 ** I/O addresses are mapped at internal PCI specific address
138 ** as is described into the configuration bridge table.
139 ** These are changed to 0, to allow cards that have legacy
140 ** io such as vga to function correctly. We set the SH5 IOBAR to
141 ** 256K, which is a bit big as we can only have 64K of address space
142 */
143
144 SH5PCI_WRITE(IOBR,0x0);
145
146 pr_debug("PCI:Writing 0x%08x to IOBR\n",0);
147
148 /* Set up a 256K window. Totally pointless waste of address space */
149 SH5PCI_WRITE(IOBMR,0);
150 pr_debug("PCI:Writing 0x%08x to IOBMR\n",0);
151
152 /* The SH5 has a HUGE 256K I/O region, which breaks the PCI spec. Ideally,
153 * we would want to map the I/O region somewhere, but it is so big this is not
154 * that easy!
155 */
156 SH5PCI_WRITE(CSR_IBAR0,~0);
157 /* Set memory size value */
158 memSize = memory_end - memory_start;
159
160 /* Now we set up the mbars so the PCI bus can see the memory of the machine */
161 if (memSize < (1024 * 1024)) {
162 printk(KERN_ERR "PCISH5: Ridiculous memory size of 0x%x?\n", memSize);
163 return -EINVAL;
164 }
165
166 /* Set LSR 0 */
167 lsr0 = (memSize > (512 * 1024 * 1024)) ? 0x1ff00001 : ((r2p2(memSize) - 0x100000) | 0x1);
168 SH5PCI_WRITE(LSR0, lsr0);
169
170 pr_debug("PCI:Writing 0x%08x to LSR0\n",lsr0);
171
172 /* Set MBAR 0 */
173 SH5PCI_WRITE(CSR_MBAR0, memory_start);
174 SH5PCI_WRITE(LAR0, memory_start);
175
176 SH5PCI_WRITE(CSR_MBAR1,0);
177 SH5PCI_WRITE(LAR1,0);
178 SH5PCI_WRITE(LSR1,0);
179
180 pr_debug("PCI:Writing 0x%08llx to CSR_MBAR0\n",memory_start);
181 pr_debug("PCI:Writing 0x%08llx to LAR0\n",memory_start);
182
183 /* Enable the PCI interrupts on the device */
184 SH5PCI_WRITE(INTM, ~0);
185 SH5PCI_WRITE(AINTM, ~0);
186 SH5PCI_WRITE(PINTM, ~0);
187
188 pr_debug("Switching on all error interrupts\n");
189
190 return(0);
191}
192
193static int sh5pci_read(struct pci_bus *bus, unsigned int devfn, int where,
194 int size, u32 *val)
195{
196 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
197
198 switch (size) {
199 case 1:
200 *val = (u8)SH5PCI_READ_BYTE(PDR + (where & 3));
201 break;
202 case 2:
203 *val = (u16)SH5PCI_READ_SHORT(PDR + (where & 2));
204 break;
205 case 4:
206 *val = SH5PCI_READ(PDR);
207 break;
208 }
209
210 return PCIBIOS_SUCCESSFUL;
211}
212
213static int sh5pci_write(struct pci_bus *bus, unsigned int devfn, int where,
214 int size, u32 val)
215{
216 SH5PCI_WRITE(PAR, CONFIG_CMD(bus, devfn, where));
217
218 switch (size) {
219 case 1:
220 SH5PCI_WRITE_BYTE(PDR + (where & 3), (u8)val);
221 break;
222 case 2:
223 SH5PCI_WRITE_SHORT(PDR + (where & 2), (u16)val);
224 break;
225 case 4:
226 SH5PCI_WRITE(PDR, val);
227 break;
228 }
229
230 return PCIBIOS_SUCCESSFUL;
231}
232
233static struct pci_ops pci_config_ops = {
234 .read = sh5pci_read,
235 .write = sh5pci_write,
236};
237
238/* Everything hangs off this */
239static struct pci_bus *pci_root_bus;
240
241
242static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
243{
244 pr_debug("swizzle for dev %d on bus %d slot %d pin is %d\n",
245 dev->devfn,dev->bus->number, PCI_SLOT(dev->devfn),*pin);
246 return PCI_SLOT(dev->devfn);
247}
248
249static inline u8 bridge_swizzle(u8 pin, u8 slot)
250{
251 return (((pin-1) + slot) % 4) + 1;
252}
253
254u8 __init common_swizzle(struct pci_dev *dev, u8 *pinp)
255{
256 if (dev->bus->number != 0) {
257 u8 pin = *pinp;
258 do {
259 pin = bridge_swizzle(pin, PCI_SLOT(dev->devfn));
260 /* Move up the chain of bridges. */
261 dev = dev->bus->self;
262 } while (dev->bus->self);
263 *pinp = pin;
264
265 /* The slot is the slot of the last bridge. */
266 }
267
268 return PCI_SLOT(dev->devfn);
269}
270
271/* This needs to be shunted out of here into the board specific bit */
272
273static int __init map_cayman_irq(struct pci_dev *dev, u8 slot, u8 pin)
274{
275 int result = -1;
276
277 /* The complication here is that the PCI IRQ lines from the Cayman's 2
278 5V slots get into the CPU via a different path from the IRQ lines
279 from the 3 3.3V slots. Thus, we have to detect whether the card's
280 interrupts go via the 5V or 3.3V path, i.e. the 'bridge swizzling'
281 at the point where we cross from 5V to 3.3V is not the normal case.
282
283 The added complication is that we don't know that the 5V slots are
284 always bus 2, because a card containing a PCI-PCI bridge may be
285 plugged into a 3.3V slot, and this changes the bus numbering.
286
287 Also, the Cayman has an intermediate PCI bus that goes a custom
288 expansion board header (and to the secondary bridge). This bus has
289 never been used in practice.
290
291 The 1ary onboard PCI-PCI bridge is device 3 on bus 0
292 The 2ary onboard PCI-PCI bridge is device 0 on the 2ary bus of the 1ary bridge.
293 */
294
295 struct slot_pin {
296 int slot;
297 int pin;
298 } path[4];
299 int i=0;
300
301 while (dev->bus->number > 0) {
302
303 slot = path[i].slot = PCI_SLOT(dev->devfn);
304 pin = path[i].pin = bridge_swizzle(pin, slot);
305 dev = dev->bus->self;
306 i++;
307 if (i > 3) panic("PCI path to root bus too long!\n");
308 }
309
310 slot = PCI_SLOT(dev->devfn);
311 /* This is the slot on bus 0 through which the device is eventually
312 reachable. */
313
314 /* Now work back up. */
315 if ((slot < 3) || (i == 0)) {
316 /* Bus 0 (incl. PCI-PCI bridge itself) : perform the final
317 swizzle now. */
318 result = IRQ_INTA + bridge_swizzle(pin, slot) - 1;
319 } else {
320 i--;
321 slot = path[i].slot;
322 pin = path[i].pin;
323 if (slot > 0) {
324 panic("PCI expansion bus device found - not handled!\n");
325 } else {
326 if (i > 0) {
327 /* 5V slots */
328 i--;
329 slot = path[i].slot;
330 pin = path[i].pin;
331 /* 'pin' was swizzled earlier wrt slot, don't do it again. */
332 result = IRQ_P2INTA + (pin - 1);
333 } else {
334 /* IRQ for 2ary PCI-PCI bridge : unused */
335 result = -1;
336 }
337 }
338 }
339
340 return result;
341}
342
343static irqreturn_t pcish5_err_irq(int irq, void *dev_id)
344{
345 struct pt_regs *regs = get_irq_regs();
346 unsigned pci_int, pci_air, pci_cir, pci_aint;
347
348 pci_int = SH5PCI_READ(INT);
349 pci_cir = SH5PCI_READ(CIR);
350 pci_air = SH5PCI_READ(AIR);
351
352 if (pci_int) {
353 printk("PCI INTERRUPT (at %08llx)!\n", regs->pc);
354 printk("PCI INT -> 0x%x\n", pci_int & 0xffff);
355 printk("PCI AIR -> 0x%x\n", pci_air);
356 printk("PCI CIR -> 0x%x\n", pci_cir);
357 SH5PCI_WRITE(INT, ~0);
358 }
359
360 pci_aint = SH5PCI_READ(AINT);
361 if (pci_aint) {
362 printk("PCI ARB INTERRUPT!\n");
363 printk("PCI AINT -> 0x%x\n", pci_aint);
364 printk("PCI AIR -> 0x%x\n", pci_air);
365 printk("PCI CIR -> 0x%x\n", pci_cir);
366 SH5PCI_WRITE(AINT, ~0);
367 }
368
369 return IRQ_HANDLED;
370}
371
372static irqreturn_t pcish5_serr_irq(int irq, void *dev_id)
373{
374 printk("SERR IRQ\n");
375
376 return IRQ_NONE;
377}
378
379static void __init
380pcibios_size_bridge(struct pci_bus *bus, struct resource *ior,
381 struct resource *memr)
382{
383 struct resource io_res, mem_res;
384 struct pci_dev *dev;
385 struct pci_dev *bridge = bus->self;
386 struct list_head *ln;
387
388 if (!bridge)
389 return; /* host bridge, nothing to do */
390
391 /* set reasonable default locations for pcibios_align_resource */
392 io_res.start = PCIBIOS_MIN_IO;
393 mem_res.start = PCIBIOS_MIN_MEM;
394
395 io_res.end = io_res.start;
396 mem_res.end = mem_res.start;
397
398 /* Collect information about how our direct children are layed out. */
399 for (ln=bus->devices.next; ln != &bus->devices; ln=ln->next) {
400 int i;
401 dev = pci_dev_b(ln);
402
403 /* Skip bridges for now */
404 if (dev->class >> 8 == PCI_CLASS_BRIDGE_PCI)
405 continue;
406
407 for (i = 0; i < PCI_NUM_RESOURCES; i++) {
408 struct resource res;
409 unsigned long size;
410
411 memcpy(&res, &dev->resource[i], sizeof(res));
412 size = res.end - res.start + 1;
413
414 if (res.flags & IORESOURCE_IO) {
415 res.start = io_res.end;
416 pcibios_align_resource(dev, &res, size, 0);
417 io_res.end = res.start + size;
418 } else if (res.flags & IORESOURCE_MEM) {
419 res.start = mem_res.end;
420 pcibios_align_resource(dev, &res, size, 0);
421 mem_res.end = res.start + size;
422 }
423 }
424 }
425
426 /* And for all of the subordinate busses. */
427 for (ln=bus->children.next; ln != &bus->children; ln=ln->next)
428 pcibios_size_bridge(pci_bus_b(ln), &io_res, &mem_res);
429
430 /* turn the ending locations into sizes (subtract start) */
431 io_res.end -= io_res.start;
432 mem_res.end -= mem_res.start;
433
434 /* Align the sizes up by bridge rules */
435 io_res.end = ALIGN(io_res.end, 4*1024) - 1;
436 mem_res.end = ALIGN(mem_res.end, 1*1024*1024) - 1;
437
438 /* Adjust the bridge's allocation requirements */
439 bridge->resource[0].end = bridge->resource[0].start + io_res.end;
440 bridge->resource[1].end = bridge->resource[1].start + mem_res.end;
441
442 bridge->resource[PCI_BRIDGE_RESOURCES].end =
443 bridge->resource[PCI_BRIDGE_RESOURCES].start + io_res.end;
444 bridge->resource[PCI_BRIDGE_RESOURCES+1].end =
445 bridge->resource[PCI_BRIDGE_RESOURCES+1].start + mem_res.end;
446
447 /* adjust parent's resource requirements */
448 if (ior) {
449 ior->end = ALIGN(ior->end, 4*1024);
450 ior->end += io_res.end;
451 }
452
453 if (memr) {
454 memr->end = ALIGN(memr->end, 1*1024*1024);
455 memr->end += mem_res.end;
456 }
457}
458
459static void __init pcibios_size_bridges(void)
460{
461 struct resource io_res, mem_res;
462
463 memset(&io_res, 0, sizeof(io_res));
464 memset(&mem_res, 0, sizeof(mem_res));
465
466 pcibios_size_bridge(pci_root_bus, &io_res, &mem_res);
467}
468
469static int __init pcibios_init(void)
470{
471 if (request_irq(IRQ_ERR, pcish5_err_irq,
472 IRQF_DISABLED, "PCI Error",NULL) < 0) {
473 printk(KERN_ERR "PCISH5: Cannot hook PCI_PERR interrupt\n");
474 return -EINVAL;
475 }
476
477 if (request_irq(IRQ_SERR, pcish5_serr_irq,
478 IRQF_DISABLED, "PCI SERR interrupt", NULL) < 0) {
479 printk(KERN_ERR "PCISH5: Cannot hook PCI_SERR interrupt\n");
480 return -EINVAL;
481 }
482
483 /* The pci subsystem needs to know where memory is and how much
484 * of it there is. I've simply made these globals. A better mechanism
485 * is probably needed.
486 */
487 sh5pci_init(__pa(memory_start),
488 __pa(memory_end) - __pa(memory_start));
489
490 pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
491 pcibios_size_bridges();
492 pci_assign_unassigned_resources();
493 pci_fixup_irqs(no_swizzle, map_cayman_irq);
494
495 return 0;
496}
497
498subsys_initcall(pcibios_init);
499
500void __devinit pcibios_fixup_bus(struct pci_bus *bus)
501{
502 struct pci_dev *dev = bus->self;
503 int i;
504
505#if 1
506 if(dev) {
507 for(i=0; i<3; i++) {
508 bus->resource[i] =
509 &dev->resource[PCI_BRIDGE_RESOURCES+i];
510 bus->resource[i]->name = bus->name;
511 }
512 bus->resource[0]->flags |= IORESOURCE_IO;
513 bus->resource[1]->flags |= IORESOURCE_MEM;
514
515 /* For now, propagate host limits to the bus;
516 * we'll adjust them later. */
517
518#if 1
519 bus->resource[0]->end = 64*1024 - 1 ;
520 bus->resource[1]->end = PCIBIOS_MIN_MEM+(256*1024*1024)-1;
521 bus->resource[0]->start = PCIBIOS_MIN_IO;
522 bus->resource[1]->start = PCIBIOS_MIN_MEM;
523#else
524 bus->resource[0]->end = 0;
525 bus->resource[1]->end = 0;
526 bus->resource[0]->start =0;
527 bus->resource[1]->start = 0;
528#endif
529 /* Turn off downstream PF memory address range by default */
530 bus->resource[2]->start = 1024*1024;
531 bus->resource[2]->end = bus->resource[2]->start - 1;
532 }
533#endif
534
535}
536
diff --git a/arch/sh64/kernel/pcibios.c b/arch/sh64/kernel/pcibios.c
deleted file mode 100644
index 945920bc24db..000000000000
--- a/arch/sh64/kernel/pcibios.c
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * $Id: pcibios.c,v 1.1 2001/08/24 12:38:19 dwmw2 Exp $
3 *
4 * arch/sh/kernel/pcibios.c
5 *
6 * Copyright (C) 2002 STMicroelectronics Limited
7 * Author : David J. McKay
8 *
9 * Copyright (C) 2004 Richard Curnow, SuperH UK Limited
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 * This is GPL'd.
15 *
16 * Provided here are generic versions of:
17 * pcibios_update_resource()
18 * pcibios_align_resource()
19 * pcibios_enable_device()
20 * pcibios_set_master()
21 * pcibios_update_irq()
22 *
23 * These functions are collected here to reduce duplication of common
24 * code amongst the many platform-specific PCI support code files.
25 *
26 * Platform-specific files are expected to provide:
27 * pcibios_fixup_bus()
28 * pcibios_init()
29 * pcibios_setup()
30 * pcibios_fixup_pbus_ranges()
31 */
32
33#include <linux/kernel.h>
34#include <linux/pci.h>
35#include <linux/init.h>
36
37void
38pcibios_update_resource(struct pci_dev *dev, struct resource *root,
39 struct resource *res, int resource)
40{
41 u32 new, check;
42 int reg;
43
44 new = res->start | (res->flags & PCI_REGION_FLAG_MASK);
45 if (resource < 6) {
46 reg = PCI_BASE_ADDRESS_0 + 4*resource;
47 } else if (resource == PCI_ROM_RESOURCE) {
48 res->flags |= IORESOURCE_ROM_ENABLE;
49 new |= PCI_ROM_ADDRESS_ENABLE;
50 reg = dev->rom_base_reg;
51 } else {
52 /* Somebody might have asked allocation of a non-standard resource */
53 return;
54 }
55
56 pci_write_config_dword(dev, reg, new);
57 pci_read_config_dword(dev, reg, &check);
58 if ((new ^ check) & ((new & PCI_BASE_ADDRESS_SPACE_IO) ? PCI_BASE_ADDRESS_IO_MASK : PCI_BASE_ADDRESS_MEM_MASK)) {
59 printk(KERN_ERR "PCI: Error while updating region "
60 "%s/%d (%08x != %08x)\n", pci_name(dev), resource,
61 new, check);
62 }
63}
64
65/*
66 * We need to avoid collisions with `mirrored' VGA ports
67 * and other strange ISA hardware, so we always want the
68 * addresses to be allocated in the 0x000-0x0ff region
69 * modulo 0x400.
70 */
71void pcibios_align_resource(void *data, struct resource *res,
72 resource_size_t size, resource_size_t align)
73{
74 if (res->flags & IORESOURCE_IO) {
75 resource_size_t start = res->start;
76
77 if (start & 0x300) {
78 start = (start + 0x3ff) & ~0x3ff;
79 res->start = start;
80 }
81 }
82}
83
84static void pcibios_enable_bridge(struct pci_dev *dev)
85{
86 struct pci_bus *bus = dev->subordinate;
87 u16 cmd, old_cmd;
88
89 pci_read_config_word(dev, PCI_COMMAND, &cmd);
90 old_cmd = cmd;
91
92 if (bus->resource[0]->flags & IORESOURCE_IO) {
93 cmd |= PCI_COMMAND_IO;
94 }
95 if ((bus->resource[1]->flags & IORESOURCE_MEM) ||
96 (bus->resource[2]->flags & IORESOURCE_PREFETCH)) {
97 cmd |= PCI_COMMAND_MEMORY;
98 }
99
100 if (cmd != old_cmd) {
101 pci_write_config_word(dev, PCI_COMMAND, cmd);
102 }
103
104 printk("PCI bridge %s, command register -> %04x\n",
105 pci_name(dev), cmd);
106
107}
108
109
110
111int pcibios_enable_device(struct pci_dev *dev, int mask)
112{
113 u16 cmd, old_cmd;
114 int idx;
115 struct resource *r;
116
117 if ((dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {
118 pcibios_enable_bridge(dev);
119 }
120
121 pci_read_config_word(dev, PCI_COMMAND, &cmd);
122 old_cmd = cmd;
123 for(idx=0; idx<6; idx++) {
124 if (!(mask & (1 << idx)))
125 continue;
126 r = &dev->resource[idx];
127 if (!r->start && r->end) {
128 printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev));
129 return -EINVAL;
130 }
131 if (r->flags & IORESOURCE_IO)
132 cmd |= PCI_COMMAND_IO;
133 if (r->flags & IORESOURCE_MEM)
134 cmd |= PCI_COMMAND_MEMORY;
135 }
136 if (dev->resource[PCI_ROM_RESOURCE].start)
137 cmd |= PCI_COMMAND_MEMORY;
138 if (cmd != old_cmd) {
139 printk(KERN_INFO "PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd);
140 pci_write_config_word(dev, PCI_COMMAND, cmd);
141 }
142 return 0;
143}
144
145/*
146 * If we set up a device for bus mastering, we need to check and set
147 * the latency timer as it may not be properly set.
148 */
149unsigned int pcibios_max_latency = 255;
150
151void pcibios_set_master(struct pci_dev *dev)
152{
153 u8 lat;
154 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
155 if (lat < 16)
156 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
157 else if (lat > pcibios_max_latency)
158 lat = pcibios_max_latency;
159 else
160 return;
161 printk(KERN_INFO "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
162 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
163}
164
165void __init pcibios_update_irq(struct pci_dev *dev, int irq)
166{
167 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
168}
diff --git a/arch/sh64/kernel/semaphore.c b/arch/sh64/kernel/semaphore.c
deleted file mode 100644
index 72c16533436e..000000000000
--- a/arch/sh64/kernel/semaphore.c
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * Just taken from alpha implementation.
3 * This can't work well, perhaps.
4 */
5/*
6 * Generic semaphore code. Buyer beware. Do your own
7 * specific changes in <asm/semaphore-helper.h>
8 */
9
10#include <linux/errno.h>
11#include <linux/rwsem.h>
12#include <linux/sched.h>
13#include <linux/wait.h>
14#include <linux/init.h>
15#include <asm/semaphore.h>
16#include <asm/semaphore-helper.h>
17
18spinlock_t semaphore_wake_lock;
19
20/*
21 * Semaphores are implemented using a two-way counter:
22 * The "count" variable is decremented for each process
23 * that tries to sleep, while the "waking" variable is
24 * incremented when the "up()" code goes to wake up waiting
25 * processes.
26 *
27 * Notably, the inline "up()" and "down()" functions can
28 * efficiently test if they need to do any extra work (up
29 * needs to do something only if count was negative before
30 * the increment operation.
31 *
32 * waking_non_zero() (from asm/semaphore.h) must execute
33 * atomically.
34 *
35 * When __up() is called, the count was negative before
36 * incrementing it, and we need to wake up somebody.
37 *
38 * This routine adds one to the count of processes that need to
39 * wake up and exit. ALL waiting processes actually wake up but
40 * only the one that gets to the "waking" field first will gate
41 * through and acquire the semaphore. The others will go back
42 * to sleep.
43 *
44 * Note that these functions are only called when there is
45 * contention on the lock, and as such all this is the
46 * "non-critical" part of the whole semaphore business. The
47 * critical part is the inline stuff in <asm/semaphore.h>
48 * where we want to avoid any extra jumps and calls.
49 */
50void __up(struct semaphore *sem)
51{
52 wake_one_more(sem);
53 wake_up(&sem->wait);
54}
55
56/*
57 * Perform the "down" function. Return zero for semaphore acquired,
58 * return negative for signalled out of the function.
59 *
60 * If called from __down, the return is ignored and the wait loop is
61 * not interruptible. This means that a task waiting on a semaphore
62 * using "down()" cannot be killed until someone does an "up()" on
63 * the semaphore.
64 *
65 * If called from __down_interruptible, the return value gets checked
66 * upon return. If the return value is negative then the task continues
67 * with the negative value in the return register (it can be tested by
68 * the caller).
69 *
70 * Either form may be used in conjunction with "up()".
71 *
72 */
73
74#define DOWN_VAR \
75 struct task_struct *tsk = current; \
76 wait_queue_t wait; \
77 init_waitqueue_entry(&wait, tsk);
78
79#define DOWN_HEAD(task_state) \
80 \
81 \
82 tsk->state = (task_state); \
83 add_wait_queue(&sem->wait, &wait); \
84 \
85 /* \
86 * Ok, we're set up. sem->count is known to be less than zero \
87 * so we must wait. \
88 * \
89 * We can let go the lock for purposes of waiting. \
90 * We re-acquire it after awaking so as to protect \
91 * all semaphore operations. \
92 * \
93 * If "up()" is called before we call waking_non_zero() then \
94 * we will catch it right away. If it is called later then \
95 * we will have to go through a wakeup cycle to catch it. \
96 * \
97 * Multiple waiters contend for the semaphore lock to see \
98 * who gets to gate through and who has to wait some more. \
99 */ \
100 for (;;) {
101
102#define DOWN_TAIL(task_state) \
103 tsk->state = (task_state); \
104 } \
105 tsk->state = TASK_RUNNING; \
106 remove_wait_queue(&sem->wait, &wait);
107
108void __sched __down(struct semaphore * sem)
109{
110 DOWN_VAR
111 DOWN_HEAD(TASK_UNINTERRUPTIBLE)
112 if (waking_non_zero(sem))
113 break;
114 schedule();
115 DOWN_TAIL(TASK_UNINTERRUPTIBLE)
116}
117
118int __sched __down_interruptible(struct semaphore * sem)
119{
120 int ret = 0;
121 DOWN_VAR
122 DOWN_HEAD(TASK_INTERRUPTIBLE)
123
124 ret = waking_non_zero_interruptible(sem, tsk);
125 if (ret)
126 {
127 if (ret == 1)
128 /* ret != 0 only if we get interrupted -arca */
129 ret = 0;
130 break;
131 }
132 schedule();
133 DOWN_TAIL(TASK_INTERRUPTIBLE)
134 return ret;
135}
136
137int __down_trylock(struct semaphore * sem)
138{
139 return waking_non_zero_trylock(sem);
140}
diff --git a/arch/sh64/kernel/setup.c b/arch/sh64/kernel/setup.c
deleted file mode 100644
index 2b7264c0c6f7..000000000000
--- a/arch/sh64/kernel/setup.c
+++ /dev/null
@@ -1,379 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/setup.c
7 *
8 * sh64 Arch Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 * Copyright (C) 2003, 2004 Paul Mundt
14 *
15 * benedict.gaster@superh.com: 2nd May 2002
16 * Modified to use the empty_zero_page to pass command line arguments.
17 *
18 * benedict.gaster@superh.com: 3rd May 2002
19 * Added support for ramdisk, removing statically linked romfs at the same time.
20 *
21 * lethal@linux-sh.org: 15th May 2003
22 * Added generic procfs cpuinfo reporting. Make boards just export their name.
23 *
24 * lethal@linux-sh.org: 25th May 2003
25 * Added generic get_cpu_subtype() for subtype reporting from cpu_data->type.
26 *
27 */
28#include <linux/errno.h>
29#include <linux/rwsem.h>
30#include <linux/sched.h>
31#include <linux/kernel.h>
32#include <linux/mm.h>
33#include <linux/stddef.h>
34#include <linux/unistd.h>
35#include <linux/ptrace.h>
36#include <linux/slab.h>
37#include <linux/user.h>
38#include <linux/a.out.h>
39#include <linux/screen_info.h>
40#include <linux/ioport.h>
41#include <linux/delay.h>
42#include <linux/init.h>
43#include <linux/seq_file.h>
44#include <linux/blkdev.h>
45#include <linux/bootmem.h>
46#include <linux/console.h>
47#include <linux/root_dev.h>
48#include <linux/cpu.h>
49#include <linux/initrd.h>
50#include <linux/pfn.h>
51#include <asm/processor.h>
52#include <asm/page.h>
53#include <asm/pgtable.h>
54#include <asm/platform.h>
55#include <asm/uaccess.h>
56#include <asm/system.h>
57#include <asm/io.h>
58#include <asm/sections.h>
59#include <asm/setup.h>
60#include <asm/smp.h>
61
62struct screen_info screen_info;
63
64#ifdef CONFIG_BLK_DEV_RAM
65extern int rd_doload; /* 1 = load ramdisk, 0 = don't load */
66extern int rd_prompt; /* 1 = prompt for ramdisk, 0 = don't prompt */
67extern int rd_image_start; /* starting block # of image */
68#endif
69
70extern int root_mountflags;
71extern char *get_system_type(void);
72extern void platform_setup(void);
73extern void platform_monitor(void);
74extern void platform_reserve(void);
75extern int sh64_cache_init(void);
76extern int sh64_tlb_init(void);
77
78#define RAMDISK_IMAGE_START_MASK 0x07FF
79#define RAMDISK_PROMPT_FLAG 0x8000
80#define RAMDISK_LOAD_FLAG 0x4000
81
82static char __initdata command_line[COMMAND_LINE_SIZE] = { 0, };
83unsigned long long memory_start = CONFIG_MEMORY_START;
84unsigned long long memory_end = CONFIG_MEMORY_START + (CONFIG_MEMORY_SIZE_IN_MB * 1024 * 1024);
85
86struct sh_cpuinfo boot_cpu_data;
87
88static inline void parse_mem_cmdline (char ** cmdline_p)
89{
90 char c = ' ', *to = command_line, *from = COMMAND_LINE;
91 int len = 0;
92
93 /* Save unparsed command line copy for /proc/cmdline */
94 memcpy(boot_command_line, COMMAND_LINE, COMMAND_LINE_SIZE);
95 boot_command_line[COMMAND_LINE_SIZE-1] = '\0';
96
97 for (;;) {
98 /*
99 * "mem=XXX[kKmM]" defines a size of memory.
100 */
101 if (c == ' ' && !memcmp(from, "mem=", 4)) {
102 if (to != command_line)
103 to--;
104 {
105 unsigned long mem_size;
106
107 mem_size = memparse(from+4, &from);
108 memory_end = memory_start + mem_size;
109 }
110 }
111 c = *(from++);
112 if (!c)
113 break;
114 if (COMMAND_LINE_SIZE <= ++len)
115 break;
116 *(to++) = c;
117 }
118 *to = '\0';
119
120 *cmdline_p = command_line;
121}
122
123static void __init sh64_cpu_type_detect(void)
124{
125 extern unsigned long long peek_real_address_q(unsigned long long addr);
126 unsigned long long cir;
127 /* Do peeks in real mode to avoid having to set up a mapping for the
128 WPC registers. On SH5-101 cut2, such a mapping would be exposed to
129 an address translation erratum which would make it hard to set up
130 correctly. */
131 cir = peek_real_address_q(0x0d000008);
132
133 if ((cir & 0xffff) == 0x5103) {
134 boot_cpu_data.type = CPU_SH5_103;
135 } else if (((cir >> 32) & 0xffff) == 0x51e2) {
136 /* CPU.VCR aliased at CIR address on SH5-101 */
137 boot_cpu_data.type = CPU_SH5_101;
138 } else {
139 boot_cpu_data.type = CPU_SH_NONE;
140 }
141}
142
143void __init setup_arch(char **cmdline_p)
144{
145 unsigned long bootmap_size, i;
146 unsigned long first_pfn, start_pfn, last_pfn, pages;
147
148#ifdef CONFIG_EARLY_PRINTK
149 extern void enable_early_printk(void);
150
151 /*
152 * Setup Early SCIF console
153 */
154 enable_early_printk();
155#endif
156
157 /*
158 * Setup TLB mappings
159 */
160 sh64_tlb_init();
161
162 /*
163 * Caches are already initialized by the time we get here, so we just
164 * fill in cpu_data info for the caches.
165 */
166 sh64_cache_init();
167
168 platform_setup();
169 platform_monitor();
170
171 sh64_cpu_type_detect();
172
173 ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
174
175#ifdef CONFIG_BLK_DEV_RAM
176 rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
177 rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
178 rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
179#endif
180
181 if (!MOUNT_ROOT_RDONLY)
182 root_mountflags &= ~MS_RDONLY;
183 init_mm.start_code = (unsigned long) _text;
184 init_mm.end_code = (unsigned long) _etext;
185 init_mm.end_data = (unsigned long) _edata;
186 init_mm.brk = (unsigned long) _end;
187
188 code_resource.start = __pa(_text);
189 code_resource.end = __pa(_etext)-1;
190 data_resource.start = __pa(_etext);
191 data_resource.end = __pa(_edata)-1;
192
193 parse_mem_cmdline(cmdline_p);
194
195 /*
196 * Find the lowest and highest page frame numbers we have available
197 */
198 first_pfn = PFN_DOWN(memory_start);
199 last_pfn = PFN_DOWN(memory_end);
200 pages = last_pfn - first_pfn;
201
202 /*
203 * Partially used pages are not usable - thus
204 * we are rounding upwards:
205 */
206 start_pfn = PFN_UP(__pa(_end));
207
208 /*
209 * Find a proper area for the bootmem bitmap. After this
210 * bootstrap step all allocations (until the page allocator
211 * is intact) must be done via bootmem_alloc().
212 */
213 bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn,
214 first_pfn,
215 last_pfn);
216 /*
217 * Round it up.
218 */
219 bootmap_size = PFN_PHYS(PFN_UP(bootmap_size));
220
221 /*
222 * Register fully available RAM pages with the bootmem allocator.
223 */
224 free_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn), PFN_PHYS(pages));
225
226 /*
227 * Reserve all kernel sections + bootmem bitmap + a guard page.
228 */
229 reserve_bootmem_node(NODE_DATA(0), PFN_PHYS(first_pfn),
230 (PFN_PHYS(start_pfn) + bootmap_size + PAGE_SIZE) - PFN_PHYS(first_pfn));
231
232 /*
233 * Reserve platform dependent sections
234 */
235 platform_reserve();
236
237#ifdef CONFIG_BLK_DEV_INITRD
238 if (LOADER_TYPE && INITRD_START) {
239 if (INITRD_START + INITRD_SIZE <= (PFN_PHYS(last_pfn))) {
240 reserve_bootmem_node(NODE_DATA(0), INITRD_START + __MEMORY_START, INITRD_SIZE);
241
242 initrd_start = (long) INITRD_START + PAGE_OFFSET + __MEMORY_START;
243 initrd_end = initrd_start + INITRD_SIZE;
244 } else {
245 printk("initrd extends beyond end of memory "
246 "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
247 (long) INITRD_START + INITRD_SIZE,
248 PFN_PHYS(last_pfn));
249 initrd_start = 0;
250 }
251 }
252#endif
253
254 /*
255 * Claim all RAM, ROM, and I/O resources.
256 */
257
258 /* Kernel RAM */
259 request_resource(&iomem_resource, &code_resource);
260 request_resource(&iomem_resource, &data_resource);
261
262 /* Other KRAM space */
263 for (i = 0; i < STANDARD_KRAM_RESOURCES - 2; i++)
264 request_resource(&iomem_resource,
265 &platform_parms.kram_res_p[i]);
266
267 /* XRAM space */
268 for (i = 0; i < STANDARD_XRAM_RESOURCES; i++)
269 request_resource(&iomem_resource,
270 &platform_parms.xram_res_p[i]);
271
272 /* ROM space */
273 for (i = 0; i < STANDARD_ROM_RESOURCES; i++)
274 request_resource(&iomem_resource,
275 &platform_parms.rom_res_p[i]);
276
277 /* I/O space */
278 for (i = 0; i < STANDARD_IO_RESOURCES; i++)
279 request_resource(&ioport_resource,
280 &platform_parms.io_res_p[i]);
281
282
283#ifdef CONFIG_VT
284#if defined(CONFIG_VGA_CONSOLE)
285 conswitchp = &vga_con;
286#elif defined(CONFIG_DUMMY_CONSOLE)
287 conswitchp = &dummy_con;
288#endif
289#endif
290
291 printk("Hardware FPU: %s\n", fpu_in_use ? "enabled" : "disabled");
292
293 paging_init();
294}
295
296void __xchg_called_with_bad_pointer(void)
297{
298 printk(KERN_EMERG "xchg() called with bad pointer !\n");
299}
300
301static struct cpu cpu[1];
302
303static int __init topology_init(void)
304{
305 return register_cpu(cpu, 0);
306}
307
308subsys_initcall(topology_init);
309
310/*
311 * Get CPU information
312 */
313static const char *cpu_name[] = {
314 [CPU_SH5_101] = "SH5-101",
315 [CPU_SH5_103] = "SH5-103",
316 [CPU_SH_NONE] = "Unknown",
317};
318
319const char *get_cpu_subtype(void)
320{
321 return cpu_name[boot_cpu_data.type];
322}
323
324#ifdef CONFIG_PROC_FS
325static int show_cpuinfo(struct seq_file *m,void *v)
326{
327 unsigned int cpu = smp_processor_id();
328
329 if (!cpu)
330 seq_printf(m, "machine\t\t: %s\n", get_system_type());
331
332 seq_printf(m, "processor\t: %d\n", cpu);
333 seq_printf(m, "cpu family\t: SH-5\n");
334 seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype());
335
336 seq_printf(m, "icache size\t: %dK-bytes\n",
337 (boot_cpu_data.icache.ways *
338 boot_cpu_data.icache.sets *
339 boot_cpu_data.icache.linesz) >> 10);
340 seq_printf(m, "dcache size\t: %dK-bytes\n",
341 (boot_cpu_data.dcache.ways *
342 boot_cpu_data.dcache.sets *
343 boot_cpu_data.dcache.linesz) >> 10);
344 seq_printf(m, "itlb entries\t: %d\n", boot_cpu_data.itlb.entries);
345 seq_printf(m, "dtlb entries\t: %d\n", boot_cpu_data.dtlb.entries);
346
347#define PRINT_CLOCK(name, value) \
348 seq_printf(m, name " clock\t: %d.%02dMHz\n", \
349 ((value) / 1000000), ((value) % 1000000)/10000)
350
351 PRINT_CLOCK("cpu", boot_cpu_data.cpu_clock);
352 PRINT_CLOCK("bus", boot_cpu_data.bus_clock);
353 PRINT_CLOCK("module", boot_cpu_data.module_clock);
354
355 seq_printf(m, "bogomips\t: %lu.%02lu\n\n",
356 (loops_per_jiffy*HZ+2500)/500000,
357 ((loops_per_jiffy*HZ+2500)/5000) % 100);
358
359 return 0;
360}
361
362static void *c_start(struct seq_file *m, loff_t *pos)
363{
364 return (void*)(*pos == 0);
365}
366static void *c_next(struct seq_file *m, void *v, loff_t *pos)
367{
368 return NULL;
369}
370static void c_stop(struct seq_file *m, void *v)
371{
372}
373struct seq_operations cpuinfo_op = {
374 .start = c_start,
375 .next = c_next,
376 .stop = c_stop,
377 .show = show_cpuinfo,
378};
379#endif /* CONFIG_PROC_FS */
diff --git a/arch/sh64/kernel/sys_sh64.c b/arch/sh64/kernel/sys_sh64.c
deleted file mode 100644
index de0a303ba26f..000000000000
--- a/arch/sh64/kernel/sys_sh64.c
+++ /dev/null
@@ -1,304 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/kernel/sys_sh64.c
7 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 *
10 * This file contains various random system calls that
11 * have a non-standard calling sequence on the Linux/SH5
12 * platform.
13 *
14 * Mostly taken from i386 version.
15 *
16 */
17
18#include <linux/errno.h>
19#include <linux/rwsem.h>
20#include <linux/sched.h>
21#include <linux/mm.h>
22#include <linux/fs.h>
23#include <linux/smp.h>
24#include <linux/sem.h>
25#include <linux/msg.h>
26#include <linux/shm.h>
27#include <linux/stat.h>
28#include <linux/mman.h>
29#include <linux/file.h>
30#include <linux/utsname.h>
31#include <linux/syscalls.h>
32#include <linux/ipc.h>
33#include <asm/uaccess.h>
34#include <asm/ptrace.h>
35#include <asm/unistd.h>
36
37#define REG_3 3
38
39/*
40 * sys_pipe() is the normal C calling standard for creating
41 * a pipe. It's not the way Unix traditionally does this, though.
42 */
43#ifdef NEW_PIPE_IMPLEMENTATION
44asmlinkage int sys_pipe(unsigned long * fildes,
45 unsigned long dummy_r3,
46 unsigned long dummy_r4,
47 unsigned long dummy_r5,
48 unsigned long dummy_r6,
49 unsigned long dummy_r7,
50 struct pt_regs * regs) /* r8 = pt_regs forced by entry.S */
51{
52 int fd[2];
53 int ret;
54
55 ret = do_pipe(fd);
56 if (ret == 0)
57 /*
58 ***********************************************************************
59 * To avoid the copy_to_user we prefer to break the ABIs convention, *
60 * packing the valid pair of file IDs into a single register (r3); *
61 * while r2 is the return code as defined by the sh5-ABIs. *
62 * BE CAREFUL: pipe stub, into glibc, must be aware of this solution *
63 ***********************************************************************
64
65#ifdef __LITTLE_ENDIAN__
66 regs->regs[REG_3] = (((unsigned long long) fd[1]) << 32) | ((unsigned long long) fd[0]);
67#else
68 regs->regs[REG_3] = (((unsigned long long) fd[0]) << 32) | ((unsigned long long) fd[1]);
69#endif
70
71 */
72 /* although not very clever this is endianess independent */
73 regs->regs[REG_3] = (unsigned long long) *((unsigned long long *) fd);
74
75 return ret;
76}
77
78#else
79asmlinkage int sys_pipe(unsigned long * fildes)
80{
81 int fd[2];
82 int error;
83
84 error = do_pipe(fd);
85 if (!error) {
86 if (copy_to_user(fildes, fd, 2*sizeof(int)))
87 error = -EFAULT;
88 }
89 return error;
90}
91
92#endif
93
94/*
95 * To avoid cache alias, we map the shard page with same color.
96 */
97#define COLOUR_ALIGN(addr) (((addr)+SHMLBA-1)&~(SHMLBA-1))
98
99unsigned long arch_get_unmapped_area(struct file *filp, unsigned long addr,
100 unsigned long len, unsigned long pgoff, unsigned long flags)
101{
102 struct vm_area_struct *vma;
103
104 if (flags & MAP_FIXED) {
105 /* We do not accept a shared mapping if it would violate
106 * cache aliasing constraints.
107 */
108 if ((flags & MAP_SHARED) && (addr & (SHMLBA - 1)))
109 return -EINVAL;
110 return addr;
111 }
112
113 if (len > TASK_SIZE)
114 return -ENOMEM;
115 if (!addr)
116 addr = TASK_UNMAPPED_BASE;
117
118 if (flags & MAP_PRIVATE)
119 addr = PAGE_ALIGN(addr);
120 else
121 addr = COLOUR_ALIGN(addr);
122
123 for (vma = find_vma(current->mm, addr); ; vma = vma->vm_next) {
124 /* At this point: (!vma || addr < vma->vm_end). */
125 if (TASK_SIZE - len < addr)
126 return -ENOMEM;
127 if (!vma || addr + len <= vma->vm_start)
128 return addr;
129 addr = vma->vm_end;
130 if (!(flags & MAP_PRIVATE))
131 addr = COLOUR_ALIGN(addr);
132 }
133}
134
135/* common code for old and new mmaps */
136static inline long do_mmap2(
137 unsigned long addr, unsigned long len,
138 unsigned long prot, unsigned long flags,
139 unsigned long fd, unsigned long pgoff)
140{
141 int error = -EBADF;
142 struct file * file = NULL;
143
144 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
145 if (!(flags & MAP_ANONYMOUS)) {
146 file = fget(fd);
147 if (!file)
148 goto out;
149 }
150
151 down_write(&current->mm->mmap_sem);
152 error = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
153 up_write(&current->mm->mmap_sem);
154
155 if (file)
156 fput(file);
157out:
158 return error;
159}
160
161asmlinkage long sys_mmap2(unsigned long addr, unsigned long len,
162 unsigned long prot, unsigned long flags,
163 unsigned long fd, unsigned long pgoff)
164{
165 return do_mmap2(addr, len, prot, flags, fd, pgoff);
166}
167
168asmlinkage int old_mmap(unsigned long addr, unsigned long len,
169 unsigned long prot, unsigned long flags,
170 int fd, unsigned long off)
171{
172 if (off & ~PAGE_MASK)
173 return -EINVAL;
174 return do_mmap2(addr, len, prot, flags, fd, off>>PAGE_SHIFT);
175}
176
177/*
178 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
179 *
180 * This is really horribly ugly.
181 */
182asmlinkage int sys_ipc(uint call, int first, int second,
183 int third, void __user *ptr, long fifth)
184{
185 int version, ret;
186
187 version = call >> 16; /* hack for backward compatibility */
188 call &= 0xffff;
189
190 if (call <= SEMCTL)
191 switch (call) {
192 case SEMOP:
193 return sys_semtimedop(first, (struct sembuf __user *)ptr,
194 second, NULL);
195 case SEMTIMEDOP:
196 return sys_semtimedop(first, (struct sembuf __user *)ptr,
197 second,
198 (const struct timespec __user *)fifth);
199 case SEMGET:
200 return sys_semget (first, second, third);
201 case SEMCTL: {
202 union semun fourth;
203 if (!ptr)
204 return -EINVAL;
205 if (get_user(fourth.__pad, (void * __user *) ptr))
206 return -EFAULT;
207 return sys_semctl (first, second, third, fourth);
208 }
209 default:
210 return -EINVAL;
211 }
212
213 if (call <= MSGCTL)
214 switch (call) {
215 case MSGSND:
216 return sys_msgsnd (first, (struct msgbuf __user *) ptr,
217 second, third);
218 case MSGRCV:
219 switch (version) {
220 case 0: {
221 struct ipc_kludge tmp;
222 if (!ptr)
223 return -EINVAL;
224
225 if (copy_from_user(&tmp,
226 (struct ipc_kludge __user *) ptr,
227 sizeof (tmp)))
228 return -EFAULT;
229 return sys_msgrcv (first, tmp.msgp, second,
230 tmp.msgtyp, third);
231 }
232 default:
233 return sys_msgrcv (first,
234 (struct msgbuf __user *) ptr,
235 second, fifth, third);
236 }
237 case MSGGET:
238 return sys_msgget ((key_t) first, second);
239 case MSGCTL:
240 return sys_msgctl (first, second,
241 (struct msqid_ds __user *) ptr);
242 default:
243 return -EINVAL;
244 }
245 if (call <= SHMCTL)
246 switch (call) {
247 case SHMAT:
248 switch (version) {
249 default: {
250 ulong raddr;
251 ret = do_shmat (first, (char __user *) ptr,
252 second, &raddr);
253 if (ret)
254 return ret;
255 return put_user (raddr, (ulong __user *) third);
256 }
257 case 1: /* iBCS2 emulator entry point */
258 if (!segment_eq(get_fs(), get_ds()))
259 return -EINVAL;
260 return do_shmat (first, (char __user *) ptr,
261 second, (ulong *) third);
262 }
263 case SHMDT:
264 return sys_shmdt ((char __user *)ptr);
265 case SHMGET:
266 return sys_shmget (first, second, third);
267 case SHMCTL:
268 return sys_shmctl (first, second,
269 (struct shmid_ds __user *) ptr);
270 default:
271 return -EINVAL;
272 }
273
274 return -EINVAL;
275}
276
277asmlinkage int sys_uname(struct old_utsname * name)
278{
279 int err;
280 if (!name)
281 return -EFAULT;
282 down_read(&uts_sem);
283 err = copy_to_user(name, utsname(), sizeof (*name));
284 up_read(&uts_sem);
285 return err?-EFAULT:0;
286}
287
288/*
289 * Do a system call from kernel instead of calling sys_execve so we
290 * end up with proper pt_regs.
291 */
292int kernel_execve(const char *filename, char *const argv[], char *const envp[])
293{
294 register unsigned long __sc0 __asm__ ("r9") = ((0x13 << 16) | __NR_execve);
295 register unsigned long __sc2 __asm__ ("r2") = (unsigned long) filename;
296 register unsigned long __sc3 __asm__ ("r3") = (unsigned long) argv;
297 register unsigned long __sc4 __asm__ ("r4") = (unsigned long) envp;
298 __asm__ __volatile__ ("trapa %1 !\t\t\t execve(%2,%3,%4)"
299 : "=r" (__sc0)
300 : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) );
301 __asm__ __volatile__ ("!dummy %0 %1 %2 %3"
302 : : "r" (__sc0), "r" (__sc2), "r" (__sc3), "r" (__sc4) : "memory");
303 return __sc0;
304}
diff --git a/arch/sh64/kernel/vmlinux.lds.S b/arch/sh64/kernel/vmlinux.lds.S
deleted file mode 100644
index f533a064da5f..000000000000
--- a/arch/sh64/kernel/vmlinux.lds.S
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh5/vmlinux.lds.S
7 *
8 * ld script to make ST50 Linux kernel
9 *
10 * Copyright (C) 2000, 2001 Paolo Alberelli
11 *
12 * benedict.gaster@superh.com: 2nd May 2002
13 * Add definition of empty_zero_page to be the first page of kernel image.
14 *
15 * benedict.gaster@superh.com: 3rd May 2002
16 * Added support for ramdisk, removing statically linked romfs at the same time.
17 *
18 * lethal@linux-sh.org: 9th May 2003
19 * Kill off GLOBAL_NAME() usage and other CDC-isms.
20 *
21 * lethal@linux-sh.org: 19th May 2003
22 * Remove support for ancient toolchains.
23 */
24
25#include <asm/page.h>
26#include <asm/cache.h>
27#include <asm/processor.h>
28#include <asm/thread_info.h>
29
30#define LOAD_OFFSET CONFIG_CACHED_MEMORY_OFFSET
31#include <asm-generic/vmlinux.lds.h>
32
33OUTPUT_ARCH(sh:sh5)
34
35#define C_PHYS(x) AT (ADDR(x) - LOAD_OFFSET)
36
37ENTRY(__start)
38SECTIONS
39{
40 . = CONFIG_CACHED_MEMORY_OFFSET + CONFIG_MEMORY_START + PAGE_SIZE;
41 _text = .; /* Text and read-only data */
42 text = .; /* Text and read-only data */
43
44 .empty_zero_page : C_PHYS(.empty_zero_page) {
45 *(.empty_zero_page)
46 } = 0
47
48 .text : C_PHYS(.text) {
49 *(.text.head)
50 TEXT_TEXT
51 *(.text64)
52 *(.text..SHmedia32)
53 SCHED_TEXT
54 LOCK_TEXT
55 *(.fixup)
56 *(.gnu.warning)
57#ifdef CONFIG_LITTLE_ENDIAN
58 } = 0x6ff0fff0
59#else
60 } = 0xf0fff06f
61#endif
62
63 /* We likely want __ex_table to be Cache Line aligned */
64 . = ALIGN(L1_CACHE_BYTES); /* Exception table */
65 __start___ex_table = .;
66 __ex_table : C_PHYS(__ex_table) { *(__ex_table) }
67 __stop___ex_table = .;
68
69 _etext = .; /* End of text section */
70
71 NOTES
72
73 RODATA
74
75 .data : C_PHYS(.data) { /* Data */
76 DATA_DATA
77 CONSTRUCTORS
78 }
79
80 . = ALIGN(PAGE_SIZE);
81 .data.page_aligned : C_PHYS(.data.page_aligned) { *(.data.page_aligned) }
82
83 PERCPU(PAGE_SIZE)
84
85 . = ALIGN(L1_CACHE_BYTES);
86 .data.cacheline_aligned : C_PHYS(.data.cacheline_aligned) { *(.data.cacheline_aligned) }
87
88 _edata = .; /* End of data section */
89
90 . = ALIGN(THREAD_SIZE); /* init_task: structure size aligned */
91 .data.init_task : C_PHYS(.data.init_task) { *(.data.init_task) }
92
93 . = ALIGN(PAGE_SIZE); /* Init code and data */
94 __init_begin = .;
95 _sinittext = .;
96 .init.text : C_PHYS(.init.text) { *(.init.text) }
97 _einittext = .;
98 .init.data : C_PHYS(.init.data) { *(.init.data) }
99 . = ALIGN(L1_CACHE_BYTES); /* Better if Cache Line aligned */
100 __setup_start = .;
101 .init.setup : C_PHYS(.init.setup) { *(.init.setup) }
102 __setup_end = .;
103 __initcall_start = .;
104 .initcall.init : C_PHYS(.initcall.init) {
105 INITCALLS
106 }
107 __initcall_end = .;
108 __con_initcall_start = .;
109 .con_initcall.init : C_PHYS(.con_initcall.init) { *(.con_initcall.init) }
110 __con_initcall_end = .;
111 SECURITY_INIT
112
113#ifdef CONFIG_BLK_DEV_INITRD
114 __initramfs_start = .;
115 .init.ramfs : C_PHYS(.init.ramfs) { *(.init.ramfs) }
116 __initramfs_end = .;
117#endif
118
119 . = ALIGN(PAGE_SIZE);
120 __init_end = .;
121
122 /* Align to the biggest single data representation, head and tail */
123 . = ALIGN(8);
124 __bss_start = .; /* BSS */
125 .bss : C_PHYS(.bss) {
126 *(.bss)
127 }
128 . = ALIGN(8);
129 _end = . ;
130
131 /* Sections to be discarded */
132 /DISCARD/ : {
133 *(.exit.text)
134 *(.exit.data)
135 *(.exitcall.exit)
136 }
137
138 STABS_DEBUG
139 DWARF_DEBUG
140}
diff --git a/arch/sh64/lib/Makefile b/arch/sh64/lib/Makefile
deleted file mode 100644
index 6a4cc3f9c0b1..000000000000
--- a/arch/sh64/lib/Makefile
+++ /dev/null
@@ -1,19 +0,0 @@
1#
2# This file is subject to the terms and conditions of the GNU General Public
3# License. See the file "COPYING" in the main directory of this archive
4# for more details.
5#
6# Copyright (C) 2000, 2001 Paolo Alberelli
7# Coprygith (C) 2003 Paul Mundt
8#
9# Makefile for the SH-5 specific library files..
10#
11# Note! Dependencies are done automagically by 'make dep', which also
12# removes any old dependencies. DON'T put your own dependencies here
13# unless it's something special (ie not a .c file).
14#
15
16# Panic should really be compiled as PIC
17lib-y := udelay.o c-checksum.o dbg.o io.o panic.o memcpy.o copy_user_memcpy.o \
18 page_copy.o page_clear.o iomap.o
19
diff --git a/arch/sh64/lib/io.c b/arch/sh64/lib/io.c
deleted file mode 100644
index a3f3a2b8e25b..000000000000
--- a/arch/sh64/lib/io.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains the I/O routines for use on the overdrive board
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/types.h>
13#include <linux/delay.h>
14#include <linux/module.h>
15#include <asm/system.h>
16#include <asm/processor.h>
17#include <asm/io.h>
18
19/* Now for the string version of these functions */
20void outsb(unsigned long port, const void *addr, unsigned long count)
21{
22 int i;
23 unsigned char *p = (unsigned char *) addr;
24
25 for (i = 0; i < count; i++, p++) {
26 outb(*p, port);
27 }
28}
29EXPORT_SYMBOL(outsb);
30
31void insb(unsigned long port, void *addr, unsigned long count)
32{
33 int i;
34 unsigned char *p = (unsigned char *) addr;
35
36 for (i = 0; i < count; i++, p++) {
37 *p = inb(port);
38 }
39}
40EXPORT_SYMBOL(insb);
41
42/* For the 16 and 32 bit string functions, we have to worry about alignment.
43 * The SH does not do unaligned accesses, so we have to read as bytes and
44 * then write as a word or dword.
45 * This can be optimised a lot more, especially in the case where the data
46 * is aligned
47 */
48
49void outsw(unsigned long port, const void *addr, unsigned long count)
50{
51 int i;
52 unsigned short tmp;
53 unsigned char *p = (unsigned char *) addr;
54
55 for (i = 0; i < count; i++, p += 2) {
56 tmp = (*p) | ((*(p + 1)) << 8);
57 outw(tmp, port);
58 }
59}
60EXPORT_SYMBOL(outsw);
61
62void insw(unsigned long port, void *addr, unsigned long count)
63{
64 int i;
65 unsigned short tmp;
66 unsigned char *p = (unsigned char *) addr;
67
68 for (i = 0; i < count; i++, p += 2) {
69 tmp = inw(port);
70 p[0] = tmp & 0xff;
71 p[1] = (tmp >> 8) & 0xff;
72 }
73}
74EXPORT_SYMBOL(insw);
75
76void outsl(unsigned long port, const void *addr, unsigned long count)
77{
78 int i;
79 unsigned tmp;
80 unsigned char *p = (unsigned char *) addr;
81
82 for (i = 0; i < count; i++, p += 4) {
83 tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) |
84 ((*(p + 3)) << 24);
85 outl(tmp, port);
86 }
87}
88EXPORT_SYMBOL(outsl);
89
90void insl(unsigned long port, void *addr, unsigned long count)
91{
92 int i;
93 unsigned tmp;
94 unsigned char *p = (unsigned char *) addr;
95
96 for (i = 0; i < count; i++, p += 4) {
97 tmp = inl(port);
98 p[0] = tmp & 0xff;
99 p[1] = (tmp >> 8) & 0xff;
100 p[2] = (tmp >> 16) & 0xff;
101 p[3] = (tmp >> 24) & 0xff;
102
103 }
104}
105EXPORT_SYMBOL(insl);
106
107void memcpy_toio(void __iomem *to, const void *from, long count)
108{
109 unsigned char *p = (unsigned char *) from;
110
111 while (count) {
112 count--;
113 writeb(*p++, to++);
114 }
115}
116EXPORT_SYMBOL(memcpy_toio);
117
118void memcpy_fromio(void *to, void __iomem *from, long count)
119{
120 int i;
121 unsigned char *p = (unsigned char *) to;
122
123 for (i = 0; i < count; i++) {
124 p[i] = readb(from);
125 from++;
126 }
127}
128EXPORT_SYMBOL(memcpy_fromio);
diff --git a/arch/sh64/lib/iomap.c b/arch/sh64/lib/iomap.c
deleted file mode 100644
index 253d1e351d49..000000000000
--- a/arch/sh64/lib/iomap.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * arch/sh64/lib/iomap.c
3 *
4 * Generic sh64 iomap interface
5 *
6 * Copyright (C) 2004 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/pci.h>
13#include <asm/io.h>
14
15void __iomem *__attribute__ ((weak))
16ioport_map(unsigned long port, unsigned int len)
17{
18 return (void __iomem *)port;
19}
20EXPORT_SYMBOL(ioport_map);
21
22void ioport_unmap(void __iomem *addr)
23{
24 /* Nothing .. */
25}
26EXPORT_SYMBOL(ioport_unmap);
27
28#ifdef CONFIG_PCI
29void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long max)
30{
31 unsigned long start = pci_resource_start(dev, bar);
32 unsigned long len = pci_resource_len(dev, bar);
33 unsigned long flags = pci_resource_flags(dev, bar);
34
35 if (!len)
36 return NULL;
37 if (max && len > max)
38 len = max;
39 if (flags & IORESOURCE_IO)
40 return ioport_map(start + pciio_virt, len);
41 if (flags & IORESOURCE_MEM)
42 return (void __iomem *)start;
43
44 /* What? */
45 return NULL;
46}
47EXPORT_SYMBOL(pci_iomap);
48
49void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
50{
51 /* Nothing .. */
52}
53EXPORT_SYMBOL(pci_iounmap);
54#endif
diff --git a/arch/sh64/mach-cayman/Makefile b/arch/sh64/mach-cayman/Makefile
deleted file mode 100644
index 67a2258bf8c4..000000000000
--- a/arch/sh64/mach-cayman/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@
1#
2# Makefile for the Hitachi Cayman specific parts of the kernel
3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y := setup.o irq.o iomap.o
10obj-$(CONFIG_HEARTBEAT) += led.o
11
diff --git a/arch/sh64/mach-cayman/iomap.c b/arch/sh64/mach-cayman/iomap.c
deleted file mode 100644
index a5c645f02d57..000000000000
--- a/arch/sh64/mach-cayman/iomap.c
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * arch/sh64/mach-cayman/iomap.c
3 *
4 * Cayman iomap interface
5 *
6 * Copyright (C) 2004 Paul Mundt
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <asm/io.h>
13#include <asm/cayman.h>
14
15void __iomem *ioport_map(unsigned long port, unsigned int len)
16{
17 if (port < 0x400)
18 return (void __iomem *)((port << 2) | smsc_superio_virt);
19
20 return (void __iomem *)port;
21}
22
diff --git a/arch/sh64/mach-harp/Makefile b/arch/sh64/mach-harp/Makefile
deleted file mode 100644
index 2f2963fa2131..000000000000
--- a/arch/sh64/mach-harp/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-y := setup.o
diff --git a/arch/sh64/mach-harp/setup.c b/arch/sh64/mach-harp/setup.c
deleted file mode 100644
index 05011cb369bb..000000000000
--- a/arch/sh64/mach-harp/setup.c
+++ /dev/null
@@ -1,129 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-harp/setup.c
7 *
8 * SH-5 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * benedict.gaster@superh.com: 3rd May 2002
15 * Added support for ramdisk, removing statically linked romfs at the same time. *
16 *
17 * lethal@linux-sh.org: 15th May 2003
18 * Use the generic procfs cpuinfo interface, just return a valid board name.
19 */
20#include <linux/init.h>
21#include <linux/kernel.h>
22#include <asm/platform.h>
23#include <asm/irq.h>
24
25/*
26 * Platform Dependent Interrupt Priorities.
27 */
28
29/* Using defaults defined in irq.h */
30#define RES NO_PRIORITY /* Disabled */
31#define IR0 IRL0_PRIORITY /* IRLs */
32#define IR1 IRL1_PRIORITY
33#define IR2 IRL2_PRIORITY
34#define IR3 IRL3_PRIORITY
35#define PCA INTA_PRIORITY /* PCI Ints */
36#define PCB INTB_PRIORITY
37#define PCC INTC_PRIORITY
38#define PCD INTD_PRIORITY
39#define SER TOP_PRIORITY
40#define ERR TOP_PRIORITY
41#define PW0 TOP_PRIORITY
42#define PW1 TOP_PRIORITY
43#define PW2 TOP_PRIORITY
44#define PW3 TOP_PRIORITY
45#define DM0 NO_PRIORITY /* DMA Ints */
46#define DM1 NO_PRIORITY
47#define DM2 NO_PRIORITY
48#define DM3 NO_PRIORITY
49#define DAE NO_PRIORITY
50#define TU0 TIMER_PRIORITY /* TMU Ints */
51#define TU1 NO_PRIORITY
52#define TU2 NO_PRIORITY
53#define TI2 NO_PRIORITY
54#define ATI NO_PRIORITY /* RTC Ints */
55#define PRI NO_PRIORITY
56#define CUI RTC_PRIORITY
57#define ERI SCIF_PRIORITY /* SCIF Ints */
58#define RXI SCIF_PRIORITY
59#define BRI SCIF_PRIORITY
60#define TXI SCIF_PRIORITY
61#define ITI TOP_PRIORITY /* WDT Ints */
62
63/*
64 * Platform dependent structures: maps and parms block.
65 */
66struct resource io_resources[] = {
67 /* To be updated with external devices */
68};
69
70struct resource kram_resources[] = {
71 /* These must be last in the array */
72 { .name = "Kernel code", .start = 0, .end = 0 },
73 /* These must be last in the array */
74 { .name = "Kernel data", .start = 0, .end = 0 }
75};
76
77struct resource xram_resources[] = {
78 /* To be updated with external devices */
79};
80
81struct resource rom_resources[] = {
82 /* To be updated with external devices */
83};
84
85struct sh64_platform platform_parms = {
86 .readonly_rootfs = 1,
87 .initial_root_dev = 0x0100,
88 .loader_type = 1,
89 .io_res_p = io_resources,
90 .io_res_count = ARRAY_SIZE(io_resources),
91 .kram_res_p = kram_resources,
92 .kram_res_count = ARRAY_SIZE(kram_resources),
93 .xram_res_p = xram_resources,
94 .xram_res_count = ARRAY_SIZE(xram_resources),
95 .rom_res_p = rom_resources,
96 .rom_res_count = ARRAY_SIZE(rom_resources),
97};
98
99int platform_int_priority[NR_INTC_IRQS] = {
100 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
101 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
102 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
104 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
105 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
106 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
107 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
108};
109
110void __init platform_setup(void)
111{
112 /* Harp platform leaves the decision to head.S, for now */
113 platform_parms.fpu_flags = fpu_in_use;
114}
115
116void __init platform_monitor(void)
117{
118 /* Nothing yet .. */
119}
120
121void __init platform_reserve(void)
122{
123 /* Nothing yet .. */
124}
125
126const char *get_system_type(void)
127{
128 return "ST50 Harp";
129}
diff --git a/arch/sh64/mach-sim/Makefile b/arch/sh64/mach-sim/Makefile
deleted file mode 100644
index 2f2963fa2131..000000000000
--- a/arch/sh64/mach-sim/Makefile
+++ /dev/null
@@ -1 +0,0 @@
1obj-y := setup.o
diff --git a/arch/sh64/mach-sim/setup.c b/arch/sh64/mach-sim/setup.c
deleted file mode 100644
index e3386ec1ce1f..000000000000
--- a/arch/sh64/mach-sim/setup.c
+++ /dev/null
@@ -1,126 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mach-sim/setup.c
7 *
8 * ST50 Simulator Platform Support
9 *
10 * This file handles the architecture-dependent parts of initialization
11 *
12 * Copyright (C) 2000, 2001 Paolo Alberelli
13 *
14 * lethal@linux-sh.org: 15th May 2003
15 * Use the generic procfs cpuinfo interface, just return a valid board name.
16 */
17#include <linux/init.h>
18#include <linux/kernel.h>
19#include <asm/platform.h>
20#include <asm/irq.h>
21
22/*
23 * Platform Dependent Interrupt Priorities.
24 */
25
26/* Using defaults defined in irq.h */
27#define RES NO_PRIORITY /* Disabled */
28#define IR0 IRL0_PRIORITY /* IRLs */
29#define IR1 IRL1_PRIORITY
30#define IR2 IRL2_PRIORITY
31#define IR3 IRL3_PRIORITY
32#define PCA INTA_PRIORITY /* PCI Ints */
33#define PCB INTB_PRIORITY
34#define PCC INTC_PRIORITY
35#define PCD INTD_PRIORITY
36#define SER TOP_PRIORITY
37#define ERR TOP_PRIORITY
38#define PW0 TOP_PRIORITY
39#define PW1 TOP_PRIORITY
40#define PW2 TOP_PRIORITY
41#define PW3 TOP_PRIORITY
42#define DM0 NO_PRIORITY /* DMA Ints */
43#define DM1 NO_PRIORITY
44#define DM2 NO_PRIORITY
45#define DM3 NO_PRIORITY
46#define DAE NO_PRIORITY
47#define TU0 TIMER_PRIORITY /* TMU Ints */
48#define TU1 NO_PRIORITY
49#define TU2 NO_PRIORITY
50#define TI2 NO_PRIORITY
51#define ATI NO_PRIORITY /* RTC Ints */
52#define PRI NO_PRIORITY
53#define CUI RTC_PRIORITY
54#define ERI SCIF_PRIORITY /* SCIF Ints */
55#define RXI SCIF_PRIORITY
56#define BRI SCIF_PRIORITY
57#define TXI SCIF_PRIORITY
58#define ITI TOP_PRIORITY /* WDT Ints */
59
60/*
61 * Platform dependent structures: maps and parms block.
62 */
63struct resource io_resources[] = {
64 /* Nothing yet .. */
65};
66
67struct resource kram_resources[] = {
68 /* These must be last in the array */
69 { .name = "Kernel code", .start = 0, .end = 0 },
70 /* These must be last in the array */
71 { .name = "Kernel data", .start = 0, .end = 0 }
72};
73
74struct resource xram_resources[] = {
75 /* Nothing yet .. */
76};
77
78struct resource rom_resources[] = {
79 /* Nothing yet .. */
80};
81
82struct sh64_platform platform_parms = {
83 .readonly_rootfs = 1,
84 .initial_root_dev = 0x0100,
85 .loader_type = 1,
86 .io_res_p = io_resources,
87 .io_res_count = ARRAY_SIZE(io_resources),
88 .kram_res_p = kram_resources,
89 .kram_res_count = ARRAY_SIZE(kram_resources),
90 .xram_res_p = xram_resources,
91 .xram_res_count = ARRAY_SIZE(xram_resources),
92 .rom_res_p = rom_resources,
93 .rom_res_count = ARRAY_SIZE(rom_resources),
94};
95
96int platform_int_priority[NR_IRQS] = {
97 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
98 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
99 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
100 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
101 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
102 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
103 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
104 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
105};
106
107void __init platform_setup(void)
108{
109 /* Simulator platform leaves the decision to head.S */
110 platform_parms.fpu_flags = fpu_in_use;
111}
112
113void __init platform_monitor(void)
114{
115 /* Nothing yet .. */
116}
117
118void __init platform_reserve(void)
119{
120 /* Nothing yet .. */
121}
122
123const char *get_system_type(void)
124{
125 return "SH-5 Simulator";
126}
diff --git a/arch/sh64/mm/consistent.c b/arch/sh64/mm/consistent.c
deleted file mode 100644
index c439620402cb..000000000000
--- a/arch/sh64/mm/consistent.c
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 * Copyright (C) 2003 Paul Mundt (lethal@linux-sh.org)
4 *
5 * May be copied or modified under the terms of the GNU General Public
6 * License. See linux/COPYING for more information.
7 *
8 * Dynamic DMA mapping support.
9 */
10#include <linux/types.h>
11#include <linux/mm.h>
12#include <linux/string.h>
13#include <linux/pci.h>
14#include <linux/dma-mapping.h>
15#include <linux/module.h>
16#include <asm/io.h>
17
18void *consistent_alloc(struct pci_dev *hwdev, size_t size,
19 dma_addr_t *dma_handle)
20{
21 void *ret;
22 int gfp = GFP_ATOMIC;
23 void *vp;
24
25 if (hwdev == NULL || hwdev->dma_mask != 0xffffffff)
26 gfp |= GFP_DMA;
27
28 ret = (void *)__get_free_pages(gfp, get_order(size));
29
30 /* now call our friend ioremap_nocache to give us an uncached area */
31 vp = ioremap_nocache(virt_to_phys(ret), size);
32
33 if (vp != NULL) {
34 memset(vp, 0, size);
35 *dma_handle = virt_to_phys(ret);
36 dma_cache_sync(NULL, ret, size, DMA_BIDIRECTIONAL);
37 }
38
39 return vp;
40}
41EXPORT_SYMBOL(consistent_alloc);
42
43void consistent_free(struct pci_dev *hwdev, size_t size,
44 void *vaddr, dma_addr_t dma_handle)
45{
46 void *alloc;
47
48 alloc = phys_to_virt((unsigned long)dma_handle);
49 free_pages((unsigned long)alloc, get_order(size));
50
51 iounmap(vaddr);
52}
53EXPORT_SYMBOL(consistent_free);
diff --git a/arch/sh64/mm/hugetlbpage.c b/arch/sh64/mm/hugetlbpage.c
deleted file mode 100644
index fa66daa2dfa9..000000000000
--- a/arch/sh64/mm/hugetlbpage.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * arch/sh64/mm/hugetlbpage.c
3 *
4 * SuperH HugeTLB page support.
5 *
6 * Cloned from sparc64 by Paul Mundt.
7 *
8 * Copyright (C) 2002, 2003 David S. Miller (davem@redhat.com)
9 */
10
11#include <linux/init.h>
12#include <linux/fs.h>
13#include <linux/mm.h>
14#include <linux/hugetlb.h>
15#include <linux/pagemap.h>
16#include <linux/slab.h>
17#include <linux/sysctl.h>
18
19#include <asm/mman.h>
20#include <asm/pgalloc.h>
21#include <asm/tlb.h>
22#include <asm/tlbflush.h>
23#include <asm/cacheflush.h>
24
25pte_t *huge_pte_alloc(struct mm_struct *mm, unsigned long addr)
26{
27 pgd_t *pgd;
28 pmd_t *pmd;
29 pte_t *pte = NULL;
30
31 pgd = pgd_offset(mm, addr);
32 if (pgd) {
33 pmd = pmd_alloc(mm, pgd, addr);
34 if (pmd)
35 pte = pte_alloc_map(mm, pmd, addr);
36 }
37 return pte;
38}
39
40pte_t *huge_pte_offset(struct mm_struct *mm, unsigned long addr)
41{
42 pgd_t *pgd;
43 pmd_t *pmd;
44 pte_t *pte = NULL;
45
46 pgd = pgd_offset(mm, addr);
47 if (pgd) {
48 pmd = pmd_offset(pgd, addr);
49 if (pmd)
50 pte = pte_offset_map(pmd, addr);
51 }
52 return pte;
53}
54
55int huge_pmd_unshare(struct mm_struct *mm, unsigned long *addr, pte_t *ptep)
56{
57 return 0;
58}
59
60void set_huge_pte_at(struct mm_struct *mm, unsigned long addr,
61 pte_t *ptep, pte_t entry)
62{
63 int i;
64
65 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
66 set_pte_at(mm, addr, ptep, entry);
67 ptep++;
68 addr += PAGE_SIZE;
69 pte_val(entry) += PAGE_SIZE;
70 }
71}
72
73pte_t huge_ptep_get_and_clear(struct mm_struct *mm, unsigned long addr,
74 pte_t *ptep)
75{
76 pte_t entry;
77 int i;
78
79 entry = *ptep;
80
81 for (i = 0; i < (1 << HUGETLB_PAGE_ORDER); i++) {
82 pte_clear(mm, addr, ptep);
83 addr += PAGE_SIZE;
84 ptep++;
85 }
86
87 return entry;
88}
89
90struct page *follow_huge_addr(struct mm_struct *mm,
91 unsigned long address, int write)
92{
93 return ERR_PTR(-EINVAL);
94}
95
96int pmd_huge(pmd_t pmd)
97{
98 return 0;
99}
100
101struct page *follow_huge_pmd(struct mm_struct *mm, unsigned long address,
102 pmd_t *pmd, int write)
103{
104 return NULL;
105}
diff --git a/arch/sh64/mm/init.c b/arch/sh64/mm/init.c
deleted file mode 100644
index 21cf42de23e2..000000000000
--- a/arch/sh64/mm/init.c
+++ /dev/null
@@ -1,189 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * arch/sh64/mm/init.c
7 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003, 2004 Paul Mundt
10 *
11 */
12
13#include <linux/init.h>
14#include <linux/rwsem.h>
15#include <linux/mm.h>
16#include <linux/swap.h>
17#include <linux/bootmem.h>
18
19#include <asm/mmu_context.h>
20#include <asm/page.h>
21#include <asm/pgalloc.h>
22#include <asm/pgtable.h>
23#include <asm/tlb.h>
24
25DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
26
27/*
28 * Cache of MMU context last used.
29 */
30unsigned long mmu_context_cache;
31pgd_t * mmu_pdtp_cache;
32int after_bootmem = 0;
33
34/*
35 * BAD_PAGE is the page that is used for page faults when linux
36 * is out-of-memory. Older versions of linux just did a
37 * do_exit(), but using this instead means there is less risk
38 * for a process dying in kernel mode, possibly leaving an inode
39 * unused etc..
40 *
41 * BAD_PAGETABLE is the accompanying page-table: it is initialized
42 * to point to BAD_PAGE entries.
43 *
44 * ZERO_PAGE is a special page that is used for zero-initialized
45 * data and COW.
46 */
47
48extern unsigned char empty_zero_page[PAGE_SIZE];
49extern unsigned char empty_bad_page[PAGE_SIZE];
50extern pte_t empty_bad_pte_table[PTRS_PER_PTE];
51extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
52
53extern char _text, _etext, _edata, __bss_start, _end;
54extern char __init_begin, __init_end;
55
56/* It'd be good if these lines were in the standard header file. */
57#define START_PFN (NODE_DATA(0)->bdata->node_boot_start >> PAGE_SHIFT)
58#define MAX_LOW_PFN (NODE_DATA(0)->bdata->node_low_pfn)
59
60
61void show_mem(void)
62{
63 int i, total = 0, reserved = 0;
64 int shared = 0, cached = 0;
65
66 printk("Mem-info:\n");
67 show_free_areas();
68 printk("Free swap: %6ldkB\n",nr_swap_pages<<(PAGE_SHIFT-10));
69 i = max_mapnr;
70 while (i-- > 0) {
71 total++;
72 if (PageReserved(mem_map+i))
73 reserved++;
74 else if (PageSwapCache(mem_map+i))
75 cached++;
76 else if (page_count(mem_map+i))
77 shared += page_count(mem_map+i) - 1;
78 }
79 printk("%d pages of RAM\n",total);
80 printk("%d reserved pages\n",reserved);
81 printk("%d pages shared\n",shared);
82 printk("%d pages swap cached\n",cached);
83 printk("%ld pages in page table cache\n", quicklist_total_size());
84}
85
86/*
87 * paging_init() sets up the page tables.
88 *
89 * head.S already did a lot to set up address translation for the kernel.
90 * Here we comes with:
91 * . MMU enabled
92 * . ASID set (SR)
93 * . some 512MB regions being mapped of which the most relevant here is:
94 * . CACHED segment (ASID 0 [irrelevant], shared AND NOT user)
95 * . possible variable length regions being mapped as:
96 * . UNCACHED segment (ASID 0 [irrelevant], shared AND NOT user)
97 * . All of the memory regions are placed, independently from the platform
98 * on high addresses, above 0x80000000.
99 * . swapper_pg_dir is already cleared out by the .space directive
100 * in any case swapper does not require a real page directory since
101 * it's all kernel contained.
102 *
103 * Those pesky NULL-reference errors in the kernel are then
104 * dealt with by not mapping address 0x00000000 at all.
105 *
106 */
107void __init paging_init(void)
108{
109 unsigned long zones_size[MAX_NR_ZONES] = {0, };
110
111 pgd_init((unsigned long)swapper_pg_dir);
112 pgd_init((unsigned long)swapper_pg_dir +
113 sizeof(pgd_t) * USER_PTRS_PER_PGD);
114
115 mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
116
117 zones_size[ZONE_NORMAL] = MAX_LOW_PFN - START_PFN;
118 NODE_DATA(0)->node_mem_map = NULL;
119 free_area_init_node(0, NODE_DATA(0), zones_size, __MEMORY_START >> PAGE_SHIFT, 0);
120}
121
122void __init mem_init(void)
123{
124 int codesize, reservedpages, datasize, initsize;
125 int tmp;
126
127 max_mapnr = num_physpages = MAX_LOW_PFN - START_PFN;
128 high_memory = (void *)__va(MAX_LOW_PFN * PAGE_SIZE);
129
130 /*
131 * Clear the zero-page.
132 * This is not required but we might want to re-use
133 * this very page to pass boot parameters, one day.
134 */
135 memset(empty_zero_page, 0, PAGE_SIZE);
136
137 /* this will put all low memory onto the freelists */
138 totalram_pages += free_all_bootmem_node(NODE_DATA(0));
139 reservedpages = 0;
140 for (tmp = 0; tmp < num_physpages; tmp++)
141 /*
142 * Only count reserved RAM pages
143 */
144 if (PageReserved(mem_map+tmp))
145 reservedpages++;
146
147 after_bootmem = 1;
148
149 codesize = (unsigned long) &_etext - (unsigned long) &_text;
150 datasize = (unsigned long) &_edata - (unsigned long) &_etext;
151 initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin;
152
153 printk("Memory: %luk/%luk available (%dk kernel code, %dk reserved, %dk data, %dk init)\n",
154 (unsigned long) nr_free_pages() << (PAGE_SHIFT-10),
155 max_mapnr << (PAGE_SHIFT-10),
156 codesize >> 10,
157 reservedpages << (PAGE_SHIFT-10),
158 datasize >> 10,
159 initsize >> 10);
160}
161
162void free_initmem(void)
163{
164 unsigned long addr;
165
166 addr = (unsigned long)(&__init_begin);
167 for (; addr < (unsigned long)(&__init_end); addr += PAGE_SIZE) {
168 ClearPageReserved(virt_to_page(addr));
169 init_page_count(virt_to_page(addr));
170 free_page(addr);
171 totalram_pages++;
172 }
173 printk ("Freeing unused kernel memory: %ldk freed\n", (&__init_end - &__init_begin) >> 10);
174}
175
176#ifdef CONFIG_BLK_DEV_INITRD
177void free_initrd_mem(unsigned long start, unsigned long end)
178{
179 unsigned long p;
180 for (p = start; p < end; p += PAGE_SIZE) {
181 ClearPageReserved(virt_to_page(p));
182 init_page_count(virt_to_page(p));
183 free_page(p);
184 totalram_pages++;
185 }
186 printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
187}
188#endif
189
diff --git a/arch/sh64/oprofile/Makefile b/arch/sh64/oprofile/Makefile
deleted file mode 100644
index 11a451f6a9c3..000000000000
--- a/arch/sh64/oprofile/Makefile
+++ /dev/null
@@ -1,12 +0,0 @@
1obj-$(CONFIG_OPROFILE) += oprofile.o
2
3DRIVER_OBJS = $(addprefix ../../../drivers/oprofile/, \
4 oprof.o cpu_buffer.o buffer_sync.o \
5 event_buffer.o oprofile_files.o \
6 oprofilefs.o oprofile_stats.o \
7 timer_int.o )
8
9profdrvr-y := op_model_null.o
10
11oprofile-y := $(DRIVER_OBJS) $(profdrvr-y)
12
diff --git a/arch/sh64/oprofile/op_model_null.c b/arch/sh64/oprofile/op_model_null.c
deleted file mode 100644
index a750ea1fee98..000000000000
--- a/arch/sh64/oprofile/op_model_null.c
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * arch/sh64/oprofile/op_model_null.c
3 *
4 * Copyright (C) 2003 Paul Mundt
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10#include <linux/kernel.h>
11#include <linux/oprofile.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14
15int __init oprofile_arch_init(struct oprofile_operations *ops)
16{
17 return -ENODEV;
18}
19
20void oprofile_arch_exit(void)
21{
22}
23
diff --git a/drivers/block/Kconfig b/drivers/block/Kconfig
index 4d0119ea9e35..f2122855d4ec 100644
--- a/drivers/block/Kconfig
+++ b/drivers/block/Kconfig
@@ -105,6 +105,17 @@ config PARIDE
105 "MicroSolutions backpack protocol", "DataStor Commuter protocol" 105 "MicroSolutions backpack protocol", "DataStor Commuter protocol"
106 etc.). 106 etc.).
107 107
108config GDROM
109 tristate "SEGA Dreamcast GD-ROM drive"
110 depends on SH_DREAMCAST
111 help
112 A standard SEGA Dreamcast comes with a modified CD ROM drive called a
113 "GD-ROM" by SEGA to signify it is capable of reading special disks
114 with up to 1 GB of data. This drive will also read standard CD ROM
115 disks. Select this option to access any disks in your GD ROM drive.
116 Most users will want to say "Y" here.
117 You can also build this as a module which will be called gdrom.ko
118
108source "drivers/block/paride/Kconfig" 119source "drivers/block/paride/Kconfig"
109 120
110config BLK_CPQ_DA 121config BLK_CPQ_DA
diff --git a/drivers/cdrom/Makefile b/drivers/cdrom/Makefile
index 774c180a4e11..ecf85fda0fc1 100644
--- a/drivers/cdrom/Makefile
+++ b/drivers/cdrom/Makefile
@@ -11,3 +11,4 @@ obj-$(CONFIG_PARIDE_PCD) += cdrom.o
11obj-$(CONFIG_CDROM_PKTCDVD) += cdrom.o 11obj-$(CONFIG_CDROM_PKTCDVD) += cdrom.o
12 12
13obj-$(CONFIG_VIOCD) += viocd.o cdrom.o 13obj-$(CONFIG_VIOCD) += viocd.o cdrom.o
14obj-$(CONFIG_GDROM) += gdrom.o cdrom.o
diff --git a/drivers/cdrom/gdrom.c b/drivers/cdrom/gdrom.c
new file mode 100644
index 000000000000..4e2bbcccc064
--- /dev/null
+++ b/drivers/cdrom/gdrom.c
@@ -0,0 +1,867 @@
1/* GD ROM driver for the SEGA Dreamcast
2 * copyright Adrian McMenamin, 2007
3 * With thanks to Marcus Comstedt and Nathan Keynes
4 * for work in reversing PIO and DMA
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
19 *
20 */
21
22#include <linux/init.h>
23#include <linux/module.h>
24#include <linux/fs.h>
25#include <linux/kernel.h>
26#include <linux/list.h>
27#include <linux/slab.h>
28#include <linux/dma-mapping.h>
29#include <linux/cdrom.h>
30#include <linux/genhd.h>
31#include <linux/bio.h>
32#include <linux/blkdev.h>
33#include <linux/interrupt.h>
34#include <linux/device.h>
35#include <linux/wait.h>
36#include <linux/workqueue.h>
37#include <linux/platform_device.h>
38#include <scsi/scsi.h>
39#include <asm/io.h>
40#include <asm/dma.h>
41#include <asm/delay.h>
42#include <asm/mach/dma.h>
43#include <asm/mach/sysasic.h>
44
45#define GDROM_DEV_NAME "gdrom"
46#define GD_SESSION_OFFSET 150
47
48/* GD Rom commands */
49#define GDROM_COM_SOFTRESET 0x08
50#define GDROM_COM_EXECDIAG 0x90
51#define GDROM_COM_PACKET 0xA0
52#define GDROM_COM_IDDEV 0xA1
53
54/* GD Rom registers */
55#define GDROM_BASE_REG 0xA05F7000
56#define GDROM_ALTSTATUS_REG (GDROM_BASE_REG + 0x18)
57#define GDROM_DATA_REG (GDROM_BASE_REG + 0x80)
58#define GDROM_ERROR_REG (GDROM_BASE_REG + 0x84)
59#define GDROM_INTSEC_REG (GDROM_BASE_REG + 0x88)
60#define GDROM_SECNUM_REG (GDROM_BASE_REG + 0x8C)
61#define GDROM_BCL_REG (GDROM_BASE_REG + 0x90)
62#define GDROM_BCH_REG (GDROM_BASE_REG + 0x94)
63#define GDROM_DSEL_REG (GDROM_BASE_REG + 0x98)
64#define GDROM_STATUSCOMMAND_REG (GDROM_BASE_REG + 0x9C)
65#define GDROM_RESET_REG (GDROM_BASE_REG + 0x4E4)
66
67#define GDROM_DMA_STARTADDR_REG (GDROM_BASE_REG + 0x404)
68#define GDROM_DMA_LENGTH_REG (GDROM_BASE_REG + 0x408)
69#define GDROM_DMA_DIRECTION_REG (GDROM_BASE_REG + 0x40C)
70#define GDROM_DMA_ENABLE_REG (GDROM_BASE_REG + 0x414)
71#define GDROM_DMA_STATUS_REG (GDROM_BASE_REG + 0x418)
72#define GDROM_DMA_WAIT_REG (GDROM_BASE_REG + 0x4A0)
73#define GDROM_DMA_ACCESS_CTRL_REG (GDROM_BASE_REG + 0x4B8)
74
75#define GDROM_HARD_SECTOR 2048
76#define BLOCK_LAYER_SECTOR 512
77#define GD_TO_BLK 4
78
79#define GDROM_DEFAULT_TIMEOUT (HZ * 7)
80
81static const struct {
82 int sense_key;
83 const char * const text;
84} sense_texts[] = {
85 {NO_SENSE, "OK"},
86 {RECOVERED_ERROR, "Recovered from error"},
87 {NOT_READY, "Device not ready"},
88 {MEDIUM_ERROR, "Disk not ready"},
89 {HARDWARE_ERROR, "Hardware error"},
90 {ILLEGAL_REQUEST, "Command has failed"},
91 {UNIT_ATTENTION, "Device needs attention - disk may have been changed"},
92 {DATA_PROTECT, "Data protection error"},
93 {ABORTED_COMMAND, "Command aborted"},
94};
95
96static struct platform_device *pd;
97static int gdrom_major;
98static DECLARE_WAIT_QUEUE_HEAD(command_queue);
99static DECLARE_WAIT_QUEUE_HEAD(request_queue);
100
101static DEFINE_SPINLOCK(gdrom_lock);
102static void gdrom_readdisk_dma(struct work_struct *work);
103static DECLARE_WORK(work, gdrom_readdisk_dma);
104static LIST_HEAD(gdrom_deferred);
105
106struct gdromtoc {
107 unsigned int entry[99];
108 unsigned int first, last;
109 unsigned int leadout;
110};
111
112static struct gdrom_unit {
113 struct gendisk *disk;
114 struct cdrom_device_info *cd_info;
115 int status;
116 int pending;
117 int transfer;
118 char disk_type;
119 struct gdromtoc *toc;
120 struct request_queue *gdrom_rq;
121} gd;
122
123struct gdrom_id {
124 char mid;
125 char modid;
126 char verid;
127 char padA[13];
128 char mname[16];
129 char modname[16];
130 char firmver[16];
131 char padB[16];
132};
133
134static int gdrom_getsense(short *bufstring);
135static int gdrom_packetcommand(struct cdrom_device_info *cd_info,
136 struct packet_command *command);
137static int gdrom_hardreset(struct cdrom_device_info *cd_info);
138
139static bool gdrom_is_busy(void)
140{
141 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) != 0;
142}
143
144static bool gdrom_data_request(void)
145{
146 return (ctrl_inb(GDROM_ALTSTATUS_REG) & 0x88) == 8;
147}
148
149static bool gdrom_wait_clrbusy(void)
150{
151 unsigned long timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
152 while ((ctrl_inb(GDROM_ALTSTATUS_REG) & 0x80) &&
153 (time_before(jiffies, timeout)))
154 cpu_relax();
155 return time_before(jiffies, timeout + 1);
156}
157
158static bool gdrom_wait_busy_sleeps(void)
159{
160 unsigned long timeout;
161 /* Wait to get busy first */
162 timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
163 while (!gdrom_is_busy() && time_before(jiffies, timeout))
164 cpu_relax();
165 /* Now wait for busy to clear */
166 return gdrom_wait_clrbusy();
167}
168
169static void gdrom_identifydevice(void *buf)
170{
171 int c;
172 short *data = buf;
173 /* If the device won't clear it has probably
174 * been hit by a serious failure - but we'll
175 * try to return a sense key even so */
176 if (!gdrom_wait_clrbusy()) {
177 gdrom_getsense(NULL);
178 return;
179 }
180 ctrl_outb(GDROM_COM_IDDEV, GDROM_STATUSCOMMAND_REG);
181 if (!gdrom_wait_busy_sleeps()) {
182 gdrom_getsense(NULL);
183 return;
184 }
185 /* now read in the data */
186 for (c = 0; c < 40; c++)
187 data[c] = ctrl_inw(GDROM_DATA_REG);
188}
189
190static void gdrom_spicommand(void *spi_string, int buflen)
191{
192 short *cmd = spi_string;
193 unsigned long timeout;
194
195 /* ensure IRQ_WAIT is set */
196 ctrl_outb(0x08, GDROM_ALTSTATUS_REG);
197 /* specify how many bytes we expect back */
198 ctrl_outb(buflen & 0xFF, GDROM_BCL_REG);
199 ctrl_outb((buflen >> 8) & 0xFF, GDROM_BCH_REG);
200 /* other parameters */
201 ctrl_outb(0, GDROM_INTSEC_REG);
202 ctrl_outb(0, GDROM_SECNUM_REG);
203 ctrl_outb(0, GDROM_ERROR_REG);
204 /* Wait until we can go */
205 if (!gdrom_wait_clrbusy()) {
206 gdrom_getsense(NULL);
207 return;
208 }
209 timeout = jiffies + GDROM_DEFAULT_TIMEOUT;
210 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
211 while (!gdrom_data_request() && time_before(jiffies, timeout))
212 cpu_relax();
213 if (!time_before(jiffies, timeout + 1)) {
214 gdrom_getsense(NULL);
215 return;
216 }
217 outsw(PHYSADDR(GDROM_DATA_REG), cmd, 6);
218}
219
220
221/* gdrom_command_executediagnostic:
222 * Used to probe for presence of working GDROM
223 * Restarts GDROM device and then applies standard ATA 3
224 * Execute Diagnostic Command: a return of '1' indicates device 0
225 * present and device 1 absent
226 */
227static char gdrom_execute_diagnostic(void)
228{
229 gdrom_hardreset(gd.cd_info);
230 if (!gdrom_wait_clrbusy())
231 return 0;
232 ctrl_outb(GDROM_COM_EXECDIAG, GDROM_STATUSCOMMAND_REG);
233 if (!gdrom_wait_busy_sleeps())
234 return 0;
235 return ctrl_inb(GDROM_ERROR_REG);
236}
237
238/*
239 * Prepare disk command
240 * byte 0 = 0x70
241 * byte 1 = 0x1f
242 */
243static int gdrom_preparedisk_cmd(void)
244{
245 struct packet_command *spin_command;
246 spin_command = kzalloc(sizeof(struct packet_command), GFP_KERNEL);
247 if (!spin_command)
248 return -ENOMEM;
249 spin_command->cmd[0] = 0x70;
250 spin_command->cmd[2] = 0x1f;
251 spin_command->buflen = 0;
252 gd.pending = 1;
253 gdrom_packetcommand(gd.cd_info, spin_command);
254 /* 60 second timeout */
255 wait_event_interruptible_timeout(command_queue, gd.pending == 0,
256 GDROM_DEFAULT_TIMEOUT);
257 gd.pending = 0;
258 kfree(spin_command);
259 if (gd.status & 0x01) {
260 /* log an error */
261 gdrom_getsense(NULL);
262 return -EIO;
263 }
264 return 0;
265}
266
267/*
268 * Read TOC command
269 * byte 0 = 0x14
270 * byte 1 = session
271 * byte 3 = sizeof TOC >> 8 ie upper byte
272 * byte 4 = sizeof TOC & 0xff ie lower byte
273 */
274static int gdrom_readtoc_cmd(struct gdromtoc *toc, int session)
275{
276 int tocsize;
277 struct packet_command *toc_command;
278 int err = 0;
279
280 toc_command = kzalloc(sizeof(struct packet_command), GFP_KERNEL);
281 if (!toc_command)
282 return -ENOMEM;
283 tocsize = sizeof(struct gdromtoc);
284 toc_command->cmd[0] = 0x14;
285 toc_command->cmd[1] = session;
286 toc_command->cmd[3] = tocsize >> 8;
287 toc_command->cmd[4] = tocsize & 0xff;
288 toc_command->buflen = tocsize;
289 if (gd.pending) {
290 err = -EBUSY;
291 goto cleanup_readtoc_final;
292 }
293 gd.pending = 1;
294 gdrom_packetcommand(gd.cd_info, toc_command);
295 wait_event_interruptible_timeout(command_queue, gd.pending == 0,
296 GDROM_DEFAULT_TIMEOUT);
297 if (gd.pending) {
298 err = -EINVAL;
299 goto cleanup_readtoc;
300 }
301 insw(PHYSADDR(GDROM_DATA_REG), toc, tocsize/2);
302 if (gd.status & 0x01)
303 err = -EINVAL;
304
305cleanup_readtoc:
306 gd.pending = 0;
307cleanup_readtoc_final:
308 kfree(toc_command);
309 return err;
310}
311
312/* TOC helpers */
313static int get_entry_lba(int track)
314{
315 return (cpu_to_be32(track & 0xffffff00) - GD_SESSION_OFFSET);
316}
317
318static int get_entry_q_ctrl(int track)
319{
320 return (track & 0x000000f0) >> 4;
321}
322
323static int get_entry_track(int track)
324{
325 return (track & 0x0000ff00) >> 8;
326}
327
328static int gdrom_get_last_session(struct cdrom_device_info *cd_info,
329 struct cdrom_multisession *ms_info)
330{
331 int fentry, lentry, track, data, tocuse, err;
332 if (!gd.toc)
333 return -ENOMEM;
334 tocuse = 1;
335 /* Check if GD-ROM */
336 err = gdrom_readtoc_cmd(gd.toc, 1);
337 /* Not a GD-ROM so check if standard CD-ROM */
338 if (err) {
339 tocuse = 0;
340 err = gdrom_readtoc_cmd(gd.toc, 0);
341 if (err) {
342 printk(KERN_INFO "GDROM: Could not get CD "
343 "table of contents\n");
344 return -ENXIO;
345 }
346 }
347
348 fentry = get_entry_track(gd.toc->first);
349 lentry = get_entry_track(gd.toc->last);
350 /* Find the first data track */
351 track = get_entry_track(gd.toc->last);
352 do {
353 data = gd.toc->entry[track - 1];
354 if (get_entry_q_ctrl(data))
355 break; /* ie a real data track */
356 track--;
357 } while (track >= fentry);
358
359 if ((track > 100) || (track < get_entry_track(gd.toc->first))) {
360 printk(KERN_INFO "GDROM: No data on the last "
361 "session of the CD\n");
362 gdrom_getsense(NULL);
363 return -ENXIO;
364 }
365
366 ms_info->addr_format = CDROM_LBA;
367 ms_info->addr.lba = get_entry_lba(data);
368 ms_info->xa_flag = 1;
369 return 0;
370}
371
372static int gdrom_open(struct cdrom_device_info *cd_info, int purpose)
373{
374 /* spin up the disk */
375 return gdrom_preparedisk_cmd();
376}
377
378/* this function is required even if empty */
379static void gdrom_release(struct cdrom_device_info *cd_info)
380{
381}
382
383static int gdrom_drivestatus(struct cdrom_device_info *cd_info, int ignore)
384{
385 /* read the sense key */
386 char sense = ctrl_inb(GDROM_ERROR_REG);
387 sense &= 0xF0;
388 if (sense == 0)
389 return CDS_DISC_OK;
390 if (sense == 0x20)
391 return CDS_DRIVE_NOT_READY;
392 /* default */
393 return CDS_NO_INFO;
394}
395
396static int gdrom_mediachanged(struct cdrom_device_info *cd_info, int ignore)
397{
398 /* check the sense key */
399 return (ctrl_inb(GDROM_ERROR_REG) & 0xF0) == 0x60;
400}
401
402/* reset the G1 bus */
403static int gdrom_hardreset(struct cdrom_device_info *cd_info)
404{
405 int count;
406 ctrl_outl(0x1fffff, GDROM_RESET_REG);
407 for (count = 0xa0000000; count < 0xa0200000; count += 4)
408 ctrl_inl(count);
409 return 0;
410}
411
412/* keep the function looking like the universal
413 * CD Rom specification - returning int */
414static int gdrom_packetcommand(struct cdrom_device_info *cd_info,
415 struct packet_command *command)
416{
417 gdrom_spicommand(&command->cmd, command->buflen);
418 return 0;
419}
420
421/* Get Sense SPI command
422 * From Marcus Comstedt
423 * cmd = 0x13
424 * cmd + 4 = length of returned buffer
425 * Returns 5 16 bit words
426 */
427static int gdrom_getsense(short *bufstring)
428{
429 struct packet_command *sense_command;
430 short sense[5];
431 int sense_key;
432 int err = -EIO;
433
434 sense_command = kzalloc(sizeof(struct packet_command), GFP_KERNEL);
435 if (!sense_command)
436 return -ENOMEM;
437 sense_command->cmd[0] = 0x13;
438 sense_command->cmd[4] = 10;
439 sense_command->buflen = 10;
440 /* even if something is pending try to get
441 * the sense key if possible */
442 if (gd.pending && !gdrom_wait_clrbusy()) {
443 err = -EBUSY;
444 goto cleanup_sense_final;
445 }
446 gd.pending = 1;
447 gdrom_packetcommand(gd.cd_info, sense_command);
448 wait_event_interruptible_timeout(command_queue, gd.pending == 0,
449 GDROM_DEFAULT_TIMEOUT);
450 if (gd.pending)
451 goto cleanup_sense;
452 insw(PHYSADDR(GDROM_DATA_REG), &sense, sense_command->buflen/2);
453 if (sense[1] & 40) {
454 printk(KERN_INFO "GDROM: Drive not ready - command aborted\n");
455 goto cleanup_sense;
456 }
457 sense_key = sense[1] & 0x0F;
458 if (sense_key < ARRAY_SIZE(sense_texts))
459 printk(KERN_INFO "GDROM: %s\n", sense_texts[sense_key].text);
460 else
461 printk(KERN_ERR "GDROM: Unknown sense key: %d\n", sense_key);
462 if (bufstring) /* return addional sense data */
463 memcpy(bufstring, &sense[4], 2);
464 if (sense_key < 2)
465 err = 0;
466
467cleanup_sense:
468 gd.pending = 0;
469cleanup_sense_final:
470 kfree(sense_command);
471 return err;
472}
473
474static struct cdrom_device_ops gdrom_ops = {
475 .open = gdrom_open,
476 .release = gdrom_release,
477 .drive_status = gdrom_drivestatus,
478 .media_changed = gdrom_mediachanged,
479 .get_last_session = gdrom_get_last_session,
480 .reset = gdrom_hardreset,
481 .capability = CDC_MULTI_SESSION | CDC_MEDIA_CHANGED |
482 CDC_RESET | CDC_DRIVE_STATUS | CDC_CD_R,
483 .n_minors = 1,
484};
485
486static int gdrom_bdops_open(struct inode *inode, struct file *file)
487{
488 return cdrom_open(gd.cd_info, inode, file);
489}
490
491static int gdrom_bdops_release(struct inode *inode, struct file *file)
492{
493 return cdrom_release(gd.cd_info, file);
494}
495
496static int gdrom_bdops_mediachanged(struct gendisk *disk)
497{
498 return cdrom_media_changed(gd.cd_info);
499}
500
501static int gdrom_bdops_ioctl(struct inode *inode, struct file *file,
502 unsigned cmd, unsigned long arg)
503{
504 return cdrom_ioctl(file, gd.cd_info, inode, cmd, arg);
505}
506
507static struct block_device_operations gdrom_bdops = {
508 .owner = THIS_MODULE,
509 .open = gdrom_bdops_open,
510 .release = gdrom_bdops_release,
511 .media_changed = gdrom_bdops_mediachanged,
512 .ioctl = gdrom_bdops_ioctl,
513};
514
515static irqreturn_t gdrom_command_interrupt(int irq, void *dev_id)
516{
517 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG);
518 if (gd.pending != 1)
519 return IRQ_HANDLED;
520 gd.pending = 0;
521 wake_up_interruptible(&command_queue);
522 return IRQ_HANDLED;
523}
524
525static irqreturn_t gdrom_dma_interrupt(int irq, void *dev_id)
526{
527 gd.status = ctrl_inb(GDROM_STATUSCOMMAND_REG);
528 if (gd.transfer != 1)
529 return IRQ_HANDLED;
530 gd.transfer = 0;
531 wake_up_interruptible(&request_queue);
532 return IRQ_HANDLED;
533}
534
535static int __devinit gdrom_set_interrupt_handlers(void)
536{
537 int err;
538
539 err = request_irq(HW_EVENT_GDROM_CMD, gdrom_command_interrupt,
540 IRQF_DISABLED, "gdrom_command", &gd);
541 if (err)
542 return err;
543 err = request_irq(HW_EVENT_GDROM_DMA, gdrom_dma_interrupt,
544 IRQF_DISABLED, "gdrom_dma", &gd);
545 if (err)
546 free_irq(HW_EVENT_GDROM_CMD, &gd);
547 return err;
548}
549
550/* Implement DMA read using SPI command
551 * 0 -> 0x30
552 * 1 -> mode
553 * 2 -> block >> 16
554 * 3 -> block >> 8
555 * 4 -> block
556 * 8 -> sectors >> 16
557 * 9 -> sectors >> 8
558 * 10 -> sectors
559 */
560static void gdrom_readdisk_dma(struct work_struct *work)
561{
562 int err, block, block_cnt;
563 struct packet_command *read_command;
564 struct list_head *elem, *next;
565 struct request *req;
566 unsigned long timeout;
567
568 if (list_empty(&gdrom_deferred))
569 return;
570 read_command = kzalloc(sizeof(struct packet_command), GFP_KERNEL);
571 if (!read_command)
572 return; /* get more memory later? */
573 read_command->cmd[0] = 0x30;
574 read_command->cmd[1] = 0x20;
575 spin_lock(&gdrom_lock);
576 list_for_each_safe(elem, next, &gdrom_deferred) {
577 req = list_entry(elem, struct request, queuelist);
578 spin_unlock(&gdrom_lock);
579 block = req->sector/GD_TO_BLK + GD_SESSION_OFFSET;
580 block_cnt = req->nr_sectors/GD_TO_BLK;
581 ctrl_outl(PHYSADDR(req->buffer), GDROM_DMA_STARTADDR_REG);
582 ctrl_outl(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
583 ctrl_outl(1, GDROM_DMA_DIRECTION_REG);
584 ctrl_outl(1, GDROM_DMA_ENABLE_REG);
585 read_command->cmd[2] = (block >> 16) & 0xFF;
586 read_command->cmd[3] = (block >> 8) & 0xFF;
587 read_command->cmd[4] = block & 0xFF;
588 read_command->cmd[8] = (block_cnt >> 16) & 0xFF;
589 read_command->cmd[9] = (block_cnt >> 8) & 0xFF;
590 read_command->cmd[10] = block_cnt & 0xFF;
591 /* set for DMA */
592 ctrl_outb(1, GDROM_ERROR_REG);
593 /* other registers */
594 ctrl_outb(0, GDROM_SECNUM_REG);
595 ctrl_outb(0, GDROM_BCL_REG);
596 ctrl_outb(0, GDROM_BCH_REG);
597 ctrl_outb(0, GDROM_DSEL_REG);
598 ctrl_outb(0, GDROM_INTSEC_REG);
599 /* Wait for registers to reset after any previous activity */
600 timeout = jiffies + HZ / 2;
601 while (gdrom_is_busy() && time_before(jiffies, timeout))
602 cpu_relax();
603 ctrl_outb(GDROM_COM_PACKET, GDROM_STATUSCOMMAND_REG);
604 timeout = jiffies + HZ / 2;
605 /* Wait for packet command to finish */
606 while (gdrom_is_busy() && time_before(jiffies, timeout))
607 cpu_relax();
608 gd.pending = 1;
609 gd.transfer = 1;
610 outsw(PHYSADDR(GDROM_DATA_REG), &read_command->cmd, 6);
611 timeout = jiffies + HZ / 2;
612 /* Wait for any pending DMA to finish */
613 while (ctrl_inb(GDROM_DMA_STATUS_REG) &&
614 time_before(jiffies, timeout))
615 cpu_relax();
616 /* start transfer */
617 ctrl_outb(1, GDROM_DMA_STATUS_REG);
618 wait_event_interruptible_timeout(request_queue,
619 gd.transfer == 0, GDROM_DEFAULT_TIMEOUT);
620 err = gd.transfer;
621 gd.transfer = 0;
622 gd.pending = 0;
623 /* now seek to take the request spinlock
624 * before handling ending the request */
625 spin_lock(&gdrom_lock);
626 list_del_init(&req->queuelist);
627 end_dequeued_request(req, 1 - err);
628 }
629 spin_unlock(&gdrom_lock);
630 kfree(read_command);
631}
632
633static void gdrom_request_handler_dma(struct request *req)
634{
635 /* dequeue, add to list of deferred work
636 * and then schedule workqueue */
637 blkdev_dequeue_request(req);
638 list_add_tail(&req->queuelist, &gdrom_deferred);
639 schedule_work(&work);
640}
641
642static void gdrom_request(struct request_queue *rq)
643{
644 struct request *req;
645
646 while ((req = elv_next_request(rq)) != NULL) {
647 if (!blk_fs_request(req)) {
648 printk(KERN_DEBUG "GDROM: Non-fs request ignored\n");
649 end_request(req, 0);
650 }
651 if (rq_data_dir(req) != READ) {
652 printk(KERN_NOTICE "GDROM: Read only device -");
653 printk(" write request ignored\n");
654 end_request(req, 0);
655 }
656 if (req->nr_sectors)
657 gdrom_request_handler_dma(req);
658 else
659 end_request(req, 0);
660 }
661}
662
663/* Print string identifying GD ROM device */
664static int __devinit gdrom_outputversion(void)
665{
666 struct gdrom_id *id;
667 char *model_name, *manuf_name, *firmw_ver;
668 int err = -ENOMEM;
669
670 /* query device ID */
671 id = kzalloc(sizeof(struct gdrom_id), GFP_KERNEL);
672 if (!id)
673 return err;
674 gdrom_identifydevice(id);
675 model_name = kstrndup(id->modname, 16, GFP_KERNEL);
676 if (!model_name)
677 goto free_id;
678 manuf_name = kstrndup(id->mname, 16, GFP_KERNEL);
679 if (!manuf_name)
680 goto free_model_name;
681 firmw_ver = kstrndup(id->firmver, 16, GFP_KERNEL);
682 if (!firmw_ver)
683 goto free_manuf_name;
684 printk(KERN_INFO "GDROM: %s from %s with firmware %s\n",
685 model_name, manuf_name, firmw_ver);
686 err = 0;
687 kfree(firmw_ver);
688free_manuf_name:
689 kfree(manuf_name);
690free_model_name:
691 kfree(model_name);
692free_id:
693 kfree(id);
694 return err;
695}
696
697/* set the default mode for DMA transfer */
698static int __devinit gdrom_init_dma_mode(void)
699{
700 ctrl_outb(0x13, GDROM_ERROR_REG);
701 ctrl_outb(0x22, GDROM_INTSEC_REG);
702 if (!gdrom_wait_clrbusy())
703 return -EBUSY;
704 ctrl_outb(0xEF, GDROM_STATUSCOMMAND_REG);
705 if (!gdrom_wait_busy_sleeps())
706 return -EBUSY;
707 /* Memory protection setting for GDROM DMA
708 * Bits 31 - 16 security: 0x8843
709 * Bits 15 and 7 reserved (0)
710 * Bits 14 - 8 start of transfer range in 1 MB blocks OR'ed with 0x80
711 * Bits 6 - 0 end of transfer range in 1 MB blocks OR'ed with 0x80
712 * (0x40 | 0x80) = start range at 0x0C000000
713 * (0x7F | 0x80) = end range at 0x0FFFFFFF */
714 ctrl_outl(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
715 ctrl_outl(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
716 return 0;
717}
718
719static void __devinit probe_gdrom_setupcd(void)
720{
721 gd.cd_info->ops = &gdrom_ops;
722 gd.cd_info->capacity = 1;
723 strcpy(gd.cd_info->name, GDROM_DEV_NAME);
724 gd.cd_info->mask = CDC_CLOSE_TRAY|CDC_OPEN_TRAY|CDC_LOCK|
725 CDC_SELECT_DISC;
726}
727
728static void __devinit probe_gdrom_setupdisk(void)
729{
730 gd.disk->major = gdrom_major;
731 gd.disk->first_minor = 1;
732 gd.disk->minors = 1;
733 strcpy(gd.disk->disk_name, GDROM_DEV_NAME);
734}
735
736static int __devinit probe_gdrom_setupqueue(void)
737{
738 blk_queue_hardsect_size(gd.gdrom_rq, GDROM_HARD_SECTOR);
739 /* using DMA so memory will need to be contiguous */
740 blk_queue_max_hw_segments(gd.gdrom_rq, 1);
741 /* set a large max size to get most from DMA */
742 blk_queue_max_segment_size(gd.gdrom_rq, 0x40000);
743 gd.disk->queue = gd.gdrom_rq;
744 return gdrom_init_dma_mode();
745}
746
747/*
748 * register this as a block device and as compliant with the
749 * universal CD Rom driver interface
750 */
751static int __devinit probe_gdrom(struct platform_device *devptr)
752{
753 int err;
754 /* Start the device */
755 if (gdrom_execute_diagnostic() != 1) {
756 printk(KERN_WARNING "GDROM: ATA Probe for GDROM failed.\n");
757 return -ENODEV;
758 }
759 /* Print out firmware ID */
760 if (gdrom_outputversion())
761 return -ENOMEM;
762 /* Register GDROM */
763 gdrom_major = register_blkdev(0, GDROM_DEV_NAME);
764 if (gdrom_major <= 0)
765 return gdrom_major;
766 printk(KERN_INFO "GDROM: Registered with major number %d\n",
767 gdrom_major);
768 /* Specify basic properties of drive */
769 gd.cd_info = kzalloc(sizeof(struct cdrom_device_info), GFP_KERNEL);
770 if (!gd.cd_info) {
771 err = -ENOMEM;
772 goto probe_fail_no_mem;
773 }
774 probe_gdrom_setupcd();
775 gd.disk = alloc_disk(1);
776 if (!gd.disk) {
777 err = -ENODEV;
778 goto probe_fail_no_disk;
779 }
780 probe_gdrom_setupdisk();
781 if (register_cdrom(gd.cd_info)) {
782 err = -ENODEV;
783 goto probe_fail_cdrom_register;
784 }
785 gd.disk->fops = &gdrom_bdops;
786 /* latch on to the interrupt */
787 err = gdrom_set_interrupt_handlers();
788 if (err)
789 goto probe_fail_cmdirq_register;
790 gd.gdrom_rq = blk_init_queue(gdrom_request, &gdrom_lock);
791 if (!gd.gdrom_rq)
792 goto probe_fail_requestq;
793
794 err = probe_gdrom_setupqueue();
795 if (err)
796 goto probe_fail_toc;
797
798 gd.toc = kzalloc(sizeof(struct gdromtoc), GFP_KERNEL);
799 if (!gd.toc)
800 goto probe_fail_toc;
801 add_disk(gd.disk);
802 return 0;
803
804probe_fail_toc:
805 blk_cleanup_queue(gd.gdrom_rq);
806probe_fail_requestq:
807 free_irq(HW_EVENT_GDROM_DMA, &gd);
808 free_irq(HW_EVENT_GDROM_CMD, &gd);
809probe_fail_cmdirq_register:
810probe_fail_cdrom_register:
811 del_gendisk(gd.disk);
812probe_fail_no_disk:
813 kfree(gd.cd_info);
814 unregister_blkdev(gdrom_major, GDROM_DEV_NAME);
815 gdrom_major = 0;
816probe_fail_no_mem:
817 printk(KERN_WARNING "GDROM: Probe failed - error is 0x%X\n", err);
818 return err;
819}
820
821static int __devexit remove_gdrom(struct platform_device *devptr)
822{
823 flush_scheduled_work();
824 blk_cleanup_queue(gd.gdrom_rq);
825 free_irq(HW_EVENT_GDROM_CMD, &gd);
826 free_irq(HW_EVENT_GDROM_DMA, &gd);
827 del_gendisk(gd.disk);
828 if (gdrom_major)
829 unregister_blkdev(gdrom_major, GDROM_DEV_NAME);
830 return unregister_cdrom(gd.cd_info);
831}
832
833static struct platform_driver gdrom_driver = {
834 .probe = probe_gdrom,
835 .remove = __devexit_p(remove_gdrom),
836 .driver = {
837 .name = GDROM_DEV_NAME,
838 },
839};
840
841static int __init init_gdrom(void)
842{
843 int rc;
844 gd.toc = NULL;
845 rc = platform_driver_register(&gdrom_driver);
846 if (rc)
847 return rc;
848 pd = platform_device_register_simple(GDROM_DEV_NAME, -1, NULL, 0);
849 if (IS_ERR(pd)) {
850 platform_driver_unregister(&gdrom_driver);
851 return PTR_ERR(pd);
852 }
853 return 0;
854}
855
856static void __exit exit_gdrom(void)
857{
858 platform_device_unregister(pd);
859 platform_driver_unregister(&gdrom_driver);
860 kfree(gd.toc);
861}
862
863module_init(init_gdrom);
864module_exit(exit_gdrom);
865MODULE_AUTHOR("Adrian McMenamin <adrian@mcmen.demon.co.uk>");
866MODULE_DESCRIPTION("SEGA Dreamcast GD-ROM Driver");
867MODULE_LICENSE("GPL");
diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig
index 1e6715ec51ef..45e4b9648176 100644
--- a/drivers/rtc/Kconfig
+++ b/drivers/rtc/Kconfig
@@ -404,7 +404,7 @@ config RTC_DRV_SA1100
404 404
405config RTC_DRV_SH 405config RTC_DRV_SH
406 tristate "SuperH On-Chip RTC" 406 tristate "SuperH On-Chip RTC"
407 depends on RTC_CLASS && (CPU_SH3 || CPU_SH4) 407 depends on RTC_CLASS && SUPERH
408 help 408 help
409 Say Y here to enable support for the on-chip RTC found in 409 Say Y here to enable support for the on-chip RTC found in
410 most SuperH processors. 410 most SuperH processors.
diff --git a/drivers/rtc/rtc-sh.c b/drivers/rtc/rtc-sh.c
index 8e8c8b8e81ee..c1d6a1880ccf 100644
--- a/drivers/rtc/rtc-sh.c
+++ b/drivers/rtc/rtc-sh.c
@@ -26,17 +26,7 @@
26#include <asm/rtc.h> 26#include <asm/rtc.h>
27 27
28#define DRV_NAME "sh-rtc" 28#define DRV_NAME "sh-rtc"
29#define DRV_VERSION "0.1.3" 29#define DRV_VERSION "0.1.6"
30
31#ifdef CONFIG_CPU_SH3
32#define rtc_reg_size sizeof(u16)
33#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
34#define RTC_DEF_CAPABILITIES 0UL
35#elif defined(CONFIG_CPU_SH4)
36#define rtc_reg_size sizeof(u32)
37#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
38#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
39#endif
40 30
41#define RTC_REG(r) ((r) * rtc_reg_size) 31#define RTC_REG(r) ((r) * rtc_reg_size)
42 32
@@ -58,6 +48,18 @@
58#define RCR1 RTC_REG(14) /* Control */ 48#define RCR1 RTC_REG(14) /* Control */
59#define RCR2 RTC_REG(15) /* Control */ 49#define RCR2 RTC_REG(15) /* Control */
60 50
51/*
52 * Note on RYRAR and RCR3: Up until this point most of the register
53 * definitions are consistent across all of the available parts. However,
54 * the placement of the optional RYRAR and RCR3 (the RYRAR control
55 * register used to control RYRCNT/RYRAR compare) varies considerably
56 * across various parts, occasionally being mapped in to a completely
57 * unrelated address space. For proper RYRAR support a separate resource
58 * would have to be handed off, but as this is purely optional in
59 * practice, we simply opt not to support it, thereby keeping the code
60 * quite a bit more simplified.
61 */
62
61/* ALARM Bits - or with BCD encoded value */ 63/* ALARM Bits - or with BCD encoded value */
62#define AR_ENB 0x80 /* Enable for alarm cmp */ 64#define AR_ENB 0x80 /* Enable for alarm cmp */
63 65
diff --git a/drivers/serial/sh-sci.c b/drivers/serial/sh-sci.c
index 73440e26834b..ddf639144538 100644
--- a/drivers/serial/sh-sci.c
+++ b/drivers/serial/sh-sci.c
@@ -302,7 +302,7 @@ static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
302 } 302 }
303 sci_out(port, SCFCR, fcr_val); 303 sci_out(port, SCFCR, fcr_val);
304} 304}
305#elif defined(CONFIG_CPU_SUBTYPE_SH7720) 305#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7721)
306static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag) 306static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
307{ 307{
308 unsigned int fcr_val = 0; 308 unsigned int fcr_val = 0;
@@ -395,7 +395,8 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
395 } else { 395 } else {
396#ifdef CONFIG_CPU_SUBTYPE_SH7343 396#ifdef CONFIG_CPU_SUBTYPE_SH7343
397 /* Nothing */ 397 /* Nothing */
398#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 398#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
399 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
399 defined(CONFIG_CPU_SUBTYPE_SH7785) || \ 400 defined(CONFIG_CPU_SUBTYPE_SH7785) || \
400 defined(CONFIG_CPU_SUBTYPE_SHX3) 401 defined(CONFIG_CPU_SUBTYPE_SHX3)
401 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */ 402 ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
@@ -408,6 +409,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
408#endif 409#endif
409 410
410#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 411#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
412 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
411 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 413 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
412 defined(CONFIG_CPU_SUBTYPE_SH7785) 414 defined(CONFIG_CPU_SUBTYPE_SH7785)
413static inline int scif_txroom(struct uart_port *port) 415static inline int scif_txroom(struct uart_port *port)
diff --git a/drivers/serial/sh-sci.h b/drivers/serial/sh-sci.h
index d24621ce799a..f5764ebcfe07 100644
--- a/drivers/serial/sh-sci.h
+++ b/drivers/serial/sh-sci.h
@@ -46,7 +46,8 @@
46 */ 46 */
47# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0 47# define SCSCR_INIT(port) (port->mapbase == SCIF2) ? 0xF3 : 0xF0
48# define SCIF_ONLY 48# define SCIF_ONLY
49#elif defined(CONFIG_CPU_SUBTYPE_SH7720) 49#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
50 defined(CONFIG_CPU_SUBTYPE_SH7721)
50# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */ 51# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
51# define SCIF_ONLY 52# define SCIF_ONLY
52#define SCIF_ORER 0x0200 /* overrun error bit */ 53#define SCIF_ORER 0x0200 /* overrun error bit */
@@ -119,6 +120,12 @@
119# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */ 120# define SCSCR_INIT(port) 0x30 /* TIE=0,RIE=0,TE=1,RE=1 */
120# define SCI_ONLY 121# define SCI_ONLY
121# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port) 122# define H8300_SCI_DR(ch) *(volatile char *)(P1DR + h8300_sci_pins[ch].port)
123#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
124# define SCSPTR0 0xffe00024 /* 16 bit SCIF */
125# define SCSPTR1 0xffe08024 /* 16 bit SCIF */
126# define SCIF_ORER 0x0001 /* overrun error bit */
127# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
128# define SCIF_ONLY
122#elif defined(CONFIG_CPU_SUBTYPE_SH7770) 129#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
123# define SCSPTR0 0xff923020 /* 16 bit SCIF */ 130# define SCSPTR0 0xff923020 /* 16 bit SCIF */
124# define SCSPTR1 0xff924020 /* 16 bit SCIF */ 131# define SCSPTR1 0xff924020 /* 16 bit SCIF */
@@ -142,7 +149,9 @@
142# define SCIF_OPER 0x0001 /* Overrun error bit */ 149# define SCIF_OPER 0x0001 /* Overrun error bit */
143# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */ 150# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
144# define SCIF_ONLY 151# define SCIF_ONLY
145#elif defined(CONFIG_CPU_SUBTYPE_SH7206) 152#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
153 defined(CONFIG_CPU_SUBTYPE_SH7206) || \
154 defined(CONFIG_CPU_SUBTYPE_SH7263)
146# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */ 155# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
147# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */ 156# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
148# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */ 157# define SCSPTR2 0xfffe9020 /* 16 bit SCIF */
@@ -214,7 +223,8 @@
214#define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */ 223#define SCIF_DR 0x0001 /* 7705 SCIF, 7707 SCIF, 7709 SCIF, 7750 SCIF */
215 224
216#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 225#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
217 defined(CONFIG_CPU_SUBTYPE_SH7720) 226 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
227 defined(CONFIG_CPU_SUBTYPE_SH7721)
218#define SCIF_ORER 0x0200 228#define SCIF_ORER 0x0200
219#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER) 229#define SCIF_ERRORS ( SCIF_PER | SCIF_FER | SCIF_ER | SCIF_BRK | SCIF_ORER)
220#define SCIF_RFDC_MASK 0x007f 230#define SCIF_RFDC_MASK 0x007f
@@ -252,7 +262,8 @@
252# define SCxSR_PER(port) SCIF_PER 262# define SCxSR_PER(port) SCIF_PER
253# define SCxSR_BRK(port) SCIF_BRK 263# define SCxSR_BRK(port) SCIF_BRK
254#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 264#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
255 defined(CONFIG_CPU_SUBTYPE_SH7720) 265 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
266 defined(CONFIG_CPU_SUBTYPE_SH7721)
256# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc) 267# define SCxSR_RDxF_CLEAR(port) (sci_in(port,SCxSR)&0xfffc)
257# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73) 268# define SCxSR_ERROR_CLEAR(port) (sci_in(port,SCxSR)&0xfd73)
258# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf) 269# define SCxSR_TDxE_CLEAR(port) (sci_in(port,SCxSR)&0xffdf)
@@ -361,7 +372,8 @@
361#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \ 372#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
362 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) 373 CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
363#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 374#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
364 defined(CONFIG_CPU_SUBTYPE_SH7720) 375 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
376 defined(CONFIG_CPU_SUBTYPE_SH7721)
365#define SCIF_FNS(name, scif_offset, scif_size) \ 377#define SCIF_FNS(name, scif_offset, scif_size) \
366 CPU_SCIF_FNS(name, scif_offset, scif_size) 378 CPU_SCIF_FNS(name, scif_offset, scif_size)
367#else 379#else
@@ -388,7 +400,8 @@
388#endif 400#endif
389 401
390#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 402#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
391 defined(CONFIG_CPU_SUBTYPE_SH7720) 403 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
404 defined(CONFIG_CPU_SUBTYPE_SH7721)
392 405
393SCIF_FNS(SCSMR, 0x00, 16) 406SCIF_FNS(SCSMR, 0x00, 16)
394SCIF_FNS(SCBRR, 0x04, 8) 407SCIF_FNS(SCBRR, 0x04, 8)
@@ -412,6 +425,7 @@ SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
412SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8) 425SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
413SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16) 426SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
414#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \ 427#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
428 defined(CONFIG_CPU_SUBTYPE_SH7763) || \
415 defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 429 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
416 defined(CONFIG_CPU_SUBTYPE_SH7785) 430 defined(CONFIG_CPU_SUBTYPE_SH7785)
417SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16) 431SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
@@ -510,7 +524,8 @@ static inline void set_sh771x_scif_pfc(struct uart_port *port)
510 return; 524 return;
511 } 525 }
512} 526}
513#elif defined(CONFIG_CPU_SUBTYPE_SH7720) 527#elif defined(CONFIG_CPU_SUBTYPE_SH7720) || \
528 defined(CONFIG_CPU_SUBTYPE_SH7721)
514static inline int sci_rxd_in(struct uart_port *port) 529static inline int sci_rxd_in(struct uart_port *port)
515{ 530{
516 if (port->mapbase == 0xa4430000) 531 if (port->mapbase == 0xa4430000)
@@ -580,6 +595,15 @@ static inline int sci_rxd_in(struct uart_port *port)
580 int ch = (port->mapbase - SMR0) >> 3; 595 int ch = (port->mapbase - SMR0) >> 3;
581 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0; 596 return (H8300_SCI_DR(ch) & h8300_sci_pins[ch].rx) ? 1 : 0;
582} 597}
598#elif defined(CONFIG_CPU_SUBTYPE_SH7763)
599static inline int sci_rxd_in(struct uart_port *port)
600{
601 if (port->mapbase == 0xffe00000)
602 return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
603 if (port->mapbase == 0xffe08000)
604 return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
605 return 1;
606}
583#elif defined(CONFIG_CPU_SUBTYPE_SH7770) 607#elif defined(CONFIG_CPU_SUBTYPE_SH7770)
584static inline int sci_rxd_in(struct uart_port *port) 608static inline int sci_rxd_in(struct uart_port *port)
585{ 609{
@@ -617,7 +641,9 @@ static inline int sci_rxd_in(struct uart_port *port)
617 return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */ 641 return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
618 return 1; 642 return 1;
619} 643}
620#elif defined(CONFIG_CPU_SUBTYPE_SH7206) 644#elif defined(CONFIG_CPU_SUBTYPE_SH7203) || \
645 defined(CONFIG_CPU_SUBTYPE_SH7206) || \
646 defined(CONFIG_CPU_SUBTYPE_SH7263)
621static inline int sci_rxd_in(struct uart_port *port) 647static inline int sci_rxd_in(struct uart_port *port)
622{ 648{
623 if (port->mapbase == 0xfffe8000) 649 if (port->mapbase == 0xfffe8000)
@@ -688,11 +714,13 @@ static inline int sci_rxd_in(struct uart_port *port)
688 * -- Mitch Davis - 15 Jul 2000 714 * -- Mitch Davis - 15 Jul 2000
689 */ 715 */
690 716
691#if defined(CONFIG_CPU_SUBTYPE_SH7780) || \ 717#if defined(CONFIG_CPU_SUBTYPE_SH7763) || \
718 defined(CONFIG_CPU_SUBTYPE_SH7780) || \
692 defined(CONFIG_CPU_SUBTYPE_SH7785) 719 defined(CONFIG_CPU_SUBTYPE_SH7785)
693#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1) 720#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
694#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 721#elif defined(CONFIG_CPU_SUBTYPE_SH7705) || \
695 defined(CONFIG_CPU_SUBTYPE_SH7720) 722 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
723 defined(CONFIG_CPU_SUBTYPE_SH7721)
696#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1) 724#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
697#elif defined(__H8300H__) || defined(__H8300S__) 725#elif defined(__H8300H__) || defined(__H8300S__)
698#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1) 726#define SCBRR_VALUE(bps) (((CONFIG_CPU_CLOCK*1000/32)/bps)-1)
diff --git a/include/asm-sh/Kbuild b/include/asm-sh/Kbuild
index 76a8ccf254a5..43910cdf78a5 100644
--- a/include/asm-sh/Kbuild
+++ b/include/asm-sh/Kbuild
@@ -1,3 +1,8 @@
1include include/asm-generic/Kbuild.asm 1include include/asm-generic/Kbuild.asm
2 2
3header-y += cpu-features.h 3header-y += cpu-features.h
4
5unifdef-y += unistd_32.h
6unifdef-y += unistd_64.h
7unifdef-y += posix_types_32.h
8unifdef-y += posix_types_64.h
diff --git a/include/asm-sh/addrspace.h b/include/asm-sh/addrspace.h
index b860218e402e..fa544fc38c23 100644
--- a/include/asm-sh/addrspace.h
+++ b/include/asm-sh/addrspace.h
@@ -9,24 +9,21 @@
9 */ 9 */
10#ifndef __ASM_SH_ADDRSPACE_H 10#ifndef __ASM_SH_ADDRSPACE_H
11#define __ASM_SH_ADDRSPACE_H 11#define __ASM_SH_ADDRSPACE_H
12
12#ifdef __KERNEL__ 13#ifdef __KERNEL__
13 14
14#include <asm/cpu/addrspace.h> 15#include <asm/cpu/addrspace.h>
15 16
16/* Memory segments (32bit Privileged mode addresses) */ 17/* If this CPU supports segmentation, hook up the helpers */
17#ifndef CONFIG_CPU_SH2A 18#ifdef P1SEG
18#define P0SEG 0x00000000 19
19#define P1SEG 0x80000000 20/*
20#define P2SEG 0xa0000000 21 [ P0/U0 (virtual) ] 0x00000000 <------ User space
21#define P3SEG 0xc0000000 22 [ P1 (fixed) cached ] 0x80000000 <------ Kernel space
22#define P4SEG 0xe0000000 23 [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access
23#else 24 [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area
24#define P0SEG 0x00000000 25 [ P4 control ] 0xE0000000
25#define P1SEG 0x00000000 26 */
26#define P2SEG 0x20000000
27#define P3SEG 0x00000000
28#define P4SEG 0x80000000
29#endif
30 27
31/* Returns the privileged segment base of a given address */ 28/* Returns the privileged segment base of a given address */
32#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000) 29#define PXSEG(a) (((unsigned long)(a)) & 0xe0000000)
@@ -34,13 +31,23 @@
34/* Returns the physical address of a PnSEG (n=1,2) address */ 31/* Returns the physical address of a PnSEG (n=1,2) address */
35#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff) 32#define PHYSADDR(a) (((unsigned long)(a)) & 0x1fffffff)
36 33
34#ifdef CONFIG_29BIT
37/* 35/*
38 * Map an address to a certain privileged segment 36 * Map an address to a certain privileged segment
39 */ 37 */
40#define P1SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG)) 38#define P1SEGADDR(a) \
41#define P2SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG)) 39 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P1SEG))
42#define P3SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG)) 40#define P2SEGADDR(a) \
43#define P4SEGADDR(a) ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG)) 41 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P2SEG))
42#define P3SEGADDR(a) \
43 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P3SEG))
44#define P4SEGADDR(a) \
45 ((__typeof__(a))(((unsigned long)(a) & 0x1fffffff) | P4SEG))
46#endif /* 29BIT */
47#endif /* P1SEG */
48
49/* Check if an address can be reached in 29 bits */
50#define IS_29BIT(a) (((unsigned long)(a)) < 0x20000000)
44 51
45#endif /* __KERNEL__ */ 52#endif /* __KERNEL__ */
46#endif /* __ASM_SH_ADDRSPACE_H */ 53#endif /* __ASM_SH_ADDRSPACE_H */
diff --git a/include/asm-sh/atomic-grb.h b/include/asm-sh/atomic-grb.h
new file mode 100644
index 000000000000..4c5b7dbfcedb
--- /dev/null
+++ b/include/asm-sh/atomic-grb.h
@@ -0,0 +1,169 @@
1#ifndef __ASM_SH_ATOMIC_GRB_H
2#define __ASM_SH_ATOMIC_GRB_H
3
4static inline void atomic_add(int i, atomic_t *v)
5{
6 int tmp;
7
8 __asm__ __volatile__ (
9 " .align 2 \n\t"
10 " mova 1f, r0 \n\t" /* r0 = end point */
11 " mov r15, r1 \n\t" /* r1 = saved sp */
12 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
13 " mov.l @%1, %0 \n\t" /* load old value */
14 " add %2, %0 \n\t" /* add */
15 " mov.l %0, @%1 \n\t" /* store new value */
16 "1: mov r1, r15 \n\t" /* LOGOUT */
17 : "=&r" (tmp),
18 "+r" (v)
19 : "r" (i)
20 : "memory" , "r0", "r1");
21}
22
23static inline void atomic_sub(int i, atomic_t *v)
24{
25 int tmp;
26
27 __asm__ __volatile__ (
28 " .align 2 \n\t"
29 " mova 1f, r0 \n\t" /* r0 = end point */
30 " mov r15, r1 \n\t" /* r1 = saved sp */
31 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
32 " mov.l @%1, %0 \n\t" /* load old value */
33 " sub %2, %0 \n\t" /* sub */
34 " mov.l %0, @%1 \n\t" /* store new value */
35 "1: mov r1, r15 \n\t" /* LOGOUT */
36 : "=&r" (tmp),
37 "+r" (v)
38 : "r" (i)
39 : "memory" , "r0", "r1");
40}
41
42static inline int atomic_add_return(int i, atomic_t *v)
43{
44 int tmp;
45
46 __asm__ __volatile__ (
47 " .align 2 \n\t"
48 " mova 1f, r0 \n\t" /* r0 = end point */
49 " mov r15, r1 \n\t" /* r1 = saved sp */
50 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
51 " mov.l @%1, %0 \n\t" /* load old value */
52 " add %2, %0 \n\t" /* add */
53 " mov.l %0, @%1 \n\t" /* store new value */
54 "1: mov r1, r15 \n\t" /* LOGOUT */
55 : "=&r" (tmp),
56 "+r" (v)
57 : "r" (i)
58 : "memory" , "r0", "r1");
59
60 return tmp;
61}
62
63static inline int atomic_sub_return(int i, atomic_t *v)
64{
65 int tmp;
66
67 __asm__ __volatile__ (
68 " .align 2 \n\t"
69 " mova 1f, r0 \n\t" /* r0 = end point */
70 " mov r15, r1 \n\t" /* r1 = saved sp */
71 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
72 " mov.l @%1, %0 \n\t" /* load old value */
73 " sub %2, %0 \n\t" /* sub */
74 " mov.l %0, @%1 \n\t" /* store new value */
75 "1: mov r1, r15 \n\t" /* LOGOUT */
76 : "=&r" (tmp),
77 "+r" (v)
78 : "r" (i)
79 : "memory", "r0", "r1");
80
81 return tmp;
82}
83
84static inline void atomic_clear_mask(unsigned int mask, atomic_t *v)
85{
86 int tmp;
87 unsigned int _mask = ~mask;
88
89 __asm__ __volatile__ (
90 " .align 2 \n\t"
91 " mova 1f, r0 \n\t" /* r0 = end point */
92 " mov r15, r1 \n\t" /* r1 = saved sp */
93 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
94 " mov.l @%1, %0 \n\t" /* load old value */
95 " and %2, %0 \n\t" /* add */
96 " mov.l %0, @%1 \n\t" /* store new value */
97 "1: mov r1, r15 \n\t" /* LOGOUT */
98 : "=&r" (tmp),
99 "+r" (v)
100 : "r" (_mask)
101 : "memory" , "r0", "r1");
102}
103
104static inline void atomic_set_mask(unsigned int mask, atomic_t *v)
105{
106 int tmp;
107
108 __asm__ __volatile__ (
109 " .align 2 \n\t"
110 " mova 1f, r0 \n\t" /* r0 = end point */
111 " mov r15, r1 \n\t" /* r1 = saved sp */
112 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
113 " mov.l @%1, %0 \n\t" /* load old value */
114 " or %2, %0 \n\t" /* or */
115 " mov.l %0, @%1 \n\t" /* store new value */
116 "1: mov r1, r15 \n\t" /* LOGOUT */
117 : "=&r" (tmp),
118 "+r" (v)
119 : "r" (mask)
120 : "memory" , "r0", "r1");
121}
122
123static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
124{
125 int ret;
126
127 __asm__ __volatile__ (
128 " .align 2 \n\t"
129 " mova 1f, r0 \n\t"
130 " nop \n\t"
131 " mov r15, r1 \n\t"
132 " mov #-8, r15 \n\t"
133 " mov.l @%1, %0 \n\t"
134 " cmp/eq %2, %0 \n\t"
135 " bf 1f \n\t"
136 " mov.l %3, @%1 \n\t"
137 "1: mov r1, r15 \n\t"
138 : "=&r" (ret)
139 : "r" (v), "r" (old), "r" (new)
140 : "memory" , "r0", "r1" , "t");
141
142 return ret;
143}
144
145static inline int atomic_add_unless(atomic_t *v, int a, int u)
146{
147 int ret;
148 unsigned long tmp;
149
150 __asm__ __volatile__ (
151 " .align 2 \n\t"
152 " mova 1f, r0 \n\t"
153 " nop \n\t"
154 " mov r15, r1 \n\t"
155 " mov #-12, r15 \n\t"
156 " mov.l @%2, %1 \n\t"
157 " mov %1, %0 \n\t"
158 " cmp/eq %4, %0 \n\t"
159 " bt/s 1f \n\t"
160 " add %3, %1 \n\t"
161 " mov.l %1, @%2 \n\t"
162 "1: mov r1, r15 \n\t"
163 : "=&r" (ret), "=&r" (tmp)
164 : "r" (v), "r" (a), "r" (u)
165 : "memory" , "r0", "r1" , "t");
166
167 return ret != u;
168}
169#endif /* __ASM_SH_ATOMIC_GRB_H */
diff --git a/include/asm-sh/atomic.h b/include/asm-sh/atomic.h
index e12570b9339d..c043ef003028 100644
--- a/include/asm-sh/atomic.h
+++ b/include/asm-sh/atomic.h
@@ -17,7 +17,9 @@ typedef struct { volatile int counter; } atomic_t;
17#include <linux/compiler.h> 17#include <linux/compiler.h>
18#include <asm/system.h> 18#include <asm/system.h>
19 19
20#ifdef CONFIG_CPU_SH4A 20#if defined(CONFIG_GUSA_RB)
21#include <asm/atomic-grb.h>
22#elif defined(CONFIG_CPU_SH4A)
21#include <asm/atomic-llsc.h> 23#include <asm/atomic-llsc.h>
22#else 24#else
23#include <asm/atomic-irq.h> 25#include <asm/atomic-irq.h>
@@ -44,6 +46,7 @@ typedef struct { volatile int counter; } atomic_t;
44#define atomic_inc(v) atomic_add(1,(v)) 46#define atomic_inc(v) atomic_add(1,(v))
45#define atomic_dec(v) atomic_sub(1,(v)) 47#define atomic_dec(v) atomic_sub(1,(v))
46 48
49#ifndef CONFIG_GUSA_RB
47static inline int atomic_cmpxchg(atomic_t *v, int old, int new) 50static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
48{ 51{
49 int ret; 52 int ret;
@@ -58,8 +61,6 @@ static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
58 return ret; 61 return ret;
59} 62}
60 63
61#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
62
63static inline int atomic_add_unless(atomic_t *v, int a, int u) 64static inline int atomic_add_unless(atomic_t *v, int a, int u)
64{ 65{
65 int ret; 66 int ret;
@@ -73,6 +74,9 @@ static inline int atomic_add_unless(atomic_t *v, int a, int u)
73 74
74 return ret != u; 75 return ret != u;
75} 76}
77#endif
78
79#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
76#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) 80#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
77 81
78/* Atomic operations are already serializing on SH */ 82/* Atomic operations are already serializing on SH */
diff --git a/include/asm-sh/auxvec.h b/include/asm-sh/auxvec.h
index 1b6916e63e90..a6b9d4f4859e 100644
--- a/include/asm-sh/auxvec.h
+++ b/include/asm-sh/auxvec.h
@@ -6,6 +6,12 @@
6 * for more of them. 6 * for more of them.
7 */ 7 */
8 8
9/*
10 * This entry gives some information about the FPU initialization
11 * performed by the kernel.
12 */
13#define AT_FPUCW 18 /* Used FPU control word. */
14
9#ifdef CONFIG_VSYSCALL 15#ifdef CONFIG_VSYSCALL
10/* 16/*
11 * Only define this in the vsyscall case, the entry point to 17 * Only define this in the vsyscall case, the entry point to
@@ -15,4 +21,16 @@
15#define AT_SYSINFO_EHDR 33 21#define AT_SYSINFO_EHDR 33
16#endif 22#endif
17 23
24/*
25 * More complete cache descriptions than AT_[DIU]CACHEBSIZE. If the
26 * value is -1, then the cache doesn't exist. Otherwise:
27 *
28 * bit 0-3: Cache set-associativity; 0 means fully associative.
29 * bit 4-7: Log2 of cacheline size.
30 * bit 8-31: Size of the entire cache >> 8.
31 */
32#define AT_L1I_CACHESHAPE 34
33#define AT_L1D_CACHESHAPE 35
34#define AT_L2_CACHESHAPE 36
35
18#endif /* __ASM_SH_AUXVEC_H */ 36#endif /* __ASM_SH_AUXVEC_H */
diff --git a/include/asm-sh/bitops-grb.h b/include/asm-sh/bitops-grb.h
new file mode 100644
index 000000000000..a5907b94395b
--- /dev/null
+++ b/include/asm-sh/bitops-grb.h
@@ -0,0 +1,169 @@
1#ifndef __ASM_SH_BITOPS_GRB_H
2#define __ASM_SH_BITOPS_GRB_H
3
4static inline void set_bit(int nr, volatile void * addr)
5{
6 int mask;
7 volatile unsigned int *a = addr;
8 unsigned long tmp;
9
10 a += nr >> 5;
11 mask = 1 << (nr & 0x1f);
12
13 __asm__ __volatile__ (
14 " .align 2 \n\t"
15 " mova 1f, r0 \n\t" /* r0 = end point */
16 " mov r15, r1 \n\t" /* r1 = saved sp */
17 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
18 " mov.l @%1, %0 \n\t" /* load old value */
19 " or %2, %0 \n\t" /* or */
20 " mov.l %0, @%1 \n\t" /* store new value */
21 "1: mov r1, r15 \n\t" /* LOGOUT */
22 : "=&r" (tmp),
23 "+r" (a)
24 : "r" (mask)
25 : "memory" , "r0", "r1");
26}
27
28static inline void clear_bit(int nr, volatile void * addr)
29{
30 int mask;
31 volatile unsigned int *a = addr;
32 unsigned long tmp;
33
34 a += nr >> 5;
35 mask = ~(1 << (nr & 0x1f));
36 __asm__ __volatile__ (
37 " .align 2 \n\t"
38 " mova 1f, r0 \n\t" /* r0 = end point */
39 " mov r15, r1 \n\t" /* r1 = saved sp */
40 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
41 " mov.l @%1, %0 \n\t" /* load old value */
42 " and %2, %0 \n\t" /* and */
43 " mov.l %0, @%1 \n\t" /* store new value */
44 "1: mov r1, r15 \n\t" /* LOGOUT */
45 : "=&r" (tmp),
46 "+r" (a)
47 : "r" (mask)
48 : "memory" , "r0", "r1");
49}
50
51static inline void change_bit(int nr, volatile void * addr)
52{
53 int mask;
54 volatile unsigned int *a = addr;
55 unsigned long tmp;
56
57 a += nr >> 5;
58 mask = 1 << (nr & 0x1f);
59 __asm__ __volatile__ (
60 " .align 2 \n\t"
61 " mova 1f, r0 \n\t" /* r0 = end point */
62 " mov r15, r1 \n\t" /* r1 = saved sp */
63 " mov #-6, r15 \n\t" /* LOGIN: r15 = size */
64 " mov.l @%1, %0 \n\t" /* load old value */
65 " xor %2, %0 \n\t" /* xor */
66 " mov.l %0, @%1 \n\t" /* store new value */
67 "1: mov r1, r15 \n\t" /* LOGOUT */
68 : "=&r" (tmp),
69 "+r" (a)
70 : "r" (mask)
71 : "memory" , "r0", "r1");
72}
73
74static inline int test_and_set_bit(int nr, volatile void * addr)
75{
76 int mask, retval;
77 volatile unsigned int *a = addr;
78 unsigned long tmp;
79
80 a += nr >> 5;
81 mask = 1 << (nr & 0x1f);
82
83 __asm__ __volatile__ (
84 " .align 2 \n\t"
85 " mova 1f, r0 \n\t" /* r0 = end point */
86 " mov r15, r1 \n\t" /* r1 = saved sp */
87 " mov #-14, r15 \n\t" /* LOGIN: r15 = size */
88 " mov.l @%2, %0 \n\t" /* load old value */
89 " mov %0, %1 \n\t"
90 " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */
91 " mov #-1, %1 \n\t" /* retvat = -1 */
92 " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */
93 " or %3, %0 \n\t"
94 " mov.l %0, @%2 \n\t" /* store new value */
95 "1: mov r1, r15 \n\t" /* LOGOUT */
96 : "=&r" (tmp),
97 "=&r" (retval),
98 "+r" (a)
99 : "r" (mask)
100 : "memory" , "r0", "r1" ,"t");
101
102 return retval;
103}
104
105static inline int test_and_clear_bit(int nr, volatile void * addr)
106{
107 int mask, retval,not_mask;
108 volatile unsigned int *a = addr;
109 unsigned long tmp;
110
111 a += nr >> 5;
112 mask = 1 << (nr & 0x1f);
113
114 not_mask = ~mask;
115
116 __asm__ __volatile__ (
117 " .align 2 \n\t"
118 " mova 1f, r0 \n\t" /* r0 = end point */
119 " mov r15, r1 \n\t" /* r1 = saved sp */
120 " mov #-14, r15 \n\t" /* LOGIN */
121 " mov.l @%2, %0 \n\t" /* load old value */
122 " mov %0, %1 \n\t" /* %1 = *a */
123 " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */
124 " mov #-1, %1 \n\t" /* retvat = -1 */
125 " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */
126 " and %4, %0 \n\t"
127 " mov.l %0, @%2 \n\t" /* store new value */
128 "1: mov r1, r15 \n\t" /* LOGOUT */
129 : "=&r" (tmp),
130 "=&r" (retval),
131 "+r" (a)
132 : "r" (mask),
133 "r" (not_mask)
134 : "memory" , "r0", "r1", "t");
135
136 return retval;
137}
138
139static inline int test_and_change_bit(int nr, volatile void * addr)
140{
141 int mask, retval;
142 volatile unsigned int *a = addr;
143 unsigned long tmp;
144
145 a += nr >> 5;
146 mask = 1 << (nr & 0x1f);
147
148 __asm__ __volatile__ (
149 " .align 2 \n\t"
150 " mova 1f, r0 \n\t" /* r0 = end point */
151 " mov r15, r1 \n\t" /* r1 = saved sp */
152 " mov #-14, r15 \n\t" /* LOGIN */
153 " mov.l @%2, %0 \n\t" /* load old value */
154 " mov %0, %1 \n\t" /* %1 = *a */
155 " tst %1, %3 \n\t" /* T = ((*a & mask) == 0) */
156 " mov #-1, %1 \n\t" /* retvat = -1 */
157 " negc %1, %1 \n\t" /* retval = (mask & *a) != 0 */
158 " xor %3, %0 \n\t"
159 " mov.l %0, @%2 \n\t" /* store new value */
160 "1: mov r1, r15 \n\t" /* LOGOUT */
161 : "=&r" (tmp),
162 "=&r" (retval),
163 "+r" (a)
164 : "r" (mask)
165 : "memory" , "r0", "r1", "t");
166
167 return retval;
168}
169#endif /* __ASM_SH_BITOPS_GRB_H */
diff --git a/include/asm-sh/bitops-irq.h b/include/asm-sh/bitops-irq.h
new file mode 100644
index 000000000000..653a12750584
--- /dev/null
+++ b/include/asm-sh/bitops-irq.h
@@ -0,0 +1,91 @@
1#ifndef __ASM_SH_BITOPS_IRQ_H
2#define __ASM_SH_BITOPS_IRQ_H
3
4static inline void set_bit(int nr, volatile void *addr)
5{
6 int mask;
7 volatile unsigned int *a = addr;
8 unsigned long flags;
9
10 a += nr >> 5;
11 mask = 1 << (nr & 0x1f);
12 local_irq_save(flags);
13 *a |= mask;
14 local_irq_restore(flags);
15}
16
17static inline void clear_bit(int nr, volatile void *addr)
18{
19 int mask;
20 volatile unsigned int *a = addr;
21 unsigned long flags;
22
23 a += nr >> 5;
24 mask = 1 << (nr & 0x1f);
25 local_irq_save(flags);
26 *a &= ~mask;
27 local_irq_restore(flags);
28}
29
30static inline void change_bit(int nr, volatile void *addr)
31{
32 int mask;
33 volatile unsigned int *a = addr;
34 unsigned long flags;
35
36 a += nr >> 5;
37 mask = 1 << (nr & 0x1f);
38 local_irq_save(flags);
39 *a ^= mask;
40 local_irq_restore(flags);
41}
42
43static inline int test_and_set_bit(int nr, volatile void *addr)
44{
45 int mask, retval;
46 volatile unsigned int *a = addr;
47 unsigned long flags;
48
49 a += nr >> 5;
50 mask = 1 << (nr & 0x1f);
51 local_irq_save(flags);
52 retval = (mask & *a) != 0;
53 *a |= mask;
54 local_irq_restore(flags);
55
56 return retval;
57}
58
59static inline int test_and_clear_bit(int nr, volatile void *addr)
60{
61 int mask, retval;
62 volatile unsigned int *a = addr;
63 unsigned long flags;
64
65 a += nr >> 5;
66 mask = 1 << (nr & 0x1f);
67 local_irq_save(flags);
68 retval = (mask & *a) != 0;
69 *a &= ~mask;
70 local_irq_restore(flags);
71
72 return retval;
73}
74
75static inline int test_and_change_bit(int nr, volatile void *addr)
76{
77 int mask, retval;
78 volatile unsigned int *a = addr;
79 unsigned long flags;
80
81 a += nr >> 5;
82 mask = 1 << (nr & 0x1f);
83 local_irq_save(flags);
84 retval = (mask & *a) != 0;
85 *a ^= mask;
86 local_irq_restore(flags);
87
88 return retval;
89}
90
91#endif /* __ASM_SH_BITOPS_IRQ_H */
diff --git a/include/asm-sh/bitops.h b/include/asm-sh/bitops.h
index df805f20b267..b6ba5a60dec2 100644
--- a/include/asm-sh/bitops.h
+++ b/include/asm-sh/bitops.h
@@ -11,100 +11,22 @@
11/* For __swab32 */ 11/* For __swab32 */
12#include <asm/byteorder.h> 12#include <asm/byteorder.h>
13 13
14static inline void set_bit(int nr, volatile void * addr) 14#ifdef CONFIG_GUSA_RB
15{ 15#include <asm/bitops-grb.h>
16 int mask; 16#else
17 volatile unsigned int *a = addr; 17#include <asm/bitops-irq.h>
18 unsigned long flags; 18#endif
19 19
20 a += nr >> 5;
21 mask = 1 << (nr & 0x1f);
22 local_irq_save(flags);
23 *a |= mask;
24 local_irq_restore(flags);
25}
26 20
27/* 21/*
28 * clear_bit() doesn't provide any barrier for the compiler. 22 * clear_bit() doesn't provide any barrier for the compiler.
29 */ 23 */
30#define smp_mb__before_clear_bit() barrier() 24#define smp_mb__before_clear_bit() barrier()
31#define smp_mb__after_clear_bit() barrier() 25#define smp_mb__after_clear_bit() barrier()
32static inline void clear_bit(int nr, volatile void * addr)
33{
34 int mask;
35 volatile unsigned int *a = addr;
36 unsigned long flags;
37
38 a += nr >> 5;
39 mask = 1 << (nr & 0x1f);
40 local_irq_save(flags);
41 *a &= ~mask;
42 local_irq_restore(flags);
43}
44
45static inline void change_bit(int nr, volatile void * addr)
46{
47 int mask;
48 volatile unsigned int *a = addr;
49 unsigned long flags;
50
51 a += nr >> 5;
52 mask = 1 << (nr & 0x1f);
53 local_irq_save(flags);
54 *a ^= mask;
55 local_irq_restore(flags);
56}
57
58static inline int test_and_set_bit(int nr, volatile void * addr)
59{
60 int mask, retval;
61 volatile unsigned int *a = addr;
62 unsigned long flags;
63
64 a += nr >> 5;
65 mask = 1 << (nr & 0x1f);
66 local_irq_save(flags);
67 retval = (mask & *a) != 0;
68 *a |= mask;
69 local_irq_restore(flags);
70
71 return retval;
72}
73
74static inline int test_and_clear_bit(int nr, volatile void * addr)
75{
76 int mask, retval;
77 volatile unsigned int *a = addr;
78 unsigned long flags;
79
80 a += nr >> 5;
81 mask = 1 << (nr & 0x1f);
82 local_irq_save(flags);
83 retval = (mask & *a) != 0;
84 *a &= ~mask;
85 local_irq_restore(flags);
86
87 return retval;
88}
89
90static inline int test_and_change_bit(int nr, volatile void * addr)
91{
92 int mask, retval;
93 volatile unsigned int *a = addr;
94 unsigned long flags;
95
96 a += nr >> 5;
97 mask = 1 << (nr & 0x1f);
98 local_irq_save(flags);
99 retval = (mask & *a) != 0;
100 *a ^= mask;
101 local_irq_restore(flags);
102
103 return retval;
104}
105 26
106#include <asm-generic/bitops/non-atomic.h> 27#include <asm-generic/bitops/non-atomic.h>
107 28
29#ifdef CONFIG_SUPERH32
108static inline unsigned long ffz(unsigned long word) 30static inline unsigned long ffz(unsigned long word)
109{ 31{
110 unsigned long result; 32 unsigned long result;
@@ -138,6 +60,31 @@ static inline unsigned long __ffs(unsigned long word)
138 : "t"); 60 : "t");
139 return result; 61 return result;
140} 62}
63#else
64static inline unsigned long ffz(unsigned long word)
65{
66 unsigned long result, __d2, __d3;
67
68 __asm__("gettr tr0, %2\n\t"
69 "pta $+32, tr0\n\t"
70 "andi %1, 1, %3\n\t"
71 "beq %3, r63, tr0\n\t"
72 "pta $+4, tr0\n"
73 "0:\n\t"
74 "shlri.l %1, 1, %1\n\t"
75 "addi %0, 1, %0\n\t"
76 "andi %1, 1, %3\n\t"
77 "beqi %3, 1, tr0\n"
78 "1:\n\t"
79 "ptabs %2, tr0\n\t"
80 : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3)
81 : "0" (0L), "1" (word));
82
83 return result;
84}
85
86#include <asm-generic/bitops/__ffs.h>
87#endif
141 88
142#include <asm-generic/bitops/find.h> 89#include <asm-generic/bitops/find.h>
143#include <asm-generic/bitops/ffs.h> 90#include <asm-generic/bitops/ffs.h>
diff --git a/include/asm-sh/bug.h b/include/asm-sh/bug.h
index a78d482e8b2f..c01718040166 100644
--- a/include/asm-sh/bug.h
+++ b/include/asm-sh/bug.h
@@ -3,7 +3,7 @@
3 3
4#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */ 4#define TRAPA_BUG_OPCODE 0xc33e /* trapa #0x3e */
5 5
6#ifdef CONFIG_BUG 6#ifdef CONFIG_GENERIC_BUG
7#define HAVE_ARCH_BUG 7#define HAVE_ARCH_BUG
8#define HAVE_ARCH_WARN_ON 8#define HAVE_ARCH_WARN_ON
9 9
@@ -72,12 +72,7 @@ do { \
72 unlikely(__ret_warn_on); \ 72 unlikely(__ret_warn_on); \
73}) 73})
74 74
75struct pt_regs; 75#endif /* CONFIG_GENERIC_BUG */
76
77/* arch/sh/kernel/traps.c */
78void handle_BUG(struct pt_regs *);
79
80#endif /* CONFIG_BUG */
81 76
82#include <asm-generic/bug.h> 77#include <asm-generic/bug.h>
83 78
diff --git a/include/asm-sh/bugs.h b/include/asm-sh/bugs.h
index b66139ff73fc..def8128b8b78 100644
--- a/include/asm-sh/bugs.h
+++ b/include/asm-sh/bugs.h
@@ -25,7 +25,7 @@ static void __init check_bugs(void)
25 case CPU_SH7619: 25 case CPU_SH7619:
26 *p++ = '2'; 26 *p++ = '2';
27 break; 27 break;
28 case CPU_SH7206: 28 case CPU_SH7203 ... CPU_SH7263:
29 *p++ = '2'; 29 *p++ = '2';
30 *p++ = 'a'; 30 *p++ = 'a';
31 break; 31 break;
@@ -35,7 +35,7 @@ static void __init check_bugs(void)
35 case CPU_SH7750 ... CPU_SH4_501: 35 case CPU_SH7750 ... CPU_SH4_501:
36 *p++ = '4'; 36 *p++ = '4';
37 break; 37 break;
38 case CPU_SH7770 ... CPU_SHX3: 38 case CPU_SH7763 ... CPU_SHX3:
39 *p++ = '4'; 39 *p++ = '4';
40 *p++ = 'a'; 40 *p++ = 'a';
41 break; 41 break;
@@ -48,9 +48,16 @@ static void __init check_bugs(void)
48 *p++ = 's'; 48 *p++ = 's';
49 *p++ = 'p'; 49 *p++ = 'p';
50 break; 50 break;
51 default: 51 case CPU_SH5_101 ... CPU_SH5_103:
52 *p++ = '?'; 52 *p++ = '6';
53 *p++ = '!'; 53 *p++ = '4';
54 break;
55 case CPU_SH_NONE:
56 /*
57 * Specifically use CPU_SH_NONE rather than default:,
58 * so we're able to have the compiler whine about
59 * unhandled enumerations.
60 */
54 break; 61 break;
55 } 62 }
56 63
diff --git a/include/asm-sh/byteorder.h b/include/asm-sh/byteorder.h
index bff2b1382e01..0eb9904b6545 100644
--- a/include/asm-sh/byteorder.h
+++ b/include/asm-sh/byteorder.h
@@ -3,40 +3,55 @@
3 3
4/* 4/*
5 * Copyright (C) 1999 Niibe Yutaka 5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2000, 2001 Paolo Alberelli
6 */ 7 */
7
8#include <asm/types.h>
9#include <linux/compiler.h> 8#include <linux/compiler.h>
9#include <linux/types.h>
10 10
11static __inline__ __attribute_const__ __u32 ___arch__swab32(__u32 x) 11static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
12{ 12{
13 __asm__("swap.b %0, %0\n\t" 13 __asm__(
14 "swap.w %0, %0\n\t" 14#ifdef CONFIG_SUPERH32
15 "swap.b %0, %0" 15 "swap.b %0, %0\n\t"
16 "swap.w %0, %0\n\t"
17 "swap.b %0, %0"
18#else
19 "byterev %0, %0\n\t"
20 "shari %0, 32, %0"
21#endif
16 : "=r" (x) 22 : "=r" (x)
17 : "0" (x)); 23 : "0" (x));
24
18 return x; 25 return x;
19} 26}
20 27
21static __inline__ __attribute_const__ __u16 ___arch__swab16(__u16 x) 28static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)
22{ 29{
23 __asm__("swap.b %0, %0" 30 __asm__(
31#ifdef CONFIG_SUPERH32
32 "swap.b %0, %0"
33#else
34 "byterev %0, %0\n\t"
35 "shari %0, 32, %0"
36
37#endif
24 : "=r" (x) 38 : "=r" (x)
25 : "0" (x)); 39 : "0" (x));
40
26 return x; 41 return x;
27} 42}
28 43
29static inline __u64 ___arch__swab64(__u64 val) 44static inline __u64 ___arch__swab64(__u64 val)
30{ 45{
31 union { 46 union {
32 struct { __u32 a,b; } s; 47 struct { __u32 a,b; } s;
33 __u64 u; 48 __u64 u;
34 } v, w; 49 } v, w;
35 v.u = val; 50 v.u = val;
36 w.s.b = ___arch__swab32(v.s.a); 51 w.s.b = ___arch__swab32(v.s.a);
37 w.s.a = ___arch__swab32(v.s.b); 52 w.s.a = ___arch__swab32(v.s.b);
38 return w.u; 53 return w.u;
39} 54}
40 55
41#define __arch__swab64(x) ___arch__swab64(x) 56#define __arch__swab64(x) ___arch__swab64(x)
42#define __arch__swab32(x) ___arch__swab32(x) 57#define __arch__swab32(x) ___arch__swab32(x)
diff --git a/include/asm-sh/cache.h b/include/asm-sh/cache.h
index 01e5cf51ba9b..083419f47c65 100644
--- a/include/asm-sh/cache.h
+++ b/include/asm-sh/cache.h
@@ -12,11 +12,6 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/cpu/cache.h> 13#include <asm/cpu/cache.h>
14 14
15#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
20#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 15#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
21 16
22#define __read_mostly __attribute__((__section__(".data.read_mostly"))) 17#define __read_mostly __attribute__((__section__(".data.read_mostly")))
diff --git a/include/asm-sh/checksum.h b/include/asm-sh/checksum.h
index 4bc8357e8892..67496ab0ef04 100644
--- a/include/asm-sh/checksum.h
+++ b/include/asm-sh/checksum.h
@@ -1,215 +1,5 @@
1#ifndef __ASM_SH_CHECKSUM_H 1#ifdef CONFIG_SUPERH32
2#define __ASM_SH_CHECKSUM_H 2# include "checksum_32.h"
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 1999 by Kaz Kojima & Niibe Yutaka
10 */
11
12#include <linux/in6.h>
13
14/*
15 * computes the checksum of a memory block at buff, length len,
16 * and adds in "sum" (32-bit)
17 *
18 * returns a 32-bit number suitable for feeding into itself
19 * or csum_tcpudp_magic
20 *
21 * this function must be called with even lengths, except
22 * for the last fragment, which may be odd
23 *
24 * it's best to have buff aligned on a 32-bit boundary
25 */
26asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
27
28/*
29 * the same as csum_partial, but copies from src while it
30 * checksums, and handles user-space pointer exceptions correctly, when needed.
31 *
32 * here even more important to align src and dst on a 32-bit (or even
33 * better 64-bit) boundary
34 */
35
36asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst,
37 int len, __wsum sum,
38 int *src_err_ptr, int *dst_err_ptr);
39
40/*
41 * Note: when you get a NULL pointer exception here this means someone
42 * passed in an incorrect kernel address to one of these functions.
43 *
44 * If you use these functions directly please don't forget the
45 * access_ok().
46 */
47static inline
48__wsum csum_partial_copy_nocheck(const void *src, void *dst,
49 int len, __wsum sum)
50{
51 return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
52}
53
54static inline
55__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
56 int len, __wsum sum, int *err_ptr)
57{
58 return csum_partial_copy_generic((__force const void *)src, dst,
59 len, sum, err_ptr, NULL);
60}
61
62/*
63 * Fold a partial checksum
64 */
65
66static inline __sum16 csum_fold(__wsum sum)
67{
68 unsigned int __dummy;
69 __asm__("swap.w %0, %1\n\t"
70 "extu.w %0, %0\n\t"
71 "extu.w %1, %1\n\t"
72 "add %1, %0\n\t"
73 "swap.w %0, %1\n\t"
74 "add %1, %0\n\t"
75 "not %0, %0\n\t"
76 : "=r" (sum), "=&r" (__dummy)
77 : "0" (sum)
78 : "t");
79 return (__force __sum16)sum;
80}
81
82/*
83 * This is a version of ip_compute_csum() optimized for IP headers,
84 * which always checksum on 4 octet boundaries.
85 *
86 * i386 version by Jorge Cwik <jorge@laser.satlink.net>, adapted
87 * for linux by * Arnt Gulbrandsen.
88 */
89static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
90{
91 unsigned int sum, __dummy0, __dummy1;
92
93 __asm__ __volatile__(
94 "mov.l @%1+, %0\n\t"
95 "mov.l @%1+, %3\n\t"
96 "add #-2, %2\n\t"
97 "clrt\n\t"
98 "1:\t"
99 "addc %3, %0\n\t"
100 "movt %4\n\t"
101 "mov.l @%1+, %3\n\t"
102 "dt %2\n\t"
103 "bf/s 1b\n\t"
104 " cmp/eq #1, %4\n\t"
105 "addc %3, %0\n\t"
106 "addc %2, %0" /* Here %2 is 0, add carry-bit */
107 /* Since the input registers which are loaded with iph and ihl
108 are modified, we must also specify them as outputs, or gcc
109 will assume they contain their original values. */
110 : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (__dummy0), "=&z" (__dummy1)
111 : "1" (iph), "2" (ihl)
112 : "t");
113
114 return csum_fold(sum);
115}
116
117static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
118 unsigned short len,
119 unsigned short proto,
120 __wsum sum)
121{
122#ifdef __LITTLE_ENDIAN__
123 unsigned long len_proto = (proto + len) << 8;
124#else 3#else
125 unsigned long len_proto = proto + len; 4# include "checksum_64.h"
126#endif 5#endif
127 __asm__("clrt\n\t"
128 "addc %0, %1\n\t"
129 "addc %2, %1\n\t"
130 "addc %3, %1\n\t"
131 "movt %0\n\t"
132 "add %1, %0"
133 : "=r" (sum), "=r" (len_proto)
134 : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum)
135 : "t");
136
137 return sum;
138}
139
140/*
141 * computes the checksum of the TCP/UDP pseudo-header
142 * returns a 16-bit checksum, already complemented
143 */
144static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
145 unsigned short len,
146 unsigned short proto,
147 __wsum sum)
148{
149 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
150}
151
152/*
153 * this routine is used for miscellaneous IP-like checksums, mainly
154 * in icmp.c
155 */
156static inline __sum16 ip_compute_csum(const void *buff, int len)
157{
158 return csum_fold(csum_partial(buff, len, 0));
159}
160
161#define _HAVE_ARCH_IPV6_CSUM
162static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
163 const struct in6_addr *daddr,
164 __u32 len, unsigned short proto,
165 __wsum sum)
166{
167 unsigned int __dummy;
168 __asm__("clrt\n\t"
169 "mov.l @(0,%2), %1\n\t"
170 "addc %1, %0\n\t"
171 "mov.l @(4,%2), %1\n\t"
172 "addc %1, %0\n\t"
173 "mov.l @(8,%2), %1\n\t"
174 "addc %1, %0\n\t"
175 "mov.l @(12,%2), %1\n\t"
176 "addc %1, %0\n\t"
177 "mov.l @(0,%3), %1\n\t"
178 "addc %1, %0\n\t"
179 "mov.l @(4,%3), %1\n\t"
180 "addc %1, %0\n\t"
181 "mov.l @(8,%3), %1\n\t"
182 "addc %1, %0\n\t"
183 "mov.l @(12,%3), %1\n\t"
184 "addc %1, %0\n\t"
185 "addc %4, %0\n\t"
186 "addc %5, %0\n\t"
187 "movt %1\n\t"
188 "add %1, %0\n"
189 : "=r" (sum), "=&r" (__dummy)
190 : "r" (saddr), "r" (daddr),
191 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
192 : "t");
193
194 return csum_fold(sum);
195}
196
197/*
198 * Copy and checksum to user
199 */
200#define HAVE_CSUM_COPY_USER
201static inline __wsum csum_and_copy_to_user(const void *src,
202 void __user *dst,
203 int len, __wsum sum,
204 int *err_ptr)
205{
206 if (access_ok(VERIFY_WRITE, dst, len))
207 return csum_partial_copy_generic((__force const void *)src,
208 dst, len, sum, NULL, err_ptr);
209
210 if (len)
211 *err_ptr = -EFAULT;
212
213 return (__force __wsum)-1; /* invalid checksum */
214}
215#endif /* __ASM_SH_CHECKSUM_H */
diff --git a/include/asm-sh/checksum_32.h b/include/asm-sh/checksum_32.h
new file mode 100644
index 000000000000..4bc8357e8892
--- /dev/null
+++ b/include/asm-sh/checksum_32.h
@@ -0,0 +1,215 @@
1#ifndef __ASM_SH_CHECKSUM_H
2#define __ASM_SH_CHECKSUM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * Copyright (C) 1999 by Kaz Kojima & Niibe Yutaka
10 */
11
12#include <linux/in6.h>
13
14/*
15 * computes the checksum of a memory block at buff, length len,
16 * and adds in "sum" (32-bit)
17 *
18 * returns a 32-bit number suitable for feeding into itself
19 * or csum_tcpudp_magic
20 *
21 * this function must be called with even lengths, except
22 * for the last fragment, which may be odd
23 *
24 * it's best to have buff aligned on a 32-bit boundary
25 */
26asmlinkage __wsum csum_partial(const void *buff, int len, __wsum sum);
27
28/*
29 * the same as csum_partial, but copies from src while it
30 * checksums, and handles user-space pointer exceptions correctly, when needed.
31 *
32 * here even more important to align src and dst on a 32-bit (or even
33 * better 64-bit) boundary
34 */
35
36asmlinkage __wsum csum_partial_copy_generic(const void *src, void *dst,
37 int len, __wsum sum,
38 int *src_err_ptr, int *dst_err_ptr);
39
40/*
41 * Note: when you get a NULL pointer exception here this means someone
42 * passed in an incorrect kernel address to one of these functions.
43 *
44 * If you use these functions directly please don't forget the
45 * access_ok().
46 */
47static inline
48__wsum csum_partial_copy_nocheck(const void *src, void *dst,
49 int len, __wsum sum)
50{
51 return csum_partial_copy_generic(src, dst, len, sum, NULL, NULL);
52}
53
54static inline
55__wsum csum_partial_copy_from_user(const void __user *src, void *dst,
56 int len, __wsum sum, int *err_ptr)
57{
58 return csum_partial_copy_generic((__force const void *)src, dst,
59 len, sum, err_ptr, NULL);
60}
61
62/*
63 * Fold a partial checksum
64 */
65
66static inline __sum16 csum_fold(__wsum sum)
67{
68 unsigned int __dummy;
69 __asm__("swap.w %0, %1\n\t"
70 "extu.w %0, %0\n\t"
71 "extu.w %1, %1\n\t"
72 "add %1, %0\n\t"
73 "swap.w %0, %1\n\t"
74 "add %1, %0\n\t"
75 "not %0, %0\n\t"
76 : "=r" (sum), "=&r" (__dummy)
77 : "0" (sum)
78 : "t");
79 return (__force __sum16)sum;
80}
81
82/*
83 * This is a version of ip_compute_csum() optimized for IP headers,
84 * which always checksum on 4 octet boundaries.
85 *
86 * i386 version by Jorge Cwik <jorge@laser.satlink.net>, adapted
87 * for linux by * Arnt Gulbrandsen.
88 */
89static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
90{
91 unsigned int sum, __dummy0, __dummy1;
92
93 __asm__ __volatile__(
94 "mov.l @%1+, %0\n\t"
95 "mov.l @%1+, %3\n\t"
96 "add #-2, %2\n\t"
97 "clrt\n\t"
98 "1:\t"
99 "addc %3, %0\n\t"
100 "movt %4\n\t"
101 "mov.l @%1+, %3\n\t"
102 "dt %2\n\t"
103 "bf/s 1b\n\t"
104 " cmp/eq #1, %4\n\t"
105 "addc %3, %0\n\t"
106 "addc %2, %0" /* Here %2 is 0, add carry-bit */
107 /* Since the input registers which are loaded with iph and ihl
108 are modified, we must also specify them as outputs, or gcc
109 will assume they contain their original values. */
110 : "=r" (sum), "=r" (iph), "=r" (ihl), "=&r" (__dummy0), "=&z" (__dummy1)
111 : "1" (iph), "2" (ihl)
112 : "t");
113
114 return csum_fold(sum);
115}
116
117static inline __wsum csum_tcpudp_nofold(__be32 saddr, __be32 daddr,
118 unsigned short len,
119 unsigned short proto,
120 __wsum sum)
121{
122#ifdef __LITTLE_ENDIAN__
123 unsigned long len_proto = (proto + len) << 8;
124#else
125 unsigned long len_proto = proto + len;
126#endif
127 __asm__("clrt\n\t"
128 "addc %0, %1\n\t"
129 "addc %2, %1\n\t"
130 "addc %3, %1\n\t"
131 "movt %0\n\t"
132 "add %1, %0"
133 : "=r" (sum), "=r" (len_proto)
134 : "r" (daddr), "r" (saddr), "1" (len_proto), "0" (sum)
135 : "t");
136
137 return sum;
138}
139
140/*
141 * computes the checksum of the TCP/UDP pseudo-header
142 * returns a 16-bit checksum, already complemented
143 */
144static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
145 unsigned short len,
146 unsigned short proto,
147 __wsum sum)
148{
149 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
150}
151
152/*
153 * this routine is used for miscellaneous IP-like checksums, mainly
154 * in icmp.c
155 */
156static inline __sum16 ip_compute_csum(const void *buff, int len)
157{
158 return csum_fold(csum_partial(buff, len, 0));
159}
160
161#define _HAVE_ARCH_IPV6_CSUM
162static inline __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
163 const struct in6_addr *daddr,
164 __u32 len, unsigned short proto,
165 __wsum sum)
166{
167 unsigned int __dummy;
168 __asm__("clrt\n\t"
169 "mov.l @(0,%2), %1\n\t"
170 "addc %1, %0\n\t"
171 "mov.l @(4,%2), %1\n\t"
172 "addc %1, %0\n\t"
173 "mov.l @(8,%2), %1\n\t"
174 "addc %1, %0\n\t"
175 "mov.l @(12,%2), %1\n\t"
176 "addc %1, %0\n\t"
177 "mov.l @(0,%3), %1\n\t"
178 "addc %1, %0\n\t"
179 "mov.l @(4,%3), %1\n\t"
180 "addc %1, %0\n\t"
181 "mov.l @(8,%3), %1\n\t"
182 "addc %1, %0\n\t"
183 "mov.l @(12,%3), %1\n\t"
184 "addc %1, %0\n\t"
185 "addc %4, %0\n\t"
186 "addc %5, %0\n\t"
187 "movt %1\n\t"
188 "add %1, %0\n"
189 : "=r" (sum), "=&r" (__dummy)
190 : "r" (saddr), "r" (daddr),
191 "r" (htonl(len)), "r" (htonl(proto)), "0" (sum)
192 : "t");
193
194 return csum_fold(sum);
195}
196
197/*
198 * Copy and checksum to user
199 */
200#define HAVE_CSUM_COPY_USER
201static inline __wsum csum_and_copy_to_user(const void *src,
202 void __user *dst,
203 int len, __wsum sum,
204 int *err_ptr)
205{
206 if (access_ok(VERIFY_WRITE, dst, len))
207 return csum_partial_copy_generic((__force const void *)src,
208 dst, len, sum, NULL, err_ptr);
209
210 if (len)
211 *err_ptr = -EFAULT;
212
213 return (__force __wsum)-1; /* invalid checksum */
214}
215#endif /* __ASM_SH_CHECKSUM_H */
diff --git a/include/asm-sh64/checksum.h b/include/asm-sh/checksum_64.h
index ba594ccb42e5..9c62a031a8f5 100644
--- a/include/asm-sh64/checksum.h
+++ b/include/asm-sh/checksum_64.h
@@ -1,19 +1,16 @@
1#ifndef __ASM_SH64_CHECKSUM_H 1#ifndef __ASM_SH_CHECKSUM_64_H
2#define __ASM_SH64_CHECKSUM_H 2#define __ASM_SH_CHECKSUM_64_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/checksum_64.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/checksum.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
13 */ 12 */
14 13
15#include <asm/registers.h>
16
17/* 14/*
18 * computes the checksum of a memory block at buff, length len, 15 * computes the checksum of a memory block at buff, length len,
19 * and adds in "sum" (32-bit) 16 * and adds in "sum" (32-bit)
@@ -78,5 +75,4 @@ static inline __sum16 ip_compute_csum(const void *buff, int len)
78 return csum_fold(csum_partial(buff, len, 0)); 75 return csum_fold(csum_partial(buff, len, 0));
79} 76}
80 77
81#endif /* __ASM_SH64_CHECKSUM_H */ 78#endif /* __ASM_SH_CHECKSUM_64_H */
82
diff --git a/include/asm-sh/cmpxchg-grb.h b/include/asm-sh/cmpxchg-grb.h
new file mode 100644
index 000000000000..e2681abe764f
--- /dev/null
+++ b/include/asm-sh/cmpxchg-grb.h
@@ -0,0 +1,70 @@
1#ifndef __ASM_SH_CMPXCHG_GRB_H
2#define __ASM_SH_CMPXCHG_GRB_H
3
4static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
5{
6 unsigned long retval;
7
8 __asm__ __volatile__ (
9 " .align 2 \n\t"
10 " mova 1f, r0 \n\t" /* r0 = end point */
11 " nop \n\t"
12 " mov r15, r1 \n\t" /* r1 = saved sp */
13 " mov #-4, r15 \n\t" /* LOGIN */
14 " mov.l @%1, %0 \n\t" /* load old value */
15 " mov.l %2, @%1 \n\t" /* store new value */
16 "1: mov r1, r15 \n\t" /* LOGOUT */
17 : "=&r" (retval),
18 "+r" (m)
19 : "r" (val)
20 : "memory", "r0", "r1");
21
22 return retval;
23}
24
25static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
26{
27 unsigned long retval;
28
29 __asm__ __volatile__ (
30 " .align 2 \n\t"
31 " mova 1f, r0 \n\t" /* r0 = end point */
32 " mov r15, r1 \n\t" /* r1 = saved sp */
33 " mov #-6, r15 \n\t" /* LOGIN */
34 " mov.b @%1, %0 \n\t" /* load old value */
35 " extu.b %0, %0 \n\t" /* extend as unsigned */
36 " mov.b %2, @%1 \n\t" /* store new value */
37 "1: mov r1, r15 \n\t" /* LOGOUT */
38 : "=&r" (retval),
39 "+r" (m)
40 : "r" (val)
41 : "memory" , "r0", "r1");
42
43 return retval;
44}
45
46static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
47 unsigned long new)
48{
49 unsigned long retval;
50
51 __asm__ __volatile__ (
52 " .align 2 \n\t"
53 " mova 1f, r0 \n\t" /* r0 = end point */
54 " nop \n\t"
55 " mov r15, r1 \n\t" /* r1 = saved sp */
56 " mov #-8, r15 \n\t" /* LOGIN */
57 " mov.l @%1, %0 \n\t" /* load old value */
58 " cmp/eq %0, %2 \n\t"
59 " bf 1f \n\t" /* if not equal */
60 " mov.l %2, @%1 \n\t" /* store new value */
61 "1: mov r1, r15 \n\t" /* LOGOUT */
62 : "=&r" (retval),
63 "+r" (m)
64 : "r" (new)
65 : "memory" , "r0", "r1", "t");
66
67 return retval;
68}
69
70#endif /* __ASM_SH_CMPXCHG_GRB_H */
diff --git a/include/asm-sh/cmpxchg-irq.h b/include/asm-sh/cmpxchg-irq.h
new file mode 100644
index 000000000000..43049ec0554b
--- /dev/null
+++ b/include/asm-sh/cmpxchg-irq.h
@@ -0,0 +1,40 @@
1#ifndef __ASM_SH_CMPXCHG_IRQ_H
2#define __ASM_SH_CMPXCHG_IRQ_H
3
4static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
5{
6 unsigned long flags, retval;
7
8 local_irq_save(flags);
9 retval = *m;
10 *m = val;
11 local_irq_restore(flags);
12 return retval;
13}
14
15static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
16{
17 unsigned long flags, retval;
18
19 local_irq_save(flags);
20 retval = *m;
21 *m = val & 0xff;
22 local_irq_restore(flags);
23 return retval;
24}
25
26static inline unsigned long __cmpxchg_u32(volatile int *m, unsigned long old,
27 unsigned long new)
28{
29 __u32 retval;
30 unsigned long flags;
31
32 local_irq_save(flags);
33 retval = *m;
34 if (retval == old)
35 *m = new;
36 local_irq_restore(flags); /* implies memory barrier */
37 return retval;
38}
39
40#endif /* __ASM_SH_CMPXCHG_IRQ_H */
diff --git a/include/asm-sh/cpu-sh2/addrspace.h b/include/asm-sh/cpu-sh2/addrspace.h
index 8706c903c5a0..2b9ab93efa4e 100644
--- a/include/asm-sh/cpu-sh2/addrspace.h
+++ b/include/asm-sh/cpu-sh2/addrspace.h
@@ -10,7 +10,10 @@
10#ifndef __ASM_CPU_SH2_ADDRSPACE_H 10#ifndef __ASM_CPU_SH2_ADDRSPACE_H
11#define __ASM_CPU_SH2_ADDRSPACE_H 11#define __ASM_CPU_SH2_ADDRSPACE_H
12 12
13/* Should fill here */ 13#define P0SEG 0x00000000
14#define P1SEG 0x80000000
15#define P2SEG 0xa0000000
16#define P3SEG 0xc0000000
17#define P4SEG 0xe0000000
14 18
15#endif /* __ASM_CPU_SH2_ADDRSPACE_H */ 19#endif /* __ASM_CPU_SH2_ADDRSPACE_H */
16
diff --git a/include/asm-sh/cpu-sh2/cache.h b/include/asm-sh/cpu-sh2/cache.h
index f02ba7a672b2..4e0b16500686 100644
--- a/include/asm-sh/cpu-sh2/cache.h
+++ b/include/asm-sh/cpu-sh2/cache.h
@@ -12,9 +12,13 @@
12 12
13#define L1_CACHE_SHIFT 4 13#define L1_CACHE_SHIFT 4
14 14
15#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
15#if defined(CONFIG_CPU_SUBTYPE_SH7619) 20#if defined(CONFIG_CPU_SUBTYPE_SH7619)
16#define CCR1 0xffffffec 21#define CCR 0xffffffec
17#define CCR CCR1
18 22
19#define CCR_CACHE_CE 0x01 /* Cache enable */ 23#define CCR_CACHE_CE 0x01 /* Cache enable */
20#define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */ 24#define CCR_CACHE_WT 0x06 /* CCR[bit1=1,bit2=1] */
diff --git a/include/asm-sh/cpu-sh2/rtc.h b/include/asm-sh/cpu-sh2/rtc.h
new file mode 100644
index 000000000000..39e2d6e94782
--- /dev/null
+++ b/include/asm-sh/cpu-sh2/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH2_RTC_H
2#define __ASM_SH_CPU_SH2_RTC_H
3
4#define rtc_reg_size sizeof(u16)
5#define RTC_BIT_INVERTED 0
6#define RTC_DEF_CAPABILITIES 0UL
7
8#endif /* __ASM_SH_CPU_SH2_RTC_H */
diff --git a/include/asm-sh/cpu-sh2a/addrspace.h b/include/asm-sh/cpu-sh2a/addrspace.h
index 3d2e9aa21522..795ddd6856a3 100644
--- a/include/asm-sh/cpu-sh2a/addrspace.h
+++ b/include/asm-sh/cpu-sh2a/addrspace.h
@@ -1 +1,10 @@
1#include <asm/cpu-sh2/addrspace.h> 1#ifndef __ASM_SH_CPU_SH2A_ADDRSPACE_H
2#define __ASM_SH_CPU_SH2A_ADDRSPACE_H
3
4#define P0SEG 0x00000000
5#define P1SEG 0x00000000
6#define P2SEG 0x20000000
7#define P3SEG 0x00000000
8#define P4SEG 0x80000000
9
10#endif /* __ASM_SH_CPU_SH2A_ADDRSPACE_H */
diff --git a/include/asm-sh/cpu-sh2a/cache.h b/include/asm-sh/cpu-sh2a/cache.h
index 3e4b9e480982..afe228b3f493 100644
--- a/include/asm-sh/cpu-sh2a/cache.h
+++ b/include/asm-sh/cpu-sh2a/cache.h
@@ -12,11 +12,13 @@
12 12
13#define L1_CACHE_SHIFT 4 13#define L1_CACHE_SHIFT 4
14 14
15#define CCR1 0xfffc1000 15#define SH_CACHE_VALID 1
16#define CCR2 0xfffc1004 16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
17 19
18/* CCR1 behaves more like the traditional CCR */ 20#define CCR 0xfffc1000 /* CCR1 */
19#define CCR CCR1 21#define CCR2 0xfffc1004
20 22
21/* 23/*
22 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not 24 * Most of the SH-2A CCR1 definitions resemble the SH-4 ones. All others not
@@ -36,4 +38,3 @@
36#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI) 38#define CCR_CACHE_INVALIDATE (CCR_CACHE_OCI | CCR_CACHE_ICI)
37 39
38#endif /* __ASM_CPU_SH2A_CACHE_H */ 40#endif /* __ASM_CPU_SH2A_CACHE_H */
39
diff --git a/include/asm-sh/cpu-sh2a/freq.h b/include/asm-sh/cpu-sh2a/freq.h
index e518fff6d10f..830fd43b6cdc 100644
--- a/include/asm-sh/cpu-sh2a/freq.h
+++ b/include/asm-sh/cpu-sh2a/freq.h
@@ -10,9 +10,7 @@
10#ifndef __ASM_CPU_SH2A_FREQ_H 10#ifndef __ASM_CPU_SH2A_FREQ_H
11#define __ASM_CPU_SH2A_FREQ_H 11#define __ASM_CPU_SH2A_FREQ_H
12 12
13#if defined(CONFIG_CPU_SUBTYPE_SH7206)
14#define FREQCR 0xfffe0010 13#define FREQCR 0xfffe0010
15#endif
16 14
17#endif /* __ASM_CPU_SH2A_FREQ_H */ 15#endif /* __ASM_CPU_SH2A_FREQ_H */
18 16
diff --git a/include/asm-sh/cpu-sh2a/rtc.h b/include/asm-sh/cpu-sh2a/rtc.h
new file mode 100644
index 000000000000..afb511e2bed7
--- /dev/null
+++ b/include/asm-sh/cpu-sh2a/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH2A_RTC_H
2#define __ASM_SH_CPU_SH2A_RTC_H
3
4#define rtc_reg_size sizeof(u16)
5#define RTC_BIT_INVERTED 0
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7
8#endif /* __ASM_SH_CPU_SH2A_RTC_H */
diff --git a/include/asm-sh/cpu-sh3/addrspace.h b/include/asm-sh/cpu-sh3/addrspace.h
index 872e9e1b548c..0f94726c7d62 100644
--- a/include/asm-sh/cpu-sh3/addrspace.h
+++ b/include/asm-sh/cpu-sh3/addrspace.h
@@ -10,7 +10,10 @@
10#ifndef __ASM_CPU_SH3_ADDRSPACE_H 10#ifndef __ASM_CPU_SH3_ADDRSPACE_H
11#define __ASM_CPU_SH3_ADDRSPACE_H 11#define __ASM_CPU_SH3_ADDRSPACE_H
12 12
13/* Should fill here */ 13#define P0SEG 0x00000000
14#define P1SEG 0x80000000
15#define P2SEG 0xa0000000
16#define P3SEG 0xc0000000
17#define P4SEG 0xe0000000
14 18
15#endif /* __ASM_CPU_SH3_ADDRSPACE_H */ 19#endif /* __ASM_CPU_SH3_ADDRSPACE_H */
16
diff --git a/include/asm-sh/cpu-sh3/cache.h b/include/asm-sh/cpu-sh3/cache.h
index 255016fc91f0..56bd838b7db4 100644
--- a/include/asm-sh/cpu-sh3/cache.h
+++ b/include/asm-sh/cpu-sh3/cache.h
@@ -12,6 +12,11 @@
12 12
13#define L1_CACHE_SHIFT 4 13#define L1_CACHE_SHIFT 4
14 14
15#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
15#define CCR 0xffffffec /* Address of Cache Control Register */ 20#define CCR 0xffffffec /* Address of Cache Control Register */
16 21
17#define CCR_CACHE_CE 0x01 /* Cache Enable */ 22#define CCR_CACHE_CE 0x01 /* Cache Enable */
@@ -28,7 +33,8 @@
28 33
29#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \ 34#if defined(CONFIG_CPU_SUBTYPE_SH7705) || \
30 defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 35 defined(CONFIG_CPU_SUBTYPE_SH7710) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7720) 36 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
37 defined(CONFIG_CPU_SUBTYPE_SH7721)
32#define CCR3 0xa40000b4 38#define CCR3 0xa40000b4
33#define CCR_CACHE_16KB 0x00010000 39#define CCR_CACHE_16KB 0x00010000
34#define CCR_CACHE_32KB 0x00020000 40#define CCR_CACHE_32KB 0x00020000
diff --git a/include/asm-sh/cpu-sh3/dma.h b/include/asm-sh/cpu-sh3/dma.h
index 54bfece328c2..092ff9d872c3 100644
--- a/include/asm-sh/cpu-sh3/dma.h
+++ b/include/asm-sh/cpu-sh3/dma.h
@@ -2,7 +2,9 @@
2#define __ASM_CPU_SH3_DMA_H 2#define __ASM_CPU_SH3_DMA_H
3 3
4 4
5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || defined(CONFIG_CPU_SUBTYPE_SH7709) 5#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
6 defined(CONFIG_CPU_SUBTYPE_SH7721) || \
7 defined(CONFIG_CPU_SUBTYPE_SH7709)
6#define SH_DMAC_BASE 0xa4010020 8#define SH_DMAC_BASE 0xa4010020
7 9
8#define DMTE0_IRQ 48 10#define DMTE0_IRQ 48
diff --git a/include/asm-sh/cpu-sh3/freq.h b/include/asm-sh/cpu-sh3/freq.h
index 0a054b53b9de..53c62302b2e3 100644
--- a/include/asm-sh/cpu-sh3/freq.h
+++ b/include/asm-sh/cpu-sh3/freq.h
@@ -10,7 +10,12 @@
10#ifndef __ASM_CPU_SH3_FREQ_H 10#ifndef __ASM_CPU_SH3_FREQ_H
11#define __ASM_CPU_SH3_FREQ_H 11#define __ASM_CPU_SH3_FREQ_H
12 12
13#ifdef CONFIG_CPU_SUBTYPE_SH7712
14#define FRQCR 0xA415FF80
15#else
13#define FRQCR 0xffffff80 16#define FRQCR 0xffffff80
17#endif
18
14#define MIN_DIVISOR_NR 0 19#define MIN_DIVISOR_NR 0
15#define MAX_DIVISOR_NR 4 20#define MAX_DIVISOR_NR 4
16 21
diff --git a/include/asm-sh/cpu-sh3/gpio.h b/include/asm-sh/cpu-sh3/gpio.h
index 48770c1c7bdf..4e53eb314b8f 100644
--- a/include/asm-sh/cpu-sh3/gpio.h
+++ b/include/asm-sh/cpu-sh3/gpio.h
@@ -12,7 +12,8 @@
12#ifndef _CPU_SH3_GPIO_H 12#ifndef _CPU_SH3_GPIO_H
13#define _CPU_SH3_GPIO_H 13#define _CPU_SH3_GPIO_H
14 14
15#if defined(CONFIG_CPU_SUBTYPE_SH7720) 15#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16 defined(CONFIG_CPU_SUBTYPE_SH7721)
16 17
17/* Control registers */ 18/* Control registers */
18#define PORT_PACR 0xA4050100UL 19#define PORT_PACR 0xA4050100UL
diff --git a/include/asm-sh/cpu-sh3/mmu_context.h b/include/asm-sh/cpu-sh3/mmu_context.h
index 16c2d63b7e39..ab09da73ce77 100644
--- a/include/asm-sh/cpu-sh3/mmu_context.h
+++ b/include/asm-sh/cpu-sh3/mmu_context.h
@@ -33,7 +33,8 @@
33 defined(CONFIG_CPU_SUBTYPE_SH7709) || \ 33 defined(CONFIG_CPU_SUBTYPE_SH7709) || \
34 defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 34 defined(CONFIG_CPU_SUBTYPE_SH7710) || \
35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \ 35 defined(CONFIG_CPU_SUBTYPE_SH7712) || \
36 defined(CONFIG_CPU_SUBTYPE_SH7720) 36 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
37 defined(CONFIG_CPU_SUBTYPE_SH7721)
37#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */ 38#define INTEVT 0xa4000000 /* INTEVTE2(0xa4000000) */
38#else 39#else
39#define INTEVT 0xffffffd8 40#define INTEVT 0xffffffd8
diff --git a/include/asm-sh/cpu-sh3/rtc.h b/include/asm-sh/cpu-sh3/rtc.h
new file mode 100644
index 000000000000..319404aaee37
--- /dev/null
+++ b/include/asm-sh/cpu-sh3/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH3_RTC_H
2#define __ASM_SH_CPU_SH3_RTC_H
3
4#define rtc_reg_size sizeof(u16)
5#define RTC_BIT_INVERTED 0 /* No bug on SH7708, SH7709A */
6#define RTC_DEF_CAPABILITIES 0UL
7
8#endif /* __ASM_SH_CPU_SH3_RTC_H */
diff --git a/include/asm-sh/cpu-sh3/timer.h b/include/asm-sh/cpu-sh3/timer.h
index 7b795ac5477c..793acf12aa08 100644
--- a/include/asm-sh/cpu-sh3/timer.h
+++ b/include/asm-sh/cpu-sh3/timer.h
@@ -23,12 +23,13 @@
23 * --------------------------------------------------------------------------- 23 * ---------------------------------------------------------------------------
24 */ 24 */
25 25
26#if !defined(CONFIG_CPU_SUBTYPE_SH7720) 26#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721)
27#define TMU_TOCR 0xfffffe90 /* Byte access */ 27#define TMU_TOCR 0xfffffe90 /* Byte access */
28#endif 28#endif
29 29
30#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 30#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
31 defined(CONFIG_CPU_SUBTYPE_SH7720) 31 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
32 defined(CONFIG_CPU_SUBTYPE_SH7721)
32#define TMU_012_TSTR 0xa412fe92 /* Byte access */ 33#define TMU_012_TSTR 0xa412fe92 /* Byte access */
33 34
34#define TMU0_TCOR 0xa412fe94 /* Long access */ 35#define TMU0_TCOR 0xa412fe94 /* Long access */
@@ -57,7 +58,7 @@
57#define TMU2_TCOR 0xfffffeac /* Long access */ 58#define TMU2_TCOR 0xfffffeac /* Long access */
58#define TMU2_TCNT 0xfffffeb0 /* Long access */ 59#define TMU2_TCNT 0xfffffeb0 /* Long access */
59#define TMU2_TCR 0xfffffeb4 /* Word access */ 60#define TMU2_TCR 0xfffffeb4 /* Word access */
60#if !defined(CONFIG_CPU_SUBTYPE_SH7720) 61#if !defined(CONFIG_CPU_SUBTYPE_SH7720) && !defined(CONFIG_CPU_SUBTYPE_SH7721)
61#define TMU2_TCPR2 0xfffffeb8 /* Long access */ 62#define TMU2_TCPR2 0xfffffeb8 /* Long access */
62#endif 63#endif
63#endif 64#endif
diff --git a/include/asm-sh/cpu-sh3/ubc.h b/include/asm-sh/cpu-sh3/ubc.h
index 18467c574534..4e6381d5ff7a 100644
--- a/include/asm-sh/cpu-sh3/ubc.h
+++ b/include/asm-sh/cpu-sh3/ubc.h
@@ -12,7 +12,8 @@
12#define __ASM_CPU_SH3_UBC_H 12#define __ASM_CPU_SH3_UBC_H
13 13
14#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \ 14#if defined(CONFIG_CPU_SUBTYPE_SH7710) || \
15 defined(CONFIG_CPU_SUBTYPE_SH7720) 15 defined(CONFIG_CPU_SUBTYPE_SH7720) || \
16 defined(CONFIG_CPU_SUBTYPE_SH7721)
16#define UBC_BARA 0xa4ffffb0 17#define UBC_BARA 0xa4ffffb0
17#define UBC_BAMRA 0xa4ffffb4 18#define UBC_BAMRA 0xa4ffffb4
18#define UBC_BBRA 0xa4ffffb8 19#define UBC_BBRA 0xa4ffffb8
diff --git a/include/asm-sh/cpu-sh4/addrspace.h b/include/asm-sh/cpu-sh4/addrspace.h
index bb2e1b03060c..a3fa733c1c7d 100644
--- a/include/asm-sh/cpu-sh4/addrspace.h
+++ b/include/asm-sh/cpu-sh4/addrspace.h
@@ -10,6 +10,12 @@
10#ifndef __ASM_CPU_SH4_ADDRSPACE_H 10#ifndef __ASM_CPU_SH4_ADDRSPACE_H
11#define __ASM_CPU_SH4_ADDRSPACE_H 11#define __ASM_CPU_SH4_ADDRSPACE_H
12 12
13#define P0SEG 0x00000000
14#define P1SEG 0x80000000
15#define P2SEG 0xa0000000
16#define P3SEG 0xc0000000
17#define P4SEG 0xe0000000
18
13/* Detailed P4SEG */ 19/* Detailed P4SEG */
14#define P4SEG_STORE_QUE (P4SEG) 20#define P4SEG_STORE_QUE (P4SEG)
15#define P4SEG_IC_ADDR 0xf0000000 21#define P4SEG_IC_ADDR 0xf0000000
diff --git a/include/asm-sh/cpu-sh4/cache.h b/include/asm-sh/cpu-sh4/cache.h
index f92b20a0983d..1c61ebf5c8e3 100644
--- a/include/asm-sh/cpu-sh4/cache.h
+++ b/include/asm-sh/cpu-sh4/cache.h
@@ -12,6 +12,11 @@
12 12
13#define L1_CACHE_SHIFT 5 13#define L1_CACHE_SHIFT 5
14 14
15#define SH_CACHE_VALID 1
16#define SH_CACHE_UPDATED 2
17#define SH_CACHE_COMBINED 4
18#define SH_CACHE_ASSOC 8
19
15#define CCR 0xff00001c /* Address of Cache Control Register */ 20#define CCR 0xff00001c /* Address of Cache Control Register */
16#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */ 21#define CCR_CACHE_OCE 0x0001 /* Operand Cache Enable */
17#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ 22#define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/
diff --git a/include/asm-sh/cpu-sh4/fpu.h b/include/asm-sh/cpu-sh4/fpu.h
new file mode 100644
index 000000000000..febef7342528
--- /dev/null
+++ b/include/asm-sh/cpu-sh4/fpu.h
@@ -0,0 +1,32 @@
1/*
2 * linux/arch/sh/kernel/cpu/sh4/sh4_fpu.h
3 *
4 * Copyright (C) 2006 STMicroelectronics Limited
5 * Author: Carl Shaw <carl.shaw@st.com>
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License Version 2. See linux/COPYING for more information.
9 *
10 * Definitions for SH4 FPU operations
11 */
12
13#ifndef __CPU_SH4_FPU_H
14#define __CPU_SH4_FPU_H
15
16#define FPSCR_ENABLE_MASK 0x00000f80UL
17
18#define FPSCR_FMOV_DOUBLE (1<<1)
19
20#define FPSCR_CAUSE_INEXACT (1<<12)
21#define FPSCR_CAUSE_UNDERFLOW (1<<13)
22#define FPSCR_CAUSE_OVERFLOW (1<<14)
23#define FPSCR_CAUSE_DIVZERO (1<<15)
24#define FPSCR_CAUSE_INVALID (1<<16)
25#define FPSCR_CAUSE_ERROR (1<<17)
26
27#define FPSCR_DBL_PRECISION (1<<19)
28#define FPSCR_ROUNDING_MODE(x) ((x >> 20) & 3)
29#define FPSCR_RM_NEAREST (0)
30#define FPSCR_RM_ZERO (1)
31
32#endif
diff --git a/include/asm-sh/cpu-sh4/freq.h b/include/asm-sh/cpu-sh4/freq.h
index dc1d32a86374..1ac10b9a078f 100644
--- a/include/asm-sh/cpu-sh4/freq.h
+++ b/include/asm-sh/cpu-sh4/freq.h
@@ -16,7 +16,8 @@
16#define SCLKACR 0xa4150008 16#define SCLKACR 0xa4150008
17#define SCLKBCR 0xa415000c 17#define SCLKBCR 0xa415000c
18#define IrDACLKCR 0xa4150010 18#define IrDACLKCR 0xa4150010
19#elif defined(CONFIG_CPU_SUBTYPE_SH7780) 19#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
20 defined(CONFIG_CPU_SUBTYPE_SH7780)
20#define FRQCR 0xffc80000 21#define FRQCR 0xffc80000
21#elif defined(CONFIG_CPU_SUBTYPE_SH7785) 22#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
22#define FRQCR0 0xffc80000 23#define FRQCR0 0xffc80000
diff --git a/include/asm-sh/cpu-sh4/mmu_context.h b/include/asm-sh/cpu-sh4/mmu_context.h
index 979acddc0f8e..9ea8eb27b18e 100644
--- a/include/asm-sh/cpu-sh4/mmu_context.h
+++ b/include/asm-sh/cpu-sh4/mmu_context.h
@@ -22,12 +22,20 @@
22#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000 22#define MMU_UTLB_ADDRESS_ARRAY 0xF6000000
23#define MMU_PAGE_ASSOC_BIT 0x80 23#define MMU_PAGE_ASSOC_BIT 0x80
24 24
25#define MMUCR_TI (1<<2)
26
25#ifdef CONFIG_X2TLB 27#ifdef CONFIG_X2TLB
26#define MMUCR_ME (1 << 7) 28#define MMUCR_ME (1 << 7)
27#else 29#else
28#define MMUCR_ME (0) 30#define MMUCR_ME (0)
29#endif 31#endif
30 32
33#if defined(CONFIG_32BIT) && defined(CONFIG_CPU_SUBTYPE_ST40)
34#define MMUCR_SE (1 << 4)
35#else
36#define MMUCR_SE (0)
37#endif
38
31#ifdef CONFIG_SH_STORE_QUEUES 39#ifdef CONFIG_SH_STORE_QUEUES
32#define MMUCR_SQMD (1 << 9) 40#define MMUCR_SQMD (1 << 9)
33#else 41#else
@@ -35,7 +43,7 @@
35#endif 43#endif
36 44
37#define MMU_NTLB_ENTRIES 64 45#define MMU_NTLB_ENTRIES 64
38#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME) 46#define MMU_CONTROL_INIT (0x05|MMUCR_SQMD|MMUCR_ME|MMUCR_SE)
39 47
40#define MMU_ITLB_DATA_ARRAY 0xF3000000 48#define MMU_ITLB_DATA_ARRAY 0xF3000000
41#define MMU_UTLB_DATA_ARRAY 0xF7000000 49#define MMU_UTLB_DATA_ARRAY 0xF7000000
diff --git a/include/asm-sh/cpu-sh4/rtc.h b/include/asm-sh/cpu-sh4/rtc.h
new file mode 100644
index 000000000000..f3d0f53275e4
--- /dev/null
+++ b/include/asm-sh/cpu-sh4/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH4_RTC_H
2#define __ASM_SH_CPU_SH4_RTC_H
3
4#define rtc_reg_size sizeof(u32)
5#define RTC_BIT_INVERTED 0x40 /* bug on SH7750, SH7750S */
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7
8#endif /* __ASM_SH_CPU_SH4_RTC_H */
diff --git a/include/asm-sh/cpu-sh5/addrspace.h b/include/asm-sh/cpu-sh5/addrspace.h
new file mode 100644
index 000000000000..dc36b9a03af6
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/addrspace.h
@@ -0,0 +1,11 @@
1#ifndef __ASM_SH_CPU_SH5_ADDRSPACE_H
2#define __ASM_SH_CPU_SH5_ADDRSPACE_H
3
4#define PHYS_PERIPHERAL_BLOCK 0x09000000
5#define PHYS_DMAC_BLOCK 0x0e000000
6#define PHYS_PCI_BLOCK 0x60000000
7#define PHYS_EMI_BLOCK 0xff000000
8
9/* No segmentation.. */
10
11#endif /* __ASM_SH_CPU_SH5_ADDRSPACE_H */
diff --git a/include/asm-sh64/cache.h b/include/asm-sh/cpu-sh5/cache.h
index a4f36f0036e1..ed050ab526f2 100644
--- a/include/asm-sh64/cache.h
+++ b/include/asm-sh/cpu-sh5/cache.h
@@ -1,33 +1,30 @@
1#ifndef __ASM_SH64_CACHE_H 1#ifndef __ASM_SH_CPU_SH5_CACHE_H
2#define __ASM_SH64_CACHE_H 2#define __ASM_SH_CPU_SH5_CACHE_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/cpu-sh5/cache.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/cache.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003, 2004 Paul Mundt 8 * Copyright (C) 2003, 2004 Paul Mundt
13 * 9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
14 */ 13 */
15#include <asm/cacheflush.h>
16 14
17#define L1_CACHE_SHIFT 5 15#define L1_CACHE_SHIFT 5
18/* bytes per L1 cache line */ 16
19#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) 17/* Valid and Dirty bits */
20#define L1_CACHE_ALIGN_MASK (~(L1_CACHE_BYTES - 1)) 18#define SH_CACHE_VALID (1LL<<0)
21#define L1_CACHE_ALIGN(x) (((x)+(L1_CACHE_BYTES - 1)) & L1_CACHE_ALIGN_MASK) 19#define SH_CACHE_UPDATED (1LL<<57)
22#define L1_CACHE_SIZE_BYTES (L1_CACHE_BYTES << 10) 20
23 21/* Unimplemented compat bits.. */
24#ifdef MODULE 22#define SH_CACHE_COMBINED 0
25#define __cacheline_aligned __attribute__((__aligned__(L1_CACHE_BYTES))) 23#define SH_CACHE_ASSOC 0
26#else 24
27#define __cacheline_aligned \ 25/* Cache flags */
28 __attribute__((__aligned__(L1_CACHE_BYTES), \ 26#define SH_CACHE_MODE_WT (1LL<<0)
29 __section__(".data.cacheline_aligned"))) 27#define SH_CACHE_MODE_WB (1LL<<1)
30#endif
31 28
32/* 29/*
33 * Control Registers. 30 * Control Registers.
@@ -58,7 +55,6 @@
58 55
59#define OCCR1_NOLOCK 0x0 /* Set No Locking */ 56#define OCCR1_NOLOCK 0x0 /* Set No Locking */
60 57
61
62/* 58/*
63 * SH-5 59 * SH-5
64 * A bit of description here, for neff=32. 60 * A bit of description here, for neff=32.
@@ -77,43 +73,6 @@
77 * 73 *
78 */ 74 */
79 75
80/* Valid and Dirty bits */
81#define SH_CACHE_VALID (1LL<<0)
82#define SH_CACHE_UPDATED (1LL<<57)
83
84/* Cache flags */
85#define SH_CACHE_MODE_WT (1LL<<0)
86#define SH_CACHE_MODE_WB (1LL<<1)
87
88#ifndef __ASSEMBLY__
89
90/*
91 * Cache information structure.
92 *
93 * Defined for both I and D cache, per-processor.
94 */
95struct cache_info {
96 unsigned int ways;
97 unsigned int sets;
98 unsigned int linesz;
99
100 unsigned int way_shift;
101 unsigned int entry_shift;
102 unsigned int set_shift;
103 unsigned int way_step_shift;
104 unsigned int asid_shift;
105
106 unsigned int way_ofs;
107
108 unsigned int asid_mask;
109 unsigned int idx_mask;
110 unsigned int epn_mask;
111
112 unsigned long flags;
113};
114
115#endif /* __ASSEMBLY__ */
116
117/* Instruction cache */ 76/* Instruction cache */
118#define CACHE_IC_ADDRESS_ARRAY 0x01000000 77#define CACHE_IC_ADDRESS_ARRAY 0x01000000
119 78
@@ -130,10 +89,9 @@ struct cache_info {
130/* Mask to select synonym bit(s) */ 89/* Mask to select synonym bit(s) */
131#define CACHE_OC_SYN_MASK (((1UL<<CACHE_OC_N_SYNBITS)-1)<<CACHE_OC_SYN_SHIFT) 90#define CACHE_OC_SYN_MASK (((1UL<<CACHE_OC_N_SYNBITS)-1)<<CACHE_OC_SYN_SHIFT)
132 91
133
134/* 92/*
135 * Instruction cache can't be invalidated based on physical addresses. 93 * Instruction cache can't be invalidated based on physical addresses.
136 * No Instruction Cache defines required, then. 94 * No Instruction Cache defines required, then.
137 */ 95 */
138 96
139#endif /* __ASM_SH64_CACHE_H */ 97#endif /* __ASM_SH_CPU_SH5_CACHE_H */
diff --git a/include/asm-sh64/cacheflush.h b/include/asm-sh/cpu-sh5/cacheflush.h
index 1e53a47bdc97..98edb5b1da32 100644
--- a/include/asm-sh64/cacheflush.h
+++ b/include/asm-sh/cpu-sh5/cacheflush.h
@@ -1,5 +1,5 @@
1#ifndef __ASM_SH64_CACHEFLUSH_H 1#ifndef __ASM_SH_CPU_SH5_CACHEFLUSH_H
2#define __ASM_SH64_CACHEFLUSH_H 2#define __ASM_SH_CPU_SH5_CACHEFLUSH_H
3 3
4#ifndef __ASSEMBLY__ 4#ifndef __ASSEMBLY__
5 5
@@ -26,25 +26,10 @@ extern void flush_icache_user_range(struct vm_area_struct *vma,
26#define flush_dcache_mmap_lock(mapping) do { } while (0) 26#define flush_dcache_mmap_lock(mapping) do { } while (0)
27#define flush_dcache_mmap_unlock(mapping) do { } while (0) 27#define flush_dcache_mmap_unlock(mapping) do { } while (0)
28 28
29#define flush_cache_vmap(start, end) flush_cache_all()
30#define flush_cache_vunmap(start, end) flush_cache_all()
31
32#define flush_icache_page(vma, page) do { } while (0) 29#define flush_icache_page(vma, page) do { } while (0)
33 30#define p3_cache_init() do { } while (0)
34#define copy_to_user_page(vma, page, vaddr, dst, src, len) \
35 do { \
36 flush_cache_page(vma, vaddr, page_to_pfn(page));\
37 memcpy(dst, src, len); \
38 flush_icache_user_range(vma, page, vaddr, len); \
39 } while (0)
40
41#define copy_from_user_page(vma, page, vaddr, dst, src, len) \
42 do { \
43 flush_cache_page(vma, vaddr, page_to_pfn(page));\
44 memcpy(dst, src, len); \
45 } while (0)
46 31
47#endif /* __ASSEMBLY__ */ 32#endif /* __ASSEMBLY__ */
48 33
49#endif /* __ASM_SH64_CACHEFLUSH_H */ 34#endif /* __ASM_SH_CPU_SH5_CACHEFLUSH_H */
50 35
diff --git a/include/asm-sh/cpu-sh5/dma.h b/include/asm-sh/cpu-sh5/dma.h
new file mode 100644
index 000000000000..7bf6bb3d35ed
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/dma.h
@@ -0,0 +1,6 @@
1#ifndef __ASM_SH_CPU_SH5_DMA_H
2#define __ASM_SH_CPU_SH5_DMA_H
3
4/* Nothing yet */
5
6#endif /* __ASM_SH_CPU_SH5_DMA_H */
diff --git a/include/asm-sh64/irq.h b/include/asm-sh/cpu-sh5/irq.h
index 5c9e6a873aeb..f0f0756e6e84 100644
--- a/include/asm-sh64/irq.h
+++ b/include/asm-sh/cpu-sh5/irq.h
@@ -1,15 +1,14 @@
1#ifndef __ASM_SH64_IRQ_H 1#ifndef __ASM_SH_CPU_SH5_IRQ_H
2#define __ASM_SH64_IRQ_H 2#define __ASM_SH_CPU_SH5_IRQ_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/cpu-sh5/irq.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/irq.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
13 */ 12 */
14 13
15 14
@@ -92,9 +91,6 @@
92#define NR_EXT_IRQS 0 91#define NR_EXT_IRQS 0
93#endif 92#endif
94 93
95#define NR_IRQS (NR_INTC_IRQS+NR_EXT_IRQS)
96
97
98/* Default IRQs, fixed */ 94/* Default IRQs, fixed */
99#define TIMER_IRQ IRQ_TUNI0 95#define TIMER_IRQ IRQ_TUNI0
100#define RTC_IRQ IRQ_CUI 96#define RTC_IRQ IRQ_CUI
@@ -116,29 +112,6 @@
116 112
117extern int intc_evt_to_irq[(0xE20/0x20)+1]; 113extern int intc_evt_to_irq[(0xE20/0x20)+1];
118int intc_irq_describe(char* p, int irq); 114int intc_irq_describe(char* p, int irq);
115extern int platform_int_priority[NR_INTC_IRQS];
119 116
120#define irq_canonicalize(irq) (irq) 117#endif /* __ASM_SH_CPU_SH5_IRQ_H */
121
122#ifdef CONFIG_SH_CAYMAN
123int cayman_irq_demux(int evt);
124int cayman_irq_describe(char* p, int irq);
125#define irq_demux(x) cayman_irq_demux(x)
126#define irq_describe(p, x) cayman_irq_describe(p, x)
127#else
128#define irq_demux(x) (intc_evt_to_irq[x])
129#define irq_describe(p, x) intc_irq_describe(p, x)
130#endif
131
132/*
133 * Function for "on chip support modules".
134 */
135
136/*
137 * SH-5 supports Priority based interrupts only.
138 * Interrupt priorities are defined at platform level.
139 */
140#define set_ipr_data(a, b, c, d)
141#define make_ipr_irq(a)
142#define make_imask_irq(a)
143
144#endif /* __ASM_SH64_IRQ_H */
diff --git a/include/asm-sh/cpu-sh5/mmu_context.h b/include/asm-sh/cpu-sh5/mmu_context.h
new file mode 100644
index 000000000000..df857fc09960
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/mmu_context.h
@@ -0,0 +1,27 @@
1#ifndef __ASM_SH_CPU_SH5_MMU_CONTEXT_H
2#define __ASM_SH_CPU_SH5_MMU_CONTEXT_H
3
4/* Common defines */
5#define TLB_STEP 0x00000010
6#define TLB_PTEH 0x00000000
7#define TLB_PTEL 0x00000008
8
9/* PTEH defines */
10#define PTEH_ASID_SHIFT 2
11#define PTEH_VALID 0x0000000000000001
12#define PTEH_SHARED 0x0000000000000002
13#define PTEH_MATCH_ASID 0x00000000000003ff
14
15#ifndef __ASSEMBLY__
16/* This has to be a common function because the next location to fill
17 * information is shared. */
18extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte);
19
20/* Profiling counter. */
21#ifdef CONFIG_SH64_PROC_TLB
22extern unsigned long long calls_to_do_fast_page_fault;
23#endif
24
25#endif /* __ASSEMBLY__ */
26
27#endif /* __ASM_SH_CPU_SH5_MMU_CONTEXT_H */
diff --git a/include/asm-sh64/registers.h b/include/asm-sh/cpu-sh5/registers.h
index 7eec666acf84..6664ea6f1566 100644
--- a/include/asm-sh64/registers.h
+++ b/include/asm-sh/cpu-sh5/registers.h
@@ -1,15 +1,15 @@
1#ifndef __ASM_SH64_REGISTERS_H 1#ifndef __ASM_SH_CPU_SH5_REGISTERS_H
2#define __ASM_SH64_REGISTERS_H 2#define __ASM_SH_CPU_SH5_REGISTERS_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/cpu-sh5/registers.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/registers.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2004 Richard Curnow 8 * Copyright (C) 2004 Richard Curnow
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */ 13 */
14 14
15#ifdef __ASSEMBLY__ 15#ifdef __ASSEMBLY__
@@ -103,4 +103,4 @@
103#define __USR __str(USR) 103#define __USR __str(USR)
104 104
105#endif /* __ASSEMBLY__ */ 105#endif /* __ASSEMBLY__ */
106#endif /* __ASM_SH64_REGISTERS_H */ 106#endif /* __ASM_SH_CPU_SH5_REGISTERS_H */
diff --git a/include/asm-sh/cpu-sh5/rtc.h b/include/asm-sh/cpu-sh5/rtc.h
new file mode 100644
index 000000000000..12ea0ed144e1
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/rtc.h
@@ -0,0 +1,8 @@
1#ifndef __ASM_SH_CPU_SH5_RTC_H
2#define __ASM_SH_CPU_SH5_RTC_H
3
4#define rtc_reg_size sizeof(u32)
5#define RTC_BIT_INVERTED 0 /* The SH-5 RTC is surprisingly sane! */
6#define RTC_DEF_CAPABILITIES RTC_CAP_4_DIGIT_YEAR
7
8#endif /* __ASM_SH_CPU_SH5_RTC_H */
diff --git a/include/asm-sh/cpu-sh5/timer.h b/include/asm-sh/cpu-sh5/timer.h
new file mode 100644
index 000000000000..88da9b341a36
--- /dev/null
+++ b/include/asm-sh/cpu-sh5/timer.h
@@ -0,0 +1,4 @@
1#ifndef __ASM_SH_CPU_SH5_TIMER_H
2#define __ASM_SH_CPU_SH5_TIMER_H
3
4#endif /* __ASM_SH_CPU_SH5_TIMER_H */
diff --git a/include/asm-sh/delay.h b/include/asm-sh/delay.h
index db599b2a5a9c..031db84f2aa1 100644
--- a/include/asm-sh/delay.h
+++ b/include/asm-sh/delay.h
@@ -6,7 +6,7 @@
6 * 6 *
7 * Delay routines calling functions in arch/sh/lib/delay.c 7 * Delay routines calling functions in arch/sh/lib/delay.c
8 */ 8 */
9 9
10extern void __bad_udelay(void); 10extern void __bad_udelay(void);
11extern void __bad_ndelay(void); 11extern void __bad_ndelay(void);
12 12
@@ -15,13 +15,17 @@ extern void __ndelay(unsigned long nsecs);
15extern void __const_udelay(unsigned long usecs); 15extern void __const_udelay(unsigned long usecs);
16extern void __delay(unsigned long loops); 16extern void __delay(unsigned long loops);
17 17
18#ifdef CONFIG_SUPERH32
18#define udelay(n) (__builtin_constant_p(n) ? \ 19#define udelay(n) (__builtin_constant_p(n) ? \
19 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \ 20 ((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 0x10c6ul)) : \
20 __udelay(n)) 21 __udelay(n))
21 22
22
23#define ndelay(n) (__builtin_constant_p(n) ? \ 23#define ndelay(n) (__builtin_constant_p(n) ? \
24 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \ 24 ((n) > 20000 ? __bad_ndelay() : __const_udelay((n) * 5ul)) : \
25 __ndelay(n)) 25 __ndelay(n))
26#else
27extern void udelay(unsigned long usecs);
28extern void ndelay(unsigned long nsecs);
29#endif
26 30
27#endif /* __ASM_SH_DELAY_H */ 31#endif /* __ASM_SH_DELAY_H */
diff --git a/include/asm-sh/dma-mapping.h b/include/asm-sh/dma-mapping.h
index fcea067f7a9c..22cc419389fe 100644
--- a/include/asm-sh/dma-mapping.h
+++ b/include/asm-sh/dma-mapping.h
@@ -8,11 +8,6 @@
8 8
9extern struct bus_type pci_bus_type; 9extern struct bus_type pci_bus_type;
10 10
11/* arch/sh/mm/consistent.c */
12extern void *consistent_alloc(gfp_t gfp, size_t size, dma_addr_t *handle);
13extern void consistent_free(void *vaddr, size_t size);
14extern void consistent_sync(void *vaddr, size_t size, int direction);
15
16#define dma_supported(dev, mask) (1) 11#define dma_supported(dev, mask) (1)
17 12
18static inline int dma_set_mask(struct device *dev, u64 mask) 13static inline int dma_set_mask(struct device *dev, u64 mask)
@@ -25,44 +20,19 @@ static inline int dma_set_mask(struct device *dev, u64 mask)
25 return 0; 20 return 0;
26} 21}
27 22
28static inline void *dma_alloc_coherent(struct device *dev, size_t size, 23void *dma_alloc_coherent(struct device *dev, size_t size,
29 dma_addr_t *dma_handle, gfp_t flag) 24 dma_addr_t *dma_handle, gfp_t flag);
30{
31 if (sh_mv.mv_consistent_alloc) {
32 void *ret;
33 25
34 ret = sh_mv.mv_consistent_alloc(dev, size, dma_handle, flag); 26void dma_free_coherent(struct device *dev, size_t size,
35 if (ret != NULL) 27 void *vaddr, dma_addr_t dma_handle);
36 return ret;
37 }
38
39 return consistent_alloc(flag, size, dma_handle);
40}
41
42static inline void dma_free_coherent(struct device *dev, size_t size,
43 void *vaddr, dma_addr_t dma_handle)
44{
45 if (sh_mv.mv_consistent_free) {
46 int ret;
47
48 ret = sh_mv.mv_consistent_free(dev, size, vaddr, dma_handle);
49 if (ret == 0)
50 return;
51 }
52 28
53 consistent_free(vaddr, size); 29void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
54} 30 enum dma_data_direction dir);
55 31
56#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f) 32#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
57#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h) 33#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
58#define dma_is_consistent(d, h) (1) 34#define dma_is_consistent(d, h) (1)
59 35
60static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
61 enum dma_data_direction dir)
62{
63 consistent_sync(vaddr, size, (int)dir);
64}
65
66static inline dma_addr_t dma_map_single(struct device *dev, 36static inline dma_addr_t dma_map_single(struct device *dev,
67 void *ptr, size_t size, 37 void *ptr, size_t size,
68 enum dma_data_direction dir) 38 enum dma_data_direction dir)
@@ -205,4 +175,18 @@ static inline int dma_mapping_error(dma_addr_t dma_addr)
205{ 175{
206 return dma_addr == 0; 176 return dma_addr == 0;
207} 177}
178
179#define ARCH_HAS_DMA_DECLARE_COHERENT_MEMORY
180
181extern int
182dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
183 dma_addr_t device_addr, size_t size, int flags);
184
185extern void
186dma_release_declared_memory(struct device *dev);
187
188extern void *
189dma_mark_declared_memory_occupied(struct device *dev,
190 dma_addr_t device_addr, size_t size);
191
208#endif /* __ASM_SH_DMA_MAPPING_H */ 192#endif /* __ASM_SH_DMA_MAPPING_H */
diff --git a/include/asm-sh/elf.h b/include/asm-sh/elf.h
index 12cc4b392bf0..05092da1aa59 100644
--- a/include/asm-sh/elf.h
+++ b/include/asm-sh/elf.h
@@ -5,7 +5,7 @@
5#include <asm/ptrace.h> 5#include <asm/ptrace.h>
6#include <asm/user.h> 6#include <asm/user.h>
7 7
8/* SH relocation types */ 8/* SH (particularly SHcompact) relocation types */
9#define R_SH_NONE 0 9#define R_SH_NONE 0
10#define R_SH_DIR32 1 10#define R_SH_DIR32 1
11#define R_SH_REL32 2 11#define R_SH_REL32 2
@@ -43,6 +43,11 @@
43#define R_SH_RELATIVE 165 43#define R_SH_RELATIVE 165
44#define R_SH_GOTOFF 166 44#define R_SH_GOTOFF 166
45#define R_SH_GOTPC 167 45#define R_SH_GOTPC 167
46/* SHmedia relocs */
47#define R_SH_IMM_LOW16 246
48#define R_SH_IMM_LOW16_PCREL 247
49#define R_SH_IMM_MEDLOW16 248
50#define R_SH_IMM_MEDLOW16_PCREL 249
46/* Keep this the last entry. */ 51/* Keep this the last entry. */
47#define R_SH_NUM 256 52#define R_SH_NUM 256
48 53
@@ -58,11 +63,6 @@ typedef elf_greg_t elf_gregset_t[ELF_NGREG];
58typedef struct user_fpu_struct elf_fpregset_t; 63typedef struct user_fpu_struct elf_fpregset_t;
59 64
60/* 65/*
61 * This is used to ensure we don't load something for the wrong architecture.
62 */
63#define elf_check_arch(x) ( (x)->e_machine == EM_SH )
64
65/*
66 * These are used to set parameters in the core dumps. 66 * These are used to set parameters in the core dumps.
67 */ 67 */
68#define ELF_CLASS ELFCLASS32 68#define ELF_CLASS ELFCLASS32
@@ -73,6 +73,12 @@ typedef struct user_fpu_struct elf_fpregset_t;
73#endif 73#endif
74#define ELF_ARCH EM_SH 74#define ELF_ARCH EM_SH
75 75
76#ifdef __KERNEL__
77/*
78 * This is used to ensure we don't load something for the wrong architecture.
79 */
80#define elf_check_arch(x) ( (x)->e_machine == EM_SH )
81
76#define USE_ELF_CORE_DUMP 82#define USE_ELF_CORE_DUMP
77#define ELF_EXEC_PAGESIZE PAGE_SIZE 83#define ELF_EXEC_PAGESIZE PAGE_SIZE
78 84
@@ -83,7 +89,6 @@ typedef struct user_fpu_struct elf_fpregset_t;
83 89
84#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3) 90#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
85 91
86
87#define ELF_CORE_COPY_REGS(_dest,_regs) \ 92#define ELF_CORE_COPY_REGS(_dest,_regs) \
88 memcpy((char *) &_dest, (char *) _regs, \ 93 memcpy((char *) &_dest, (char *) _regs, \
89 sizeof(struct pt_regs)); 94 sizeof(struct pt_regs));
@@ -101,16 +106,38 @@ typedef struct user_fpu_struct elf_fpregset_t;
101 For the moment, we have only optimizations for the Intel generations, 106 For the moment, we have only optimizations for the Intel generations,
102 but that could change... */ 107 but that could change... */
103 108
104#define ELF_PLATFORM (NULL) 109#define ELF_PLATFORM (utsname()->machine)
105 110
111#ifdef __SH5__
112#define ELF_PLAT_INIT(_r, load_addr) \
113 do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \
114 _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \
115 _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \
116 _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \
117 _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \
118 _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \
119 _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \
120 _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \
121 _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \
122 _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \
123 _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \
124 _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \
125 _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \
126 _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \
127 _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \
128 _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \
129 _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \
130 _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \
131 _r->sr = SR_FD | SR_MMU; } while (0)
132#else
106#define ELF_PLAT_INIT(_r, load_addr) \ 133#define ELF_PLAT_INIT(_r, load_addr) \
107 do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \ 134 do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \
108 _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \ 135 _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \
109 _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \ 136 _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \
110 _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \ 137 _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; \
111 _r->sr = SR_FD; } while (0) 138 _r->sr = SR_FD; } while (0)
139#endif
112 140
113#ifdef __KERNEL__
114#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT) 141#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
115struct task_struct; 142struct task_struct;
116extern int dump_task_regs (struct task_struct *, elf_gregset_t *); 143extern int dump_task_regs (struct task_struct *, elf_gregset_t *);
@@ -118,7 +145,6 @@ extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *);
118 145
119#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) 146#define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs)
120#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) 147#define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs)
121#endif
122 148
123#ifdef CONFIG_VSYSCALL 149#ifdef CONFIG_VSYSCALL
124/* vDSO has arch_setup_additional_pages */ 150/* vDSO has arch_setup_additional_pages */
@@ -133,12 +159,35 @@ extern void __kernel_vsyscall;
133#define VDSO_BASE ((unsigned long)current->mm->context.vdso) 159#define VDSO_BASE ((unsigned long)current->mm->context.vdso)
134#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x)) 160#define VDSO_SYM(x) (VDSO_BASE + (unsigned long)(x))
135 161
162#define VSYSCALL_AUX_ENT \
163 if (vdso_enabled) \
164 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE);
165#else
166#define VSYSCALL_AUX_ENT
167#endif /* CONFIG_VSYSCALL */
168
169#ifdef CONFIG_SH_FPU
170#define FPU_AUX_ENT NEW_AUX_ENT(AT_FPUCW, FPSCR_INIT)
171#else
172#define FPU_AUX_ENT
173#endif
174
175extern int l1i_cache_shape, l1d_cache_shape, l2_cache_shape;
176
136/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */ 177/* update AT_VECTOR_SIZE_ARCH if the number of NEW_AUX_ENT entries changes */
137#define ARCH_DLINFO \ 178#define ARCH_DLINFO \
138do { \ 179do { \
139 if (vdso_enabled) \ 180 /* Optional FPU initialization */ \
140 NEW_AUX_ENT(AT_SYSINFO_EHDR, VDSO_BASE); \ 181 FPU_AUX_ENT; \
182 \
183 /* Optional vsyscall entry */ \
184 VSYSCALL_AUX_ENT; \
185 \
186 /* Cache desc */ \
187 NEW_AUX_ENT(AT_L1I_CACHESHAPE, l1i_cache_shape); \
188 NEW_AUX_ENT(AT_L1D_CACHESHAPE, l1d_cache_shape); \
189 NEW_AUX_ENT(AT_L2_CACHESHAPE, l2_cache_shape); \
141} while (0) 190} while (0)
142#endif /* CONFIG_VSYSCALL */
143 191
192#endif /* __KERNEL__ */
144#endif /* __ASM_SH_ELF_H */ 193#endif /* __ASM_SH_ELF_H */
diff --git a/include/asm-sh/fixmap.h b/include/asm-sh/fixmap.h
index 8a566177ad96..721fcc4d5e98 100644
--- a/include/asm-sh/fixmap.h
+++ b/include/asm-sh/fixmap.h
@@ -49,6 +49,7 @@ enum fixed_addresses {
49#define FIX_N_COLOURS 16 49#define FIX_N_COLOURS 16
50 FIX_CMAP_BEGIN, 50 FIX_CMAP_BEGIN,
51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS, 51 FIX_CMAP_END = FIX_CMAP_BEGIN + FIX_N_COLOURS,
52 FIX_UNCACHED,
52#ifdef CONFIG_HIGHMEM 53#ifdef CONFIG_HIGHMEM
53 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */ 54 FIX_KMAP_BEGIN, /* reserved pte's for temporary kernel mappings */
54 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1, 55 FIX_KMAP_END = FIX_KMAP_BEGIN+(KM_TYPE_NR*NR_CPUS)-1,
@@ -73,7 +74,11 @@ extern void __set_fixmap(enum fixed_addresses idx,
73 * the start of the fixmap, and leave one page empty 74 * the start of the fixmap, and leave one page empty
74 * at the top of mem.. 75 * at the top of mem..
75 */ 76 */
77#ifdef CONFIG_SUPERH32
76#define FIXADDR_TOP (P4SEG - PAGE_SIZE) 78#define FIXADDR_TOP (P4SEG - PAGE_SIZE)
79#else
80#define FIXADDR_TOP (0xff000000 - PAGE_SIZE)
81#endif
77#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) 82#define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT)
78#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) 83#define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE)
79 84
diff --git a/include/asm-sh/flat.h b/include/asm-sh/flat.h
index dc4f5950dafa..0cc800299e06 100644
--- a/include/asm-sh/flat.h
+++ b/include/asm-sh/flat.h
@@ -19,6 +19,6 @@
19#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp) 19#define flat_get_addr_from_rp(rp, relval, flags, p) get_unaligned(rp)
20#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp) 20#define flat_put_addr_at_rp(rp, val, relval) put_unaligned(val,rp)
21#define flat_get_relocate_addr(rel) (rel) 21#define flat_get_relocate_addr(rel) (rel)
22#define flat_set_persistent(relval, p) 0 22#define flat_set_persistent(relval, p) ({ (void)p; 0; })
23 23
24#endif /* __ASM_SH_FLAT_H */ 24#endif /* __ASM_SH_FLAT_H */
diff --git a/include/asm-sh/fpu.h b/include/asm-sh/fpu.h
new file mode 100644
index 000000000000..f8429880a270
--- /dev/null
+++ b/include/asm-sh/fpu.h
@@ -0,0 +1,46 @@
1#ifndef __ASM_SH_FPU_H
2#define __ASM_SH_FPU_H
3
4#define SR_FD 0x00008000
5
6#ifndef __ASSEMBLY__
7#include <asm/ptrace.h>
8
9#ifdef CONFIG_SH_FPU
10static inline void release_fpu(struct pt_regs *regs)
11{
12 regs->sr |= SR_FD;
13}
14
15static inline void grab_fpu(struct pt_regs *regs)
16{
17 regs->sr &= ~SR_FD;
18}
19
20struct task_struct;
21
22extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
23#else
24#define release_fpu(regs) do { } while (0)
25#define grab_fpu(regs) do { } while (0)
26#define save_fpu(tsk, regs) do { } while (0)
27#endif
28
29extern int do_fpu_inst(unsigned short, struct pt_regs *);
30
31#define unlazy_fpu(tsk, regs) do { \
32 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
33 save_fpu(tsk, regs); \
34 } \
35} while (0)
36
37#define clear_fpu(tsk, regs) do { \
38 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
39 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
40 release_fpu(regs); \
41 } \
42} while (0)
43
44#endif /* __ASSEMBLY__ */
45
46#endif /* __ASM_SH_FPU_H */
diff --git a/include/asm-sh/hd64461.h b/include/asm-sh/hd64461.h
index 342ca55a266a..8c1353baf00f 100644
--- a/include/asm-sh/hd64461.h
+++ b/include/asm-sh/hd64461.h
@@ -46,10 +46,10 @@
46/* CPU Data Bus Control Register */ 46/* CPU Data Bus Control Register */
47#define HD64461_SCPUCR (CONFIG_HD64461_IOBASE + 0x04) 47#define HD64461_SCPUCR (CONFIG_HD64461_IOBASE + 0x04)
48 48
49/* Base Adress Register */ 49/* Base Address Register */
50#define HD64461_LCDCBAR (CONFIG_HD64461_IOBASE + 0x1000) 50#define HD64461_LCDCBAR (CONFIG_HD64461_IOBASE + 0x1000)
51 51
52/* Line increment adress */ 52/* Line increment address */
53#define HD64461_LCDCLOR (CONFIG_HD64461_IOBASE + 0x1002) 53#define HD64461_LCDCLOR (CONFIG_HD64461_IOBASE + 0x1002)
54 54
55/* Controls LCD controller */ 55/* Controls LCD controller */
@@ -80,9 +80,9 @@
80#define HD64461_LDR3 (CONFIG_HD64461_IOBASE + 0x101e) 80#define HD64461_LDR3 (CONFIG_HD64461_IOBASE + 0x101e)
81 81
82/* Palette Registers */ 82/* Palette Registers */
83#define HD64461_CPTWAR (CONFIG_HD64461_IOBASE + 0x1030) /* Color Palette Write Adress Register */ 83#define HD64461_CPTWAR (CONFIG_HD64461_IOBASE + 0x1030) /* Color Palette Write Address Register */
84#define HD64461_CPTWDR (CONFIG_HD64461_IOBASE + 0x1032) /* Color Palette Write Data Register */ 84#define HD64461_CPTWDR (CONFIG_HD64461_IOBASE + 0x1032) /* Color Palette Write Data Register */
85#define HD64461_CPTRAR (CONFIG_HD64461_IOBASE + 0x1034) /* Color Palette Read Adress Register */ 85#define HD64461_CPTRAR (CONFIG_HD64461_IOBASE + 0x1034) /* Color Palette Read Address Register */
86#define HD64461_CPTRDR (CONFIG_HD64461_IOBASE + 0x1036) /* Color Palette Read Data Register */ 86#define HD64461_CPTRDR (CONFIG_HD64461_IOBASE + 0x1036) /* Color Palette Read Data Register */
87 87
88#define HD64461_GRDOR (CONFIG_HD64461_IOBASE + 0x1040) /* Display Resolution Offset Register */ 88#define HD64461_GRDOR (CONFIG_HD64461_IOBASE + 0x1040) /* Display Resolution Offset Register */
@@ -97,8 +97,8 @@
97#define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */ 97#define HD64461_GRCFGR_COLORDEPTH8 0x01 /* Sets Colordepth 8 for Accelerator */
98 98
99/* Line Drawing Registers */ 99/* Line Drawing Registers */
100#define HD64461_LNSARH (CONFIG_HD64461_IOBASE + 0x1046) /* Line Start Adress Register (H) */ 100#define HD64461_LNSARH (CONFIG_HD64461_IOBASE + 0x1046) /* Line Start Address Register (H) */
101#define HD64461_LNSARL (CONFIG_HD64461_IOBASE + 0x1048) /* Line Start Adress Register (L) */ 101#define HD64461_LNSARL (CONFIG_HD64461_IOBASE + 0x1048) /* Line Start Address Register (L) */
102#define HD64461_LNAXLR (CONFIG_HD64461_IOBASE + 0x104a) /* Axis Pixel Length Register */ 102#define HD64461_LNAXLR (CONFIG_HD64461_IOBASE + 0x104a) /* Axis Pixel Length Register */
103#define HD64461_LNDGR (CONFIG_HD64461_IOBASE + 0x104c) /* Diagonal Register */ 103#define HD64461_LNDGR (CONFIG_HD64461_IOBASE + 0x104c) /* Diagonal Register */
104#define HD64461_LNAXR (CONFIG_HD64461_IOBASE + 0x104e) /* Axial Register */ 104#define HD64461_LNAXR (CONFIG_HD64461_IOBASE + 0x104e) /* Axial Register */
@@ -106,16 +106,16 @@
106#define HD64461_LNMDR (CONFIG_HD64461_IOBASE + 0x1052) /* Line Mode Register */ 106#define HD64461_LNMDR (CONFIG_HD64461_IOBASE + 0x1052) /* Line Mode Register */
107 107
108/* BitBLT Registers */ 108/* BitBLT Registers */
109#define HD64461_BBTSSARH (CONFIG_HD64461_IOBASE + 0x1054) /* Source Start Adress Register (H) */ 109#define HD64461_BBTSSARH (CONFIG_HD64461_IOBASE + 0x1054) /* Source Start Address Register (H) */
110#define HD64461_BBTSSARL (CONFIG_HD64461_IOBASE + 0x1056) /* Source Start Adress Register (L) */ 110#define HD64461_BBTSSARL (CONFIG_HD64461_IOBASE + 0x1056) /* Source Start Address Register (L) */
111#define HD64461_BBTDSARH (CONFIG_HD64461_IOBASE + 0x1058) /* Destination Start Adress Register (H) */ 111#define HD64461_BBTDSARH (CONFIG_HD64461_IOBASE + 0x1058) /* Destination Start Address Register (H) */
112#define HD64461_BBTDSARL (CONFIG_HD64461_IOBASE + 0x105a) /* Destination Start Adress Register (L) */ 112#define HD64461_BBTDSARL (CONFIG_HD64461_IOBASE + 0x105a) /* Destination Start Address Register (L) */
113#define HD64461_BBTDWR (CONFIG_HD64461_IOBASE + 0x105c) /* Destination Block Width Register */ 113#define HD64461_BBTDWR (CONFIG_HD64461_IOBASE + 0x105c) /* Destination Block Width Register */
114#define HD64461_BBTDHR (CONFIG_HD64461_IOBASE + 0x105e) /* Destination Block Height Register */ 114#define HD64461_BBTDHR (CONFIG_HD64461_IOBASE + 0x105e) /* Destination Block Height Register */
115#define HD64461_BBTPARH (CONFIG_HD64461_IOBASE + 0x1060) /* Pattern Start Adress Register (H) */ 115#define HD64461_BBTPARH (CONFIG_HD64461_IOBASE + 0x1060) /* Pattern Start Address Register (H) */
116#define HD64461_BBTPARL (CONFIG_HD64461_IOBASE + 0x1062) /* Pattern Start Adress Register (L) */ 116#define HD64461_BBTPARL (CONFIG_HD64461_IOBASE + 0x1062) /* Pattern Start Address Register (L) */
117#define HD64461_BBTMARH (CONFIG_HD64461_IOBASE + 0x1064) /* Mask Start Adress Register (H) */ 117#define HD64461_BBTMARH (CONFIG_HD64461_IOBASE + 0x1064) /* Mask Start Address Register (H) */
118#define HD64461_BBTMARL (CONFIG_HD64461_IOBASE + 0x1066) /* Mask Start Adress Register (L) */ 118#define HD64461_BBTMARL (CONFIG_HD64461_IOBASE + 0x1066) /* Mask Start Address Register (L) */
119#define HD64461_BBTROPR (CONFIG_HD64461_IOBASE + 0x1068) /* ROP Register */ 119#define HD64461_BBTROPR (CONFIG_HD64461_IOBASE + 0x1068) /* ROP Register */
120#define HD64461_BBTMDR (CONFIG_HD64461_IOBASE + 0x106a) /* BitBLT Mode Register */ 120#define HD64461_BBTMDR (CONFIG_HD64461_IOBASE + 0x106a) /* BitBLT Mode Register */
121 121
diff --git a/include/asm-sh/hs7751rvoip.h b/include/asm-sh/hs7751rvoip.h
deleted file mode 100644
index c4cff9d33927..000000000000
--- a/include/asm-sh/hs7751rvoip.h
+++ /dev/null
@@ -1,54 +0,0 @@
1#ifndef __ASM_SH_RENESAS_HS7751RVOIP_H
2#define __ASM_SH_RENESAS_HS7751RVOIP_H
3
4/*
5 * linux/include/asm-sh/hs7751rvoip/hs7751rvoip.h
6 *
7 * Copyright (C) 2000 Atom Create Engineering Co., Ltd.
8 *
9 * Renesas Technology Sales HS7751RVoIP support
10 */
11
12/* Box specific addresses. */
13
14#define PA_BCR 0xa4000000 /* FPGA */
15#define PA_SLICCNTR1 0xa4000006 /* SLIC PIO Control 1 */
16#define PA_SLICCNTR2 0xa4000008 /* SLIC PIO Control 2 */
17#define PA_DMACNTR 0xa400000a /* USB DMA Control */
18#define PA_INPORTR 0xa400000c /* Input Port Register */
19#define PA_OUTPORTR 0xa400000e /* Output Port Reguster */
20#define PA_VERREG 0xa4000014 /* FPGA Version Register */
21
22#define PA_IDE_OFFSET 0x1f0 /* CF IDE Offset */
23
24#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
25#define IRLCNTR2 (PA_BCR + 2) /* Interrupt Control Register2 */
26#define IRLCNTR3 (PA_BCR + 4) /* Interrupt Control Register3 */
27#define IRLCNTR4 (PA_BCR + 16) /* Interrupt Control Register4 */
28#define IRLCNTR5 (PA_BCR + 18) /* Interrupt Control Register5 */
29
30#define IRQ_PCIETH 6 /* PCI Ethernet IRQ */
31#define IRQ_PCIHUB 7 /* PCI Ethernet Hub IRQ */
32#define IRQ_USBCOM 8 /* USB Comunication IRQ */
33#define IRQ_USBCON 9 /* USB Connect IRQ */
34#define IRQ_USBDMA 10 /* USB DMA IRQ */
35#define IRQ_CFCARD 11 /* CF Card IRQ */
36#define IRQ_PCMCIA 12 /* PCMCIA IRQ */
37#define IRQ_PCISLOT 13 /* PCI Slot #1 IRQ */
38#define IRQ_ONHOOK1 0 /* ON HOOK1 IRQ */
39#define IRQ_OFFHOOK1 1 /* OFF HOOK1 IRQ */
40#define IRQ_ONHOOK2 2 /* ON HOOK2 IRQ */
41#define IRQ_OFFHOOK2 3 /* OFF HOOK2 IRQ */
42#define IRQ_RINGING 4 /* Ringing IRQ */
43#define IRQ_CODEC 5 /* CODEC IRQ */
44
45#define __IO_PREFIX hs7751rvoip
46#include <asm/io_generic.h>
47
48/* arch/sh/boards/renesas/hs7751rvoip/irq.c */
49void init_hs7751rvoip_IRQ(void);
50
51/* arch/sh/boards/renesas/hs7751rvoip/io.c */
52void *hs7751rvoip_ioremap(unsigned long, unsigned long);
53
54#endif /* __ASM_SH_RENESAS_HS7751RVOIP */
diff --git a/include/asm-sh/hw_irq.h b/include/asm-sh/hw_irq.h
index cb0b6c9f7020..c958fdaa0095 100644
--- a/include/asm-sh/hw_irq.h
+++ b/include/asm-sh/hw_irq.h
@@ -33,13 +33,6 @@ struct intc_vect {
33#define INTC_VECT(enum_id, vect) { enum_id, vect } 33#define INTC_VECT(enum_id, vect) { enum_id, vect }
34#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) 34#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq))
35 35
36struct intc_prio {
37 intc_enum enum_id;
38 unsigned char priority;
39};
40
41#define INTC_PRIO(enum_id, prio) { enum_id, prio }
42
43struct intc_group { 36struct intc_group {
44 intc_enum enum_id; 37 intc_enum enum_id;
45 intc_enum enum_ids[32]; 38 intc_enum enum_ids[32];
@@ -79,8 +72,6 @@ struct intc_desc {
79 unsigned int nr_vectors; 72 unsigned int nr_vectors;
80 struct intc_group *groups; 73 struct intc_group *groups;
81 unsigned int nr_groups; 74 unsigned int nr_groups;
82 struct intc_prio *priorities;
83 unsigned int nr_priorities;
84 struct intc_mask_reg *mask_regs; 75 struct intc_mask_reg *mask_regs;
85 unsigned int nr_mask_regs; 76 unsigned int nr_mask_regs;
86 struct intc_prio_reg *prio_regs; 77 struct intc_prio_reg *prio_regs;
@@ -92,10 +83,9 @@ struct intc_desc {
92 83
93#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) 84#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
94#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ 85#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \
95 priorities, mask_regs, prio_regs, sense_regs) \ 86 mask_regs, prio_regs, sense_regs) \
96struct intc_desc symbol __initdata = { \ 87struct intc_desc symbol __initdata = { \
97 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ 88 _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \
98 _INTC_ARRAY(priorities), \
99 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ 89 _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \
100 _INTC_ARRAY(sense_regs), \ 90 _INTC_ARRAY(sense_regs), \
101 chipname, \ 91 chipname, \
diff --git a/include/asm-sh/io.h b/include/asm-sh/io.h
index 6ed34d8eac5f..94900c089519 100644
--- a/include/asm-sh/io.h
+++ b/include/asm-sh/io.h
@@ -191,6 +191,8 @@ __BUILD_MEMORY_STRING(w, u16)
191 191
192#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */ 192#define mmiowb() wmb() /* synco on SH-4A, otherwise a nop */
193 193
194#define IO_SPACE_LIMIT 0xffffffff
195
194/* 196/*
195 * This function provides a method for the generic case where a board-specific 197 * This function provides a method for the generic case where a board-specific
196 * ioport_map simply needs to return the port + some arbitrary port base. 198 * ioport_map simply needs to return the port + some arbitrary port base.
@@ -226,6 +228,11 @@ static inline unsigned int ctrl_inl(unsigned long addr)
226 return *(volatile unsigned long*)addr; 228 return *(volatile unsigned long*)addr;
227} 229}
228 230
231static inline unsigned long long ctrl_inq(unsigned long addr)
232{
233 return *(volatile unsigned long long*)addr;
234}
235
229static inline void ctrl_outb(unsigned char b, unsigned long addr) 236static inline void ctrl_outb(unsigned char b, unsigned long addr)
230{ 237{
231 *(volatile unsigned char*)addr = b; 238 *(volatile unsigned char*)addr = b;
@@ -241,49 +248,52 @@ static inline void ctrl_outl(unsigned int b, unsigned long addr)
241 *(volatile unsigned long*)addr = b; 248 *(volatile unsigned long*)addr = b;
242} 249}
243 250
251static inline void ctrl_outq(unsigned long long b, unsigned long addr)
252{
253 *(volatile unsigned long long*)addr = b;
254}
255
244static inline void ctrl_delay(void) 256static inline void ctrl_delay(void)
245{ 257{
258#ifdef P2SEG
246 ctrl_inw(P2SEG); 259 ctrl_inw(P2SEG);
260#endif
247} 261}
248 262
249#define IO_SPACE_LIMIT 0xffffffff 263/* Quad-word real-mode I/O, don't ask.. */
264unsigned long long peek_real_address_q(unsigned long long addr);
265unsigned long long poke_real_address_q(unsigned long long addr,
266 unsigned long long val);
250 267
251#ifdef CONFIG_MMU 268/* arch/sh/mm/ioremap_64.c */
252/* 269unsigned long onchip_remap(unsigned long addr, unsigned long size,
253 * Change virtual addresses to physical addresses and vv. 270 const char *name);
254 * These are trivial on the 1:1 Linux/SuperH mapping 271extern void onchip_unmap(unsigned long vaddr);
255 */
256static inline unsigned long virt_to_phys(volatile void *address)
257{
258 return PHYSADDR(address);
259}
260 272
261static inline void *phys_to_virt(unsigned long address) 273#if !defined(CONFIG_MMU)
262{
263 return (void *)P1SEGADDR(address);
264}
265#else
266#define phys_to_virt(address) ((void *)(address))
267#define virt_to_phys(address) ((unsigned long)(address)) 274#define virt_to_phys(address) ((unsigned long)(address))
275#define phys_to_virt(address) ((void *)(address))
276#else
277#define virt_to_phys(address) (__pa(address))
278#define phys_to_virt(address) (__va(address))
268#endif 279#endif
269 280
270/* 281/*
271 * readX/writeX() are used to access memory mapped devices. On some 282 * On 32-bit SH, we traditionally have the whole physical address space
272 * architectures the memory mapped IO stuff needs to be accessed 283 * mapped at all times (as MIPS does), so "ioremap()" and "iounmap()" do
273 * differently. On the x86 architecture, we just read/write the 284 * not need to do anything but place the address in the proper segment.
274 * memory location directly. 285 * This is true for P1 and P2 addresses, as well as some P3 ones.
286 * However, most of the P3 addresses and newer cores using extended
287 * addressing need to map through page tables, so the ioremap()
288 * implementation becomes a bit more complicated.
275 * 289 *
276 * On SH, we traditionally have the whole physical address space mapped 290 * See arch/sh/mm/ioremap.c for additional notes on this.
277 * at all times (as MIPS does), so "ioremap()" and "iounmap()" do not
278 * need to do anything but place the address in the proper segment. This
279 * is true for P1 and P2 addresses, as well as some P3 ones. However,
280 * most of the P3 addresses and newer cores using extended addressing
281 * need to map through page tables, so the ioremap() implementation
282 * becomes a bit more complicated. See arch/sh/mm/ioremap.c for
283 * additional notes on this.
284 * 291 *
285 * We cheat a bit and always return uncachable areas until we've fixed 292 * We cheat a bit and always return uncachable areas until we've fixed
286 * the drivers to handle caching properly. 293 * the drivers to handle caching properly.
294 *
295 * On the SH-5 the concept of segmentation in the 1:1 PXSEG sense simply
296 * doesn't exist, so everything must go through page tables.
287 */ 297 */
288#ifdef CONFIG_MMU 298#ifdef CONFIG_MMU
289void __iomem *__ioremap(unsigned long offset, unsigned long size, 299void __iomem *__ioremap(unsigned long offset, unsigned long size,
@@ -297,6 +307,7 @@ void __iounmap(void __iomem *addr);
297static inline void __iomem * 307static inline void __iomem *
298__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags) 308__ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
299{ 309{
310#ifdef CONFIG_SUPERH32
300 unsigned long last_addr = offset + size - 1; 311 unsigned long last_addr = offset + size - 1;
301 312
302 /* 313 /*
@@ -311,6 +322,7 @@ __ioremap_mode(unsigned long offset, unsigned long size, unsigned long flags)
311 322
312 return (void __iomem *)P2SEGADDR(offset); 323 return (void __iomem *)P2SEGADDR(offset);
313 } 324 }
325#endif
314 326
315 return __ioremap(offset, size, flags); 327 return __ioremap(offset, size, flags);
316} 328}
diff --git a/include/asm-sh/irqflags.h b/include/asm-sh/irqflags.h
index 9dedc1b693e3..46e71da5be6b 100644
--- a/include/asm-sh/irqflags.h
+++ b/include/asm-sh/irqflags.h
@@ -1,81 +1,11 @@
1#ifndef __ASM_SH_IRQFLAGS_H 1#ifndef __ASM_SH_IRQFLAGS_H
2#define __ASM_SH_IRQFLAGS_H 2#define __ASM_SH_IRQFLAGS_H
3 3
4static inline void raw_local_irq_enable(void) 4#ifdef CONFIG_SUPERH32
5{ 5#include "irqflags_32.h"
6 unsigned long __dummy0, __dummy1; 6#else
7 7#include "irqflags_64.h"
8 __asm__ __volatile__ (
9 "stc sr, %0\n\t"
10 "and %1, %0\n\t"
11#ifdef CONFIG_CPU_HAS_SR_RB
12 "stc r6_bank, %1\n\t"
13 "or %1, %0\n\t"
14#endif 8#endif
15 "ldc %0, sr\n\t"
16 : "=&r" (__dummy0), "=r" (__dummy1)
17 : "1" (~0x000000f0)
18 : "memory"
19 );
20}
21
22static inline void raw_local_irq_disable(void)
23{
24 unsigned long flags;
25
26 __asm__ __volatile__ (
27 "stc sr, %0\n\t"
28 "or #0xf0, %0\n\t"
29 "ldc %0, sr\n\t"
30 : "=&z" (flags)
31 : /* no inputs */
32 : "memory"
33 );
34}
35
36static inline void set_bl_bit(void)
37{
38 unsigned long __dummy0, __dummy1;
39
40 __asm__ __volatile__ (
41 "stc sr, %0\n\t"
42 "or %2, %0\n\t"
43 "and %3, %0\n\t"
44 "ldc %0, sr\n\t"
45 : "=&r" (__dummy0), "=r" (__dummy1)
46 : "r" (0x10000000), "r" (0xffffff0f)
47 : "memory"
48 );
49}
50
51static inline void clear_bl_bit(void)
52{
53 unsigned long __dummy0, __dummy1;
54
55 __asm__ __volatile__ (
56 "stc sr, %0\n\t"
57 "and %2, %0\n\t"
58 "ldc %0, sr\n\t"
59 : "=&r" (__dummy0), "=r" (__dummy1)
60 : "1" (~0x10000000)
61 : "memory"
62 );
63}
64
65static inline unsigned long __raw_local_save_flags(void)
66{
67 unsigned long flags;
68
69 __asm__ __volatile__ (
70 "stc sr, %0\n\t"
71 "and #0xf0, %0\n\t"
72 : "=&z" (flags)
73 : /* no inputs */
74 : "memory"
75 );
76
77 return flags;
78}
79 9
80#define raw_local_save_flags(flags) \ 10#define raw_local_save_flags(flags) \
81 do { (flags) = __raw_local_save_flags(); } while (0) 11 do { (flags) = __raw_local_save_flags(); } while (0)
@@ -92,25 +22,6 @@ static inline int raw_irqs_disabled(void)
92 return raw_irqs_disabled_flags(flags); 22 return raw_irqs_disabled_flags(flags);
93} 23}
94 24
95static inline unsigned long __raw_local_irq_save(void)
96{
97 unsigned long flags, __dummy;
98
99 __asm__ __volatile__ (
100 "stc sr, %1\n\t"
101 "mov %1, %0\n\t"
102 "or #0xf0, %0\n\t"
103 "ldc %0, sr\n\t"
104 "mov %1, %0\n\t"
105 "and #0xf0, %0\n\t"
106 : "=&z" (flags), "=&r" (__dummy)
107 : /* no inputs */
108 : "memory"
109 );
110
111 return flags;
112}
113
114#define raw_local_irq_save(flags) \ 25#define raw_local_irq_save(flags) \
115 do { (flags) = __raw_local_irq_save(); } while (0) 26 do { (flags) = __raw_local_irq_save(); } while (0)
116 27
diff --git a/include/asm-sh/irqflags_32.h b/include/asm-sh/irqflags_32.h
new file mode 100644
index 000000000000..60218f541340
--- /dev/null
+++ b/include/asm-sh/irqflags_32.h
@@ -0,0 +1,99 @@
1#ifndef __ASM_SH_IRQFLAGS_32_H
2#define __ASM_SH_IRQFLAGS_32_H
3
4static inline void raw_local_irq_enable(void)
5{
6 unsigned long __dummy0, __dummy1;
7
8 __asm__ __volatile__ (
9 "stc sr, %0\n\t"
10 "and %1, %0\n\t"
11#ifdef CONFIG_CPU_HAS_SR_RB
12 "stc r6_bank, %1\n\t"
13 "or %1, %0\n\t"
14#endif
15 "ldc %0, sr\n\t"
16 : "=&r" (__dummy0), "=r" (__dummy1)
17 : "1" (~0x000000f0)
18 : "memory"
19 );
20}
21
22static inline void raw_local_irq_disable(void)
23{
24 unsigned long flags;
25
26 __asm__ __volatile__ (
27 "stc sr, %0\n\t"
28 "or #0xf0, %0\n\t"
29 "ldc %0, sr\n\t"
30 : "=&z" (flags)
31 : /* no inputs */
32 : "memory"
33 );
34}
35
36static inline void set_bl_bit(void)
37{
38 unsigned long __dummy0, __dummy1;
39
40 __asm__ __volatile__ (
41 "stc sr, %0\n\t"
42 "or %2, %0\n\t"
43 "and %3, %0\n\t"
44 "ldc %0, sr\n\t"
45 : "=&r" (__dummy0), "=r" (__dummy1)
46 : "r" (0x10000000), "r" (0xffffff0f)
47 : "memory"
48 );
49}
50
51static inline void clear_bl_bit(void)
52{
53 unsigned long __dummy0, __dummy1;
54
55 __asm__ __volatile__ (
56 "stc sr, %0\n\t"
57 "and %2, %0\n\t"
58 "ldc %0, sr\n\t"
59 : "=&r" (__dummy0), "=r" (__dummy1)
60 : "1" (~0x10000000)
61 : "memory"
62 );
63}
64
65static inline unsigned long __raw_local_save_flags(void)
66{
67 unsigned long flags;
68
69 __asm__ __volatile__ (
70 "stc sr, %0\n\t"
71 "and #0xf0, %0\n\t"
72 : "=&z" (flags)
73 : /* no inputs */
74 : "memory"
75 );
76
77 return flags;
78}
79
80static inline unsigned long __raw_local_irq_save(void)
81{
82 unsigned long flags, __dummy;
83
84 __asm__ __volatile__ (
85 "stc sr, %1\n\t"
86 "mov %1, %0\n\t"
87 "or #0xf0, %0\n\t"
88 "ldc %0, sr\n\t"
89 "mov %1, %0\n\t"
90 "and #0xf0, %0\n\t"
91 : "=&z" (flags), "=&r" (__dummy)
92 : /* no inputs */
93 : "memory"
94 );
95
96 return flags;
97}
98
99#endif /* __ASM_SH_IRQFLAGS_32_H */
diff --git a/include/asm-sh/irqflags_64.h b/include/asm-sh/irqflags_64.h
new file mode 100644
index 000000000000..4f6b8a56e7bd
--- /dev/null
+++ b/include/asm-sh/irqflags_64.h
@@ -0,0 +1,85 @@
1#ifndef __ASM_SH_IRQFLAGS_64_H
2#define __ASM_SH_IRQFLAGS_64_H
3
4#include <asm/cpu/registers.h>
5
6#define SR_MASK_LL 0x00000000000000f0LL
7#define SR_BL_LL 0x0000000010000000LL
8
9static inline void raw_local_irq_enable(void)
10{
11 unsigned long long __dummy0, __dummy1 = ~SR_MASK_LL;
12
13 __asm__ __volatile__("getcon " __SR ", %0\n\t"
14 "and %0, %1, %0\n\t"
15 "putcon %0, " __SR "\n\t"
16 : "=&r" (__dummy0)
17 : "r" (__dummy1));
18}
19
20static inline void raw_local_irq_disable(void)
21{
22 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
23
24 __asm__ __volatile__("getcon " __SR ", %0\n\t"
25 "or %0, %1, %0\n\t"
26 "putcon %0, " __SR "\n\t"
27 : "=&r" (__dummy0)
28 : "r" (__dummy1));
29}
30
31static inline void set_bl_bit(void)
32{
33 unsigned long long __dummy0, __dummy1 = SR_BL_LL;
34
35 __asm__ __volatile__("getcon " __SR ", %0\n\t"
36 "or %0, %1, %0\n\t"
37 "putcon %0, " __SR "\n\t"
38 : "=&r" (__dummy0)
39 : "r" (__dummy1));
40
41}
42
43static inline void clear_bl_bit(void)
44{
45 unsigned long long __dummy0, __dummy1 = ~SR_BL_LL;
46
47 __asm__ __volatile__("getcon " __SR ", %0\n\t"
48 "and %0, %1, %0\n\t"
49 "putcon %0, " __SR "\n\t"
50 : "=&r" (__dummy0)
51 : "r" (__dummy1));
52}
53
54static inline unsigned long __raw_local_save_flags(void)
55{
56 unsigned long long __dummy = SR_MASK_LL;
57 unsigned long flags;
58
59 __asm__ __volatile__ (
60 "getcon " __SR ", %0\n\t"
61 "and %0, %1, %0"
62 : "=&r" (flags)
63 : "r" (__dummy));
64
65 return flags;
66}
67
68static inline unsigned long __raw_local_irq_save(void)
69{
70 unsigned long long __dummy0, __dummy1 = SR_MASK_LL;
71 unsigned long flags;
72
73 __asm__ __volatile__ (
74 "getcon " __SR ", %1\n\t"
75 "or %1, r63, %0\n\t"
76 "or %1, %2, %1\n\t"
77 "putcon %1, " __SR "\n\t"
78 "and %0, %2, %0"
79 : "=&r" (flags), "=&r" (__dummy0)
80 : "r" (__dummy1));
81
82 return flags;
83}
84
85#endif /* __ASM_SH_IRQFLAGS_64_H */
diff --git a/include/asm-sh/machvec.h b/include/asm-sh/machvec.h
index 088698bacf2f..ddb18ad23303 100644
--- a/include/asm-sh/machvec.h
+++ b/include/asm-sh/machvec.h
@@ -56,9 +56,6 @@ struct sh_machine_vector {
56 56
57 void (*mv_heartbeat)(void); 57 void (*mv_heartbeat)(void);
58 58
59 void *(*mv_consistent_alloc)(struct device *, size_t, dma_addr_t *, gfp_t);
60 int (*mv_consistent_free)(struct device *, size_t, void *, dma_addr_t);
61
62 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size); 59 void __iomem *(*mv_ioport_map)(unsigned long port, unsigned int size);
63 void (*mv_ioport_unmap)(void __iomem *); 60 void (*mv_ioport_unmap)(void __iomem *);
64}; 61};
diff --git a/include/asm-sh/microdev.h b/include/asm-sh/microdev.h
index 018332a9e590..1aed15856e11 100644
--- a/include/asm-sh/microdev.h
+++ b/include/asm-sh/microdev.h
@@ -17,7 +17,7 @@ extern void microdev_print_fpga_intc_status(void);
17/* 17/*
18 * The following are useful macros for manipulating the interrupt 18 * The following are useful macros for manipulating the interrupt
19 * controller (INTC) on the CPU-board FPGA. should be noted that there 19 * controller (INTC) on the CPU-board FPGA. should be noted that there
20 * is an INTC on the FPGA, and a seperate INTC on the SH4-202 core - 20 * is an INTC on the FPGA, and a separate INTC on the SH4-202 core -
21 * these are two different things, both of which need to be prorammed to 21 * these are two different things, both of which need to be prorammed to
22 * correctly route - unfortunately, they have the same name and 22 * correctly route - unfortunately, they have the same name and
23 * abbreviations! 23 * abbreviations!
@@ -25,7 +25,7 @@ extern void microdev_print_fpga_intc_status(void);
25#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */ 25#define MICRODEV_FPGA_INTC_BASE 0xa6110000ul /* INTC base address on CPU-board FPGA */
26#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */ 26#define MICRODEV_FPGA_INTENB_REG (MICRODEV_FPGA_INTC_BASE+0ul) /* Interrupt Enable Register on INTC on CPU-board FPGA */
27#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */ 27#define MICRODEV_FPGA_INTDSB_REG (MICRODEV_FPGA_INTC_BASE+8ul) /* Interrupt Disable Register on INTC on CPU-board FPGA */
28#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interupt mask to enable/disable INTC in CPU-board FPGA */ 28#define MICRODEV_FPGA_INTC_MASK(n) (1ul<<(n)) /* Interrupt mask to enable/disable INTC in CPU-board FPGA */
29#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */ 29#define MICRODEV_FPGA_INTPRI_REG(n) (MICRODEV_FPGA_INTC_BASE+0x10+((n)/8)*8)/* Interrupt Priority Register on INTC on CPU-board FPGA */
30#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */ 30#define MICRODEV_FPGA_INTPRI_LEVEL(n,x) ((x)<<(((n)%8)*4)) /* MICRODEV_FPGA_INTPRI_LEVEL(int_number, int_level) */
31#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */ 31#define MICRODEV_FPGA_INTPRI_MASK(n) (MICRODEV_FPGA_INTPRI_LEVEL((n),0xful)) /* Interrupt Priority Mask on INTC on CPU-board FPGA */
diff --git a/include/asm-sh/mmu_context.h b/include/asm-sh/mmu_context.h
index 199662bb35c6..fe58d00b250c 100644
--- a/include/asm-sh/mmu_context.h
+++ b/include/asm-sh/mmu_context.h
@@ -1,13 +1,13 @@
1/* 1/*
2 * Copyright (C) 1999 Niibe Yutaka 2 * Copyright (C) 1999 Niibe Yutaka
3 * Copyright (C) 2003 - 2006 Paul Mundt 3 * Copyright (C) 2003 - 2007 Paul Mundt
4 * 4 *
5 * ASID handling idea taken from MIPS implementation. 5 * ASID handling idea taken from MIPS implementation.
6 */ 6 */
7#ifndef __ASM_SH_MMU_CONTEXT_H 7#ifndef __ASM_SH_MMU_CONTEXT_H
8#define __ASM_SH_MMU_CONTEXT_H 8#define __ASM_SH_MMU_CONTEXT_H
9#ifdef __KERNEL__
10 9
10#ifdef __KERNEL__
11#include <asm/cpu/mmu_context.h> 11#include <asm/cpu/mmu_context.h>
12#include <asm/tlbflush.h> 12#include <asm/tlbflush.h>
13#include <asm/uaccess.h> 13#include <asm/uaccess.h>
@@ -19,7 +19,6 @@
19 * (a) TLB cache version (or round, cycle whatever expression you like) 19 * (a) TLB cache version (or round, cycle whatever expression you like)
20 * (b) ASID (Address Space IDentifier) 20 * (b) ASID (Address Space IDentifier)
21 */ 21 */
22
23#define MMU_CONTEXT_ASID_MASK 0x000000ff 22#define MMU_CONTEXT_ASID_MASK 0x000000ff
24#define MMU_CONTEXT_VERSION_MASK 0xffffff00 23#define MMU_CONTEXT_VERSION_MASK 0xffffff00
25#define MMU_CONTEXT_FIRST_VERSION 0x00000100 24#define MMU_CONTEXT_FIRST_VERSION 0x00000100
@@ -28,10 +27,11 @@
28/* ASID is 8-bit value, so it can't be 0x100 */ 27/* ASID is 8-bit value, so it can't be 0x100 */
29#define MMU_NO_ASID 0x100 28#define MMU_NO_ASID 0x100
30 29
31#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
32#define cpu_asid(cpu, mm) (cpu_context((cpu), (mm)) & \
33 MMU_CONTEXT_ASID_MASK)
34#define asid_cache(cpu) (cpu_data[cpu].asid_cache) 30#define asid_cache(cpu) (cpu_data[cpu].asid_cache)
31#define cpu_context(cpu, mm) ((mm)->context.id[cpu])
32
33#define cpu_asid(cpu, mm) \
34 (cpu_context((cpu), (mm)) & MMU_CONTEXT_ASID_MASK)
35 35
36/* 36/*
37 * Virtual Page Number mask 37 * Virtual Page Number mask
@@ -39,6 +39,12 @@
39#define MMU_VPN_MASK 0xfffff000 39#define MMU_VPN_MASK 0xfffff000
40 40
41#ifdef CONFIG_MMU 41#ifdef CONFIG_MMU
42#if defined(CONFIG_SUPERH32)
43#include "mmu_context_32.h"
44#else
45#include "mmu_context_64.h"
46#endif
47
42/* 48/*
43 * Get MMU context if needed. 49 * Get MMU context if needed.
44 */ 50 */
@@ -59,6 +65,14 @@ static inline void get_mmu_context(struct mm_struct *mm, unsigned int cpu)
59 */ 65 */
60 flush_tlb_all(); 66 flush_tlb_all();
61 67
68#ifdef CONFIG_SUPERH64
69 /*
70 * The SH-5 cache uses the ASIDs, requiring both the I and D
71 * cache to be flushed when the ASID is exhausted. Weak.
72 */
73 flush_cache_all();
74#endif
75
62 /* 76 /*
63 * Fix version; Note that we avoid version #0 77 * Fix version; Note that we avoid version #0
64 * to distingush NO_CONTEXT. 78 * to distingush NO_CONTEXT.
@@ -86,39 +100,6 @@ static inline int init_new_context(struct task_struct *tsk,
86} 100}
87 101
88/* 102/*
89 * Destroy context related info for an mm_struct that is about
90 * to be put to rest.
91 */
92static inline void destroy_context(struct mm_struct *mm)
93{
94 /* Do nothing */
95}
96
97static inline void set_asid(unsigned long asid)
98{
99 unsigned long __dummy;
100
101 __asm__ __volatile__ ("mov.l %2, %0\n\t"
102 "and %3, %0\n\t"
103 "or %1, %0\n\t"
104 "mov.l %0, %2"
105 : "=&r" (__dummy)
106 : "r" (asid), "m" (__m(MMU_PTEH)),
107 "r" (0xffffff00));
108}
109
110static inline unsigned long get_asid(void)
111{
112 unsigned long asid;
113
114 __asm__ __volatile__ ("mov.l %1, %0"
115 : "=r" (asid)
116 : "m" (__m(MMU_PTEH)));
117 asid &= MMU_CONTEXT_ASID_MASK;
118 return asid;
119}
120
121/*
122 * After we have set current->mm to a new value, this activates 103 * After we have set current->mm to a new value, this activates
123 * the context for the new mm so we see the new mappings. 104 * the context for the new mm so we see the new mappings.
124 */ 105 */
@@ -128,17 +109,6 @@ static inline void activate_context(struct mm_struct *mm, unsigned int cpu)
128 set_asid(cpu_asid(cpu, mm)); 109 set_asid(cpu_asid(cpu, mm));
129} 110}
130 111
131/* MMU_TTB is used for optimizing the fault handling. */
132static inline void set_TTB(pgd_t *pgd)
133{
134 ctrl_outl((unsigned long)pgd, MMU_TTB);
135}
136
137static inline pgd_t *get_TTB(void)
138{
139 return (pgd_t *)ctrl_inl(MMU_TTB);
140}
141
142static inline void switch_mm(struct mm_struct *prev, 112static inline void switch_mm(struct mm_struct *prev,
143 struct mm_struct *next, 113 struct mm_struct *next,
144 struct task_struct *tsk) 114 struct task_struct *tsk)
@@ -153,17 +123,7 @@ static inline void switch_mm(struct mm_struct *prev,
153 if (!cpu_test_and_set(cpu, next->cpu_vm_mask)) 123 if (!cpu_test_and_set(cpu, next->cpu_vm_mask))
154 activate_context(next, cpu); 124 activate_context(next, cpu);
155} 125}
156 126#else
157#define deactivate_mm(tsk,mm) do { } while (0)
158
159#define activate_mm(prev, next) \
160 switch_mm((prev),(next),NULL)
161
162static inline void
163enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
164{
165}
166#else /* !CONFIG_MMU */
167#define get_mmu_context(mm) do { } while (0) 127#define get_mmu_context(mm) do { } while (0)
168#define init_new_context(tsk,mm) (0) 128#define init_new_context(tsk,mm) (0)
169#define destroy_context(mm) do { } while (0) 129#define destroy_context(mm) do { } while (0)
@@ -173,10 +133,11 @@ enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
173#define get_TTB() (0) 133#define get_TTB() (0)
174#define activate_context(mm,cpu) do { } while (0) 134#define activate_context(mm,cpu) do { } while (0)
175#define switch_mm(prev,next,tsk) do { } while (0) 135#define switch_mm(prev,next,tsk) do { } while (0)
136#endif /* CONFIG_MMU */
137
138#define activate_mm(prev, next) switch_mm((prev),(next),NULL)
176#define deactivate_mm(tsk,mm) do { } while (0) 139#define deactivate_mm(tsk,mm) do { } while (0)
177#define activate_mm(prev,next) do { } while (0)
178#define enter_lazy_tlb(mm,tsk) do { } while (0) 140#define enter_lazy_tlb(mm,tsk) do { } while (0)
179#endif /* CONFIG_MMU */
180 141
181#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4) 142#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4)
182/* 143/*
diff --git a/include/asm-sh/mmu_context_32.h b/include/asm-sh/mmu_context_32.h
new file mode 100644
index 000000000000..f4f9aebd68b7
--- /dev/null
+++ b/include/asm-sh/mmu_context_32.h
@@ -0,0 +1,47 @@
1#ifndef __ASM_SH_MMU_CONTEXT_32_H
2#define __ASM_SH_MMU_CONTEXT_32_H
3
4/*
5 * Destroy context related info for an mm_struct that is about
6 * to be put to rest.
7 */
8static inline void destroy_context(struct mm_struct *mm)
9{
10 /* Do nothing */
11}
12
13static inline void set_asid(unsigned long asid)
14{
15 unsigned long __dummy;
16
17 __asm__ __volatile__ ("mov.l %2, %0\n\t"
18 "and %3, %0\n\t"
19 "or %1, %0\n\t"
20 "mov.l %0, %2"
21 : "=&r" (__dummy)
22 : "r" (asid), "m" (__m(MMU_PTEH)),
23 "r" (0xffffff00));
24}
25
26static inline unsigned long get_asid(void)
27{
28 unsigned long asid;
29
30 __asm__ __volatile__ ("mov.l %1, %0"
31 : "=r" (asid)
32 : "m" (__m(MMU_PTEH)));
33 asid &= MMU_CONTEXT_ASID_MASK;
34 return asid;
35}
36
37/* MMU_TTB is used for optimizing the fault handling. */
38static inline void set_TTB(pgd_t *pgd)
39{
40 ctrl_outl((unsigned long)pgd, MMU_TTB);
41}
42
43static inline pgd_t *get_TTB(void)
44{
45 return (pgd_t *)ctrl_inl(MMU_TTB);
46}
47#endif /* __ASM_SH_MMU_CONTEXT_32_H */
diff --git a/include/asm-sh/mmu_context_64.h b/include/asm-sh/mmu_context_64.h
new file mode 100644
index 000000000000..020be744b088
--- /dev/null
+++ b/include/asm-sh/mmu_context_64.h
@@ -0,0 +1,75 @@
1#ifndef __ASM_SH_MMU_CONTEXT_64_H
2#define __ASM_SH_MMU_CONTEXT_64_H
3
4/*
5 * sh64-specific mmu_context interface.
6 *
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 * Copyright (C) 2003 - 2007 Paul Mundt
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <asm/cpu/registers.h>
15#include <asm/cacheflush.h>
16
17#define SR_ASID_MASK 0xffffffffff00ffffULL
18#define SR_ASID_SHIFT 16
19
20/*
21 * Destroy context related info for an mm_struct that is about
22 * to be put to rest.
23 */
24static inline void destroy_context(struct mm_struct *mm)
25{
26 /* Well, at least free TLB entries */
27 flush_tlb_mm(mm);
28}
29
30static inline unsigned long get_asid(void)
31{
32 unsigned long long sr;
33
34 asm volatile ("getcon " __SR ", %0\n\t"
35 : "=r" (sr));
36
37 sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
38 return (unsigned long) sr;
39}
40
41/* Set ASID into SR */
42static inline void set_asid(unsigned long asid)
43{
44 unsigned long long sr, pc;
45
46 asm volatile ("getcon " __SR ", %0" : "=r" (sr));
47
48 sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
49
50 /*
51 * It is possible that this function may be inlined and so to avoid
52 * the assembler reporting duplicate symbols we make use of the
53 * gas trick of generating symbols using numerics and forward
54 * reference.
55 */
56 asm volatile ("movi 1, %1\n\t"
57 "shlli %1, 28, %1\n\t"
58 "or %0, %1, %1\n\t"
59 "putcon %1, " __SR "\n\t"
60 "putcon %0, " __SSR "\n\t"
61 "movi 1f, %1\n\t"
62 "ori %1, 1 , %1\n\t"
63 "putcon %1, " __SPC "\n\t"
64 "rte\n"
65 "1:\n\t"
66 : "=r" (sr), "=r" (pc) : "0" (sr));
67}
68
69/* No spare register to twiddle, so use a software cache */
70extern pgd_t *mmu_pdtp_cache;
71
72#define set_TTB(pgd) (mmu_pdtp_cache = (pgd))
73#define get_TTB() (mmu_pdtp_cache)
74
75#endif /* __ASM_SH_MMU_CONTEXT_64_H */
diff --git a/include/asm-sh/module.h b/include/asm-sh/module.h
index 118d5a2b228f..46eccd331660 100644
--- a/include/asm-sh/module.h
+++ b/include/asm-sh/module.h
@@ -20,6 +20,8 @@ struct mod_arch_specific {
20# define MODULE_PROC_FAMILY "SH3LE " 20# define MODULE_PROC_FAMILY "SH3LE "
21# elif defined CONFIG_CPU_SH4 21# elif defined CONFIG_CPU_SH4
22# define MODULE_PROC_FAMILY "SH4LE " 22# define MODULE_PROC_FAMILY "SH4LE "
23# elif defined CONFIG_CPU_SH5
24# define MODULE_PROC_FAMILY "SH5LE "
23# else 25# else
24# error unknown processor family 26# error unknown processor family
25# endif 27# endif
@@ -30,6 +32,8 @@ struct mod_arch_specific {
30# define MODULE_PROC_FAMILY "SH3BE " 32# define MODULE_PROC_FAMILY "SH3BE "
31# elif defined CONFIG_CPU_SH4 33# elif defined CONFIG_CPU_SH4
32# define MODULE_PROC_FAMILY "SH4BE " 34# define MODULE_PROC_FAMILY "SH4BE "
35# elif defined CONFIG_CPU_SH5
36# define MODULE_PROC_FAMILY "SH5BE "
33# else 37# else
34# error unknown processor family 38# error unknown processor family
35# endif 39# endif
diff --git a/include/asm-sh/page.h b/include/asm-sh/page.h
index d00a8fde7c7f..002e64a4f049 100644
--- a/include/asm-sh/page.h
+++ b/include/asm-sh/page.h
@@ -5,13 +5,7 @@
5 * Copyright (C) 1999 Niibe Yutaka 5 * Copyright (C) 1999 Niibe Yutaka
6 */ 6 */
7 7
8/* 8#include <linux/const.h>
9 [ P0/U0 (virtual) ] 0x00000000 <------ User space
10 [ P1 (fixed) cached ] 0x80000000 <------ Kernel space
11 [ P2 (fixed) non-cachable] 0xA0000000 <------ Physical access
12 [ P3 (virtual) cached] 0xC0000000 <------ vmalloced area
13 [ P4 control ] 0xE0000000
14 */
15 9
16#ifdef __KERNEL__ 10#ifdef __KERNEL__
17 11
@@ -26,15 +20,13 @@
26# error "Bogus kernel page size?" 20# error "Bogus kernel page size?"
27#endif 21#endif
28 22
29#ifdef __ASSEMBLY__ 23#define PAGE_SIZE (_AC(1, UL) << PAGE_SHIFT)
30#define PAGE_SIZE (1 << PAGE_SHIFT)
31#else
32#define PAGE_SIZE (1UL << PAGE_SHIFT)
33#endif
34
35#define PAGE_MASK (~(PAGE_SIZE-1)) 24#define PAGE_MASK (~(PAGE_SIZE-1))
36#define PTE_MASK PAGE_MASK 25#define PTE_MASK PAGE_MASK
37 26
27/* to align the pointer to the (next) page boundary */
28#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
29
38#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 30#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
39#define HPAGE_SHIFT 16 31#define HPAGE_SHIFT 16
40#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K) 32#elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
@@ -45,6 +37,8 @@
45#define HPAGE_SHIFT 22 37#define HPAGE_SHIFT 22
46#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB) 38#elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
47#define HPAGE_SHIFT 26 39#define HPAGE_SHIFT 26
40#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB)
41#define HPAGE_SHIFT 29
48#endif 42#endif
49 43
50#ifdef CONFIG_HUGETLB_PAGE 44#ifdef CONFIG_HUGETLB_PAGE
@@ -55,20 +49,12 @@
55 49
56#ifndef __ASSEMBLY__ 50#ifndef __ASSEMBLY__
57 51
58extern void (*clear_page)(void *to);
59extern void (*copy_page)(void *to, void *from);
60
61extern unsigned long shm_align_mask; 52extern unsigned long shm_align_mask;
62extern unsigned long max_low_pfn, min_low_pfn; 53extern unsigned long max_low_pfn, min_low_pfn;
63extern unsigned long memory_start, memory_end; 54extern unsigned long memory_start, memory_end;
64 55
65#ifdef CONFIG_MMU 56extern void clear_page(void *to);
66extern void clear_page_slow(void *to); 57extern void copy_page(void *to, void *from);
67extern void copy_page_slow(void *to, void *from);
68#else
69extern void clear_page_nommu(void *to);
70extern void copy_page_nommu(void *to, void *from);
71#endif
72 58
73#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \ 59#if !defined(CONFIG_CACHE_OFF) && defined(CONFIG_MMU) && \
74 (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB)) 60 (defined(CONFIG_CPU_SH4) || defined(CONFIG_SH7705_CACHE_32KB))
@@ -96,12 +82,18 @@ typedef struct { unsigned long long pgd; } pgd_t;
96 ((x).pte_low | ((unsigned long long)(x).pte_high << 32)) 82 ((x).pte_low | ((unsigned long long)(x).pte_high << 32))
97#define __pte(x) \ 83#define __pte(x) \
98 ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; }) 84 ({ pte_t __pte = {(x), ((unsigned long long)(x)) >> 32}; __pte; })
99#else 85#elif defined(CONFIG_SUPERH32)
100typedef struct { unsigned long pte_low; } pte_t; 86typedef struct { unsigned long pte_low; } pte_t;
101typedef struct { unsigned long pgprot; } pgprot_t; 87typedef struct { unsigned long pgprot; } pgprot_t;
102typedef struct { unsigned long pgd; } pgd_t; 88typedef struct { unsigned long pgd; } pgd_t;
103#define pte_val(x) ((x).pte_low) 89#define pte_val(x) ((x).pte_low)
104#define __pte(x) ((pte_t) { (x) } ) 90#define __pte(x) ((pte_t) { (x) } )
91#else
92typedef struct { unsigned long long pte_low; } pte_t;
93typedef struct { unsigned long pgprot; } pgprot_t;
94typedef struct { unsigned long pgd; } pgd_t;
95#define pte_val(x) ((x).pte_low)
96#define __pte(x) ((pte_t) { (x) } )
105#endif 97#endif
106 98
107#define pgd_val(x) ((x).pgd) 99#define pgd_val(x) ((x).pgd)
@@ -112,28 +104,44 @@ typedef struct { unsigned long pgd; } pgd_t;
112 104
113#endif /* !__ASSEMBLY__ */ 105#endif /* !__ASSEMBLY__ */
114 106
115/* to align the pointer to the (next) page boundary */
116#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
117
118/* 107/*
119 * IF YOU CHANGE THIS, PLEASE ALSO CHANGE 108 * __MEMORY_START and SIZE are the physical addresses and size of RAM.
120 *
121 * arch/sh/kernel/vmlinux.lds.S
122 *
123 * which has the same constant encoded..
124 */ 109 */
125
126#define __MEMORY_START CONFIG_MEMORY_START 110#define __MEMORY_START CONFIG_MEMORY_START
127#define __MEMORY_SIZE CONFIG_MEMORY_SIZE 111#define __MEMORY_SIZE CONFIG_MEMORY_SIZE
128 112
113/*
114 * PAGE_OFFSET is the virtual address of the start of kernel address
115 * space.
116 */
129#define PAGE_OFFSET CONFIG_PAGE_OFFSET 117#define PAGE_OFFSET CONFIG_PAGE_OFFSET
130#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
131#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
132#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
133 118
119/*
120 * Virtual to physical RAM address translation.
121 *
122 * In 29 bit mode, the physical offset of RAM from address 0 is visible in
123 * the kernel virtual address space, and thus we don't have to take
124 * this into account when translating. However in 32 bit mode this offset
125 * is not visible (it is part of the PMB mapping) and so needs to be
126 * added or subtracted as required.
127 */
128#ifdef CONFIG_32BIT
129#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET+__MEMORY_START)
130#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET-__MEMORY_START))
131#else
132#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
133#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
134#endif
135
136#define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT)
134#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT) 137#define page_to_phys(page) (page_to_pfn(page) << PAGE_SHIFT)
135 138
136/* PFN start number, because of __MEMORY_START */ 139/*
140 * PFN = physical frame number (ie PFN 0 == physical address 0)
141 * PFN_START is the PFN of the first page of RAM. By defining this we
142 * don't have struct page entries for the portion of address space
143 * between physical address 0 and the start of RAM.
144 */
137#define PFN_START (__MEMORY_START >> PAGE_SHIFT) 145#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
138#define ARCH_PFN_OFFSET (PFN_START) 146#define ARCH_PFN_OFFSET (PFN_START)
139#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) 147#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
@@ -154,11 +162,21 @@ typedef struct { unsigned long pgd; } pgd_t;
154#endif 162#endif
155 163
156/* 164/*
157 * Slub defaults to 8-byte alignment, we're only interested in 4. 165 * Some drivers need to perform DMA into kmalloc'ed buffers
158 * Slab defaults to BYTES_PER_WORD, which ends up being the same anyways. 166 * and so we have to increase the kmalloc minalign for this.
159 */ 167 */
160#define ARCH_KMALLOC_MINALIGN 4 168#define ARCH_KMALLOC_MINALIGN L1_CACHE_BYTES
161#define ARCH_SLAB_MINALIGN 4 169
170#ifdef CONFIG_SUPERH64
171/*
172 * While BYTES_PER_WORD == 4 on the current sh64 ABI, GCC will still
173 * happily generate {ld/st}.q pairs, requiring us to have 8-byte
174 * alignment to avoid traps. The kmalloc alignment is gauranteed by
175 * virtue of L1_CACHE_BYTES, requiring this to only be special cased
176 * for slab caches.
177 */
178#define ARCH_SLAB_MINALIGN 8
179#endif
162 180
163#endif /* __KERNEL__ */ 181#endif /* __KERNEL__ */
164#endif /* __ASM_SH_PAGE_H */ 182#endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/param.h b/include/asm-sh/param.h
index 1012296e07ab..ae245afdfd6a 100644
--- a/include/asm-sh/param.h
+++ b/include/asm-sh/param.h
@@ -2,11 +2,7 @@
2#define __ASM_SH_PARAM_H 2#define __ASM_SH_PARAM_H
3 3
4#ifdef __KERNEL__ 4#ifdef __KERNEL__
5# ifdef CONFIG_SH_WDT 5# define HZ CONFIG_HZ
6# define HZ 1000 /* Needed for high-res WOVF */
7# else
8# define HZ CONFIG_HZ
9# endif
10# define USER_HZ 100 /* User interfaces are in "ticks" */ 6# define USER_HZ 100 /* User interfaces are in "ticks" */
11# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ 7# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
12#endif 8#endif
diff --git a/include/asm-sh/pci.h b/include/asm-sh/pci.h
index 2757ce096ff7..df1d383e18a5 100644
--- a/include/asm-sh/pci.h
+++ b/include/asm-sh/pci.h
@@ -38,9 +38,12 @@ extern struct pci_channel board_pci_channels[];
38#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785) 38#if defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
39#define PCI_IO_AREA 0xFE400000 39#define PCI_IO_AREA 0xFE400000
40#define PCI_IO_SIZE 0x00400000 40#define PCI_IO_SIZE 0x00400000
41#elif defined(CONFIG_CPU_SH5)
42extern unsigned long PCI_IO_AREA;
43#define PCI_IO_SIZE 0x00010000
41#else 44#else
42#define PCI_IO_AREA 0xFE240000 45#define PCI_IO_AREA 0xFE240000
43#define PCI_IO_SIZE 0X00040000 46#define PCI_IO_SIZE 0x00040000
44#endif 47#endif
45 48
46#define PCI_MEM_SIZE 0x01000000 49#define PCI_MEM_SIZE 0x01000000
diff --git a/include/asm-sh/pgtable.h b/include/asm-sh/pgtable.h
index 8f1e8be8d15d..a4a8f8b93463 100644
--- a/include/asm-sh/pgtable.h
+++ b/include/asm-sh/pgtable.h
@@ -3,7 +3,7 @@
3 * use the SuperH page table tree. 3 * use the SuperH page table tree.
4 * 4 *
5 * Copyright (C) 1999 Niibe Yutaka 5 * Copyright (C) 1999 Niibe Yutaka
6 * Copyright (C) 2002 - 2005 Paul Mundt 6 * Copyright (C) 2002 - 2007 Paul Mundt
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General 8 * This file is subject to the terms and conditions of the GNU General
9 * Public License. See the file "COPYING" in the main directory of this 9 * Public License. See the file "COPYING" in the main directory of this
@@ -29,10 +29,27 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
29#endif /* !__ASSEMBLY__ */ 29#endif /* !__ASSEMBLY__ */
30 30
31/* 31/*
32 * Effective and physical address definitions, to aid with sign
33 * extension.
34 */
35#define NEFF 32
36#define NEFF_SIGN (1LL << (NEFF - 1))
37#define NEFF_MASK (-1LL << NEFF)
38
39#ifdef CONFIG_29BIT
40#define NPHYS 29
41#else
42#define NPHYS 32
43#endif
44
45#define NPHYS_SIGN (1LL << (NPHYS - 1))
46#define NPHYS_MASK (-1LL << NPHYS)
47
48/*
32 * traditional two-level paging structure 49 * traditional two-level paging structure
33 */ 50 */
34/* PTE bits */ 51/* PTE bits */
35#ifdef CONFIG_X2TLB 52#if defined(CONFIG_X2TLB) || defined(CONFIG_SUPERH64)
36# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */ 53# define PTE_MAGNITUDE 3 /* 64-bit PTEs on extended mode SH-X2 TLB */
37#else 54#else
38# define PTE_MAGNITUDE 2 /* 32-bit PTEs */ 55# define PTE_MAGNITUDE 2 /* 32-bit PTEs */
@@ -52,283 +69,27 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
52#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE) 69#define USER_PTRS_PER_PGD (TASK_SIZE/PGDIR_SIZE)
53#define FIRST_USER_ADDRESS 0 70#define FIRST_USER_ADDRESS 0
54 71
55#define PTE_PHYS_MASK (0x20000000 - PAGE_SIZE) 72#ifdef CONFIG_32BIT
56 73#define PHYS_ADDR_MASK 0xffffffff
57#define VMALLOC_START (P3SEG)
58#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
59
60/*
61 * Linux PTEL encoding.
62 *
63 * Hardware and software bit definitions for the PTEL value (see below for
64 * notes on SH-X2 MMUs and 64-bit PTEs):
65 *
66 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
67 *
68 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
69 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
70 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
71 *
72 * In order to keep this relatively clean, do not use these for defining
73 * SH-3 specific flags until all of the other unused bits have been
74 * exhausted.
75 *
76 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
77 *
78 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
79 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
80 *
81 * - Bits 31, 30, and 29 remain unused by everyone and can be used for future
82 * software flags, although care must be taken to update _PAGE_CLEAR_FLAGS.
83 *
84 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
85 *
86 * SH-X2 MMUs and extended PTEs
87 *
88 * SH-X2 supports an extended mode TLB with split data arrays due to the
89 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
90 * SZ bit placeholders still exist in data array 1, but are implemented as
91 * reserved bits, with the real logic existing in data array 2.
92 *
93 * The downside to this is that we can no longer fit everything in to a 32-bit
94 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
95 * side, this gives us quite a few spare bits to play with for future usage.
96 */
97/* Legacy and compat mode bits */
98#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
99#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
100#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
101#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
102#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
103#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
104#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
105#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
106#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
107#define _PAGE_PROTNONE 0x200 /* software: if not present */
108#define _PAGE_ACCESSED 0x400 /* software: page referenced */
109#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
110
111#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
112#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
113
114/* Extended mode bits */
115#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
116#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
117#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
118#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
119
120#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
121#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
122#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
123
124#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
125#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
126#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
127
128/* Wrapper for extended mode pgprot twiddling */
129#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
130
131/* software: moves to PTEA.TC (Timing Control) */
132#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
133#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
134
135/* software: moves to PTEA.SA[2:0] (Space Attributes) */
136#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
137#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
138#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
139#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
140#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
141#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
142#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
143
144/* Mask which drops unused bits from the PTEL value */
145#if defined(CONFIG_CPU_SH3)
146#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
147 _PAGE_FILE | _PAGE_SZ1 | \
148 _PAGE_HW_SHARED)
149#elif defined(CONFIG_X2TLB)
150/* Get rid of the legacy PR/SZ bits when using extended mode */
151#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
152 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
153#else 74#else
154#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE) 75#define PHYS_ADDR_MASK 0x1fffffff
155#endif 76#endif
156 77
157#define _PAGE_FLAGS_HARDWARE_MASK (0x1fffffff & ~(_PAGE_CLEAR_FLAGS)) 78#define PTE_PHYS_MASK (PHYS_ADDR_MASK & PAGE_MASK)
158 79
159/* Hardware flags, page size encoding */ 80#ifdef CONFIG_SUPERH32
160#if defined(CONFIG_X2TLB) 81#define VMALLOC_START (P3SEG)
161# if defined(CONFIG_PAGE_SIZE_4KB)
162# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
163# elif defined(CONFIG_PAGE_SIZE_8KB)
164# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
165# elif defined(CONFIG_PAGE_SIZE_64KB)
166# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
167# endif
168#else 82#else
169# if defined(CONFIG_PAGE_SIZE_4KB) 83#define VMALLOC_START (0xf0000000)
170# define _PAGE_FLAGS_HARD _PAGE_SZ0
171# elif defined(CONFIG_PAGE_SIZE_64KB)
172# define _PAGE_FLAGS_HARD _PAGE_SZ1
173# endif
174#endif 84#endif
85#define VMALLOC_END (FIXADDR_START-2*PAGE_SIZE)
175 86
176#if defined(CONFIG_X2TLB) 87#if defined(CONFIG_SUPERH32)
177# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 88#include <asm/pgtable_32.h>
178# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
179# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
180# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
181# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
182# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
183# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
184# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
185# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
186# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
187# endif
188#else 89#else
189# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K) 90#include <asm/pgtable_64.h>
190# define _PAGE_SZHUGE (_PAGE_SZ1)
191# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
192# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
193# endif
194#endif
195
196/*
197 * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
198 * to make pte_mkhuge() happy.
199 */
200#ifndef _PAGE_SZHUGE
201# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
202#endif
203
204#define _PAGE_CHG_MASK \
205 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
206
207#ifndef __ASSEMBLY__
208
209#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
210#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
211 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
212
213#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
214 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
215 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
216 _PAGE_EXT_KERN_WRITE | \
217 _PAGE_EXT_USER_READ | \
218 _PAGE_EXT_USER_WRITE))
219
220#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
221 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
222 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
223 _PAGE_EXT_KERN_READ | \
224 _PAGE_EXT_USER_EXEC | \
225 _PAGE_EXT_USER_READ))
226
227#define PAGE_COPY PAGE_EXECREAD
228
229#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
230 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
231 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
232 _PAGE_EXT_USER_READ))
233
234#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
235 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
236 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
237 _PAGE_EXT_USER_WRITE))
238
239#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
240 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
241 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
242 _PAGE_EXT_KERN_READ | \
243 _PAGE_EXT_KERN_EXEC | \
244 _PAGE_EXT_USER_WRITE | \
245 _PAGE_EXT_USER_READ | \
246 _PAGE_EXT_USER_EXEC))
247
248#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
249 _PAGE_DIRTY | _PAGE_ACCESSED | \
250 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
251 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
252 _PAGE_EXT_KERN_WRITE | \
253 _PAGE_EXT_KERN_EXEC))
254
255#define PAGE_KERNEL_NOCACHE \
256 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
257 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
258 _PAGE_FLAGS_HARD | \
259 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
260 _PAGE_EXT_KERN_WRITE | \
261 _PAGE_EXT_KERN_EXEC))
262
263#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
264 _PAGE_DIRTY | _PAGE_ACCESSED | \
265 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
266 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
267 _PAGE_EXT_KERN_EXEC))
268
269#define PAGE_KERNEL_PCC(slot, type) \
270 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
271 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
272 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
273 _PAGE_EXT_KERN_WRITE | \
274 _PAGE_EXT_KERN_EXEC) \
275 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
276 (type))
277
278#elif defined(CONFIG_MMU) /* SH-X TLB */
279#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
280 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
281
282#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
283 _PAGE_CACHABLE | _PAGE_ACCESSED | \
284 _PAGE_FLAGS_HARD)
285
286#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
287 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
288
289#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
290 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
291
292#define PAGE_EXECREAD PAGE_READONLY
293#define PAGE_RWX PAGE_SHARED
294#define PAGE_WRITEONLY PAGE_SHARED
295
296#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
297 _PAGE_DIRTY | _PAGE_ACCESSED | \
298 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
299
300#define PAGE_KERNEL_NOCACHE \
301 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
302 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
303 _PAGE_FLAGS_HARD)
304
305#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
306 _PAGE_DIRTY | _PAGE_ACCESSED | \
307 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
308
309#define PAGE_KERNEL_PCC(slot, type) \
310 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
311 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
312 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
313 (type))
314#else /* no mmu */
315#define PAGE_NONE __pgprot(0)
316#define PAGE_SHARED __pgprot(0)
317#define PAGE_COPY __pgprot(0)
318#define PAGE_EXECREAD __pgprot(0)
319#define PAGE_RWX __pgprot(0)
320#define PAGE_READONLY __pgprot(0)
321#define PAGE_WRITEONLY __pgprot(0)
322#define PAGE_KERNEL __pgprot(0)
323#define PAGE_KERNEL_NOCACHE __pgprot(0)
324#define PAGE_KERNEL_RO __pgprot(0)
325
326#define PAGE_KERNEL_PCC(slot, type) \
327 __pgprot(0)
328#endif 91#endif
329 92
330#endif /* __ASSEMBLY__ */
331
332/* 93/*
333 * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page 94 * SH-X and lower (legacy) SuperH parts (SH-3, SH-4, some SH-4A) can't do page
334 * protection for execute, and considers it the same as a read. Also, write 95 * protection for execute, and considers it the same as a read. Also, write
@@ -357,208 +118,6 @@ extern unsigned long empty_zero_page[PAGE_SIZE / sizeof(unsigned long)];
357#define __S110 PAGE_RWX 118#define __S110 PAGE_RWX
358#define __S111 PAGE_RWX 119#define __S111 PAGE_RWX
359 120
360#ifndef __ASSEMBLY__
361
362/*
363 * Certain architectures need to do special things when PTEs
364 * within a page table are directly modified. Thus, the following
365 * hook is made available.
366 */
367#ifdef CONFIG_X2TLB
368static inline void set_pte(pte_t *ptep, pte_t pte)
369{
370 ptep->pte_high = pte.pte_high;
371 smp_wmb();
372 ptep->pte_low = pte.pte_low;
373}
374#else
375#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
376#endif
377
378#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
379
380/*
381 * (pmds are folded into pgds so this doesn't get actually called,
382 * but the define is needed for a generic inline function.)
383 */
384#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
385
386#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
387
388#define pfn_pte(pfn, prot) \
389 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
390#define pfn_pmd(pfn, prot) \
391 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
392
393#define pte_none(x) (!pte_val(x))
394#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
395
396#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
397
398#define pmd_none(x) (!pmd_val(x))
399#define pmd_present(x) (pmd_val(x))
400#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
401#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
402
403#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
404#define pte_page(x) pfn_to_page(pte_pfn(x))
405
406/*
407 * The following only work if pte_present() is true.
408 * Undefined behaviour if not..
409 */
410#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
411#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
412#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
413#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
414
415#ifdef CONFIG_X2TLB
416#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
417#else
418#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
419#endif
420
421#define PTE_BIT_FUNC(h,fn,op) \
422static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
423
424#ifdef CONFIG_X2TLB
425/*
426 * We cheat a bit in the SH-X2 TLB case. As the permission bits are
427 * individually toggled (and user permissions are entirely decoupled from
428 * kernel permissions), we attempt to couple them a bit more sanely here.
429 */
430PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
431PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
432PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
433#else
434PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
435PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
436PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
437#endif
438
439PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
440PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
441PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
442PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
443
444/*
445 * Macro and implementation to make a page protection as uncachable.
446 */
447#define pgprot_writecombine(prot) \
448 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
449
450#define pgprot_noncached pgprot_writecombine
451
452/*
453 * Conversion functions: convert a page and protection to a page entry,
454 * and a page entry and page directory to the page they refer to.
455 *
456 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
457 */
458#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
459
460static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
461{
462 pte.pte_low &= _PAGE_CHG_MASK;
463 pte.pte_low |= pgprot_val(newprot);
464
465#ifdef CONFIG_X2TLB
466 pte.pte_high |= pgprot_val(newprot) >> 32;
467#endif
468
469 return pte;
470}
471
472#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
473#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
474
475/* to find an entry in a page-table-directory. */
476#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
477#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
478
479/* to find an entry in a kernel page-table-directory */
480#define pgd_offset_k(address) pgd_offset(&init_mm, address)
481
482/* Find an entry in the third-level page table.. */
483#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
484#define pte_offset_kernel(dir, address) \
485 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
486#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
487#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
488
489#define pte_unmap(pte) do { } while (0)
490#define pte_unmap_nested(pte) do { } while (0)
491
492#ifdef CONFIG_X2TLB
493#define pte_ERROR(e) \
494 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
495 &(e), (e).pte_high, (e).pte_low)
496#define pgd_ERROR(e) \
497 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
498#else
499#define pte_ERROR(e) \
500 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
501#define pgd_ERROR(e) \
502 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
503#endif
504
505struct vm_area_struct;
506extern void update_mmu_cache(struct vm_area_struct * vma,
507 unsigned long address, pte_t pte);
508
509/*
510 * Encode and de-code a swap entry
511 *
512 * Constraints:
513 * _PAGE_FILE at bit 0
514 * _PAGE_PRESENT at bit 8
515 * _PAGE_PROTNONE at bit 9
516 *
517 * For the normal case, we encode the swap type into bits 0:7 and the
518 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
519 * preserved bits in the low 32-bits and use the upper 32 as the swap
520 * offset (along with a 5-bit type), following the same approach as x86
521 * PAE. This keeps the logic quite simple, and allows for a full 32
522 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
523 * in the pte_low case.
524 *
525 * As is evident by the Alpha code, if we ever get a 64-bit unsigned
526 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
527 * much cleaner..
528 *
529 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
530 * and _PAGE_PROTNONE bits
531 */
532#ifdef CONFIG_X2TLB
533#define __swp_type(x) ((x).val & 0x1f)
534#define __swp_offset(x) ((x).val >> 5)
535#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
536#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
537#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
538
539/*
540 * Encode and decode a nonlinear file mapping entry
541 */
542#define pte_to_pgoff(pte) ((pte).pte_high)
543#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
544
545#define PTE_FILE_MAX_BITS 32
546#else
547#define __swp_type(x) ((x).val & 0xff)
548#define __swp_offset(x) ((x).val >> 10)
549#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
550
551#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
552#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
553
554/*
555 * Encode and decode a nonlinear file mapping entry
556 */
557#define PTE_FILE_MAX_BITS 29
558#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
559#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
560#endif
561
562typedef pte_t *pte_addr_t; 121typedef pte_t *pte_addr_t;
563 122
564#define kern_addr_valid(addr) (1) 123#define kern_addr_valid(addr) (1)
@@ -566,27 +125,28 @@ typedef pte_t *pte_addr_t;
566#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \ 125#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
567 remap_pfn_range(vma, vaddr, pfn, size, prot) 126 remap_pfn_range(vma, vaddr, pfn, size, prot)
568 127
569struct mm_struct; 128#define pte_pfn(x) ((unsigned long)(((x).pte_low >> PAGE_SHIFT)))
570 129
571/* 130/*
572 * No page table caches to initialise 131 * No page table caches to initialise
573 */ 132 */
574#define pgtable_cache_init() do { } while (0) 133#define pgtable_cache_init() do { } while (0)
575 134
576#ifndef CONFIG_MMU
577extern unsigned int kobjsize(const void *objp);
578#endif /* !CONFIG_MMU */
579
580#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \ 135#if !defined(CONFIG_CACHE_OFF) && (defined(CONFIG_CPU_SH4) || \
581 defined(CONFIG_SH7705_CACHE_32KB)) 136 defined(CONFIG_SH7705_CACHE_32KB))
137struct mm_struct;
582#define __HAVE_ARCH_PTEP_GET_AND_CLEAR 138#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
583extern pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep); 139pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
584#endif 140#endif
585 141
142struct vm_area_struct;
143extern void update_mmu_cache(struct vm_area_struct * vma,
144 unsigned long address, pte_t pte);
586extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 145extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
587extern void paging_init(void); 146extern void paging_init(void);
147extern void page_table_range_init(unsigned long start, unsigned long end,
148 pgd_t *pgd);
588 149
589#include <asm-generic/pgtable.h> 150#include <asm-generic/pgtable.h>
590 151
591#endif /* !__ASSEMBLY__ */ 152#endif /* __ASM_SH_PGTABLE_H */
592#endif /* __ASM_SH_PAGE_H */
diff --git a/include/asm-sh/pgtable_32.h b/include/asm-sh/pgtable_32.h
new file mode 100644
index 000000000000..3e3557c53c55
--- /dev/null
+++ b/include/asm-sh/pgtable_32.h
@@ -0,0 +1,474 @@
1#ifndef __ASM_SH_PGTABLE_32_H
2#define __ASM_SH_PGTABLE_32_H
3
4/*
5 * Linux PTEL encoding.
6 *
7 * Hardware and software bit definitions for the PTEL value (see below for
8 * notes on SH-X2 MMUs and 64-bit PTEs):
9 *
10 * - Bits 0 and 7 are reserved on SH-3 (_PAGE_WT and _PAGE_SZ1 on SH-4).
11 *
12 * - Bit 1 is the SH-bit, but is unused on SH-3 due to an MMU bug (the
13 * hardware PTEL value can't have the SH-bit set when MMUCR.IX is set,
14 * which is the default in cpu-sh3/mmu_context.h:MMU_CONTROL_INIT).
15 *
16 * In order to keep this relatively clean, do not use these for defining
17 * SH-3 specific flags until all of the other unused bits have been
18 * exhausted.
19 *
20 * - Bit 9 is reserved by everyone and used by _PAGE_PROTNONE.
21 *
22 * - Bits 10 and 11 are low bits of the PPN that are reserved on >= 4K pages.
23 * Bit 10 is used for _PAGE_ACCESSED, bit 11 remains unused.
24 *
25 * - On 29 bit platforms, bits 31 to 29 are used for the space attributes
26 * and timing control which (together with bit 0) are moved into the
27 * old-style PTEA on the parts that support it.
28 *
29 * XXX: Leave the _PAGE_FILE and _PAGE_WT overhaul for a rainy day.
30 *
31 * SH-X2 MMUs and extended PTEs
32 *
33 * SH-X2 supports an extended mode TLB with split data arrays due to the
34 * number of bits needed for PR and SZ (now EPR and ESZ) encodings. The PR and
35 * SZ bit placeholders still exist in data array 1, but are implemented as
36 * reserved bits, with the real logic existing in data array 2.
37 *
38 * The downside to this is that we can no longer fit everything in to a 32-bit
39 * PTE encoding, so a 64-bit pte_t is necessary for these parts. On the plus
40 * side, this gives us quite a few spare bits to play with for future usage.
41 */
42/* Legacy and compat mode bits */
43#define _PAGE_WT 0x001 /* WT-bit on SH-4, 0 on SH-3 */
44#define _PAGE_HW_SHARED 0x002 /* SH-bit : shared among processes */
45#define _PAGE_DIRTY 0x004 /* D-bit : page changed */
46#define _PAGE_CACHABLE 0x008 /* C-bit : cachable */
47#define _PAGE_SZ0 0x010 /* SZ0-bit : Size of page */
48#define _PAGE_RW 0x020 /* PR0-bit : write access allowed */
49#define _PAGE_USER 0x040 /* PR1-bit : user space access allowed*/
50#define _PAGE_SZ1 0x080 /* SZ1-bit : Size of page (on SH-4) */
51#define _PAGE_PRESENT 0x100 /* V-bit : page is valid */
52#define _PAGE_PROTNONE 0x200 /* software: if not present */
53#define _PAGE_ACCESSED 0x400 /* software: page referenced */
54#define _PAGE_FILE _PAGE_WT /* software: pagecache or swap? */
55
56#define _PAGE_SZ_MASK (_PAGE_SZ0 | _PAGE_SZ1)
57#define _PAGE_PR_MASK (_PAGE_RW | _PAGE_USER)
58
59/* Extended mode bits */
60#define _PAGE_EXT_ESZ0 0x0010 /* ESZ0-bit: Size of page */
61#define _PAGE_EXT_ESZ1 0x0020 /* ESZ1-bit: Size of page */
62#define _PAGE_EXT_ESZ2 0x0040 /* ESZ2-bit: Size of page */
63#define _PAGE_EXT_ESZ3 0x0080 /* ESZ3-bit: Size of page */
64
65#define _PAGE_EXT_USER_EXEC 0x0100 /* EPR0-bit: User space executable */
66#define _PAGE_EXT_USER_WRITE 0x0200 /* EPR1-bit: User space writable */
67#define _PAGE_EXT_USER_READ 0x0400 /* EPR2-bit: User space readable */
68
69#define _PAGE_EXT_KERN_EXEC 0x0800 /* EPR3-bit: Kernel space executable */
70#define _PAGE_EXT_KERN_WRITE 0x1000 /* EPR4-bit: Kernel space writable */
71#define _PAGE_EXT_KERN_READ 0x2000 /* EPR5-bit: Kernel space readable */
72
73/* Wrapper for extended mode pgprot twiddling */
74#define _PAGE_EXT(x) ((unsigned long long)(x) << 32)
75
76/* software: moves to PTEA.TC (Timing Control) */
77#define _PAGE_PCC_AREA5 0x00000000 /* use BSC registers for area5 */
78#define _PAGE_PCC_AREA6 0x80000000 /* use BSC registers for area6 */
79
80/* software: moves to PTEA.SA[2:0] (Space Attributes) */
81#define _PAGE_PCC_IODYN 0x00000001 /* IO space, dynamically sized bus */
82#define _PAGE_PCC_IO8 0x20000000 /* IO space, 8 bit bus */
83#define _PAGE_PCC_IO16 0x20000001 /* IO space, 16 bit bus */
84#define _PAGE_PCC_COM8 0x40000000 /* Common Memory space, 8 bit bus */
85#define _PAGE_PCC_COM16 0x40000001 /* Common Memory space, 16 bit bus */
86#define _PAGE_PCC_ATR8 0x60000000 /* Attribute Memory space, 8 bit bus */
87#define _PAGE_PCC_ATR16 0x60000001 /* Attribute Memory space, 6 bit bus */
88
89/* Mask which drops unused bits from the PTEL value */
90#if defined(CONFIG_CPU_SH3)
91#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED| \
92 _PAGE_FILE | _PAGE_SZ1 | \
93 _PAGE_HW_SHARED)
94#elif defined(CONFIG_X2TLB)
95/* Get rid of the legacy PR/SZ bits when using extended mode */
96#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | \
97 _PAGE_FILE | _PAGE_PR_MASK | _PAGE_SZ_MASK)
98#else
99#define _PAGE_CLEAR_FLAGS (_PAGE_PROTNONE | _PAGE_ACCESSED | _PAGE_FILE)
100#endif
101
102#define _PAGE_FLAGS_HARDWARE_MASK (PHYS_ADDR_MASK & ~(_PAGE_CLEAR_FLAGS))
103
104/* Hardware flags, page size encoding */
105#if defined(CONFIG_X2TLB)
106# if defined(CONFIG_PAGE_SIZE_4KB)
107# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ0)
108# elif defined(CONFIG_PAGE_SIZE_8KB)
109# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ1)
110# elif defined(CONFIG_PAGE_SIZE_64KB)
111# define _PAGE_FLAGS_HARD _PAGE_EXT(_PAGE_EXT_ESZ2)
112# endif
113#else
114# if defined(CONFIG_PAGE_SIZE_4KB)
115# define _PAGE_FLAGS_HARD _PAGE_SZ0
116# elif defined(CONFIG_PAGE_SIZE_64KB)
117# define _PAGE_FLAGS_HARD _PAGE_SZ1
118# endif
119#endif
120
121#if defined(CONFIG_X2TLB)
122# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
123# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2)
124# elif defined(CONFIG_HUGETLB_PAGE_SIZE_256K)
125# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ2)
126# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
127# define _PAGE_SZHUGE (_PAGE_EXT_ESZ0 | _PAGE_EXT_ESZ1 | _PAGE_EXT_ESZ2)
128# elif defined(CONFIG_HUGETLB_PAGE_SIZE_4MB)
129# define _PAGE_SZHUGE (_PAGE_EXT_ESZ3)
130# elif defined(CONFIG_HUGETLB_PAGE_SIZE_64MB)
131# define _PAGE_SZHUGE (_PAGE_EXT_ESZ2 | _PAGE_EXT_ESZ3)
132# endif
133#else
134# if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
135# define _PAGE_SZHUGE (_PAGE_SZ1)
136# elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
137# define _PAGE_SZHUGE (_PAGE_SZ0 | _PAGE_SZ1)
138# endif
139#endif
140
141/*
142 * Stub out _PAGE_SZHUGE if we don't have a good definition for it,
143 * to make pte_mkhuge() happy.
144 */
145#ifndef _PAGE_SZHUGE
146# define _PAGE_SZHUGE (_PAGE_FLAGS_HARD)
147#endif
148
149#define _PAGE_CHG_MASK \
150 (PTE_MASK | _PAGE_ACCESSED | _PAGE_CACHABLE | _PAGE_DIRTY)
151
152#ifndef __ASSEMBLY__
153
154#if defined(CONFIG_X2TLB) /* SH-X2 TLB */
155#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
156 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
157
158#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
159 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
160 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
161 _PAGE_EXT_KERN_WRITE | \
162 _PAGE_EXT_USER_READ | \
163 _PAGE_EXT_USER_WRITE))
164
165#define PAGE_EXECREAD __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
166 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
167 _PAGE_EXT(_PAGE_EXT_KERN_EXEC | \
168 _PAGE_EXT_KERN_READ | \
169 _PAGE_EXT_USER_EXEC | \
170 _PAGE_EXT_USER_READ))
171
172#define PAGE_COPY PAGE_EXECREAD
173
174#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
175 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
176 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
177 _PAGE_EXT_USER_READ))
178
179#define PAGE_WRITEONLY __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
180 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
181 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
182 _PAGE_EXT_USER_WRITE))
183
184#define PAGE_RWX __pgprot(_PAGE_PRESENT | _PAGE_ACCESSED | \
185 _PAGE_CACHABLE | _PAGE_FLAGS_HARD | \
186 _PAGE_EXT(_PAGE_EXT_KERN_WRITE | \
187 _PAGE_EXT_KERN_READ | \
188 _PAGE_EXT_KERN_EXEC | \
189 _PAGE_EXT_USER_WRITE | \
190 _PAGE_EXT_USER_READ | \
191 _PAGE_EXT_USER_EXEC))
192
193#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
194 _PAGE_DIRTY | _PAGE_ACCESSED | \
195 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
196 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
197 _PAGE_EXT_KERN_WRITE | \
198 _PAGE_EXT_KERN_EXEC))
199
200#define PAGE_KERNEL_NOCACHE \
201 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
202 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
203 _PAGE_FLAGS_HARD | \
204 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
205 _PAGE_EXT_KERN_WRITE | \
206 _PAGE_EXT_KERN_EXEC))
207
208#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
209 _PAGE_DIRTY | _PAGE_ACCESSED | \
210 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD | \
211 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
212 _PAGE_EXT_KERN_EXEC))
213
214#define PAGE_KERNEL_PCC(slot, type) \
215 __pgprot(_PAGE_PRESENT | _PAGE_DIRTY | \
216 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
217 _PAGE_EXT(_PAGE_EXT_KERN_READ | \
218 _PAGE_EXT_KERN_WRITE | \
219 _PAGE_EXT_KERN_EXEC) \
220 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
221 (type))
222
223#elif defined(CONFIG_MMU) /* SH-X TLB */
224#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_CACHABLE | \
225 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
226
227#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_USER | \
228 _PAGE_CACHABLE | _PAGE_ACCESSED | \
229 _PAGE_FLAGS_HARD)
230
231#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
232 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
233
234#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | \
235 _PAGE_ACCESSED | _PAGE_FLAGS_HARD)
236
237#define PAGE_EXECREAD PAGE_READONLY
238#define PAGE_RWX PAGE_SHARED
239#define PAGE_WRITEONLY PAGE_SHARED
240
241#define PAGE_KERNEL __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_CACHABLE | \
242 _PAGE_DIRTY | _PAGE_ACCESSED | \
243 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
244
245#define PAGE_KERNEL_NOCACHE \
246 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
247 _PAGE_ACCESSED | _PAGE_HW_SHARED | \
248 _PAGE_FLAGS_HARD)
249
250#define PAGE_KERNEL_RO __pgprot(_PAGE_PRESENT | _PAGE_CACHABLE | \
251 _PAGE_DIRTY | _PAGE_ACCESSED | \
252 _PAGE_HW_SHARED | _PAGE_FLAGS_HARD)
253
254#define PAGE_KERNEL_PCC(slot, type) \
255 __pgprot(_PAGE_PRESENT | _PAGE_RW | _PAGE_DIRTY | \
256 _PAGE_ACCESSED | _PAGE_FLAGS_HARD | \
257 (slot ? _PAGE_PCC_AREA5 : _PAGE_PCC_AREA6) | \
258 (type))
259#else /* no mmu */
260#define PAGE_NONE __pgprot(0)
261#define PAGE_SHARED __pgprot(0)
262#define PAGE_COPY __pgprot(0)
263#define PAGE_EXECREAD __pgprot(0)
264#define PAGE_RWX __pgprot(0)
265#define PAGE_READONLY __pgprot(0)
266#define PAGE_WRITEONLY __pgprot(0)
267#define PAGE_KERNEL __pgprot(0)
268#define PAGE_KERNEL_NOCACHE __pgprot(0)
269#define PAGE_KERNEL_RO __pgprot(0)
270
271#define PAGE_KERNEL_PCC(slot, type) \
272 __pgprot(0)
273#endif
274
275#endif /* __ASSEMBLY__ */
276
277#ifndef __ASSEMBLY__
278
279/*
280 * Certain architectures need to do special things when PTEs
281 * within a page table are directly modified. Thus, the following
282 * hook is made available.
283 */
284#ifdef CONFIG_X2TLB
285static inline void set_pte(pte_t *ptep, pte_t pte)
286{
287 ptep->pte_high = pte.pte_high;
288 smp_wmb();
289 ptep->pte_low = pte.pte_low;
290}
291#else
292#define set_pte(pteptr, pteval) (*(pteptr) = pteval)
293#endif
294
295#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
296
297/*
298 * (pmds are folded into pgds so this doesn't get actually called,
299 * but the define is needed for a generic inline function.)
300 */
301#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
302
303#define pfn_pte(pfn, prot) \
304 __pte(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
305#define pfn_pmd(pfn, prot) \
306 __pmd(((unsigned long long)(pfn) << PAGE_SHIFT) | pgprot_val(prot))
307
308#define pte_none(x) (!pte_val(x))
309#define pte_present(x) ((x).pte_low & (_PAGE_PRESENT | _PAGE_PROTNONE))
310
311#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
312
313#define pmd_none(x) (!pmd_val(x))
314#define pmd_present(x) (pmd_val(x))
315#define pmd_clear(xp) do { set_pmd(xp, __pmd(0)); } while (0)
316#define pmd_bad(x) (pmd_val(x) & ~PAGE_MASK)
317
318#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
319#define pte_page(x) pfn_to_page(pte_pfn(x))
320
321/*
322 * The following only work if pte_present() is true.
323 * Undefined behaviour if not..
324 */
325#define pte_not_present(pte) (!((pte).pte_low & _PAGE_PRESENT))
326#define pte_dirty(pte) ((pte).pte_low & _PAGE_DIRTY)
327#define pte_young(pte) ((pte).pte_low & _PAGE_ACCESSED)
328#define pte_file(pte) ((pte).pte_low & _PAGE_FILE)
329
330#ifdef CONFIG_X2TLB
331#define pte_write(pte) ((pte).pte_high & _PAGE_EXT_USER_WRITE)
332#else
333#define pte_write(pte) ((pte).pte_low & _PAGE_RW)
334#endif
335
336#define PTE_BIT_FUNC(h,fn,op) \
337static inline pte_t pte_##fn(pte_t pte) { pte.pte_##h op; return pte; }
338
339#ifdef CONFIG_X2TLB
340/*
341 * We cheat a bit in the SH-X2 TLB case. As the permission bits are
342 * individually toggled (and user permissions are entirely decoupled from
343 * kernel permissions), we attempt to couple them a bit more sanely here.
344 */
345PTE_BIT_FUNC(high, wrprotect, &= ~_PAGE_EXT_USER_WRITE);
346PTE_BIT_FUNC(high, mkwrite, |= _PAGE_EXT_USER_WRITE | _PAGE_EXT_KERN_WRITE);
347PTE_BIT_FUNC(high, mkhuge, |= _PAGE_SZHUGE);
348#else
349PTE_BIT_FUNC(low, wrprotect, &= ~_PAGE_RW);
350PTE_BIT_FUNC(low, mkwrite, |= _PAGE_RW);
351PTE_BIT_FUNC(low, mkhuge, |= _PAGE_SZHUGE);
352#endif
353
354PTE_BIT_FUNC(low, mkclean, &= ~_PAGE_DIRTY);
355PTE_BIT_FUNC(low, mkdirty, |= _PAGE_DIRTY);
356PTE_BIT_FUNC(low, mkold, &= ~_PAGE_ACCESSED);
357PTE_BIT_FUNC(low, mkyoung, |= _PAGE_ACCESSED);
358
359/*
360 * Macro and implementation to make a page protection as uncachable.
361 */
362#define pgprot_writecombine(prot) \
363 __pgprot(pgprot_val(prot) & ~_PAGE_CACHABLE)
364
365#define pgprot_noncached pgprot_writecombine
366
367/*
368 * Conversion functions: convert a page and protection to a page entry,
369 * and a page entry and page directory to the page they refer to.
370 *
371 * extern pte_t mk_pte(struct page *page, pgprot_t pgprot)
372 */
373#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
374
375static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
376{
377 pte.pte_low &= _PAGE_CHG_MASK;
378 pte.pte_low |= pgprot_val(newprot);
379
380#ifdef CONFIG_X2TLB
381 pte.pte_high |= pgprot_val(newprot) >> 32;
382#endif
383
384 return pte;
385}
386
387#define pmd_page_vaddr(pmd) ((unsigned long)pmd_val(pmd))
388#define pmd_page(pmd) (virt_to_page(pmd_val(pmd)))
389
390/* to find an entry in a page-table-directory. */
391#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
392#define pgd_offset(mm, address) ((mm)->pgd+pgd_index(address))
393
394/* to find an entry in a kernel page-table-directory */
395#define pgd_offset_k(address) pgd_offset(&init_mm, address)
396
397/* Find an entry in the third-level page table.. */
398#define pte_index(address) ((address >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
399#define pte_offset_kernel(dir, address) \
400 ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
401#define pte_offset_map(dir, address) pte_offset_kernel(dir, address)
402#define pte_offset_map_nested(dir, address) pte_offset_kernel(dir, address)
403
404#define pte_unmap(pte) do { } while (0)
405#define pte_unmap_nested(pte) do { } while (0)
406
407#ifdef CONFIG_X2TLB
408#define pte_ERROR(e) \
409 printk("%s:%d: bad pte %p(%08lx%08lx).\n", __FILE__, __LINE__, \
410 &(e), (e).pte_high, (e).pte_low)
411#define pgd_ERROR(e) \
412 printk("%s:%d: bad pgd %016llx.\n", __FILE__, __LINE__, pgd_val(e))
413#else
414#define pte_ERROR(e) \
415 printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
416#define pgd_ERROR(e) \
417 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
418#endif
419
420/*
421 * Encode and de-code a swap entry
422 *
423 * Constraints:
424 * _PAGE_FILE at bit 0
425 * _PAGE_PRESENT at bit 8
426 * _PAGE_PROTNONE at bit 9
427 *
428 * For the normal case, we encode the swap type into bits 0:7 and the
429 * swap offset into bits 10:30. For the 64-bit PTE case, we keep the
430 * preserved bits in the low 32-bits and use the upper 32 as the swap
431 * offset (along with a 5-bit type), following the same approach as x86
432 * PAE. This keeps the logic quite simple, and allows for a full 32
433 * PTE_FILE_MAX_BITS, as opposed to the 29-bits we're constrained with
434 * in the pte_low case.
435 *
436 * As is evident by the Alpha code, if we ever get a 64-bit unsigned
437 * long (swp_entry_t) to match up with the 64-bit PTEs, this all becomes
438 * much cleaner..
439 *
440 * NOTE: We should set ZEROs at the position of _PAGE_PRESENT
441 * and _PAGE_PROTNONE bits
442 */
443#ifdef CONFIG_X2TLB
444#define __swp_type(x) ((x).val & 0x1f)
445#define __swp_offset(x) ((x).val >> 5)
446#define __swp_entry(type, offset) ((swp_entry_t){ (type) | (offset) << 5})
447#define __pte_to_swp_entry(pte) ((swp_entry_t){ (pte).pte_high })
448#define __swp_entry_to_pte(x) ((pte_t){ 0, (x).val })
449
450/*
451 * Encode and decode a nonlinear file mapping entry
452 */
453#define pte_to_pgoff(pte) ((pte).pte_high)
454#define pgoff_to_pte(off) ((pte_t) { _PAGE_FILE, (off) })
455
456#define PTE_FILE_MAX_BITS 32
457#else
458#define __swp_type(x) ((x).val & 0xff)
459#define __swp_offset(x) ((x).val >> 10)
460#define __swp_entry(type, offset) ((swp_entry_t){(type) | (offset) <<10})
461
462#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) >> 1 })
463#define __swp_entry_to_pte(x) ((pte_t) { (x).val << 1 })
464
465/*
466 * Encode and decode a nonlinear file mapping entry
467 */
468#define PTE_FILE_MAX_BITS 29
469#define pte_to_pgoff(pte) (pte_val(pte) >> 1)
470#define pgoff_to_pte(off) ((pte_t) { ((off) << 1) | _PAGE_FILE })
471#endif
472
473#endif /* __ASSEMBLY__ */
474#endif /* __ASM_SH_PGTABLE_32_H */
diff --git a/include/asm-sh64/pgtable.h b/include/asm-sh/pgtable_64.h
index 3488fe32e436..972211671c9a 100644
--- a/include/asm-sh64/pgtable.h
+++ b/include/asm-sh/pgtable_64.h
@@ -1,136 +1,40 @@
1#ifndef __ASM_SH64_PGTABLE_H 1#ifndef __ASM_SH_PGTABLE_64_H
2#define __ASM_SH64_PGTABLE_H 2#define __ASM_SH_PGTABLE_64_H
3
4#include <asm-generic/4level-fixup.h>
5 3
6/* 4/*
7 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/pgtable_64.h
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 * 6 *
11 * include/asm-sh64/pgtable.h 7 * This file contains the functions and defines necessary to modify and use
8 * the SuperH page table tree.
12 * 9 *
13 * Copyright (C) 2000, 2001 Paolo Alberelli 10 * Copyright (C) 2000, 2001 Paolo Alberelli
14 * Copyright (C) 2003, 2004 Paul Mundt 11 * Copyright (C) 2003, 2004 Paul Mundt
15 * Copyright (C) 2003, 2004 Richard Curnow 12 * Copyright (C) 2003, 2004 Richard Curnow
16 * 13 *
17 * This file contains the functions and defines necessary to modify and use 14 * This file is subject to the terms and conditions of the GNU General Public
18 * the SuperH page table tree. 15 * License. See the file "COPYING" in the main directory of this archive
16 * for more details.
19 */ 17 */
20 18#include <linux/threads.h>
21#ifndef __ASSEMBLY__
22#include <asm/processor.h> 19#include <asm/processor.h>
23#include <asm/page.h> 20#include <asm/page.h>
24#include <linux/threads.h>
25
26struct vm_area_struct;
27
28extern void paging_init(void);
29
30/* We provide our own get_unmapped_area to avoid cache synonym issue */
31#define HAVE_ARCH_UNMAPPED_AREA
32
33/*
34 * Basically we have the same two-level (which is the logical three level
35 * Linux page table layout folded) page tables as the i386.
36 */
37
38/*
39 * ZERO_PAGE is a global shared page that is always zero: used
40 * for zero-mapped memory areas etc..
41 */
42extern unsigned char empty_zero_page[PAGE_SIZE];
43#define ZERO_PAGE(vaddr) (mem_map + MAP_NR(empty_zero_page))
44
45#endif /* !__ASSEMBLY__ */
46
47/*
48 * NEFF and NPHYS related defines.
49 * FIXME : These need to be model-dependent. For now this is OK, SH5-101 and SH5-103
50 * implement 32 bits effective and 32 bits physical. But future implementations may
51 * extend beyond this.
52 */
53#define NEFF 32
54#define NEFF_SIGN (1LL << (NEFF - 1))
55#define NEFF_MASK (-1LL << NEFF)
56
57#define NPHYS 32
58#define NPHYS_SIGN (1LL << (NPHYS - 1))
59#define NPHYS_MASK (-1LL << NPHYS)
60
61/* Typically 2-level is sufficient up to 32 bits of virtual address space, beyond
62 that 3-level would be appropriate. */
63#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
64/* For 4k pages, this contains 512 entries, i.e. 9 bits worth of address. */
65#define PTRS_PER_PTE ((1<<PAGE_SHIFT)/sizeof(unsigned long long))
66#define PTE_MAGNITUDE 3 /* sizeof(unsigned long long) magnit. */
67#define PTE_SHIFT PAGE_SHIFT
68#define PTE_BITS (PAGE_SHIFT - PTE_MAGNITUDE)
69
70/* top level: PMD. */
71#define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS)
72#define PGD_BITS (NEFF - PGDIR_SHIFT)
73#define PTRS_PER_PGD (1<<PGD_BITS)
74
75/* middle level: PMD. This doesn't do anything for the 2-level case. */
76#define PTRS_PER_PMD (1)
77
78#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
79#define PGDIR_MASK (~(PGDIR_SIZE-1))
80#define PMD_SHIFT PGDIR_SHIFT
81#define PMD_SIZE PGDIR_SIZE
82#define PMD_MASK PGDIR_MASK
83
84#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
85/*
86 * three-level asymmetric paging structure: PGD is top level.
87 * The asymmetry comes from 32-bit pointers and 64-bit PTEs.
88 */
89/* bottom level: PTE. It's 9 bits = 512 pointers */
90#define PTRS_PER_PTE ((1<<PAGE_SHIFT)/sizeof(unsigned long long))
91#define PTE_MAGNITUDE 3 /* sizeof(unsigned long long) magnit. */
92#define PTE_SHIFT PAGE_SHIFT
93#define PTE_BITS (PAGE_SHIFT - PTE_MAGNITUDE)
94
95/* middle level: PMD. It's 10 bits = 1024 pointers */
96#define PTRS_PER_PMD ((1<<PAGE_SHIFT)/sizeof(unsigned long long *))
97#define PMD_MAGNITUDE 2 /* sizeof(unsigned long long *) magnit. */
98#define PMD_SHIFT (PTE_SHIFT + PTE_BITS)
99#define PMD_BITS (PAGE_SHIFT - PMD_MAGNITUDE)
100
101/* top level: PMD. It's 1 bit = 2 pointers */
102#define PGDIR_SHIFT (PMD_SHIFT + PMD_BITS)
103#define PGD_BITS (NEFF - PGDIR_SHIFT)
104#define PTRS_PER_PGD (1<<PGD_BITS)
105
106#define PMD_SIZE (1UL << PMD_SHIFT)
107#define PMD_MASK (~(PMD_SIZE-1))
108#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
109#define PGDIR_MASK (~(PGDIR_SIZE-1))
110
111#else
112#error "No defined number of page table levels"
113#endif
114 21
115/* 22/*
116 * Error outputs. 23 * Error outputs.
117 */ 24 */
118#define pte_ERROR(e) \ 25#define pte_ERROR(e) \
119 printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e)) 26 printk("%s:%d: bad pte %016Lx.\n", __FILE__, __LINE__, pte_val(e))
120#define pmd_ERROR(e) \
121 printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
122#define pgd_ERROR(e) \ 27#define pgd_ERROR(e) \
123 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e)) 28 printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pgd_val(e))
124 29
125/* 30/*
126 * Table setting routines. Used within arch/mm only. 31 * Table setting routines. Used within arch/mm only.
127 */ 32 */
128#define set_pgd(pgdptr, pgdval) (*(pgdptr) = pgdval)
129#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval) 33#define set_pmd(pmdptr, pmdval) (*(pmdptr) = pmdval)
130 34
131static __inline__ void set_pte(pte_t *pteptr, pte_t pteval) 35static __inline__ void set_pte(pte_t *pteptr, pte_t pteval)
132{ 36{
133 unsigned long long x = ((unsigned long long) pteval.pte); 37 unsigned long long x = ((unsigned long long) pteval.pte_low);
134 unsigned long long *xp = (unsigned long long *) pteptr; 38 unsigned long long *xp = (unsigned long long *) pteptr;
135 /* 39 /*
136 * Sign-extend based on NPHYS. 40 * Sign-extend based on NPHYS.
@@ -157,61 +61,6 @@ static __inline__ void pmd_set(pmd_t *pmdp,pte_t *ptep)
157#define pgd_offset_k(address) pgd_offset(&init_mm, address) 61#define pgd_offset_k(address) pgd_offset(&init_mm, address)
158 62
159/* 63/*
160 * PGD level access routines.
161 *
162 * Note1:
163 * There's no need to use physical addresses since the tree walk is all
164 * in performed in software, until the PTE translation.
165 *
166 * Note 2:
167 * A PGD entry can be uninitialized (_PGD_UNUSED), generically bad,
168 * clear (_PGD_EMPTY), present. When present, lower 3 nibbles contain
169 * _KERNPG_TABLE. Being a kernel virtual pointer also bit 31 must
170 * be 1. Assuming an arbitrary clear value of bit 31 set to 0 and
171 * lower 3 nibbles set to 0xFFF (_PGD_EMPTY) any other value is a
172 * bad pgd that must be notified via printk().
173 *
174 */
175#define _PGD_EMPTY 0x0
176
177#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
178static inline int pgd_none(pgd_t pgd) { return 0; }
179static inline int pgd_bad(pgd_t pgd) { return 0; }
180#define pgd_present(pgd) ((pgd_val(pgd) & _PAGE_PRESENT) ? 1 : 0)
181#define pgd_clear(xx) do { } while(0)
182
183#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
184#define pgd_present(pgd_entry) (1)
185#define pgd_none(pgd_entry) (pgd_val((pgd_entry)) == _PGD_EMPTY)
186/* TODO: Think later about what a useful definition of 'bad' would be now. */
187#define pgd_bad(pgd_entry) (0)
188#define pgd_clear(pgd_entry_p) (set_pgd((pgd_entry_p), __pgd(_PGD_EMPTY)))
189
190#endif
191
192
193#define pgd_page_vaddr(pgd_entry) ((unsigned long) (pgd_val(pgd_entry) & PAGE_MASK))
194#define pgd_page(pgd) (virt_to_page(pgd_val(pgd)))
195
196
197/*
198 * PMD defines. Middle level.
199 */
200
201/* PGD to PMD dereferencing */
202#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
203static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
204{
205 return (pmd_t *) dir;
206}
207#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
208#define __pmd_offset(address) \
209 (((address) >> PMD_SHIFT) & (PTRS_PER_PMD-1))
210#define pmd_offset(dir, addr) \
211 ((pmd_t *) ((pgd_val(*(dir))) & PAGE_MASK) + __pmd_offset((addr)))
212#endif
213
214/*
215 * PMD level access routines. Same notes as above. 64 * PMD level access routines. Same notes as above.
216 */ 65 */
217#define _PMD_EMPTY 0x0 66#define _PMD_EMPTY 0x0
@@ -239,15 +88,7 @@ static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
239#define pte_unmap(pte) do { } while (0) 88#define pte_unmap(pte) do { } while (0)
240#define pte_unmap_nested(pte) do { } while (0) 89#define pte_unmap_nested(pte) do { } while (0)
241 90
242/* Round it up ! */
243#define USER_PTRS_PER_PGD ((TASK_SIZE+PGDIR_SIZE-1)/PGDIR_SIZE)
244#define FIRST_USER_ADDRESS 0
245
246#ifndef __ASSEMBLY__ 91#ifndef __ASSEMBLY__
247#define VMALLOC_END 0xff000000
248#define VMALLOC_START 0xf0000000
249#define VMALLOC_VMADDR(x) ((unsigned long)(x))
250
251#define IOBASE_VADDR 0xff000000 92#define IOBASE_VADDR 0xff000000
252#define IOBASE_END 0xffffffff 93#define IOBASE_END 0xffffffff
253 94
@@ -315,43 +156,28 @@ static inline pmd_t * pmd_offset(pgd_t * dir, unsigned long address)
315 156
316#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY) 157#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
317 158
159/*
160 * We have full permissions (Read/Write/Execute/Shared).
161 */
162#define _PAGE_COMMON (_PAGE_PRESENT | _PAGE_USER | \
163 _PAGE_CACHABLE | _PAGE_ACCESSED)
164
318#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED) 165#define PAGE_NONE __pgprot(_PAGE_CACHABLE | _PAGE_ACCESSED)
319#define PAGE_SHARED __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_WRITE | \ 166#define PAGE_SHARED __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_WRITE | \
320 _PAGE_CACHABLE | _PAGE_ACCESSED | _PAGE_USER | \
321 _PAGE_SHARED) 167 _PAGE_SHARED)
322/* We need to include PAGE_EXECUTE in PAGE_COPY because it is the default 168#define PAGE_EXECREAD __pgprot(_PAGE_COMMON | _PAGE_READ | _PAGE_EXECUTE)
323 * protection mode for the stack. */
324#define PAGE_COPY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHABLE | \
325 _PAGE_ACCESSED | _PAGE_USER | _PAGE_EXECUTE)
326#define PAGE_READONLY __pgprot(_PAGE_PRESENT | _PAGE_READ | _PAGE_CACHABLE | \
327 _PAGE_ACCESSED | _PAGE_USER)
328#define PAGE_KERNEL __pgprot(_KERNPG_TABLE)
329
330 169
331/* 170/*
332 * In ST50 we have full permissions (Read/Write/Execute/Shared). 171 * We need to include PAGE_EXECUTE in PAGE_COPY because it is the default
333 * Just match'em all. These are for mmap(), therefore all at least 172 * protection mode for the stack.
334 * User/Cachable/Present/Accessed. No point in making Fault on Write.
335 */ 173 */
336#define __MMAP_COMMON (_PAGE_PRESENT | _PAGE_USER | _PAGE_CACHABLE | _PAGE_ACCESSED) 174#define PAGE_COPY PAGE_EXECREAD
337 /* sxwr */ 175
338#define __P000 __pgprot(__MMAP_COMMON) 176#define PAGE_READONLY __pgprot(_PAGE_COMMON | _PAGE_READ)
339#define __P001 __pgprot(__MMAP_COMMON | _PAGE_READ) 177#define PAGE_WRITEONLY __pgprot(_PAGE_COMMON | _PAGE_WRITE)
340#define __P010 __pgprot(__MMAP_COMMON) 178#define PAGE_RWX __pgprot(_PAGE_COMMON | _PAGE_READ | \
341#define __P011 __pgprot(__MMAP_COMMON | _PAGE_READ) 179 _PAGE_WRITE | _PAGE_EXECUTE)
342#define __P100 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE) 180#define PAGE_KERNEL __pgprot(_KERNPG_TABLE)
343#define __P101 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE | _PAGE_READ)
344#define __P110 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE)
345#define __P111 __pgprot(__MMAP_COMMON | _PAGE_EXECUTE | _PAGE_READ)
346
347#define __S000 __pgprot(__MMAP_COMMON | _PAGE_SHARED)
348#define __S001 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_READ)
349#define __S010 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_WRITE)
350#define __S011 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_READ | _PAGE_WRITE)
351#define __S100 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE)
352#define __S101 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_READ)
353#define __S110 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_WRITE)
354#define __S111 __pgprot(__MMAP_COMMON | _PAGE_SHARED | _PAGE_EXECUTE | _PAGE_READ | _PAGE_WRITE)
355 181
356/* Make it a device mapping for maximum safety (e.g. for mapping device 182/* Make it a device mapping for maximum safety (e.g. for mapping device
357 registers into user-space via /dev/map). */ 183 registers into user-space via /dev/map). */
@@ -453,12 +279,6 @@ static inline pte_t pte_mkhuge(pte_t pte) { set_pte(&pte, __pte(pte_val(pte) | _
453static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 279static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
454{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; } 280{ set_pte(&pte, __pte((pte_val(pte) & _PAGE_CHG_MASK) | pgprot_val(newprot))); return pte; }
455 281
456typedef pte_t *pte_addr_t;
457#define pgtable_cache_init() do { } while (0)
458
459extern void update_mmu_cache(struct vm_area_struct * vma,
460 unsigned long address, pte_t pte);
461
462/* Encode and decode a swap entry */ 282/* Encode and decode a swap entry */
463#define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c)) 283#define __swp_type(x) (((x).val & 3) + (((x).val >> 1) & 0x3c))
464#define __swp_offset(x) ((x).val >> 8) 284#define __swp_offset(x) ((x).val >> 8)
@@ -471,26 +291,9 @@ extern void update_mmu_cache(struct vm_area_struct * vma,
471#define pte_to_pgoff(pte) (pte_val(pte)) 291#define pte_to_pgoff(pte) (pte_val(pte))
472#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE }) 292#define pgoff_to_pte(off) ((pte_t) { (off) | _PAGE_FILE })
473 293
474/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
475#define PageSkip(page) (0)
476#define kern_addr_valid(addr) (1)
477
478#define io_remap_pfn_range(vma, vaddr, pfn, size, prot) \
479 remap_pfn_range(vma, vaddr, pfn, size, prot)
480
481#endif /* !__ASSEMBLY__ */ 294#endif /* !__ASSEMBLY__ */
482 295
483/*
484 * No page table caches to initialise
485 */
486#define pgtable_cache_init() do { } while (0)
487
488#define pte_pfn(x) (((unsigned long)((x).pte)) >> PAGE_SHIFT)
489#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 296#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
490#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot)) 297#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
491 298
492extern pgd_t swapper_pg_dir[PTRS_PER_PGD]; 299#endif /* __ASM_SH_PGTABLE_64_H */
493
494#include <asm-generic/pgtable.h>
495
496#endif /* __ASM_SH64_PGTABLE_H */
diff --git a/include/asm-sh/posix_types.h b/include/asm-sh/posix_types.h
index 0a3d2f54ab27..4b9d11c9fc77 100644
--- a/include/asm-sh/posix_types.h
+++ b/include/asm-sh/posix_types.h
@@ -1,122 +1,7 @@
1#ifndef __ASM_SH_POSIX_TYPES_H 1#ifdef __KERNEL__
2#define __ASM_SH_POSIX_TYPES_H 2# ifdef CONFIG_SUPERH32
3 3# include "posix_types_32.h"
4/* 4# else
5 * This file is generally used by user-level software, so you need to 5# include "posix_types_64.h"
6 * be a little careful about namespace pollution etc. Also, we cannot 6# endif
7 * assume GCC is being used. 7#endif /* __KERNEL__ */
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t;
48
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
50
51#undef __FD_SET
52static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
53{
54 unsigned long __tmp = __fd / __NFDBITS;
55 unsigned long __rem = __fd % __NFDBITS;
56 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
57}
58
59#undef __FD_CLR
60static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
61{
62 unsigned long __tmp = __fd / __NFDBITS;
63 unsigned long __rem = __fd % __NFDBITS;
64 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
65}
66
67
68#undef __FD_ISSET
69static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
70{
71 unsigned long __tmp = __fd / __NFDBITS;
72 unsigned long __rem = __fd % __NFDBITS;
73 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
74}
75
76/*
77 * This will unroll the loop for the normal constant case (8 ints,
78 * for a 256-bit fd_set)
79 */
80#undef __FD_ZERO
81static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
82{
83 unsigned long *__tmp = __p->fds_bits;
84 int __i;
85
86 if (__builtin_constant_p(__FDSET_LONGS)) {
87 switch (__FDSET_LONGS) {
88 case 16:
89 __tmp[ 0] = 0; __tmp[ 1] = 0;
90 __tmp[ 2] = 0; __tmp[ 3] = 0;
91 __tmp[ 4] = 0; __tmp[ 5] = 0;
92 __tmp[ 6] = 0; __tmp[ 7] = 0;
93 __tmp[ 8] = 0; __tmp[ 9] = 0;
94 __tmp[10] = 0; __tmp[11] = 0;
95 __tmp[12] = 0; __tmp[13] = 0;
96 __tmp[14] = 0; __tmp[15] = 0;
97 return;
98
99 case 8:
100 __tmp[ 0] = 0; __tmp[ 1] = 0;
101 __tmp[ 2] = 0; __tmp[ 3] = 0;
102 __tmp[ 4] = 0; __tmp[ 5] = 0;
103 __tmp[ 6] = 0; __tmp[ 7] = 0;
104 return;
105
106 case 4:
107 __tmp[ 0] = 0; __tmp[ 1] = 0;
108 __tmp[ 2] = 0; __tmp[ 3] = 0;
109 return;
110 }
111 }
112 __i = __FDSET_LONGS;
113 while (__i) {
114 __i--;
115 *__tmp = 0;
116 __tmp++;
117 }
118}
119
120#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
121
122#endif /* __ASM_SH_POSIX_TYPES_H */
diff --git a/include/asm-sh/posix_types_32.h b/include/asm-sh/posix_types_32.h
new file mode 100644
index 000000000000..0a3d2f54ab27
--- /dev/null
+++ b/include/asm-sh/posix_types_32.h
@@ -0,0 +1,122 @@
1#ifndef __ASM_SH_POSIX_TYPES_H
2#define __ASM_SH_POSIX_TYPES_H
3
4/*
5 * This file is generally used by user-level software, so you need to
6 * be a little careful about namespace pollution etc. Also, we cannot
7 * assume GCC is being used.
8 */
9
10typedef unsigned long __kernel_ino_t;
11typedef unsigned short __kernel_mode_t;
12typedef unsigned short __kernel_nlink_t;
13typedef long __kernel_off_t;
14typedef int __kernel_pid_t;
15typedef unsigned short __kernel_ipc_pid_t;
16typedef unsigned short __kernel_uid_t;
17typedef unsigned short __kernel_gid_t;
18typedef unsigned int __kernel_size_t;
19typedef int __kernel_ssize_t;
20typedef int __kernel_ptrdiff_t;
21typedef long __kernel_time_t;
22typedef long __kernel_suseconds_t;
23typedef long __kernel_clock_t;
24typedef int __kernel_timer_t;
25typedef int __kernel_clockid_t;
26typedef int __kernel_daddr_t;
27typedef char * __kernel_caddr_t;
28typedef unsigned short __kernel_uid16_t;
29typedef unsigned short __kernel_gid16_t;
30typedef unsigned int __kernel_uid32_t;
31typedef unsigned int __kernel_gid32_t;
32
33typedef unsigned short __kernel_old_uid_t;
34typedef unsigned short __kernel_old_gid_t;
35typedef unsigned short __kernel_old_dev_t;
36
37#ifdef __GNUC__
38typedef long long __kernel_loff_t;
39#endif
40
41typedef struct {
42#if defined(__KERNEL__) || defined(__USE_ALL)
43 int val[2];
44#else /* !defined(__KERNEL__) && !defined(__USE_ALL) */
45 int __val[2];
46#endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */
47} __kernel_fsid_t;
48
49#if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2)
50
51#undef __FD_SET
52static __inline__ void __FD_SET(unsigned long __fd, __kernel_fd_set *__fdsetp)
53{
54 unsigned long __tmp = __fd / __NFDBITS;
55 unsigned long __rem = __fd % __NFDBITS;
56 __fdsetp->fds_bits[__tmp] |= (1UL<<__rem);
57}
58
59#undef __FD_CLR
60static __inline__ void __FD_CLR(unsigned long __fd, __kernel_fd_set *__fdsetp)
61{
62 unsigned long __tmp = __fd / __NFDBITS;
63 unsigned long __rem = __fd % __NFDBITS;
64 __fdsetp->fds_bits[__tmp] &= ~(1UL<<__rem);
65}
66
67
68#undef __FD_ISSET
69static __inline__ int __FD_ISSET(unsigned long __fd, const __kernel_fd_set *__p)
70{
71 unsigned long __tmp = __fd / __NFDBITS;
72 unsigned long __rem = __fd % __NFDBITS;
73 return (__p->fds_bits[__tmp] & (1UL<<__rem)) != 0;
74}
75
76/*
77 * This will unroll the loop for the normal constant case (8 ints,
78 * for a 256-bit fd_set)
79 */
80#undef __FD_ZERO
81static __inline__ void __FD_ZERO(__kernel_fd_set *__p)
82{
83 unsigned long *__tmp = __p->fds_bits;
84 int __i;
85
86 if (__builtin_constant_p(__FDSET_LONGS)) {
87 switch (__FDSET_LONGS) {
88 case 16:
89 __tmp[ 0] = 0; __tmp[ 1] = 0;
90 __tmp[ 2] = 0; __tmp[ 3] = 0;
91 __tmp[ 4] = 0; __tmp[ 5] = 0;
92 __tmp[ 6] = 0; __tmp[ 7] = 0;
93 __tmp[ 8] = 0; __tmp[ 9] = 0;
94 __tmp[10] = 0; __tmp[11] = 0;
95 __tmp[12] = 0; __tmp[13] = 0;
96 __tmp[14] = 0; __tmp[15] = 0;
97 return;
98
99 case 8:
100 __tmp[ 0] = 0; __tmp[ 1] = 0;
101 __tmp[ 2] = 0; __tmp[ 3] = 0;
102 __tmp[ 4] = 0; __tmp[ 5] = 0;
103 __tmp[ 6] = 0; __tmp[ 7] = 0;
104 return;
105
106 case 4:
107 __tmp[ 0] = 0; __tmp[ 1] = 0;
108 __tmp[ 2] = 0; __tmp[ 3] = 0;
109 return;
110 }
111 }
112 __i = __FDSET_LONGS;
113 while (__i) {
114 __i--;
115 *__tmp = 0;
116 __tmp++;
117 }
118}
119
120#endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */
121
122#endif /* __ASM_SH_POSIX_TYPES_H */
diff --git a/include/asm-sh64/posix_types.h b/include/asm-sh/posix_types_64.h
index 0620317a6f0f..0620317a6f0f 100644
--- a/include/asm-sh64/posix_types.h
+++ b/include/asm-sh/posix_types_64.h
diff --git a/include/asm-sh/processor.h b/include/asm-sh/processor.h
index fda68480f377..c9b14161f73d 100644
--- a/include/asm-sh/processor.h
+++ b/include/asm-sh/processor.h
@@ -1,32 +1,10 @@
1/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_H 1#ifndef __ASM_SH_PROCESSOR_H
9#define __ASM_SH_PROCESSOR_H 2#define __ASM_SH_PROCESSOR_H
10#ifdef __KERNEL__
11 3
12#include <linux/compiler.h>
13#include <asm/page.h>
14#include <asm/types.h>
15#include <asm/cache.h>
16#include <asm/ptrace.h>
17#include <asm/cpu-features.h> 4#include <asm/cpu-features.h>
5#include <asm/fpu.h>
18 6
19/* 7#ifndef __ASSEMBLY__
20 * Default implementation of macro that returns current
21 * instruction pointer ("program counter").
22 */
23#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
24
25/* Core Processor Version Register */
26#define CCN_PVR 0xff000030
27#define CCN_CVR 0xff000040
28#define CCN_PRR 0xff000044
29
30/* 8/*
31 * CPU type and hardware bug flags. Kept separately for each CPU. 9 * CPU type and hardware bug flags. Kept separately for each CPU.
32 * 10 *
@@ -39,247 +17,49 @@ enum cpu_type {
39 CPU_SH7619, 17 CPU_SH7619,
40 18
41 /* SH-2A types */ 19 /* SH-2A types */
42 CPU_SH7206, 20 CPU_SH7203, CPU_SH7206, CPU_SH7263,
43 21
44 /* SH-3 types */ 22 /* SH-3 types */
45 CPU_SH7705, CPU_SH7706, CPU_SH7707, 23 CPU_SH7705, CPU_SH7706, CPU_SH7707,
46 CPU_SH7708, CPU_SH7708S, CPU_SH7708R, 24 CPU_SH7708, CPU_SH7708S, CPU_SH7708R,
47 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712, 25 CPU_SH7709, CPU_SH7709A, CPU_SH7710, CPU_SH7712,
48 CPU_SH7720, CPU_SH7729, 26 CPU_SH7720, CPU_SH7721, CPU_SH7729,
49 27
50 /* SH-4 types */ 28 /* SH-4 types */
51 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R, 29 CPU_SH7750, CPU_SH7750S, CPU_SH7750R, CPU_SH7751, CPU_SH7751R,
52 CPU_SH7760, CPU_SH4_202, CPU_SH4_501, 30 CPU_SH7760, CPU_SH4_202, CPU_SH4_501,
53 31
54 /* SH-4A types */ 32 /* SH-4A types */
55 CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3, 33 CPU_SH7763, CPU_SH7770, CPU_SH7780, CPU_SH7781, CPU_SH7785, CPU_SHX3,
56 34
57 /* SH4AL-DSP types */ 35 /* SH4AL-DSP types */
58 CPU_SH7343, CPU_SH7722, 36 CPU_SH7343, CPU_SH7722,
59 37
38 /* SH-5 types */
39 CPU_SH5_101, CPU_SH5_103,
40
60 /* Unknown subtype */ 41 /* Unknown subtype */
61 CPU_SH_NONE 42 CPU_SH_NONE
62}; 43};
63 44
64struct sh_cpuinfo { 45/* Forward decl */
65 unsigned int type; 46struct sh_cpuinfo;
66 unsigned long loops_per_jiffy;
67 unsigned long asid_cache;
68
69 struct cache_info icache; /* Primary I-cache */
70 struct cache_info dcache; /* Primary D-cache */
71 struct cache_info scache; /* Secondary cache */
72
73 unsigned long flags;
74} __attribute__ ((aligned(L1_CACHE_BYTES)));
75
76extern struct sh_cpuinfo cpu_data[];
77#define boot_cpu_data cpu_data[0]
78#define current_cpu_data cpu_data[smp_processor_id()]
79#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
80
81/*
82 * User space process size: 2GB.
83 *
84 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
85 */
86#define TASK_SIZE 0x7c000000UL
87
88/* This decides where the kernel will search for a free chunk of vm
89 * space during mmap's.
90 */
91#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
92
93/*
94 * Bit of SR register
95 *
96 * FD-bit:
97 * When it's set, it means the processor doesn't have right to use FPU,
98 * and it results exception when the floating operation is executed.
99 *
100 * IMASK-bit:
101 * Interrupt level mask
102 */
103#define SR_FD 0x00008000
104#define SR_DSP 0x00001000
105#define SR_IMASK 0x000000f0
106
107/*
108 * FPU structure and data
109 */
110
111struct sh_fpu_hard_struct {
112 unsigned long fp_regs[16];
113 unsigned long xfp_regs[16];
114 unsigned long fpscr;
115 unsigned long fpul;
116
117 long status; /* software status information */
118};
119
120/* Dummy fpu emulator */
121struct sh_fpu_soft_struct {
122 unsigned long fp_regs[16];
123 unsigned long xfp_regs[16];
124 unsigned long fpscr;
125 unsigned long fpul;
126
127 unsigned char lookahead;
128 unsigned long entry_pc;
129};
130
131union sh_fpu_union {
132 struct sh_fpu_hard_struct hard;
133 struct sh_fpu_soft_struct soft;
134};
135
136struct thread_struct {
137 /* Saved registers when thread is descheduled */
138 unsigned long sp;
139 unsigned long pc;
140
141 /* Hardware debugging registers */
142 unsigned long ubc_pc;
143
144 /* floating point info */
145 union sh_fpu_union fpu;
146};
147
148typedef struct {
149 unsigned long seg;
150} mm_segment_t;
151
152/* Count of active tasks with UBC settings */
153extern int ubc_usercnt;
154 47
155#define INIT_THREAD { \ 48/* arch/sh/kernel/setup.c */
156 .sp = sizeof(init_stack) + (long) &init_stack, \ 49const char *get_cpu_subtype(struct sh_cpuinfo *c);
157}
158
159/*
160 * Do necessary setup to start up a newly executed thread.
161 */
162#define start_thread(regs, new_pc, new_sp) \
163 set_fs(USER_DS); \
164 regs->pr = 0; \
165 regs->sr = SR_FD; /* User mode. */ \
166 regs->pc = new_pc; \
167 regs->regs[15] = new_sp
168
169/* Forward declaration, a strange C thing */
170struct task_struct;
171struct mm_struct;
172
173/* Free all resources held by a thread. */
174extern void release_thread(struct task_struct *);
175
176/* Prepare to copy thread state - unlazy all lazy status */
177#define prepare_to_copy(tsk) do { } while (0)
178
179/*
180 * create a kernel thread without removing it from tasklists
181 */
182extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
183
184/* Copy and release all segment info associated with a VM */
185#define copy_segments(p, mm) do { } while(0)
186#define release_segments(mm) do { } while(0)
187
188/*
189 * FPU lazy state save handling.
190 */
191
192static __inline__ void disable_fpu(void)
193{
194 unsigned long __dummy;
195
196 /* Set FD flag in SR */
197 __asm__ __volatile__("stc sr, %0\n\t"
198 "or %1, %0\n\t"
199 "ldc %0, sr"
200 : "=&r" (__dummy)
201 : "r" (SR_FD));
202}
203
204static __inline__ void enable_fpu(void)
205{
206 unsigned long __dummy;
207
208 /* Clear out FD flag in SR */
209 __asm__ __volatile__("stc sr, %0\n\t"
210 "and %1, %0\n\t"
211 "ldc %0, sr"
212 : "=&r" (__dummy)
213 : "r" (~SR_FD));
214}
215
216static __inline__ void release_fpu(struct pt_regs *regs)
217{
218 regs->sr |= SR_FD;
219}
220
221static __inline__ void grab_fpu(struct pt_regs *regs)
222{
223 regs->sr &= ~SR_FD;
224}
225
226extern void save_fpu(struct task_struct *__tsk, struct pt_regs *regs);
227
228#define unlazy_fpu(tsk, regs) do { \
229 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
230 save_fpu(tsk, regs); \
231 } \
232} while (0)
233
234#define clear_fpu(tsk, regs) do { \
235 if (test_tsk_thread_flag(tsk, TIF_USEDFPU)) { \
236 clear_tsk_thread_flag(tsk, TIF_USEDFPU); \
237 release_fpu(regs); \
238 } \
239} while (0)
240
241/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
242#define FPSCR_INIT 0x00080000
243
244#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
245#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
246
247/*
248 * Return saved PC of a blocked thread.
249 */
250#define thread_saved_pc(tsk) (tsk->thread.pc)
251
252void show_trace(struct task_struct *tsk, unsigned long *sp,
253 struct pt_regs *regs);
254extern unsigned long get_wchan(struct task_struct *p);
255
256#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
257#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
258
259#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
260#define cpu_relax() barrier()
261
262#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
263 defined(CONFIG_CPU_SH4)
264#define PREFETCH_STRIDE L1_CACHE_BYTES
265#define ARCH_HAS_PREFETCH
266#define ARCH_HAS_PREFETCHW
267static inline void prefetch(void *x)
268{
269 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
270}
271
272#define prefetchw(x) prefetch(x)
273#endif
274 50
275#ifdef CONFIG_VSYSCALL 51#ifdef CONFIG_VSYSCALL
276extern int vsyscall_init(void); 52int vsyscall_init(void);
277#else 53#else
278#define vsyscall_init() do { } while (0) 54#define vsyscall_init() do { } while (0)
279#endif 55#endif
280 56
281/* arch/sh/kernel/setup.c */ 57#endif /* __ASSEMBLY__ */
282const char *get_cpu_subtype(struct sh_cpuinfo *c); 58
59#ifdef CONFIG_SUPERH32
60# include "processor_32.h"
61#else
62# include "processor_64.h"
63#endif
283 64
284#endif /* __KERNEL__ */
285#endif /* __ASM_SH_PROCESSOR_H */ 65#endif /* __ASM_SH_PROCESSOR_H */
diff --git a/include/asm-sh/processor_32.h b/include/asm-sh/processor_32.h
new file mode 100644
index 000000000000..a7edaa1a870c
--- /dev/null
+++ b/include/asm-sh/processor_32.h
@@ -0,0 +1,215 @@
1/*
2 * include/asm-sh/processor.h
3 *
4 * Copyright (C) 1999, 2000 Niibe Yutaka
5 * Copyright (C) 2002, 2003 Paul Mundt
6 */
7
8#ifndef __ASM_SH_PROCESSOR_32_H
9#define __ASM_SH_PROCESSOR_32_H
10#ifdef __KERNEL__
11
12#include <linux/compiler.h>
13#include <asm/page.h>
14#include <asm/types.h>
15#include <asm/cache.h>
16#include <asm/ptrace.h>
17
18/*
19 * Default implementation of macro that returns current
20 * instruction pointer ("program counter").
21 */
22#define current_text_addr() ({ void *pc; __asm__("mova 1f, %0\n1:":"=z" (pc)); pc; })
23
24/* Core Processor Version Register */
25#define CCN_PVR 0xff000030
26#define CCN_CVR 0xff000040
27#define CCN_PRR 0xff000044
28
29struct sh_cpuinfo {
30 unsigned int type;
31 unsigned long loops_per_jiffy;
32 unsigned long asid_cache;
33
34 struct cache_info icache; /* Primary I-cache */
35 struct cache_info dcache; /* Primary D-cache */
36 struct cache_info scache; /* Secondary cache */
37
38 unsigned long flags;
39} __attribute__ ((aligned(L1_CACHE_BYTES)));
40
41extern struct sh_cpuinfo cpu_data[];
42#define boot_cpu_data cpu_data[0]
43#define current_cpu_data cpu_data[smp_processor_id()]
44#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
45
46/*
47 * User space process size: 2GB.
48 *
49 * Since SH7709 and SH7750 have "area 7", we can't use 0x7c000000--0x7fffffff
50 */
51#define TASK_SIZE 0x7c000000UL
52
53/* This decides where the kernel will search for a free chunk of vm
54 * space during mmap's.
55 */
56#define TASK_UNMAPPED_BASE (TASK_SIZE / 3)
57
58/*
59 * Bit of SR register
60 *
61 * FD-bit:
62 * When it's set, it means the processor doesn't have right to use FPU,
63 * and it results exception when the floating operation is executed.
64 *
65 * IMASK-bit:
66 * Interrupt level mask
67 */
68#define SR_DSP 0x00001000
69#define SR_IMASK 0x000000f0
70
71/*
72 * FPU structure and data
73 */
74
75struct sh_fpu_hard_struct {
76 unsigned long fp_regs[16];
77 unsigned long xfp_regs[16];
78 unsigned long fpscr;
79 unsigned long fpul;
80
81 long status; /* software status information */
82};
83
84/* Dummy fpu emulator */
85struct sh_fpu_soft_struct {
86 unsigned long fp_regs[16];
87 unsigned long xfp_regs[16];
88 unsigned long fpscr;
89 unsigned long fpul;
90
91 unsigned char lookahead;
92 unsigned long entry_pc;
93};
94
95union sh_fpu_union {
96 struct sh_fpu_hard_struct hard;
97 struct sh_fpu_soft_struct soft;
98};
99
100struct thread_struct {
101 /* Saved registers when thread is descheduled */
102 unsigned long sp;
103 unsigned long pc;
104
105 /* Hardware debugging registers */
106 unsigned long ubc_pc;
107
108 /* floating point info */
109 union sh_fpu_union fpu;
110};
111
112typedef struct {
113 unsigned long seg;
114} mm_segment_t;
115
116/* Count of active tasks with UBC settings */
117extern int ubc_usercnt;
118
119#define INIT_THREAD { \
120 .sp = sizeof(init_stack) + (long) &init_stack, \
121}
122
123/*
124 * Do necessary setup to start up a newly executed thread.
125 */
126#define start_thread(regs, new_pc, new_sp) \
127 set_fs(USER_DS); \
128 regs->pr = 0; \
129 regs->sr = SR_FD; /* User mode. */ \
130 regs->pc = new_pc; \
131 regs->regs[15] = new_sp
132
133/* Forward declaration, a strange C thing */
134struct task_struct;
135struct mm_struct;
136
137/* Free all resources held by a thread. */
138extern void release_thread(struct task_struct *);
139
140/* Prepare to copy thread state - unlazy all lazy status */
141#define prepare_to_copy(tsk) do { } while (0)
142
143/*
144 * create a kernel thread without removing it from tasklists
145 */
146extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
147
148/* Copy and release all segment info associated with a VM */
149#define copy_segments(p, mm) do { } while(0)
150#define release_segments(mm) do { } while(0)
151
152/*
153 * FPU lazy state save handling.
154 */
155
156static __inline__ void disable_fpu(void)
157{
158 unsigned long __dummy;
159
160 /* Set FD flag in SR */
161 __asm__ __volatile__("stc sr, %0\n\t"
162 "or %1, %0\n\t"
163 "ldc %0, sr"
164 : "=&r" (__dummy)
165 : "r" (SR_FD));
166}
167
168static __inline__ void enable_fpu(void)
169{
170 unsigned long __dummy;
171
172 /* Clear out FD flag in SR */
173 __asm__ __volatile__("stc sr, %0\n\t"
174 "and %1, %0\n\t"
175 "ldc %0, sr"
176 : "=&r" (__dummy)
177 : "r" (~SR_FD));
178}
179
180/* Double presision, NANS as NANS, rounding to nearest, no exceptions */
181#define FPSCR_INIT 0x00080000
182
183#define FPSCR_CAUSE_MASK 0x0001f000 /* Cause bits */
184#define FPSCR_FLAG_MASK 0x0000007c /* Flag bits */
185
186/*
187 * Return saved PC of a blocked thread.
188 */
189#define thread_saved_pc(tsk) (tsk->thread.pc)
190
191void show_trace(struct task_struct *tsk, unsigned long *sp,
192 struct pt_regs *regs);
193extern unsigned long get_wchan(struct task_struct *p);
194
195#define KSTK_EIP(tsk) (task_pt_regs(tsk)->pc)
196#define KSTK_ESP(tsk) (task_pt_regs(tsk)->regs[15])
197
198#define cpu_sleep() __asm__ __volatile__ ("sleep" : : : "memory")
199#define cpu_relax() barrier()
200
201#if defined(CONFIG_CPU_SH2A) || defined(CONFIG_CPU_SH3) || \
202 defined(CONFIG_CPU_SH4)
203#define PREFETCH_STRIDE L1_CACHE_BYTES
204#define ARCH_HAS_PREFETCH
205#define ARCH_HAS_PREFETCHW
206static inline void prefetch(void *x)
207{
208 __asm__ __volatile__ ("pref @%0\n\t" : : "r" (x) : "memory");
209}
210
211#define prefetchw(x) prefetch(x)
212#endif
213
214#endif /* __KERNEL__ */
215#endif /* __ASM_SH_PROCESSOR_32_H */
diff --git a/include/asm-sh64/processor.h b/include/asm-sh/processor_64.h
index eb2bee4b47b9..99c22b14a85b 100644
--- a/include/asm-sh64/processor.h
+++ b/include/asm-sh/processor_64.h
@@ -1,28 +1,25 @@
1#ifndef __ASM_SH64_PROCESSOR_H 1#ifndef __ASM_SH_PROCESSOR_64_H
2#define __ASM_SH64_PROCESSOR_H 2#define __ASM_SH_PROCESSOR_64_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/processor_64.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/processor.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt 8 * Copyright (C) 2003 Paul Mundt
13 * Copyright (C) 2004 Richard Curnow 9 * Copyright (C) 2004 Richard Curnow
14 * 10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
15 */ 14 */
16
17#include <asm/page.h>
18
19#ifndef __ASSEMBLY__ 15#ifndef __ASSEMBLY__
20 16
17#include <linux/compiler.h>
18#include <asm/page.h>
21#include <asm/types.h> 19#include <asm/types.h>
22#include <asm/cache.h> 20#include <asm/cache.h>
23#include <asm/registers.h> 21#include <asm/ptrace.h>
24#include <linux/threads.h> 22#include <asm/cpu/registers.h>
25#include <linux/compiler.h>
26 23
27/* 24/*
28 * Default implementation of macro that returns current 25 * Default implementation of macro that returns current
@@ -40,15 +37,6 @@ __asm__("gettr tr0, %1\n\t" \
40pc; }) 37pc; })
41 38
42/* 39/*
43 * CPU type and hardware bug flags. Kept separately for each CPU.
44 */
45enum cpu_type {
46 CPU_SH5_101,
47 CPU_SH5_103,
48 CPU_SH_NONE
49};
50
51/*
52 * TLB information structure 40 * TLB information structure
53 * 41 *
54 * Defined for both I and D tlb, per-processor. 42 * Defined for both I and D tlb, per-processor.
@@ -67,28 +55,26 @@ struct tlb_info {
67struct sh_cpuinfo { 55struct sh_cpuinfo {
68 enum cpu_type type; 56 enum cpu_type type;
69 unsigned long loops_per_jiffy; 57 unsigned long loops_per_jiffy;
58 unsigned long asid_cache;
70 59
71 char hard_math;
72
73 unsigned long *pgd_quick;
74 unsigned long *pmd_quick;
75 unsigned long *pte_quick;
76 unsigned long pgtable_cache_sz;
77 unsigned int cpu_clock, master_clock, bus_clock, module_clock; 60 unsigned int cpu_clock, master_clock, bus_clock, module_clock;
78 61
79 /* Cache info */ 62 /* Cache info */
80 struct cache_info icache; 63 struct cache_info icache;
81 struct cache_info dcache; 64 struct cache_info dcache;
65 struct cache_info scache;
82 66
83 /* TLB info */ 67 /* TLB info */
84 struct tlb_info itlb; 68 struct tlb_info itlb;
85 struct tlb_info dtlb; 69 struct tlb_info dtlb;
86};
87 70
88extern struct sh_cpuinfo boot_cpu_data; 71 unsigned long flags;
72};
89 73
90#define cpu_data (&boot_cpu_data) 74extern struct sh_cpuinfo cpu_data[];
91#define current_cpu_data boot_cpu_data 75#define boot_cpu_data cpu_data[0]
76#define current_cpu_data cpu_data[smp_processor_id()]
77#define raw_current_cpu_data cpu_data[raw_smp_processor_id()]
92 78
93#endif 79#endif
94 80
@@ -116,8 +102,6 @@ extern struct sh_cpuinfo boot_cpu_data;
116 * Single step bit 102 * Single step bit
117 * 103 *
118 */ 104 */
119#define SR_FD 0x00008000
120
121#if defined(CONFIG_SH64_SR_WATCH) 105#if defined(CONFIG_SH64_SR_WATCH)
122#define SR_MMU 0x84000000 106#define SR_MMU 0x84000000
123#else 107#else
@@ -178,6 +162,10 @@ struct thread_struct {
178 union sh_fpu_union fpu; 162 union sh_fpu_union fpu;
179}; 163};
180 164
165typedef struct {
166 unsigned long seg;
167} mm_segment_t;
168
181#define INIT_MMAP \ 169#define INIT_MMAP \
182{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL } 170{ &init_mm, 0, 0, NULL, PAGE_SHARED, VM_READ | VM_WRITE | VM_EXEC, 1, NULL, NULL }
183 171
@@ -200,12 +188,12 @@ extern struct pt_regs fake_swapper_regs;
200 */ 188 */
201#define SR_USER (SR_MMU | SR_FD) 189#define SR_USER (SR_MMU | SR_FD)
202 190
203#define start_thread(regs, new_pc, new_sp) \ 191#define start_thread(regs, new_pc, new_sp) \
204 set_fs(USER_DS); \ 192 set_fs(USER_DS); \
205 regs->sr = SR_USER; /* User mode. */ \ 193 regs->sr = SR_USER; /* User mode. */ \
206 regs->pc = new_pc - 4; /* Compensate syscall exit */ \ 194 regs->pc = new_pc - 4; /* Compensate syscall exit */ \
207 regs->pc |= 1; /* Set SHmedia ! */ \ 195 regs->pc |= 1; /* Set SHmedia ! */ \
208 regs->regs[18] = 0; \ 196 regs->regs[18] = 0; \
209 regs->regs[15] = new_sp 197 regs->regs[15] = new_sp
210 198
211/* Forward declaration, a strange C thing */ 199/* Forward declaration, a strange C thing */
@@ -229,7 +217,7 @@ extern int kernel_thread(int (*fn)(void *), void * arg, unsigned long flags);
229 * FPU lazy state save handling. 217 * FPU lazy state save handling.
230 */ 218 */
231 219
232static inline void release_fpu(void) 220static inline void disable_fpu(void)
233{ 221{
234 unsigned long long __dummy; 222 unsigned long long __dummy;
235 223
@@ -241,7 +229,7 @@ static inline void release_fpu(void)
241 : "r" (SR_FD)); 229 : "r" (SR_FD));
242} 230}
243 231
244static inline void grab_fpu(void) 232static inline void enable_fpu(void)
245{ 233{
246 unsigned long long __dummy; 234 unsigned long long __dummy;
247 235
@@ -262,11 +250,12 @@ static inline void grab_fpu(void)
262#define FPSCR_INIT 0x00000000 250#define FPSCR_INIT 0x00000000
263#endif 251#endif
264 252
265/* Save the current FP regs */ 253#ifdef CONFIG_SH_FPU
266void fpsave(struct sh_fpu_hard_struct *fpregs);
267
268/* Initialise the FP state of a task */ 254/* Initialise the FP state of a task */
269void fpinit(struct sh_fpu_hard_struct *fpregs); 255void fpinit(struct sh_fpu_hard_struct *fpregs);
256#else
257#define fpinit(fpregs) do { } while (0)
258#endif
270 259
271extern struct task_struct *last_task_used_math; 260extern struct task_struct *last_task_used_math;
272 261
@@ -283,5 +272,4 @@ extern unsigned long get_wchan(struct task_struct *p);
283#define cpu_relax() barrier() 272#define cpu_relax() barrier()
284 273
285#endif /* __ASSEMBLY__ */ 274#endif /* __ASSEMBLY__ */
286#endif /* __ASM_SH64_PROCESSOR_H */ 275#endif /* __ASM_SH_PROCESSOR_64_H */
287
diff --git a/include/asm-sh/ptrace.h b/include/asm-sh/ptrace.h
index b9789c8b4d15..8d6c92b3e770 100644
--- a/include/asm-sh/ptrace.h
+++ b/include/asm-sh/ptrace.h
@@ -5,7 +5,16 @@
5 * Copyright (C) 1999, 2000 Niibe Yutaka 5 * Copyright (C) 1999, 2000 Niibe Yutaka
6 * 6 *
7 */ 7 */
8 8#if defined(__SH5__) || defined(CONFIG_SUPERH64)
9struct pt_regs {
10 unsigned long long pc;
11 unsigned long long sr;
12 unsigned long long syscall_nr;
13 unsigned long long regs[63];
14 unsigned long long tregs[8];
15 unsigned long long pad[2];
16};
17#else
9/* 18/*
10 * GCC defines register number like this: 19 * GCC defines register number like this:
11 * ----------------------------- 20 * -----------------------------
@@ -28,7 +37,7 @@
28 37
29#define REG_PR 17 38#define REG_PR 17
30#define REG_SR 18 39#define REG_SR 18
31#define REG_GBR 19 40#define REG_GBR 19
32#define REG_MACH 20 41#define REG_MACH 20
33#define REG_MACL 21 42#define REG_MACL 21
34 43
@@ -80,10 +89,14 @@ struct pt_dspregs {
80 89
81#define PTRACE_GETDSPREGS 55 90#define PTRACE_GETDSPREGS 55
82#define PTRACE_SETDSPREGS 56 91#define PTRACE_SETDSPREGS 56
92#endif
83 93
84#ifdef __KERNEL__ 94#ifdef __KERNEL__
85#define user_mode(regs) (((regs)->sr & 0x40000000)==0) 95#include <asm/addrspace.h>
86#define instruction_pointer(regs) ((regs)->pc) 96
97#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
98#define instruction_pointer(regs) ((unsigned long)(regs)->pc)
99
87extern void show_regs(struct pt_regs *); 100extern void show_regs(struct pt_regs *);
88 101
89#ifdef CONFIG_SH_DSP 102#ifdef CONFIG_SH_DSP
@@ -100,10 +113,13 @@ static inline unsigned long profile_pc(struct pt_regs *regs)
100{ 113{
101 unsigned long pc = instruction_pointer(regs); 114 unsigned long pc = instruction_pointer(regs);
102 115
103 if (pc >= 0xa0000000UL && pc < 0xc0000000UL) 116#ifdef P2SEG
117 if (pc >= P2SEG && pc < P3SEG)
104 pc -= 0x20000000; 118 pc -= 0x20000000;
119#endif
120
105 return pc; 121 return pc;
106} 122}
107#endif 123#endif /* __KERNEL__ */
108 124
109#endif /* __ASM_SH_PTRACE_H */ 125#endif /* __ASM_SH_PTRACE_H */
diff --git a/include/asm-sh/r7780rp.h b/include/asm-sh/r7780rp.h
index de37f933aa42..bdecea0840a0 100644
--- a/include/asm-sh/r7780rp.h
+++ b/include/asm-sh/r7780rp.h
@@ -121,21 +121,6 @@
121 121
122#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */ 122#define IRLCNTR1 (PA_BCR + 0) /* Interrupt Control Register1 */
123 123
124#define IRQ_PCISLOT1 0 /* PCI Slot #1 IRQ */
125#define IRQ_PCISLOT2 1 /* PCI Slot #2 IRQ */
126#define IRQ_PCISLOT3 2 /* PCI Slot #3 IRQ */
127#define IRQ_PCISLOT4 3 /* PCI Slot #4 IRQ */
128#define IRQ_CFINST 5 /* CF Card Insert IRQ */
129#define IRQ_M66596 6 /* M66596 IRQ */
130#define IRQ_SDCARD 7 /* SD Card IRQ */
131#define IRQ_TUCHPANEL 8 /* Touch Panel IRQ */
132#define IRQ_SCI 9 /* SCI IRQ */
133#define IRQ_2SERIAL 10 /* Serial IRQ */
134#define IRQ_EXTENTION 11 /* EXTn IRQ */
135#define IRQ_ONETH 12 /* On board Ethernet IRQ */
136#define IRQ_PSW 13 /* Push Switch IRQ */
137#define IRQ_ZIGBEE 14 /* Ziggbee IO IRQ */
138
139#define IVDR_CK_ON 8 /* iVDR Clock ON */ 124#define IVDR_CK_ON 8 /* iVDR Clock ON */
140 125
141#elif defined(CONFIG_SH_R7785RP) 126#elif defined(CONFIG_SH_R7785RP)
@@ -192,13 +177,19 @@
192 177
193#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0) 178#define IRQ_AX88796 (HL_FPGA_IRQ_BASE + 0)
194#define IRQ_CF (HL_FPGA_IRQ_BASE + 1) 179#define IRQ_CF (HL_FPGA_IRQ_BASE + 1)
195#ifndef IRQ_PSW
196#define IRQ_PSW (HL_FPGA_IRQ_BASE + 2) 180#define IRQ_PSW (HL_FPGA_IRQ_BASE + 2)
197#endif 181#define IRQ_EXT0 (HL_FPGA_IRQ_BASE + 3)
198#define IRQ_EXT1 (HL_FPGA_IRQ_BASE + 3) 182#define IRQ_EXT1 (HL_FPGA_IRQ_BASE + 4)
199#define IRQ_EXT4 (HL_FPGA_IRQ_BASE + 4) 183#define IRQ_EXT2 (HL_FPGA_IRQ_BASE + 5)
200 184#define IRQ_EXT3 (HL_FPGA_IRQ_BASE + 6)
201void make_r7780rp_irq(unsigned int irq); 185#define IRQ_EXT4 (HL_FPGA_IRQ_BASE + 7)
186#define IRQ_EXT5 (HL_FPGA_IRQ_BASE + 8)
187#define IRQ_EXT6 (HL_FPGA_IRQ_BASE + 9)
188#define IRQ_EXT7 (HL_FPGA_IRQ_BASE + 10)
189#define IRQ_SMBUS (HL_FPGA_IRQ_BASE + 11)
190#define IRQ_TP (HL_FPGA_IRQ_BASE + 12)
191#define IRQ_RTC (HL_FPGA_IRQ_BASE + 13)
192#define IRQ_TH_ALERT (HL_FPGA_IRQ_BASE + 14)
202 193
203unsigned char *highlander_init_irq_r7780mp(void); 194unsigned char *highlander_init_irq_r7780mp(void);
204unsigned char *highlander_init_irq_r7780rp(void); 195unsigned char *highlander_init_irq_r7780rp(void);
diff --git a/include/asm-sh/rtc.h b/include/asm-sh/rtc.h
index 858da99d37e0..ec45ba8e11d9 100644
--- a/include/asm-sh/rtc.h
+++ b/include/asm-sh/rtc.h
@@ -11,4 +11,6 @@ struct sh_rtc_platform_info {
11 unsigned long capabilities; 11 unsigned long capabilities;
12}; 12};
13 13
14#include <asm/cpu/rtc.h>
15
14#endif /* _ASM_RTC_H */ 16#endif /* _ASM_RTC_H */
diff --git a/include/asm-sh/scatterlist.h b/include/asm-sh/scatterlist.h
index a7d0d1856a99..2084d0373693 100644
--- a/include/asm-sh/scatterlist.h
+++ b/include/asm-sh/scatterlist.h
@@ -13,7 +13,7 @@ struct scatterlist {
13 unsigned int length; 13 unsigned int length;
14}; 14};
15 15
16#define ISA_DMA_THRESHOLD (0x1fffffff) 16#define ISA_DMA_THRESHOLD PHYS_ADDR_MASK
17 17
18/* These macros should be used after a pci_map_sg call has been done 18/* These macros should be used after a pci_map_sg call has been done
19 * to get bus addresses of each of the SG entries and their lengths. 19 * to get bus addresses of each of the SG entries and their lengths.
diff --git a/include/asm-sh/sdk7780.h b/include/asm-sh/sdk7780.h
new file mode 100644
index 000000000000..697dc865f21b
--- /dev/null
+++ b/include/asm-sh/sdk7780.h
@@ -0,0 +1,81 @@
1#ifndef __ASM_SH_RENESAS_SDK7780_H
2#define __ASM_SH_RENESAS_SDK7780_H
3
4/*
5 * linux/include/asm-sh/sdk7780.h
6 *
7 * Renesas Solutions SH7780 SDK Support
8 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
9 *
10 * This file is subject to the terms and conditions of the GNU General Public
11 * License. See the file "COPYING" in the main directory of this archive
12 * for more details.
13 */
14#include <asm/addrspace.h>
15
16/* Box specific addresses. */
17#define SE_AREA0_WIDTH 4 /* Area0: 32bit */
18#define PA_ROM 0xa0000000 /* EPROM */
19#define PA_ROM_SIZE 0x00400000 /* EPROM size 4M byte */
20#define PA_FROM 0xa0800000 /* Flash-ROM */
21#define PA_FROM_SIZE 0x00400000 /* Flash-ROM size 4M byte */
22#define PA_EXT1 0xa4000000
23#define PA_EXT1_SIZE 0x04000000
24#define PA_SDRAM 0xa8000000 /* DDR-SDRAM(Area2/3) 128MB */
25#define PA_SDRAM_SIZE 0x08000000
26
27#define PA_EXT4 0xb0000000
28#define PA_EXT4_SIZE 0x04000000
29#define PA_EXT_USER PA_EXT4 /* User Expansion Space */
30
31#define PA_PERIPHERAL PA_AREA5_IO
32
33/* SRAM/Reserved */
34#define PA_RESERVED (PA_PERIPHERAL + 0)
35/* FPGA base address */
36#define PA_FPGA (PA_PERIPHERAL + 0x01000000)
37/* SMC LAN91C111 */
38#define PA_LAN (PA_PERIPHERAL + 0x01800000)
39
40
41#define FPGA_SRSTR (PA_FPGA + 0x000) /* System reset */
42#define FPGA_IRQ0SR (PA_FPGA + 0x010) /* IRQ0 status */
43#define FPGA_IRQ0MR (PA_FPGA + 0x020) /* IRQ0 mask */
44#define FPGA_BDMR (PA_FPGA + 0x030) /* Board operating mode */
45#define FPGA_INTT0PRTR (PA_FPGA + 0x040) /* Interrupt test mode0 port */
46#define FPGA_INTT0SELR (PA_FPGA + 0x050) /* Int. test mode0 select */
47#define FPGA_INTT1POLR (PA_FPGA + 0x060) /* Int. test mode0 polarity */
48#define FPGA_NMIR (PA_FPGA + 0x070) /* NMI source */
49#define FPGA_NMIMR (PA_FPGA + 0x080) /* NMI mask */
50#define FPGA_IRQR (PA_FPGA + 0x090) /* IRQX source */
51#define FPGA_IRQMR (PA_FPGA + 0x0A0) /* IRQX mask */
52#define FPGA_SLEDR (PA_FPGA + 0x0B0) /* LED control */
53#define PA_LED FPGA_SLEDR
54#define FPGA_MAPSWR (PA_FPGA + 0x0C0) /* Map switch */
55#define FPGA_FPVERR (PA_FPGA + 0x0D0) /* FPGA version */
56#define FPGA_FPDATER (PA_FPGA + 0x0E0) /* FPGA date */
57#define FPGA_RSE (PA_FPGA + 0x100) /* Reset source */
58#define FPGA_EASR (PA_FPGA + 0x110) /* External area select */
59#define FPGA_SPER (PA_FPGA + 0x120) /* Serial port enable */
60#define FPGA_IMSR (PA_FPGA + 0x130) /* Interrupt mode select */
61#define FPGA_PCIMR (PA_FPGA + 0x140) /* PCI Mode */
62#define FPGA_DIPSWMR (PA_FPGA + 0x150) /* DIPSW monitor */
63#define FPGA_FPODR (PA_FPGA + 0x160) /* Output port data */
64#define FPGA_ATAESR (PA_FPGA + 0x170) /* ATA extended bus status */
65#define FPGA_IRQPOLR (PA_FPGA + 0x180) /* IRQx polarity */
66
67
68#define SDK7780_NR_IRL 15
69/* IDE/ATA interrupt */
70#define IRQ_CFCARD 14
71/* SMC interrupt */
72#define IRQ_ETHERNET 6
73
74
75/* arch/sh/boards/renesas/sdk7780/irq.c */
76void init_sdk7780_IRQ(void);
77
78#define __IO_PREFIX sdk7780
79#include <asm/io_generic.h>
80
81#endif /* __ASM_SH_RENESAS_SDK7780_H */
diff --git a/include/asm-sh/sections.h b/include/asm-sh/sections.h
index bd9cbc967c2a..8f8f4ad400df 100644
--- a/include/asm-sh/sections.h
+++ b/include/asm-sh/sections.h
@@ -4,6 +4,7 @@
4#include <asm-generic/sections.h> 4#include <asm-generic/sections.h>
5 5
6extern long __machvec_start, __machvec_end; 6extern long __machvec_start, __machvec_end;
7extern char __uncached_start, __uncached_end;
7extern char _ebss[]; 8extern char _ebss[];
8 9
9#endif /* __ASM_SH_SECTIONS_H */ 10#endif /* __ASM_SH_SECTIONS_H */
diff --git a/include/asm-sh/sigcontext.h b/include/asm-sh/sigcontext.h
index eb8effba2e80..8ce1435bc0bf 100644
--- a/include/asm-sh/sigcontext.h
+++ b/include/asm-sh/sigcontext.h
@@ -4,6 +4,18 @@
4struct sigcontext { 4struct sigcontext {
5 unsigned long oldmask; 5 unsigned long oldmask;
6 6
7#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
8 /* CPU registers */
9 unsigned long long sc_regs[63];
10 unsigned long long sc_tregs[8];
11 unsigned long long sc_pc;
12 unsigned long long sc_sr;
13
14 /* FPU registers */
15 unsigned long long sc_fpregs[32];
16 unsigned int sc_fpscr;
17 unsigned int sc_fpvalid;
18#else
7 /* CPU registers */ 19 /* CPU registers */
8 unsigned long sc_regs[16]; 20 unsigned long sc_regs[16];
9 unsigned long sc_pc; 21 unsigned long sc_pc;
@@ -13,7 +25,8 @@ struct sigcontext {
13 unsigned long sc_mach; 25 unsigned long sc_mach;
14 unsigned long sc_macl; 26 unsigned long sc_macl;
15 27
16#if defined(__SH4__) || defined(CONFIG_CPU_SH4) 28#if defined(__SH4__) || defined(CONFIG_CPU_SH4) || \
29 defined(__SH2A__) || defined(CONFIG_CPU_SH2A)
17 /* FPU registers */ 30 /* FPU registers */
18 unsigned long sc_fpregs[16]; 31 unsigned long sc_fpregs[16];
19 unsigned long sc_xfpregs[16]; 32 unsigned long sc_xfpregs[16];
@@ -21,6 +34,7 @@ struct sigcontext {
21 unsigned int sc_fpul; 34 unsigned int sc_fpul;
22 unsigned int sc_ownedfp; 35 unsigned int sc_ownedfp;
23#endif 36#endif
37#endif
24}; 38};
25 39
26#endif /* __ASM_SH_SIGCONTEXT_H */ 40#endif /* __ASM_SH_SIGCONTEXT_H */
diff --git a/include/asm-sh/spi.h b/include/asm-sh/spi.h
new file mode 100644
index 000000000000..e96f5b0953c8
--- /dev/null
+++ b/include/asm-sh/spi.h
@@ -0,0 +1,13 @@
1#ifndef __ASM_SPI_H__
2#define __ASM_SPI_H__
3
4struct sh_spi_info;
5
6struct sh_spi_info {
7 int bus_num;
8 int num_chipselect;
9
10 void (*chip_select)(struct sh_spi_info *spi, int cs, int state);
11};
12
13#endif /* __ASM_SPI_H__ */
diff --git a/include/asm-sh/stat.h b/include/asm-sh/stat.h
index 6d6ad26e3a2a..e1810cc6e3da 100644
--- a/include/asm-sh/stat.h
+++ b/include/asm-sh/stat.h
@@ -15,6 +15,66 @@ struct __old_kernel_stat {
15 unsigned long st_ctime; 15 unsigned long st_ctime;
16}; 16};
17 17
18#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
19struct stat {
20 unsigned short st_dev;
21 unsigned short __pad1;
22 unsigned long st_ino;
23 unsigned short st_mode;
24 unsigned short st_nlink;
25 unsigned short st_uid;
26 unsigned short st_gid;
27 unsigned short st_rdev;
28 unsigned short __pad2;
29 unsigned long st_size;
30 unsigned long st_blksize;
31 unsigned long st_blocks;
32 unsigned long st_atime;
33 unsigned long st_atime_nsec;
34 unsigned long st_mtime;
35 unsigned long st_mtime_nsec;
36 unsigned long st_ctime;
37 unsigned long st_ctime_nsec;
38 unsigned long __unused4;
39 unsigned long __unused5;
40};
41
42/* This matches struct stat64 in glibc2.1, hence the absolutely
43 * insane amounts of padding around dev_t's.
44 */
45struct stat64 {
46 unsigned short st_dev;
47 unsigned char __pad0[10];
48
49 unsigned long st_ino;
50 unsigned int st_mode;
51 unsigned int st_nlink;
52
53 unsigned long st_uid;
54 unsigned long st_gid;
55
56 unsigned short st_rdev;
57 unsigned char __pad3[10];
58
59 long long st_size;
60 unsigned long st_blksize;
61
62 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
63 unsigned long __pad4; /* future possible st_blocks high bits */
64
65 unsigned long st_atime;
66 unsigned long st_atime_nsec;
67
68 unsigned long st_mtime;
69 unsigned long st_mtime_nsec;
70
71 unsigned long st_ctime;
72 unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */
73
74 unsigned long __unused1;
75 unsigned long __unused2;
76};
77#else
18struct stat { 78struct stat {
19 unsigned long st_dev; 79 unsigned long st_dev;
20 unsigned long st_ino; 80 unsigned long st_ino;
@@ -67,11 +127,12 @@ struct stat64 {
67 unsigned long st_mtime_nsec; 127 unsigned long st_mtime_nsec;
68 128
69 unsigned long st_ctime; 129 unsigned long st_ctime;
70 unsigned long st_ctime_nsec; 130 unsigned long st_ctime_nsec;
71 131
72 unsigned long long st_ino; 132 unsigned long long st_ino;
73}; 133};
74 134
75#define STAT_HAVE_NSEC 1 135#define STAT_HAVE_NSEC 1
136#endif
76 137
77#endif /* __ASM_SH_STAT_H */ 138#endif /* __ASM_SH_STAT_H */
diff --git a/include/asm-sh/string.h b/include/asm-sh/string.h
index 55f8db6bc1d7..8c1ea21dc0ae 100644
--- a/include/asm-sh/string.h
+++ b/include/asm-sh/string.h
@@ -1,131 +1,5 @@
1#ifndef __ASM_SH_STRING_H 1#ifdef CONFIG_SUPERH32
2#define __ASM_SH_STRING_H 2# include "string_32.h"
3 3#else
4#ifdef __KERNEL__ 4# include "string_64.h"
5 5#endif
6/*
7 * Copyright (C) 1999 Niibe Yutaka
8 * But consider these trivial functions to be public domain.
9 */
10
11#define __HAVE_ARCH_STRCPY
12static inline char *strcpy(char *__dest, const char *__src)
13{
14 register char *__xdest = __dest;
15 unsigned long __dummy;
16
17 __asm__ __volatile__("1:\n\t"
18 "mov.b @%1+, %2\n\t"
19 "mov.b %2, @%0\n\t"
20 "cmp/eq #0, %2\n\t"
21 "bf/s 1b\n\t"
22 " add #1, %0\n\t"
23 : "=r" (__dest), "=r" (__src), "=&z" (__dummy)
24 : "0" (__dest), "1" (__src)
25 : "memory", "t");
26
27 return __xdest;
28}
29
30#define __HAVE_ARCH_STRNCPY
31static inline char *strncpy(char *__dest, const char *__src, size_t __n)
32{
33 register char *__xdest = __dest;
34 unsigned long __dummy;
35
36 if (__n == 0)
37 return __xdest;
38
39 __asm__ __volatile__(
40 "1:\n"
41 "mov.b @%1+, %2\n\t"
42 "mov.b %2, @%0\n\t"
43 "cmp/eq #0, %2\n\t"
44 "bt/s 2f\n\t"
45 " cmp/eq %5,%1\n\t"
46 "bf/s 1b\n\t"
47 " add #1, %0\n"
48 "2:"
49 : "=r" (__dest), "=r" (__src), "=&z" (__dummy)
50 : "0" (__dest), "1" (__src), "r" (__src+__n)
51 : "memory", "t");
52
53 return __xdest;
54}
55
56#define __HAVE_ARCH_STRCMP
57static inline int strcmp(const char *__cs, const char *__ct)
58{
59 register int __res;
60 unsigned long __dummy;
61
62 __asm__ __volatile__(
63 "mov.b @%1+, %3\n"
64 "1:\n\t"
65 "mov.b @%0+, %2\n\t"
66 "cmp/eq #0, %3\n\t"
67 "bt 2f\n\t"
68 "cmp/eq %2, %3\n\t"
69 "bt/s 1b\n\t"
70 " mov.b @%1+, %3\n\t"
71 "add #-2, %1\n\t"
72 "mov.b @%1, %3\n\t"
73 "sub %3, %2\n"
74 "2:"
75 : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
76 : "0" (__cs), "1" (__ct)
77 : "t");
78
79 return __res;
80}
81
82#define __HAVE_ARCH_STRNCMP
83static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
84{
85 register int __res;
86 unsigned long __dummy;
87
88 if (__n == 0)
89 return 0;
90
91 __asm__ __volatile__(
92 "mov.b @%1+, %3\n"
93 "1:\n\t"
94 "mov.b @%0+, %2\n\t"
95 "cmp/eq %6, %0\n\t"
96 "bt/s 2f\n\t"
97 " cmp/eq #0, %3\n\t"
98 "bt/s 3f\n\t"
99 " cmp/eq %3, %2\n\t"
100 "bt/s 1b\n\t"
101 " mov.b @%1+, %3\n\t"
102 "add #-2, %1\n\t"
103 "mov.b @%1, %3\n"
104 "2:\n\t"
105 "sub %3, %2\n"
106 "3:"
107 :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
108 : "0" (__cs), "1" (__ct), "r" (__cs+__n)
109 : "t");
110
111 return __res;
112}
113
114#define __HAVE_ARCH_MEMSET
115extern void *memset(void *__s, int __c, size_t __count);
116
117#define __HAVE_ARCH_MEMCPY
118extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
119
120#define __HAVE_ARCH_MEMMOVE
121extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
122
123#define __HAVE_ARCH_MEMCHR
124extern void *memchr(const void *__s, int __c, size_t __n);
125
126#define __HAVE_ARCH_STRLEN
127extern size_t strlen(const char *);
128
129#endif /* __KERNEL__ */
130
131#endif /* __ASM_SH_STRING_H */
diff --git a/include/asm-sh/string_32.h b/include/asm-sh/string_32.h
new file mode 100644
index 000000000000..55f8db6bc1d7
--- /dev/null
+++ b/include/asm-sh/string_32.h
@@ -0,0 +1,131 @@
1#ifndef __ASM_SH_STRING_H
2#define __ASM_SH_STRING_H
3
4#ifdef __KERNEL__
5
6/*
7 * Copyright (C) 1999 Niibe Yutaka
8 * But consider these trivial functions to be public domain.
9 */
10
11#define __HAVE_ARCH_STRCPY
12static inline char *strcpy(char *__dest, const char *__src)
13{
14 register char *__xdest = __dest;
15 unsigned long __dummy;
16
17 __asm__ __volatile__("1:\n\t"
18 "mov.b @%1+, %2\n\t"
19 "mov.b %2, @%0\n\t"
20 "cmp/eq #0, %2\n\t"
21 "bf/s 1b\n\t"
22 " add #1, %0\n\t"
23 : "=r" (__dest), "=r" (__src), "=&z" (__dummy)
24 : "0" (__dest), "1" (__src)
25 : "memory", "t");
26
27 return __xdest;
28}
29
30#define __HAVE_ARCH_STRNCPY
31static inline char *strncpy(char *__dest, const char *__src, size_t __n)
32{
33 register char *__xdest = __dest;
34 unsigned long __dummy;
35
36 if (__n == 0)
37 return __xdest;
38
39 __asm__ __volatile__(
40 "1:\n"
41 "mov.b @%1+, %2\n\t"
42 "mov.b %2, @%0\n\t"
43 "cmp/eq #0, %2\n\t"
44 "bt/s 2f\n\t"
45 " cmp/eq %5,%1\n\t"
46 "bf/s 1b\n\t"
47 " add #1, %0\n"
48 "2:"
49 : "=r" (__dest), "=r" (__src), "=&z" (__dummy)
50 : "0" (__dest), "1" (__src), "r" (__src+__n)
51 : "memory", "t");
52
53 return __xdest;
54}
55
56#define __HAVE_ARCH_STRCMP
57static inline int strcmp(const char *__cs, const char *__ct)
58{
59 register int __res;
60 unsigned long __dummy;
61
62 __asm__ __volatile__(
63 "mov.b @%1+, %3\n"
64 "1:\n\t"
65 "mov.b @%0+, %2\n\t"
66 "cmp/eq #0, %3\n\t"
67 "bt 2f\n\t"
68 "cmp/eq %2, %3\n\t"
69 "bt/s 1b\n\t"
70 " mov.b @%1+, %3\n\t"
71 "add #-2, %1\n\t"
72 "mov.b @%1, %3\n\t"
73 "sub %3, %2\n"
74 "2:"
75 : "=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
76 : "0" (__cs), "1" (__ct)
77 : "t");
78
79 return __res;
80}
81
82#define __HAVE_ARCH_STRNCMP
83static inline int strncmp(const char *__cs, const char *__ct, size_t __n)
84{
85 register int __res;
86 unsigned long __dummy;
87
88 if (__n == 0)
89 return 0;
90
91 __asm__ __volatile__(
92 "mov.b @%1+, %3\n"
93 "1:\n\t"
94 "mov.b @%0+, %2\n\t"
95 "cmp/eq %6, %0\n\t"
96 "bt/s 2f\n\t"
97 " cmp/eq #0, %3\n\t"
98 "bt/s 3f\n\t"
99 " cmp/eq %3, %2\n\t"
100 "bt/s 1b\n\t"
101 " mov.b @%1+, %3\n\t"
102 "add #-2, %1\n\t"
103 "mov.b @%1, %3\n"
104 "2:\n\t"
105 "sub %3, %2\n"
106 "3:"
107 :"=r" (__cs), "=r" (__ct), "=&r" (__res), "=&z" (__dummy)
108 : "0" (__cs), "1" (__ct), "r" (__cs+__n)
109 : "t");
110
111 return __res;
112}
113
114#define __HAVE_ARCH_MEMSET
115extern void *memset(void *__s, int __c, size_t __count);
116
117#define __HAVE_ARCH_MEMCPY
118extern void *memcpy(void *__to, __const__ void *__from, size_t __n);
119
120#define __HAVE_ARCH_MEMMOVE
121extern void *memmove(void *__dest, __const__ void *__src, size_t __n);
122
123#define __HAVE_ARCH_MEMCHR
124extern void *memchr(const void *__s, int __c, size_t __n);
125
126#define __HAVE_ARCH_STRLEN
127extern size_t strlen(const char *);
128
129#endif /* __KERNEL__ */
130
131#endif /* __ASM_SH_STRING_H */
diff --git a/include/asm-sh64/string.h b/include/asm-sh/string_64.h
index 8a7357366ce8..aa1fef229c78 100644
--- a/include/asm-sh64/string.h
+++ b/include/asm-sh/string_64.h
@@ -1,21 +1,17 @@
1#ifndef __ASM_SH64_STRING_H 1#ifndef __ASM_SH_STRING_64_H
2#define __ASM_SH64_STRING_H 2#define __ASM_SH_STRING_64_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/string_64.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/string.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * 8 *
13 * Empty on purpose. ARCH SH64 ASM libs are out of the current project scope. 9 * This file is subject to the terms and conditions of the GNU General Public
14 * 10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
15 */ 12 */
16 13
17#define __HAVE_ARCH_MEMCPY 14#define __HAVE_ARCH_MEMCPY
18
19extern void *memcpy(void *dest, const void *src, size_t count); 15extern void *memcpy(void *dest, const void *src, size_t count);
20 16
21#endif 17#endif /* __ASM_SH_STRING_64_H */
diff --git a/include/asm-sh/system.h b/include/asm-sh/system.h
index 4faa2fb88616..772cd1a0a674 100644
--- a/include/asm-sh/system.h
+++ b/include/asm-sh/system.h
@@ -12,60 +12,9 @@
12#include <asm/types.h> 12#include <asm/types.h>
13#include <asm/ptrace.h> 13#include <asm/ptrace.h>
14 14
15struct task_struct *__switch_to(struct task_struct *prev, 15#define AT_VECTOR_SIZE_ARCH 5 /* entries in ARCH_DLINFO */
16 struct task_struct *next);
17 16
18#define AT_VECTOR_SIZE_ARCH 1 /* entries in ARCH_DLINFO */ 17#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
19/*
20 * switch_to() should switch tasks to task nr n, first
21 */
22
23#define switch_to(prev, next, last) do { \
24 struct task_struct *__last; \
25 register unsigned long *__ts1 __asm__ ("r1") = &prev->thread.sp; \
26 register unsigned long *__ts2 __asm__ ("r2") = &prev->thread.pc; \
27 register unsigned long *__ts4 __asm__ ("r4") = (unsigned long *)prev; \
28 register unsigned long *__ts5 __asm__ ("r5") = (unsigned long *)next; \
29 register unsigned long *__ts6 __asm__ ("r6") = &next->thread.sp; \
30 register unsigned long __ts7 __asm__ ("r7") = next->thread.pc; \
31 __asm__ __volatile__ (".balign 4\n\t" \
32 "stc.l gbr, @-r15\n\t" \
33 "sts.l pr, @-r15\n\t" \
34 "mov.l r8, @-r15\n\t" \
35 "mov.l r9, @-r15\n\t" \
36 "mov.l r10, @-r15\n\t" \
37 "mov.l r11, @-r15\n\t" \
38 "mov.l r12, @-r15\n\t" \
39 "mov.l r13, @-r15\n\t" \
40 "mov.l r14, @-r15\n\t" \
41 "mov.l r15, @r1 ! save SP\n\t" \
42 "mov.l @r6, r15 ! change to new stack\n\t" \
43 "mova 1f, %0\n\t" \
44 "mov.l %0, @r2 ! save PC\n\t" \
45 "mov.l 2f, %0\n\t" \
46 "jmp @%0 ! call __switch_to\n\t" \
47 " lds r7, pr ! with return to new PC\n\t" \
48 ".balign 4\n" \
49 "2:\n\t" \
50 ".long __switch_to\n" \
51 "1:\n\t" \
52 "mov.l @r15+, r14\n\t" \
53 "mov.l @r15+, r13\n\t" \
54 "mov.l @r15+, r12\n\t" \
55 "mov.l @r15+, r11\n\t" \
56 "mov.l @r15+, r10\n\t" \
57 "mov.l @r15+, r9\n\t" \
58 "mov.l @r15+, r8\n\t" \
59 "lds.l @r15+, pr\n\t" \
60 "ldc.l @r15+, gbr\n\t" \
61 : "=z" (__last) \
62 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
63 "r" (__ts5), "r" (__ts6), "r" (__ts7) \
64 : "r3", "t"); \
65 last = __last; \
66} while (0)
67
68#ifdef CONFIG_CPU_SH4A
69#define __icbi() \ 18#define __icbi() \
70{ \ 19{ \
71 unsigned long __addr; \ 20 unsigned long __addr; \
@@ -91,7 +40,7 @@ struct task_struct *__switch_to(struct task_struct *prev,
91 * Historically we have only done this type of barrier for the MMUCR, but 40 * Historically we have only done this type of barrier for the MMUCR, but
92 * it's also necessary for the CCR, so we make it generic here instead. 41 * it's also necessary for the CCR, so we make it generic here instead.
93 */ 42 */
94#ifdef CONFIG_CPU_SH4A 43#if defined(CONFIG_CPU_SH4A) || defined(CONFIG_CPU_SH5)
95#define mb() __asm__ __volatile__ ("synco": : :"memory") 44#define mb() __asm__ __volatile__ ("synco": : :"memory")
96#define rmb() mb() 45#define rmb() mb()
97#define wmb() __asm__ __volatile__ ("synco": : :"memory") 46#define wmb() __asm__ __volatile__ ("synco": : :"memory")
@@ -119,63 +68,11 @@ struct task_struct *__switch_to(struct task_struct *prev,
119 68
120#define set_mb(var, value) do { (void)xchg(&var, value); } while (0) 69#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
121 70
122/* 71#ifdef CONFIG_GUSA_RB
123 * Jump to P2 area. 72#include <asm/cmpxchg-grb.h>
124 * When handling TLB or caches, we need to do it from P2 area. 73#else
125 */ 74#include <asm/cmpxchg-irq.h>
126#define jump_to_P2() \ 75#endif
127do { \
128 unsigned long __dummy; \
129 __asm__ __volatile__( \
130 "mov.l 1f, %0\n\t" \
131 "or %1, %0\n\t" \
132 "jmp @%0\n\t" \
133 " nop\n\t" \
134 ".balign 4\n" \
135 "1: .long 2f\n" \
136 "2:" \
137 : "=&r" (__dummy) \
138 : "r" (0x20000000)); \
139} while (0)
140
141/*
142 * Back to P1 area.
143 */
144#define back_to_P1() \
145do { \
146 unsigned long __dummy; \
147 ctrl_barrier(); \
148 __asm__ __volatile__( \
149 "mov.l 1f, %0\n\t" \
150 "jmp @%0\n\t" \
151 " nop\n\t" \
152 ".balign 4\n" \
153 "1: .long 2f\n" \
154 "2:" \
155 : "=&r" (__dummy)); \
156} while (0)
157
158static inline unsigned long xchg_u32(volatile u32 *m, unsigned long val)
159{
160 unsigned long flags, retval;
161
162 local_irq_save(flags);
163 retval = *m;
164 *m = val;
165 local_irq_restore(flags);
166 return retval;
167}
168
169static inline unsigned long xchg_u8(volatile u8 *m, unsigned long val)
170{
171 unsigned long flags, retval;
172
173 local_irq_save(flags);
174 retval = *m;
175 *m = val & 0xff;
176 local_irq_restore(flags);
177 return retval;
178}
179 76
180extern void __xchg_called_with_bad_pointer(void); 77extern void __xchg_called_with_bad_pointer(void);
181 78
@@ -202,20 +99,6 @@ extern void __xchg_called_with_bad_pointer(void);
202#define xchg(ptr,x) \ 99#define xchg(ptr,x) \
203 ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr)))) 100 ((__typeof__(*(ptr)))__xchg((ptr),(unsigned long)(x), sizeof(*(ptr))))
204 101
205static inline unsigned long __cmpxchg_u32(volatile int * m, unsigned long old,
206 unsigned long new)
207{
208 __u32 retval;
209 unsigned long flags;
210
211 local_irq_save(flags);
212 retval = *m;
213 if (retval == old)
214 *m = new;
215 local_irq_restore(flags); /* implies memory barrier */
216 return retval;
217}
218
219/* This function doesn't exist, so you'll get a linker error 102/* This function doesn't exist, so you'll get a linker error
220 * if something tries to do an invalid cmpxchg(). */ 103 * if something tries to do an invalid cmpxchg(). */
221extern void __cmpxchg_called_with_bad_pointer(void); 104extern void __cmpxchg_called_with_bad_pointer(void);
@@ -255,10 +138,14 @@ static inline void *set_exception_table_evt(unsigned int evt, void *handler)
255 */ 138 */
256#ifdef CONFIG_CPU_SH2A 139#ifdef CONFIG_CPU_SH2A
257extern unsigned int instruction_size(unsigned int insn); 140extern unsigned int instruction_size(unsigned int insn);
258#else 141#elif defined(CONFIG_SUPERH32)
259#define instruction_size(insn) (2) 142#define instruction_size(insn) (2)
143#else
144#define instruction_size(insn) (4)
260#endif 145#endif
261 146
147extern unsigned long cached_to_uncached;
148
262/* XXX 149/* XXX
263 * disable hlt during certain critical i/o operations 150 * disable hlt during certain critical i/o operations
264 */ 151 */
@@ -270,13 +157,35 @@ void default_idle(void);
270void per_cpu_trap_init(void); 157void per_cpu_trap_init(void);
271 158
272asmlinkage void break_point_trap(void); 159asmlinkage void break_point_trap(void);
273asmlinkage void debug_trap_handler(unsigned long r4, unsigned long r5, 160
274 unsigned long r6, unsigned long r7, 161#ifdef CONFIG_SUPERH32
275 struct pt_regs __regs); 162#define BUILD_TRAP_HANDLER(name) \
276asmlinkage void bug_trap_handler(unsigned long r4, unsigned long r5, 163asmlinkage void name##_trap_handler(unsigned long r4, unsigned long r5, \
277 unsigned long r6, unsigned long r7, 164 unsigned long r6, unsigned long r7, \
278 struct pt_regs __regs); 165 struct pt_regs __regs)
166
167#define TRAP_HANDLER_DECL \
168 struct pt_regs *regs = RELOC_HIDE(&__regs, 0); \
169 unsigned int vec = regs->tra; \
170 (void)vec;
171#else
172#define BUILD_TRAP_HANDLER(name) \
173asmlinkage void name##_trap_handler(unsigned int vec, struct pt_regs *regs)
174#define TRAP_HANDLER_DECL
175#endif
176
177BUILD_TRAP_HANDLER(address_error);
178BUILD_TRAP_HANDLER(debug);
179BUILD_TRAP_HANDLER(bug);
180BUILD_TRAP_HANDLER(fpu_error);
181BUILD_TRAP_HANDLER(fpu_state_restore);
279 182
280#define arch_align_stack(x) (x) 183#define arch_align_stack(x) (x)
281 184
185#ifdef CONFIG_SUPERH32
186# include "system_32.h"
187#else
188# include "system_64.h"
189#endif
190
282#endif 191#endif
diff --git a/include/asm-sh/system_32.h b/include/asm-sh/system_32.h
new file mode 100644
index 000000000000..7ff08d956ba8
--- /dev/null
+++ b/include/asm-sh/system_32.h
@@ -0,0 +1,99 @@
1#ifndef __ASM_SH_SYSTEM_32_H
2#define __ASM_SH_SYSTEM_32_H
3
4#include <linux/types.h>
5
6struct task_struct *__switch_to(struct task_struct *prev,
7 struct task_struct *next);
8
9/*
10 * switch_to() should switch tasks to task nr n, first
11 */
12#define switch_to(prev, next, last) \
13do { \
14 register u32 *__ts1 __asm__ ("r1") = (u32 *)&prev->thread.sp; \
15 register u32 *__ts2 __asm__ ("r2") = (u32 *)&prev->thread.pc; \
16 register u32 *__ts4 __asm__ ("r4") = (u32 *)prev; \
17 register u32 *__ts5 __asm__ ("r5") = (u32 *)next; \
18 register u32 *__ts6 __asm__ ("r6") = (u32 *)&next->thread.sp; \
19 register u32 __ts7 __asm__ ("r7") = next->thread.pc; \
20 struct task_struct *__last; \
21 \
22 __asm__ __volatile__ ( \
23 ".balign 4\n\t" \
24 "stc.l gbr, @-r15\n\t" \
25 "sts.l pr, @-r15\n\t" \
26 "mov.l r8, @-r15\n\t" \
27 "mov.l r9, @-r15\n\t" \
28 "mov.l r10, @-r15\n\t" \
29 "mov.l r11, @-r15\n\t" \
30 "mov.l r12, @-r15\n\t" \
31 "mov.l r13, @-r15\n\t" \
32 "mov.l r14, @-r15\n\t" \
33 "mov.l r15, @r1\t! save SP\n\t" \
34 "mov.l @r6, r15\t! change to new stack\n\t" \
35 "mova 1f, %0\n\t" \
36 "mov.l %0, @r2\t! save PC\n\t" \
37 "mov.l 2f, %0\n\t" \
38 "jmp @%0\t! call __switch_to\n\t" \
39 " lds r7, pr\t! with return to new PC\n\t" \
40 ".balign 4\n" \
41 "2:\n\t" \
42 ".long __switch_to\n" \
43 "1:\n\t" \
44 "mov.l @r15+, r14\n\t" \
45 "mov.l @r15+, r13\n\t" \
46 "mov.l @r15+, r12\n\t" \
47 "mov.l @r15+, r11\n\t" \
48 "mov.l @r15+, r10\n\t" \
49 "mov.l @r15+, r9\n\t" \
50 "mov.l @r15+, r8\n\t" \
51 "lds.l @r15+, pr\n\t" \
52 "ldc.l @r15+, gbr\n\t" \
53 : "=z" (__last) \
54 : "r" (__ts1), "r" (__ts2), "r" (__ts4), \
55 "r" (__ts5), "r" (__ts6), "r" (__ts7) \
56 : "r3", "t"); \
57 \
58 last = __last; \
59} while (0)
60
61#define __uses_jump_to_uncached __attribute__ ((__section__ (".uncached.text")))
62
63/*
64 * Jump to uncached area.
65 * When handling TLB or caches, we need to do it from an uncached area.
66 */
67#define jump_to_uncached() \
68do { \
69 unsigned long __dummy; \
70 \
71 __asm__ __volatile__( \
72 "mova 1f, %0\n\t" \
73 "add %1, %0\n\t" \
74 "jmp @%0\n\t" \
75 " nop\n\t" \
76 ".balign 4\n" \
77 "1:" \
78 : "=&z" (__dummy) \
79 : "r" (cached_to_uncached)); \
80} while (0)
81
82/*
83 * Back to cached area.
84 */
85#define back_to_cached() \
86do { \
87 unsigned long __dummy; \
88 ctrl_barrier(); \
89 __asm__ __volatile__( \
90 "mov.l 1f, %0\n\t" \
91 "jmp @%0\n\t" \
92 " nop\n\t" \
93 ".balign 4\n" \
94 "1: .long 2f\n" \
95 "2:" \
96 : "=&r" (__dummy)); \
97} while (0)
98
99#endif /* __ASM_SH_SYSTEM_32_H */
diff --git a/include/asm-sh/system_64.h b/include/asm-sh/system_64.h
new file mode 100644
index 000000000000..943acf5ea07c
--- /dev/null
+++ b/include/asm-sh/system_64.h
@@ -0,0 +1,40 @@
1#ifndef __ASM_SH_SYSTEM_64_H
2#define __ASM_SH_SYSTEM_64_H
3
4/*
5 * include/asm-sh/system_64.h
6 *
7 * Copyright (C) 2000, 2001 Paolo Alberelli
8 * Copyright (C) 2003 Paul Mundt
9 * Copyright (C) 2004 Richard Curnow
10 *
11 * This file is subject to the terms and conditions of the GNU General Public
12 * License. See the file "COPYING" in the main directory of this archive
13 * for more details.
14 */
15#include <asm/processor.h>
16
17/*
18 * switch_to() should switch tasks to task nr n, first
19 */
20struct task_struct *sh64_switch_to(struct task_struct *prev,
21 struct thread_struct *prev_thread,
22 struct task_struct *next,
23 struct thread_struct *next_thread);
24
25#define switch_to(prev,next,last) \
26do { \
27 if (last_task_used_math != next) { \
28 struct pt_regs *regs = next->thread.uregs; \
29 if (regs) regs->sr |= SR_FD; \
30 } \
31 last = sh64_switch_to(prev, &prev->thread, next, \
32 &next->thread); \
33} while (0)
34
35#define __uses_jump_to_uncached
36
37#define jump_to_uncached() do { } while (0)
38#define back_to_cached() do { } while (0)
39
40#endif /* __ASM_SH_SYSTEM_64_H */
diff --git a/include/asm-sh/thread_info.h b/include/asm-sh/thread_info.h
index 1f7e1deb8d92..c6577d3dc46d 100644
--- a/include/asm-sh/thread_info.h
+++ b/include/asm-sh/thread_info.h
@@ -74,8 +74,10 @@ register unsigned long current_stack_pointer asm("r15") __attribute_used__;
74static inline struct thread_info *current_thread_info(void) 74static inline struct thread_info *current_thread_info(void)
75{ 75{
76 struct thread_info *ti; 76 struct thread_info *ti;
77#ifdef CONFIG_CPU_HAS_SR_RB 77#if defined(CONFIG_SUPERH64)
78 __asm__("stc r7_bank, %0" : "=r" (ti)); 78 __asm__ __volatile__ ("getcon cr17, %0" : "=r" (ti));
79#elif defined(CONFIG_CPU_HAS_SR_RB)
80 __asm__ __volatile__ ("stc r7_bank, %0" : "=r" (ti));
79#else 81#else
80 unsigned long __dummy; 82 unsigned long __dummy;
81 83
@@ -111,6 +113,7 @@ static inline struct thread_info *current_thread_info(void)
111#define TIF_NEED_RESCHED 2 /* rescheduling necessary */ 113#define TIF_NEED_RESCHED 2 /* rescheduling necessary */
112#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */ 114#define TIF_RESTORE_SIGMASK 3 /* restore signal mask in do_signal() */
113#define TIF_SINGLESTEP 4 /* singlestepping active */ 115#define TIF_SINGLESTEP 4 /* singlestepping active */
116#define TIF_SYSCALL_AUDIT 5
114#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */ 117#define TIF_USEDFPU 16 /* FPU was used by this task this quantum (SMP) */
115#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */ 118#define TIF_POLLING_NRFLAG 17 /* true if poll_idle() is polling TIF_NEED_RESCHED */
116#define TIF_MEMDIE 18 119#define TIF_MEMDIE 18
@@ -121,6 +124,7 @@ static inline struct thread_info *current_thread_info(void)
121#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED) 124#define _TIF_NEED_RESCHED (1<<TIF_NEED_RESCHED)
122#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK) 125#define _TIF_RESTORE_SIGMASK (1<<TIF_RESTORE_SIGMASK)
123#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP) 126#define _TIF_SINGLESTEP (1<<TIF_SINGLESTEP)
127#define _TIF_SYSCALL_AUDIT (1<<TIF_SYSCALL_AUDIT)
124#define _TIF_USEDFPU (1<<TIF_USEDFPU) 128#define _TIF_USEDFPU (1<<TIF_USEDFPU)
125#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG) 129#define _TIF_POLLING_NRFLAG (1<<TIF_POLLING_NRFLAG)
126#define _TIF_FREEZE (1<<TIF_FREEZE) 130#define _TIF_FREEZE (1<<TIF_FREEZE)
diff --git a/include/asm-sh/tlb.h b/include/asm-sh/tlb.h
index 53d185bcf872..56ad1fb888a2 100644
--- a/include/asm-sh/tlb.h
+++ b/include/asm-sh/tlb.h
@@ -1,6 +1,12 @@
1#ifndef __ASM_SH_TLB_H 1#ifndef __ASM_SH_TLB_H
2#define __ASM_SH_TLB_H 2#define __ASM_SH_TLB_H
3 3
4#ifdef CONFIG_SUPERH64
5# include "tlb_64.h"
6#endif
7
8#ifndef __ASSEMBLY__
9
4#define tlb_start_vma(tlb, vma) \ 10#define tlb_start_vma(tlb, vma) \
5 flush_cache_range(vma, vma->vm_start, vma->vm_end) 11 flush_cache_range(vma, vma->vm_start, vma->vm_end)
6 12
@@ -15,4 +21,6 @@
15#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm) 21#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
16 22
17#include <asm-generic/tlb.h> 23#include <asm-generic/tlb.h>
18#endif 24
25#endif /* __ASSEMBLY__ */
26#endif /* __ASM_SH_TLB_H */
diff --git a/include/asm-sh64/tlb.h b/include/asm-sh/tlb_64.h
index 4979408bd88c..0308e05fc57b 100644
--- a/include/asm-sh64/tlb.h
+++ b/include/asm-sh/tlb_64.h
@@ -1,20 +1,14 @@
1/* 1/*
2 * include/asm-sh64/tlb.h 2 * include/asm-sh/tlb_64.h
3 * 3 *
4 * Copyright (C) 2003 Paul Mundt 4 * Copyright (C) 2003 Paul Mundt
5 * 5 *
6 * This file is subject to the terms and conditions of the GNU General Public 6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive 7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details. 8 * for more details.
9 *
10 */
11#ifndef __ASM_SH64_TLB_H
12#define __ASM_SH64_TLB_H
13
14/*
15 * Note! These are mostly unused, we just need the xTLB_LAST_VAR_UNRESTRICTED
16 * for head.S! Once this limitation is gone, we can clean the rest of this up.
17 */ 9 */
10#ifndef __ASM_SH_TLB_64_H
11#define __ASM_SH_TLB_64_H
18 12
19/* ITLB defines */ 13/* ITLB defines */
20#define ITLB_FIXED 0x00000000 /* First fixed ITLB, see head.S */ 14#define ITLB_FIXED 0x00000000 /* First fixed ITLB, see head.S */
@@ -63,30 +57,13 @@ static inline void __flush_tlb_slot(unsigned long long slot)
63} 57}
64 58
65/* arch/sh64/mm/tlb.c */ 59/* arch/sh64/mm/tlb.c */
66extern int sh64_tlb_init(void); 60int sh64_tlb_init(void);
67extern unsigned long long sh64_next_free_dtlb_entry(void); 61unsigned long long sh64_next_free_dtlb_entry(void);
68extern unsigned long long sh64_get_wired_dtlb_entry(void); 62unsigned long long sh64_get_wired_dtlb_entry(void);
69extern int sh64_put_wired_dtlb_entry(unsigned long long entry); 63int sh64_put_wired_dtlb_entry(unsigned long long entry);
70 64void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr,
71extern void sh64_setup_tlb_slot(unsigned long long config_addr, unsigned long eaddr, unsigned long asid, unsigned long paddr); 65 unsigned long asid, unsigned long paddr);
72extern void sh64_teardown_tlb_slot(unsigned long long config_addr); 66void sh64_teardown_tlb_slot(unsigned long long config_addr);
73
74#define tlb_start_vma(tlb, vma) \
75 flush_cache_range(vma, vma->vm_start, vma->vm_end)
76
77#define tlb_end_vma(tlb, vma) \
78 flush_tlb_range(vma, vma->vm_start, vma->vm_end)
79
80#define __tlb_remove_tlb_entry(tlb, pte, address) do { } while (0)
81
82/*
83 * Flush whole TLBs for MM
84 */
85#define tlb_flush(tlb) flush_tlb_mm((tlb)->mm)
86
87#include <asm-generic/tlb.h>
88 67
89#endif /* __ASSEMBLY__ */ 68#endif /* __ASSEMBLY__ */
90 69#endif /* __ASM_SH_TLB_64_H */
91#endif /* __ASM_SH64_TLB_H */
92
diff --git a/include/asm-sh/types.h b/include/asm-sh/types.h
index 7ba69d9707ef..a6e1d4126e67 100644
--- a/include/asm-sh/types.h
+++ b/include/asm-sh/types.h
@@ -52,6 +52,12 @@ typedef unsigned long long u64;
52 52
53typedef u32 dma_addr_t; 53typedef u32 dma_addr_t;
54 54
55#ifdef CONFIG_SUPERH32
56typedef u16 opcode_t;
57#else
58typedef u32 opcode_t;
59#endif
60
55#endif /* __ASSEMBLY__ */ 61#endif /* __ASSEMBLY__ */
56 62
57#endif /* __KERNEL__ */ 63#endif /* __KERNEL__ */
diff --git a/include/asm-sh/uaccess.h b/include/asm-sh/uaccess.h
index 77c391fa93d6..ff24ce95b238 100644
--- a/include/asm-sh/uaccess.h
+++ b/include/asm-sh/uaccess.h
@@ -1,563 +1,5 @@
1/* $Id: uaccess.h,v 1.11 2003/10/13 07:21:20 lethal Exp $ 1#ifdef CONFIG_SUPERH32
2 * 2# include "uaccess_32.h"
3 * User space memory access functions
4 *
5 * Copyright (C) 1999, 2002 Niibe Yutaka
6 * Copyright (C) 2003 Paul Mundt
7 *
8 * Based on:
9 * MIPS implementation version 1.15 by
10 * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
11 * and i386 version.
12 */
13#ifndef __ASM_SH_UACCESS_H
14#define __ASM_SH_UACCESS_H
15
16#include <linux/errno.h>
17#include <linux/sched.h>
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons (Data Segment Register?), these macros are misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL)
33#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
34
35#define segment_eq(a,b) ((a).seg == (b).seg)
36
37#define get_ds() (KERNEL_DS)
38
39#if !defined(CONFIG_MMU)
40/* NOMMU is always true */
41#define __addr_ok(addr) (1)
42
43static inline mm_segment_t get_fs(void)
44{
45 return USER_DS;
46}
47
48static inline void set_fs(mm_segment_t s)
49{
50}
51
52/*
53 * __access_ok: Check if address with size is OK or not.
54 *
55 * If we don't have an MMU (or if its disabled) the only thing we really have
56 * to look out for is if the address resides somewhere outside of what
57 * available RAM we have.
58 *
59 * TODO: This check could probably also stand to be restricted somewhat more..
60 * though it still does the Right Thing(tm) for the time being.
61 */
62static inline int __access_ok(unsigned long addr, unsigned long size)
63{
64 return ((addr >= memory_start) && ((addr + size) < memory_end));
65}
66#else /* CONFIG_MMU */
67#define __addr_ok(addr) \
68 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
69
70#define get_fs() (current_thread_info()->addr_limit)
71#define set_fs(x) (current_thread_info()->addr_limit = (x))
72
73/*
74 * __access_ok: Check if address with size is OK or not.
75 *
76 * Uhhuh, this needs 33-bit arithmetic. We have a carry..
77 *
78 * sum := addr + size; carry? --> flag = true;
79 * if (sum >= addr_limit) flag = true;
80 */
81static inline int __access_ok(unsigned long addr, unsigned long size)
82{
83 unsigned long flag, sum;
84
85 __asm__("clrt\n\t"
86 "addc %3, %1\n\t"
87 "movt %0\n\t"
88 "cmp/hi %4, %1\n\t"
89 "rotcl %0"
90 :"=&r" (flag), "=r" (sum)
91 :"1" (addr), "r" (size),
92 "r" (current_thread_info()->addr_limit.seg)
93 :"t");
94 return flag == 0;
95
96}
97#endif /* CONFIG_MMU */
98
99static inline int access_ok(int type, const void __user *p, unsigned long size)
100{
101 unsigned long addr = (unsigned long)p;
102 return __access_ok(addr, size);
103}
104
105/*
106 * Uh, these should become the main single-value transfer routines ...
107 * They automatically use the right size if we just have the right
108 * pointer type ...
109 *
110 * As SuperH uses the same address space for kernel and user data, we
111 * can just do these as direct assignments.
112 *
113 * Careful to not
114 * (a) re-use the arguments for side effects (sizeof is ok)
115 * (b) require any knowledge of processes at this stage
116 */
117#define put_user(x,ptr) __put_user_check((x),(ptr),sizeof(*(ptr)))
118#define get_user(x,ptr) __get_user_check((x),(ptr),sizeof(*(ptr)))
119
120/*
121 * The "__xxx" versions do not do address space checking, useful when
122 * doing multiple accesses to the same area (the user has to do the
123 * checks by hand with "access_ok()")
124 */
125#define __put_user(x,ptr) \
126 __put_user_nocheck((__typeof__(*(ptr)))(x),(ptr),sizeof(*(ptr)))
127#define __get_user(x,ptr) \
128 __get_user_nocheck((x),(ptr),sizeof(*(ptr)))
129
130struct __large_struct { unsigned long buf[100]; };
131#define __m(x) (*(struct __large_struct __user *)(x))
132
133#define __get_user_size(x,ptr,size,retval) \
134do { \
135 retval = 0; \
136 __chk_user_ptr(ptr); \
137 switch (size) { \
138 case 1: \
139 __get_user_asm(x, ptr, retval, "b"); \
140 break; \
141 case 2: \
142 __get_user_asm(x, ptr, retval, "w"); \
143 break; \
144 case 4: \
145 __get_user_asm(x, ptr, retval, "l"); \
146 break; \
147 default: \
148 __get_user_unknown(); \
149 break; \
150 } \
151} while (0)
152
153#define __get_user_nocheck(x,ptr,size) \
154({ \
155 long __gu_err, __gu_val; \
156 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
157 (x) = (__typeof__(*(ptr)))__gu_val; \
158 __gu_err; \
159})
160
161#ifdef CONFIG_MMU
162#define __get_user_check(x,ptr,size) \
163({ \
164 long __gu_err, __gu_val; \
165 __chk_user_ptr(ptr); \
166 switch (size) { \
167 case 1: \
168 __get_user_1(__gu_val, (ptr), __gu_err); \
169 break; \
170 case 2: \
171 __get_user_2(__gu_val, (ptr), __gu_err); \
172 break; \
173 case 4: \
174 __get_user_4(__gu_val, (ptr), __gu_err); \
175 break; \
176 default: \
177 __get_user_unknown(); \
178 break; \
179 } \
180 \
181 (x) = (__typeof__(*(ptr)))__gu_val; \
182 __gu_err; \
183})
184
185#define __get_user_1(x,addr,err) ({ \
186__asm__("stc r7_bank, %1\n\t" \
187 "mov.l @(8,%1), %1\n\t" \
188 "and %2, %1\n\t" \
189 "cmp/pz %1\n\t" \
190 "bt/s 1f\n\t" \
191 " mov #0, %0\n\t" \
192 "0:\n" \
193 "mov #-14, %0\n\t" \
194 "bra 2f\n\t" \
195 " mov #0, %1\n" \
196 "1:\n\t" \
197 "mov.b @%2, %1\n\t" \
198 "extu.b %1, %1\n" \
199 "2:\n" \
200 ".section __ex_table,\"a\"\n\t" \
201 ".long 1b, 0b\n\t" \
202 ".previous" \
203 : "=&r" (err), "=&r" (x) \
204 : "r" (addr) \
205 : "t"); \
206})
207
208#define __get_user_2(x,addr,err) ({ \
209__asm__("stc r7_bank, %1\n\t" \
210 "mov.l @(8,%1), %1\n\t" \
211 "and %2, %1\n\t" \
212 "cmp/pz %1\n\t" \
213 "bt/s 1f\n\t" \
214 " mov #0, %0\n\t" \
215 "0:\n" \
216 "mov #-14, %0\n\t" \
217 "bra 2f\n\t" \
218 " mov #0, %1\n" \
219 "1:\n\t" \
220 "mov.w @%2, %1\n\t" \
221 "extu.w %1, %1\n" \
222 "2:\n" \
223 ".section __ex_table,\"a\"\n\t" \
224 ".long 1b, 0b\n\t" \
225 ".previous" \
226 : "=&r" (err), "=&r" (x) \
227 : "r" (addr) \
228 : "t"); \
229})
230
231#define __get_user_4(x,addr,err) ({ \
232__asm__("stc r7_bank, %1\n\t" \
233 "mov.l @(8,%1), %1\n\t" \
234 "and %2, %1\n\t" \
235 "cmp/pz %1\n\t" \
236 "bt/s 1f\n\t" \
237 " mov #0, %0\n\t" \
238 "0:\n" \
239 "mov #-14, %0\n\t" \
240 "bra 2f\n\t" \
241 " mov #0, %1\n" \
242 "1:\n\t" \
243 "mov.l @%2, %1\n\t" \
244 "2:\n" \
245 ".section __ex_table,\"a\"\n\t" \
246 ".long 1b, 0b\n\t" \
247 ".previous" \
248 : "=&r" (err), "=&r" (x) \
249 : "r" (addr) \
250 : "t"); \
251})
252#else /* CONFIG_MMU */
253#define __get_user_check(x,ptr,size) \
254({ \
255 long __gu_err, __gu_val; \
256 if (__access_ok((unsigned long)(ptr), (size))) { \
257 __get_user_size(__gu_val, (ptr), (size), __gu_err); \
258 (x) = (__typeof__(*(ptr)))__gu_val; \
259 } else \
260 __gu_err = -EFAULT; \
261 __gu_err; \
262})
263#endif
264
265#define __get_user_asm(x, addr, err, insn) \
266({ \
267__asm__ __volatile__( \
268 "1:\n\t" \
269 "mov." insn " %2, %1\n\t" \
270 "mov #0, %0\n" \
271 "2:\n" \
272 ".section .fixup,\"ax\"\n" \
273 "3:\n\t" \
274 "mov #0, %1\n\t" \
275 "mov.l 4f, %0\n\t" \
276 "jmp @%0\n\t" \
277 " mov %3, %0\n" \
278 "4: .long 2b\n\t" \
279 ".previous\n" \
280 ".section __ex_table,\"a\"\n\t" \
281 ".long 1b, 3b\n\t" \
282 ".previous" \
283 :"=&r" (err), "=&r" (x) \
284 :"m" (__m(addr)), "i" (-EFAULT)); })
285
286extern void __get_user_unknown(void);
287
288#define __put_user_size(x,ptr,size,retval) \
289do { \
290 retval = 0; \
291 __chk_user_ptr(ptr); \
292 switch (size) { \
293 case 1: \
294 __put_user_asm(x, ptr, retval, "b"); \
295 break; \
296 case 2: \
297 __put_user_asm(x, ptr, retval, "w"); \
298 break; \
299 case 4: \
300 __put_user_asm(x, ptr, retval, "l"); \
301 break; \
302 case 8: \
303 __put_user_u64(x, ptr, retval); \
304 break; \
305 default: \
306 __put_user_unknown(); \
307 } \
308} while (0)
309
310#define __put_user_nocheck(x,ptr,size) \
311({ \
312 long __pu_err; \
313 __put_user_size((x),(ptr),(size),__pu_err); \
314 __pu_err; \
315})
316
317#define __put_user_check(x,ptr,size) \
318({ \
319 long __pu_err = -EFAULT; \
320 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
321 \
322 if (__access_ok((unsigned long)__pu_addr,size)) \
323 __put_user_size((x),__pu_addr,(size),__pu_err); \
324 __pu_err; \
325})
326
327#define __put_user_asm(x, addr, err, insn) \
328({ \
329__asm__ __volatile__( \
330 "1:\n\t" \
331 "mov." insn " %1, %2\n\t" \
332 "mov #0, %0\n" \
333 "2:\n" \
334 ".section .fixup,\"ax\"\n" \
335 "3:\n\t" \
336 "nop\n\t" \
337 "mov.l 4f, %0\n\t" \
338 "jmp @%0\n\t" \
339 "mov %3, %0\n" \
340 "4: .long 2b\n\t" \
341 ".previous\n" \
342 ".section __ex_table,\"a\"\n\t" \
343 ".long 1b, 3b\n\t" \
344 ".previous" \
345 :"=&r" (err) \
346 :"r" (x), "m" (__m(addr)), "i" (-EFAULT) \
347 :"memory"); })
348
349#if defined(__LITTLE_ENDIAN__)
350#define __put_user_u64(val,addr,retval) \
351({ \
352__asm__ __volatile__( \
353 "1:\n\t" \
354 "mov.l %R1,%2\n\t" \
355 "mov.l %S1,%T2\n\t" \
356 "mov #0,%0\n" \
357 "2:\n" \
358 ".section .fixup,\"ax\"\n" \
359 "3:\n\t" \
360 "nop\n\t" \
361 "mov.l 4f,%0\n\t" \
362 "jmp @%0\n\t" \
363 " mov %3,%0\n" \
364 "4: .long 2b\n\t" \
365 ".previous\n" \
366 ".section __ex_table,\"a\"\n\t" \
367 ".long 1b, 3b\n\t" \
368 ".previous" \
369 : "=r" (retval) \
370 : "r" (val), "m" (__m(addr)), "i" (-EFAULT) \
371 : "memory"); })
372#else 3#else
373#define __put_user_u64(val,addr,retval) \ 4# include "uaccess_64.h"
374({ \
375__asm__ __volatile__( \
376 "1:\n\t" \
377 "mov.l %S1,%2\n\t" \
378 "mov.l %R1,%T2\n\t" \
379 "mov #0,%0\n" \
380 "2:\n" \
381 ".section .fixup,\"ax\"\n" \
382 "3:\n\t" \
383 "nop\n\t" \
384 "mov.l 4f,%0\n\t" \
385 "jmp @%0\n\t" \
386 " mov %3,%0\n" \
387 "4: .long 2b\n\t" \
388 ".previous\n" \
389 ".section __ex_table,\"a\"\n\t" \
390 ".long 1b, 3b\n\t" \
391 ".previous" \
392 : "=r" (retval) \
393 : "r" (val), "m" (__m(addr)), "i" (-EFAULT) \
394 : "memory"); })
395#endif 5#endif
396
397extern void __put_user_unknown(void);
398
399/* Generic arbitrary sized copy. */
400/* Return the number of bytes NOT copied */
401__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
402
403#define copy_to_user(to,from,n) ({ \
404void *__copy_to = (void *) (to); \
405__kernel_size_t __copy_size = (__kernel_size_t) (n); \
406__kernel_size_t __copy_res; \
407if(__copy_size && __access_ok((unsigned long)__copy_to, __copy_size)) { \
408__copy_res = __copy_user(__copy_to, (void *) (from), __copy_size); \
409} else __copy_res = __copy_size; \
410__copy_res; })
411
412#define copy_from_user(to,from,n) ({ \
413void *__copy_to = (void *) (to); \
414void *__copy_from = (void *) (from); \
415__kernel_size_t __copy_size = (__kernel_size_t) (n); \
416__kernel_size_t __copy_res; \
417if(__copy_size && __access_ok((unsigned long)__copy_from, __copy_size)) { \
418__copy_res = __copy_user(__copy_to, __copy_from, __copy_size); \
419} else __copy_res = __copy_size; \
420__copy_res; })
421
422static __always_inline unsigned long
423__copy_from_user(void *to, const void __user *from, unsigned long n)
424{
425 return __copy_user(to, (__force void *)from, n);
426}
427
428static __always_inline unsigned long __must_check
429__copy_to_user(void __user *to, const void *from, unsigned long n)
430{
431 return __copy_user((__force void *)to, from, n);
432}
433
434#define __copy_to_user_inatomic __copy_to_user
435#define __copy_from_user_inatomic __copy_from_user
436
437/*
438 * Clear the area and return remaining number of bytes
439 * (on failure. Usually it's 0.)
440 */
441extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size);
442
443#define clear_user(addr,n) ({ \
444void * __cl_addr = (addr); \
445unsigned long __cl_size = (n); \
446if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \
447__cl_size = __clear_user(__cl_addr, __cl_size); \
448__cl_size; })
449
450static __inline__ int
451__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count)
452{
453 __kernel_size_t res;
454 unsigned long __dummy, _d, _s;
455
456 __asm__ __volatile__(
457 "9:\n"
458 "mov.b @%2+, %1\n\t"
459 "cmp/eq #0, %1\n\t"
460 "bt/s 2f\n"
461 "1:\n"
462 "mov.b %1, @%3\n\t"
463 "dt %7\n\t"
464 "bf/s 9b\n\t"
465 " add #1, %3\n\t"
466 "2:\n\t"
467 "sub %7, %0\n"
468 "3:\n"
469 ".section .fixup,\"ax\"\n"
470 "4:\n\t"
471 "mov.l 5f, %1\n\t"
472 "jmp @%1\n\t"
473 " mov %8, %0\n\t"
474 ".balign 4\n"
475 "5: .long 3b\n"
476 ".previous\n"
477 ".section __ex_table,\"a\"\n"
478 " .balign 4\n"
479 " .long 9b,4b\n"
480 ".previous"
481 : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d)
482 : "0" (__count), "2" (__src), "3" (__dest), "r" (__count),
483 "i" (-EFAULT)
484 : "memory", "t");
485
486 return res;
487}
488
489#define strncpy_from_user(dest,src,count) ({ \
490unsigned long __sfu_src = (unsigned long) (src); \
491int __sfu_count = (int) (count); \
492long __sfu_res = -EFAULT; \
493if(__access_ok(__sfu_src, __sfu_count)) { \
494__sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \
495} __sfu_res; })
496
497/*
498 * Return the size of a string (including the ending 0!)
499 */
500static __inline__ long __strnlen_user(const char __user *__s, long __n)
501{
502 unsigned long res;
503 unsigned long __dummy;
504
505 __asm__ __volatile__(
506 "9:\n"
507 "cmp/eq %4, %0\n\t"
508 "bt 2f\n"
509 "1:\t"
510 "mov.b @(%0,%3), %1\n\t"
511 "tst %1, %1\n\t"
512 "bf/s 9b\n\t"
513 " add #1, %0\n"
514 "2:\n"
515 ".section .fixup,\"ax\"\n"
516 "3:\n\t"
517 "mov.l 4f, %1\n\t"
518 "jmp @%1\n\t"
519 " mov #0, %0\n"
520 ".balign 4\n"
521 "4: .long 2b\n"
522 ".previous\n"
523 ".section __ex_table,\"a\"\n"
524 " .balign 4\n"
525 " .long 1b,3b\n"
526 ".previous"
527 : "=z" (res), "=&r" (__dummy)
528 : "0" (0), "r" (__s), "r" (__n)
529 : "t");
530 return res;
531}
532
533static __inline__ long strnlen_user(const char __user *s, long n)
534{
535 if (!__addr_ok(s))
536 return 0;
537 else
538 return __strnlen_user(s, n);
539}
540
541#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
542
543/*
544 * The exception table consists of pairs of addresses: the first is the
545 * address of an instruction that is allowed to fault, and the second is
546 * the address at which the program should continue. No registers are
547 * modified, so it is entirely up to the continuation code to figure out
548 * what to do.
549 *
550 * All the routines below use bits of fixup code that are out of line
551 * with the main instruction path. This means when everything is well,
552 * we don't even have to jump over them. Further, they do not intrude
553 * on our cache or tlb entries.
554 */
555
556struct exception_table_entry
557{
558 unsigned long insn, fixup;
559};
560
561extern int fixup_exception(struct pt_regs *regs);
562
563#endif /* __ASM_SH_UACCESS_H */
diff --git a/include/asm-sh/uaccess_32.h b/include/asm-sh/uaccess_32.h
new file mode 100644
index 000000000000..b6082f3c1dc4
--- /dev/null
+++ b/include/asm-sh/uaccess_32.h
@@ -0,0 +1,510 @@
1/* $Id: uaccess.h,v 1.11 2003/10/13 07:21:20 lethal Exp $
2 *
3 * User space memory access functions
4 *
5 * Copyright (C) 1999, 2002 Niibe Yutaka
6 * Copyright (C) 2003 Paul Mundt
7 *
8 * Based on:
9 * MIPS implementation version 1.15 by
10 * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
11 * and i386 version.
12 */
13#ifndef __ASM_SH_UACCESS_H
14#define __ASM_SH_UACCESS_H
15
16#include <linux/errno.h>
17#include <linux/sched.h>
18
19#define VERIFY_READ 0
20#define VERIFY_WRITE 1
21
22/*
23 * The fs value determines whether argument validity checking should be
24 * performed or not. If get_fs() == USER_DS, checking is performed, with
25 * get_fs() == KERNEL_DS, checking is bypassed.
26 *
27 * For historical reasons (Data Segment Register?), these macros are misnamed.
28 */
29
30#define MAKE_MM_SEG(s) ((mm_segment_t) { (s) })
31
32#define KERNEL_DS MAKE_MM_SEG(0xFFFFFFFFUL)
33#define USER_DS MAKE_MM_SEG(PAGE_OFFSET)
34
35#define segment_eq(a,b) ((a).seg == (b).seg)
36
37#define get_ds() (KERNEL_DS)
38
39#if !defined(CONFIG_MMU)
40/* NOMMU is always true */
41#define __addr_ok(addr) (1)
42
43static inline mm_segment_t get_fs(void)
44{
45 return USER_DS;
46}
47
48static inline void set_fs(mm_segment_t s)
49{
50}
51
52/*
53 * __access_ok: Check if address with size is OK or not.
54 *
55 * If we don't have an MMU (or if its disabled) the only thing we really have
56 * to look out for is if the address resides somewhere outside of what
57 * available RAM we have.
58 *
59 * TODO: This check could probably also stand to be restricted somewhat more..
60 * though it still does the Right Thing(tm) for the time being.
61 */
62static inline int __access_ok(unsigned long addr, unsigned long size)
63{
64 return ((addr >= memory_start) && ((addr + size) < memory_end));
65}
66#else /* CONFIG_MMU */
67#define __addr_ok(addr) \
68 ((unsigned long)(addr) < (current_thread_info()->addr_limit.seg))
69
70#define get_fs() (current_thread_info()->addr_limit)
71#define set_fs(x) (current_thread_info()->addr_limit = (x))
72
73/*
74 * __access_ok: Check if address with size is OK or not.
75 *
76 * Uhhuh, this needs 33-bit arithmetic. We have a carry..
77 *
78 * sum := addr + size; carry? --> flag = true;
79 * if (sum >= addr_limit) flag = true;
80 */
81static inline int __access_ok(unsigned long addr, unsigned long size)
82{
83 unsigned long flag, sum;
84
85 __asm__("clrt\n\t"
86 "addc %3, %1\n\t"
87 "movt %0\n\t"
88 "cmp/hi %4, %1\n\t"
89 "rotcl %0"
90 :"=&r" (flag), "=r" (sum)
91 :"1" (addr), "r" (size),
92 "r" (current_thread_info()->addr_limit.seg)
93 :"t");
94 return flag == 0;
95}
96#endif /* CONFIG_MMU */
97
98#define access_ok(type, addr, size) \
99 (__chk_user_ptr(addr), \
100 __access_ok((unsigned long __force)(addr), (size)))
101
102/*
103 * Uh, these should become the main single-value transfer routines ...
104 * They automatically use the right size if we just have the right
105 * pointer type ...
106 *
107 * As SuperH uses the same address space for kernel and user data, we
108 * can just do these as direct assignments.
109 *
110 * Careful to not
111 * (a) re-use the arguments for side effects (sizeof is ok)
112 * (b) require any knowledge of processes at this stage
113 */
114#define put_user(x,ptr) __put_user_check((x), (ptr), sizeof(*(ptr)))
115#define get_user(x,ptr) __get_user_check((x), (ptr), sizeof(*(ptr)))
116
117/*
118 * The "__xxx" versions do not do address space checking, useful when
119 * doing multiple accesses to the same area (the user has to do the
120 * checks by hand with "access_ok()")
121 */
122#define __put_user(x,ptr) __put_user_nocheck((x), (ptr), sizeof(*(ptr)))
123#define __get_user(x,ptr) __get_user_nocheck((x), (ptr), sizeof(*(ptr)))
124
125struct __large_struct { unsigned long buf[100]; };
126#define __m(x) (*(struct __large_struct __user *)(x))
127
128#define __get_user_size(x,ptr,size,retval) \
129do { \
130 retval = 0; \
131 switch (size) { \
132 case 1: \
133 __get_user_asm(x, ptr, retval, "b"); \
134 break; \
135 case 2: \
136 __get_user_asm(x, ptr, retval, "w"); \
137 break; \
138 case 4: \
139 __get_user_asm(x, ptr, retval, "l"); \
140 break; \
141 default: \
142 __get_user_unknown(); \
143 break; \
144 } \
145} while (0)
146
147#define __get_user_nocheck(x,ptr,size) \
148({ \
149 long __gu_err; \
150 unsigned long __gu_val; \
151 const __typeof__(*(ptr)) __user *__gu_addr = (ptr); \
152 __chk_user_ptr(ptr); \
153 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
154 (x) = (__typeof__(*(ptr)))__gu_val; \
155 __gu_err; \
156})
157
158#define __get_user_check(x,ptr,size) \
159({ \
160 long __gu_err = -EFAULT; \
161 unsigned long __gu_val = 0; \
162 const __typeof__(*(ptr)) *__gu_addr = (ptr); \
163 if (likely(access_ok(VERIFY_READ, __gu_addr, (size)))) \
164 __get_user_size(__gu_val, __gu_addr, (size), __gu_err); \
165 (x) = (__typeof__(*(ptr)))__gu_val; \
166 __gu_err; \
167})
168
169#define __get_user_asm(x, addr, err, insn) \
170({ \
171__asm__ __volatile__( \
172 "1:\n\t" \
173 "mov." insn " %2, %1\n\t" \
174 "2:\n" \
175 ".section .fixup,\"ax\"\n" \
176 "3:\n\t" \
177 "mov #0, %1\n\t" \
178 "mov.l 4f, %0\n\t" \
179 "jmp @%0\n\t" \
180 " mov %3, %0\n\t" \
181 ".balign 4\n" \
182 "4: .long 2b\n\t" \
183 ".previous\n" \
184 ".section __ex_table,\"a\"\n\t" \
185 ".long 1b, 3b\n\t" \
186 ".previous" \
187 :"=&r" (err), "=&r" (x) \
188 :"m" (__m(addr)), "i" (-EFAULT), "0" (err)); })
189
190extern void __get_user_unknown(void);
191
192#define __put_user_size(x,ptr,size,retval) \
193do { \
194 retval = 0; \
195 switch (size) { \
196 case 1: \
197 __put_user_asm(x, ptr, retval, "b"); \
198 break; \
199 case 2: \
200 __put_user_asm(x, ptr, retval, "w"); \
201 break; \
202 case 4: \
203 __put_user_asm(x, ptr, retval, "l"); \
204 break; \
205 case 8: \
206 __put_user_u64(x, ptr, retval); \
207 break; \
208 default: \
209 __put_user_unknown(); \
210 } \
211} while (0)
212
213#define __put_user_nocheck(x,ptr,size) \
214({ \
215 long __pu_err; \
216 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
217 __chk_user_ptr(ptr); \
218 __put_user_size((x), __pu_addr, (size), __pu_err); \
219 __pu_err; \
220})
221
222#define __put_user_check(x,ptr,size) \
223({ \
224 long __pu_err = -EFAULT; \
225 __typeof__(*(ptr)) __user *__pu_addr = (ptr); \
226 if (likely(access_ok(VERIFY_WRITE, __pu_addr, size))) \
227 __put_user_size((x), __pu_addr, (size), \
228 __pu_err); \
229 __pu_err; \
230})
231
232#define __put_user_asm(x, addr, err, insn) \
233({ \
234__asm__ __volatile__( \
235 "1:\n\t" \
236 "mov." insn " %1, %2\n\t" \
237 "2:\n" \
238 ".section .fixup,\"ax\"\n" \
239 "3:\n\t" \
240 "mov.l 4f, %0\n\t" \
241 "jmp @%0\n\t" \
242 " mov %3, %0\n\t" \
243 ".balign 4\n" \
244 "4: .long 2b\n\t" \
245 ".previous\n" \
246 ".section __ex_table,\"a\"\n\t" \
247 ".long 1b, 3b\n\t" \
248 ".previous" \
249 :"=&r" (err) \
250 :"r" (x), "m" (__m(addr)), "i" (-EFAULT), "0" (err) \
251 :"memory"); })
252
253#if defined(CONFIG_CPU_LITTLE_ENDIAN)
254#define __put_user_u64(val,addr,retval) \
255({ \
256__asm__ __volatile__( \
257 "1:\n\t" \
258 "mov.l %R1,%2\n\t" \
259 "mov.l %S1,%T2\n\t" \
260 "2:\n" \
261 ".section .fixup,\"ax\"\n" \
262 "3:\n\t" \
263 "mov.l 4f,%0\n\t" \
264 "jmp @%0\n\t" \
265 " mov %3,%0\n\t" \
266 ".balign 4\n" \
267 "4: .long 2b\n\t" \
268 ".previous\n" \
269 ".section __ex_table,\"a\"\n\t" \
270 ".long 1b, 3b\n\t" \
271 ".previous" \
272 : "=r" (retval) \
273 : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \
274 : "memory"); })
275#else
276#define __put_user_u64(val,addr,retval) \
277({ \
278__asm__ __volatile__( \
279 "1:\n\t" \
280 "mov.l %S1,%2\n\t" \
281 "mov.l %R1,%T2\n\t" \
282 "2:\n" \
283 ".section .fixup,\"ax\"\n" \
284 "3:\n\t" \
285 "mov.l 4f,%0\n\t" \
286 "jmp @%0\n\t" \
287 " mov %3,%0\n\t" \
288 ".balign 4\n" \
289 "4: .long 2b\n\t" \
290 ".previous\n" \
291 ".section __ex_table,\"a\"\n\t" \
292 ".long 1b, 3b\n\t" \
293 ".previous" \
294 : "=r" (retval) \
295 : "r" (val), "m" (__m(addr)), "i" (-EFAULT), "0" (retval) \
296 : "memory"); })
297#endif
298
299extern void __put_user_unknown(void);
300
301/* Generic arbitrary sized copy. */
302/* Return the number of bytes NOT copied */
303__kernel_size_t __copy_user(void *to, const void *from, __kernel_size_t n);
304
305#define copy_to_user(to,from,n) ({ \
306void *__copy_to = (void *) (to); \
307__kernel_size_t __copy_size = (__kernel_size_t) (n); \
308__kernel_size_t __copy_res; \
309if(__copy_size && __access_ok((unsigned long)__copy_to, __copy_size)) { \
310__copy_res = __copy_user(__copy_to, (void *) (from), __copy_size); \
311} else __copy_res = __copy_size; \
312__copy_res; })
313
314#define copy_from_user(to,from,n) ({ \
315void *__copy_to = (void *) (to); \
316void *__copy_from = (void *) (from); \
317__kernel_size_t __copy_size = (__kernel_size_t) (n); \
318__kernel_size_t __copy_res; \
319if(__copy_size && __access_ok((unsigned long)__copy_from, __copy_size)) { \
320__copy_res = __copy_user(__copy_to, __copy_from, __copy_size); \
321} else __copy_res = __copy_size; \
322__copy_res; })
323
324static __always_inline unsigned long
325__copy_from_user(void *to, const void __user *from, unsigned long n)
326{
327 return __copy_user(to, (__force void *)from, n);
328}
329
330static __always_inline unsigned long __must_check
331__copy_to_user(void __user *to, const void *from, unsigned long n)
332{
333 return __copy_user((__force void *)to, from, n);
334}
335
336#define __copy_to_user_inatomic __copy_to_user
337#define __copy_from_user_inatomic __copy_from_user
338
339/*
340 * Clear the area and return remaining number of bytes
341 * (on failure. Usually it's 0.)
342 */
343extern __kernel_size_t __clear_user(void *addr, __kernel_size_t size);
344
345#define clear_user(addr,n) ({ \
346void * __cl_addr = (addr); \
347unsigned long __cl_size = (n); \
348if (__cl_size && __access_ok(((unsigned long)(__cl_addr)), __cl_size)) \
349__cl_size = __clear_user(__cl_addr, __cl_size); \
350__cl_size; })
351
352static __inline__ int
353__strncpy_from_user(unsigned long __dest, unsigned long __user __src, int __count)
354{
355 __kernel_size_t res;
356 unsigned long __dummy, _d, _s, _c;
357
358 __asm__ __volatile__(
359 "9:\n"
360 "mov.b @%2+, %1\n\t"
361 "cmp/eq #0, %1\n\t"
362 "bt/s 2f\n"
363 "1:\n"
364 "mov.b %1, @%3\n\t"
365 "dt %4\n\t"
366 "bf/s 9b\n\t"
367 " add #1, %3\n\t"
368 "2:\n\t"
369 "sub %4, %0\n"
370 "3:\n"
371 ".section .fixup,\"ax\"\n"
372 "4:\n\t"
373 "mov.l 5f, %1\n\t"
374 "jmp @%1\n\t"
375 " mov %9, %0\n\t"
376 ".balign 4\n"
377 "5: .long 3b\n"
378 ".previous\n"
379 ".section __ex_table,\"a\"\n"
380 " .balign 4\n"
381 " .long 9b,4b\n"
382 ".previous"
383 : "=r" (res), "=&z" (__dummy), "=r" (_s), "=r" (_d), "=r"(_c)
384 : "0" (__count), "2" (__src), "3" (__dest), "4" (__count),
385 "i" (-EFAULT)
386 : "memory", "t");
387
388 return res;
389}
390
391/**
392 * strncpy_from_user: - Copy a NUL terminated string from userspace.
393 * @dst: Destination address, in kernel space. This buffer must be at
394 * least @count bytes long.
395 * @src: Source address, in user space.
396 * @count: Maximum number of bytes to copy, including the trailing NUL.
397 *
398 * Copies a NUL-terminated string from userspace to kernel space.
399 *
400 * On success, returns the length of the string (not including the trailing
401 * NUL).
402 *
403 * If access to userspace fails, returns -EFAULT (some data may have been
404 * copied).
405 *
406 * If @count is smaller than the length of the string, copies @count bytes
407 * and returns @count.
408 */
409#define strncpy_from_user(dest,src,count) ({ \
410unsigned long __sfu_src = (unsigned long) (src); \
411int __sfu_count = (int) (count); \
412long __sfu_res = -EFAULT; \
413if(__access_ok(__sfu_src, __sfu_count)) { \
414__sfu_res = __strncpy_from_user((unsigned long) (dest), __sfu_src, __sfu_count); \
415} __sfu_res; })
416
417/*
418 * Return the size of a string (including the ending 0 even when we have
419 * exceeded the maximum string length).
420 */
421static __inline__ long __strnlen_user(const char __user *__s, long __n)
422{
423 unsigned long res;
424 unsigned long __dummy;
425
426 __asm__ __volatile__(
427 "1:\t"
428 "mov.b @(%0,%3), %1\n\t"
429 "cmp/eq %4, %0\n\t"
430 "bt/s 2f\n\t"
431 " add #1, %0\n\t"
432 "tst %1, %1\n\t"
433 "bf 1b\n\t"
434 "2:\n"
435 ".section .fixup,\"ax\"\n"
436 "3:\n\t"
437 "mov.l 4f, %1\n\t"
438 "jmp @%1\n\t"
439 " mov #0, %0\n"
440 ".balign 4\n"
441 "4: .long 2b\n"
442 ".previous\n"
443 ".section __ex_table,\"a\"\n"
444 " .balign 4\n"
445 " .long 1b,3b\n"
446 ".previous"
447 : "=z" (res), "=&r" (__dummy)
448 : "0" (0), "r" (__s), "r" (__n)
449 : "t");
450 return res;
451}
452
453/**
454 * strnlen_user: - Get the size of a string in user space.
455 * @s: The string to measure.
456 * @n: The maximum valid length
457 *
458 * Context: User context only. This function may sleep.
459 *
460 * Get the size of a NUL-terminated string in user space.
461 *
462 * Returns the size of the string INCLUDING the terminating NUL.
463 * On exception, returns 0.
464 * If the string is too long, returns a value greater than @n.
465 */
466static __inline__ long strnlen_user(const char __user *s, long n)
467{
468 if (!__addr_ok(s))
469 return 0;
470 else
471 return __strnlen_user(s, n);
472}
473
474/**
475 * strlen_user: - Get the size of a string in user space.
476 * @str: The string to measure.
477 *
478 * Context: User context only. This function may sleep.
479 *
480 * Get the size of a NUL-terminated string in user space.
481 *
482 * Returns the size of the string INCLUDING the terminating NUL.
483 * On exception, returns 0.
484 *
485 * If there is a limit on the length of a valid string, you may wish to
486 * consider using strnlen_user() instead.
487 */
488#define strlen_user(str) strnlen_user(str, ~0UL >> 1)
489
490/*
491 * The exception table consists of pairs of addresses: the first is the
492 * address of an instruction that is allowed to fault, and the second is
493 * the address at which the program should continue. No registers are
494 * modified, so it is entirely up to the continuation code to figure out
495 * what to do.
496 *
497 * All the routines below use bits of fixup code that are out of line
498 * with the main instruction path. This means when everything is well,
499 * we don't even have to jump over them. Further, they do not intrude
500 * on our cache or tlb entries.
501 */
502
503struct exception_table_entry
504{
505 unsigned long insn, fixup;
506};
507
508extern int fixup_exception(struct pt_regs *regs);
509
510#endif /* __ASM_SH_UACCESS_H */
diff --git a/include/asm-sh64/uaccess.h b/include/asm-sh/uaccess_64.h
index 644c67b65f94..d54ec082d25a 100644
--- a/include/asm-sh64/uaccess.h
+++ b/include/asm-sh/uaccess_64.h
@@ -1,12 +1,8 @@
1#ifndef __ASM_SH64_UACCESS_H 1#ifndef __ASM_SH_UACCESS_64_H
2#define __ASM_SH64_UACCESS_H 2#define __ASM_SH_UACCESS_64_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/uaccess_64.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/uaccess.h
10 * 6 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 7 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003, 2004 Paul Mundt 8 * Copyright (C) 2003, 2004 Paul Mundt
@@ -20,8 +16,10 @@
20 * Copyright (C) 1996, 1997, 1998 by Ralf Baechle 16 * Copyright (C) 1996, 1997, 1998 by Ralf Baechle
21 * and i386 version. 17 * and i386 version.
22 * 18 *
19 * This file is subject to the terms and conditions of the GNU General Public
20 * License. See the file "COPYING" in the main directory of this archive
21 * for more details.
23 */ 22 */
24
25#include <linux/errno.h> 23#include <linux/errno.h>
26#include <linux/sched.h> 24#include <linux/sched.h>
27 25
@@ -297,20 +295,8 @@ struct exception_table_entry
297 295
298#define ARCH_HAS_SEARCH_EXTABLE 296#define ARCH_HAS_SEARCH_EXTABLE
299 297
300/* If gcc inlines memset, it will use st.q instructions. Therefore, we need
301 kmalloc allocations to be 8-byte aligned. Without this, the alignment
302 becomes BYTE_PER_WORD i.e. only 4 (since sizeof(long)==sizeof(void*)==4 on
303 sh64 at the moment). */
304#define ARCH_KMALLOC_MINALIGN 8
305
306/*
307 * We want 8-byte alignment for the slab caches as well, otherwise we have
308 * the same BYTES_PER_WORD (sizeof(void *)) min align in kmem_cache_create().
309 */
310#define ARCH_SLAB_MINALIGN 8
311
312/* Returns 0 if exception not found and fixup.unit otherwise. */ 298/* Returns 0 if exception not found and fixup.unit otherwise. */
313extern unsigned long search_exception_table(unsigned long addr); 299extern unsigned long search_exception_table(unsigned long addr);
314extern const struct exception_table_entry *search_exception_tables (unsigned long addr); 300extern const struct exception_table_entry *search_exception_tables (unsigned long addr);
315 301
316#endif /* __ASM_SH64_UACCESS_H */ 302#endif /* __ASM_SH_UACCESS_64_H */
diff --git a/include/asm-sh/unistd.h b/include/asm-sh/unistd.h
index b182b1cb05fd..4b21f369c28c 100644
--- a/include/asm-sh/unistd.h
+++ b/include/asm-sh/unistd.h
@@ -1,376 +1,5 @@
1#ifndef __ASM_SH_UNISTD_H 1#ifdef CONFIG_SUPERH32
2#define __ASM_SH_UNISTD_H 2# include "unistd_32.h"
3 3#else
4/* 4# include "unistd_64.h"
5 * Copyright (C) 1999 Niibe Yutaka
6 */
7
8/*
9 * This file contains the system call numbers.
10 */
11
12#define __NR_restart_syscall 0
13#define __NR_exit 1
14#define __NR_fork 2
15#define __NR_read 3
16#define __NR_write 4
17#define __NR_open 5
18#define __NR_close 6
19#define __NR_waitpid 7
20#define __NR_creat 8
21#define __NR_link 9
22#define __NR_unlink 10
23#define __NR_execve 11
24#define __NR_chdir 12
25#define __NR_time 13
26#define __NR_mknod 14
27#define __NR_chmod 15
28#define __NR_lchown 16
29#define __NR_break 17
30#define __NR_oldstat 18
31#define __NR_lseek 19
32#define __NR_getpid 20
33#define __NR_mount 21
34#define __NR_umount 22
35#define __NR_setuid 23
36#define __NR_getuid 24
37#define __NR_stime 25
38#define __NR_ptrace 26
39#define __NR_alarm 27
40#define __NR_oldfstat 28
41#define __NR_pause 29
42#define __NR_utime 30
43#define __NR_stty 31
44#define __NR_gtty 32
45#define __NR_access 33
46#define __NR_nice 34
47#define __NR_ftime 35
48#define __NR_sync 36
49#define __NR_kill 37
50#define __NR_rename 38
51#define __NR_mkdir 39
52#define __NR_rmdir 40
53#define __NR_dup 41
54#define __NR_pipe 42
55#define __NR_times 43
56#define __NR_prof 44
57#define __NR_brk 45
58#define __NR_setgid 46
59#define __NR_getgid 47
60#define __NR_signal 48
61#define __NR_geteuid 49
62#define __NR_getegid 50
63#define __NR_acct 51
64#define __NR_umount2 52
65#define __NR_lock 53
66#define __NR_ioctl 54
67#define __NR_fcntl 55
68#define __NR_mpx 56
69#define __NR_setpgid 57
70#define __NR_ulimit 58
71#define __NR_oldolduname 59
72#define __NR_umask 60
73#define __NR_chroot 61
74#define __NR_ustat 62
75#define __NR_dup2 63
76#define __NR_getppid 64
77#define __NR_getpgrp 65
78#define __NR_setsid 66
79#define __NR_sigaction 67
80#define __NR_sgetmask 68
81#define __NR_ssetmask 69
82#define __NR_setreuid 70
83#define __NR_setregid 71
84#define __NR_sigsuspend 72
85#define __NR_sigpending 73
86#define __NR_sethostname 74
87#define __NR_setrlimit 75
88#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
89#define __NR_getrusage 77
90#define __NR_gettimeofday 78
91#define __NR_settimeofday 79
92#define __NR_getgroups 80
93#define __NR_setgroups 81
94#define __NR_select 82
95#define __NR_symlink 83
96#define __NR_oldlstat 84
97#define __NR_readlink 85
98#define __NR_uselib 86
99#define __NR_swapon 87
100#define __NR_reboot 88
101#define __NR_readdir 89
102#define __NR_mmap 90
103#define __NR_munmap 91
104#define __NR_truncate 92
105#define __NR_ftruncate 93
106#define __NR_fchmod 94
107#define __NR_fchown 95
108#define __NR_getpriority 96
109#define __NR_setpriority 97
110#define __NR_profil 98
111#define __NR_statfs 99
112#define __NR_fstatfs 100
113#define __NR_ioperm 101
114#define __NR_socketcall 102
115#define __NR_syslog 103
116#define __NR_setitimer 104
117#define __NR_getitimer 105
118#define __NR_stat 106
119#define __NR_lstat 107
120#define __NR_fstat 108
121#define __NR_olduname 109
122#define __NR_iopl 110
123#define __NR_vhangup 111
124#define __NR_idle 112
125#define __NR_vm86old 113
126#define __NR_wait4 114
127#define __NR_swapoff 115
128#define __NR_sysinfo 116
129#define __NR_ipc 117
130#define __NR_fsync 118
131#define __NR_sigreturn 119
132#define __NR_clone 120
133#define __NR_setdomainname 121
134#define __NR_uname 122
135#define __NR_modify_ldt 123
136#define __NR_adjtimex 124
137#define __NR_mprotect 125
138#define __NR_sigprocmask 126
139#define __NR_create_module 127
140#define __NR_init_module 128
141#define __NR_delete_module 129
142#define __NR_get_kernel_syms 130
143#define __NR_quotactl 131
144#define __NR_getpgid 132
145#define __NR_fchdir 133
146#define __NR_bdflush 134
147#define __NR_sysfs 135
148#define __NR_personality 136
149#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
150#define __NR_setfsuid 138
151#define __NR_setfsgid 139
152#define __NR__llseek 140
153#define __NR_getdents 141
154#define __NR__newselect 142
155#define __NR_flock 143
156#define __NR_msync 144
157#define __NR_readv 145
158#define __NR_writev 146
159#define __NR_getsid 147
160#define __NR_fdatasync 148
161#define __NR__sysctl 149
162#define __NR_mlock 150
163#define __NR_munlock 151
164#define __NR_mlockall 152
165#define __NR_munlockall 153
166#define __NR_sched_setparam 154
167#define __NR_sched_getparam 155
168#define __NR_sched_setscheduler 156
169#define __NR_sched_getscheduler 157
170#define __NR_sched_yield 158
171#define __NR_sched_get_priority_max 159
172#define __NR_sched_get_priority_min 160
173#define __NR_sched_rr_get_interval 161
174#define __NR_nanosleep 162
175#define __NR_mremap 163
176#define __NR_setresuid 164
177#define __NR_getresuid 165
178#define __NR_vm86 166
179#define __NR_query_module 167
180#define __NR_poll 168
181#define __NR_nfsservctl 169
182#define __NR_setresgid 170
183#define __NR_getresgid 171
184#define __NR_prctl 172
185#define __NR_rt_sigreturn 173
186#define __NR_rt_sigaction 174
187#define __NR_rt_sigprocmask 175
188#define __NR_rt_sigpending 176
189#define __NR_rt_sigtimedwait 177
190#define __NR_rt_sigqueueinfo 178
191#define __NR_rt_sigsuspend 179
192#define __NR_pread64 180
193#define __NR_pwrite64 181
194#define __NR_chown 182
195#define __NR_getcwd 183
196#define __NR_capget 184
197#define __NR_capset 185
198#define __NR_sigaltstack 186
199#define __NR_sendfile 187
200#define __NR_streams1 188 /* some people actually want it */
201#define __NR_streams2 189 /* some people actually want it */
202#define __NR_vfork 190
203#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
204#define __NR_mmap2 192
205#define __NR_truncate64 193
206#define __NR_ftruncate64 194
207#define __NR_stat64 195
208#define __NR_lstat64 196
209#define __NR_fstat64 197
210#define __NR_lchown32 198
211#define __NR_getuid32 199
212#define __NR_getgid32 200
213#define __NR_geteuid32 201
214#define __NR_getegid32 202
215#define __NR_setreuid32 203
216#define __NR_setregid32 204
217#define __NR_getgroups32 205
218#define __NR_setgroups32 206
219#define __NR_fchown32 207
220#define __NR_setresuid32 208
221#define __NR_getresuid32 209
222#define __NR_setresgid32 210
223#define __NR_getresgid32 211
224#define __NR_chown32 212
225#define __NR_setuid32 213
226#define __NR_setgid32 214
227#define __NR_setfsuid32 215
228#define __NR_setfsgid32 216
229#define __NR_pivot_root 217
230#define __NR_mincore 218
231#define __NR_madvise 219
232#define __NR_getdents64 220
233#define __NR_fcntl64 221
234/* 223 is unused */
235#define __NR_gettid 224
236#define __NR_readahead 225
237#define __NR_setxattr 226
238#define __NR_lsetxattr 227
239#define __NR_fsetxattr 228
240#define __NR_getxattr 229
241#define __NR_lgetxattr 230
242#define __NR_fgetxattr 231
243#define __NR_listxattr 232
244#define __NR_llistxattr 233
245#define __NR_flistxattr 234
246#define __NR_removexattr 235
247#define __NR_lremovexattr 236
248#define __NR_fremovexattr 237
249#define __NR_tkill 238
250#define __NR_sendfile64 239
251#define __NR_futex 240
252#define __NR_sched_setaffinity 241
253#define __NR_sched_getaffinity 242
254#define __NR_set_thread_area 243
255#define __NR_get_thread_area 244
256#define __NR_io_setup 245
257#define __NR_io_destroy 246
258#define __NR_io_getevents 247
259#define __NR_io_submit 248
260#define __NR_io_cancel 249
261#define __NR_fadvise64 250
262
263#define __NR_exit_group 252
264#define __NR_lookup_dcookie 253
265#define __NR_epoll_create 254
266#define __NR_epoll_ctl 255
267#define __NR_epoll_wait 256
268#define __NR_remap_file_pages 257
269#define __NR_set_tid_address 258
270#define __NR_timer_create 259
271#define __NR_timer_settime (__NR_timer_create+1)
272#define __NR_timer_gettime (__NR_timer_create+2)
273#define __NR_timer_getoverrun (__NR_timer_create+3)
274#define __NR_timer_delete (__NR_timer_create+4)
275#define __NR_clock_settime (__NR_timer_create+5)
276#define __NR_clock_gettime (__NR_timer_create+6)
277#define __NR_clock_getres (__NR_timer_create+7)
278#define __NR_clock_nanosleep (__NR_timer_create+8)
279#define __NR_statfs64 268
280#define __NR_fstatfs64 269
281#define __NR_tgkill 270
282#define __NR_utimes 271
283#define __NR_fadvise64_64 272
284#define __NR_vserver 273
285#define __NR_mbind 274
286#define __NR_get_mempolicy 275
287#define __NR_set_mempolicy 276
288#define __NR_mq_open 277
289#define __NR_mq_unlink (__NR_mq_open+1)
290#define __NR_mq_timedsend (__NR_mq_open+2)
291#define __NR_mq_timedreceive (__NR_mq_open+3)
292#define __NR_mq_notify (__NR_mq_open+4)
293#define __NR_mq_getsetattr (__NR_mq_open+5)
294#define __NR_kexec_load 283
295#define __NR_waitid 284
296#define __NR_add_key 285
297#define __NR_request_key 286
298#define __NR_keyctl 287
299#define __NR_ioprio_set 288
300#define __NR_ioprio_get 289
301#define __NR_inotify_init 290
302#define __NR_inotify_add_watch 291
303#define __NR_inotify_rm_watch 292
304/* 293 is unused */
305#define __NR_migrate_pages 294
306#define __NR_openat 295
307#define __NR_mkdirat 296
308#define __NR_mknodat 297
309#define __NR_fchownat 298
310#define __NR_futimesat 299
311#define __NR_fstatat64 300
312#define __NR_unlinkat 301
313#define __NR_renameat 302
314#define __NR_linkat 303
315#define __NR_symlinkat 304
316#define __NR_readlinkat 305
317#define __NR_fchmodat 306
318#define __NR_faccessat 307
319#define __NR_pselect6 308
320#define __NR_ppoll 309
321#define __NR_unshare 310
322#define __NR_set_robust_list 311
323#define __NR_get_robust_list 312
324#define __NR_splice 313
325#define __NR_sync_file_range 314
326#define __NR_tee 315
327#define __NR_vmsplice 316
328#define __NR_move_pages 317
329#define __NR_getcpu 318
330#define __NR_epoll_pwait 319
331#define __NR_utimensat 320
332#define __NR_signalfd 321
333#define __NR_timerfd 322
334#define __NR_eventfd 323
335#define __NR_fallocate 324
336
337#define NR_syscalls 325
338
339#ifdef __KERNEL__
340
341#define __ARCH_WANT_IPC_PARSE_VERSION
342#define __ARCH_WANT_OLD_READDIR
343#define __ARCH_WANT_OLD_STAT
344#define __ARCH_WANT_STAT64
345#define __ARCH_WANT_SYS_ALARM
346#define __ARCH_WANT_SYS_GETHOSTNAME
347#define __ARCH_WANT_SYS_PAUSE
348#define __ARCH_WANT_SYS_SGETMASK
349#define __ARCH_WANT_SYS_SIGNAL
350#define __ARCH_WANT_SYS_TIME
351#define __ARCH_WANT_SYS_UTIME
352#define __ARCH_WANT_SYS_WAITPID
353#define __ARCH_WANT_SYS_SOCKETCALL
354#define __ARCH_WANT_SYS_FADVISE64
355#define __ARCH_WANT_SYS_GETPGRP
356#define __ARCH_WANT_SYS_LLSEEK
357#define __ARCH_WANT_SYS_NICE
358#define __ARCH_WANT_SYS_OLD_GETRLIMIT
359#define __ARCH_WANT_SYS_OLDUMOUNT
360#define __ARCH_WANT_SYS_SIGPENDING
361#define __ARCH_WANT_SYS_SIGPROCMASK
362#define __ARCH_WANT_SYS_RT_SIGACTION
363#define __ARCH_WANT_SYS_RT_SIGSUSPEND
364
365/*
366 * "Conditional" syscalls
367 *
368 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
369 * but it doesn't work on all toolchains, so we just do it by hand
370 */
371#ifndef cond_syscall
372#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
373#endif 5#endif
374
375#endif /* __KERNEL__ */
376#endif /* __ASM_SH_UNISTD_H */
diff --git a/include/asm-sh/unistd_32.h b/include/asm-sh/unistd_32.h
new file mode 100644
index 000000000000..b182b1cb05fd
--- /dev/null
+++ b/include/asm-sh/unistd_32.h
@@ -0,0 +1,376 @@
1#ifndef __ASM_SH_UNISTD_H
2#define __ASM_SH_UNISTD_H
3
4/*
5 * Copyright (C) 1999 Niibe Yutaka
6 */
7
8/*
9 * This file contains the system call numbers.
10 */
11
12#define __NR_restart_syscall 0
13#define __NR_exit 1
14#define __NR_fork 2
15#define __NR_read 3
16#define __NR_write 4
17#define __NR_open 5
18#define __NR_close 6
19#define __NR_waitpid 7
20#define __NR_creat 8
21#define __NR_link 9
22#define __NR_unlink 10
23#define __NR_execve 11
24#define __NR_chdir 12
25#define __NR_time 13
26#define __NR_mknod 14
27#define __NR_chmod 15
28#define __NR_lchown 16
29#define __NR_break 17
30#define __NR_oldstat 18
31#define __NR_lseek 19
32#define __NR_getpid 20
33#define __NR_mount 21
34#define __NR_umount 22
35#define __NR_setuid 23
36#define __NR_getuid 24
37#define __NR_stime 25
38#define __NR_ptrace 26
39#define __NR_alarm 27
40#define __NR_oldfstat 28
41#define __NR_pause 29
42#define __NR_utime 30
43#define __NR_stty 31
44#define __NR_gtty 32
45#define __NR_access 33
46#define __NR_nice 34
47#define __NR_ftime 35
48#define __NR_sync 36
49#define __NR_kill 37
50#define __NR_rename 38
51#define __NR_mkdir 39
52#define __NR_rmdir 40
53#define __NR_dup 41
54#define __NR_pipe 42
55#define __NR_times 43
56#define __NR_prof 44
57#define __NR_brk 45
58#define __NR_setgid 46
59#define __NR_getgid 47
60#define __NR_signal 48
61#define __NR_geteuid 49
62#define __NR_getegid 50
63#define __NR_acct 51
64#define __NR_umount2 52
65#define __NR_lock 53
66#define __NR_ioctl 54
67#define __NR_fcntl 55
68#define __NR_mpx 56
69#define __NR_setpgid 57
70#define __NR_ulimit 58
71#define __NR_oldolduname 59
72#define __NR_umask 60
73#define __NR_chroot 61
74#define __NR_ustat 62
75#define __NR_dup2 63
76#define __NR_getppid 64
77#define __NR_getpgrp 65
78#define __NR_setsid 66
79#define __NR_sigaction 67
80#define __NR_sgetmask 68
81#define __NR_ssetmask 69
82#define __NR_setreuid 70
83#define __NR_setregid 71
84#define __NR_sigsuspend 72
85#define __NR_sigpending 73
86#define __NR_sethostname 74
87#define __NR_setrlimit 75
88#define __NR_getrlimit 76 /* Back compatible 2Gig limited rlimit */
89#define __NR_getrusage 77
90#define __NR_gettimeofday 78
91#define __NR_settimeofday 79
92#define __NR_getgroups 80
93#define __NR_setgroups 81
94#define __NR_select 82
95#define __NR_symlink 83
96#define __NR_oldlstat 84
97#define __NR_readlink 85
98#define __NR_uselib 86
99#define __NR_swapon 87
100#define __NR_reboot 88
101#define __NR_readdir 89
102#define __NR_mmap 90
103#define __NR_munmap 91
104#define __NR_truncate 92
105#define __NR_ftruncate 93
106#define __NR_fchmod 94
107#define __NR_fchown 95
108#define __NR_getpriority 96
109#define __NR_setpriority 97
110#define __NR_profil 98
111#define __NR_statfs 99
112#define __NR_fstatfs 100
113#define __NR_ioperm 101
114#define __NR_socketcall 102
115#define __NR_syslog 103
116#define __NR_setitimer 104
117#define __NR_getitimer 105
118#define __NR_stat 106
119#define __NR_lstat 107
120#define __NR_fstat 108
121#define __NR_olduname 109
122#define __NR_iopl 110
123#define __NR_vhangup 111
124#define __NR_idle 112
125#define __NR_vm86old 113
126#define __NR_wait4 114
127#define __NR_swapoff 115
128#define __NR_sysinfo 116
129#define __NR_ipc 117
130#define __NR_fsync 118
131#define __NR_sigreturn 119
132#define __NR_clone 120
133#define __NR_setdomainname 121
134#define __NR_uname 122
135#define __NR_modify_ldt 123
136#define __NR_adjtimex 124
137#define __NR_mprotect 125
138#define __NR_sigprocmask 126
139#define __NR_create_module 127
140#define __NR_init_module 128
141#define __NR_delete_module 129
142#define __NR_get_kernel_syms 130
143#define __NR_quotactl 131
144#define __NR_getpgid 132
145#define __NR_fchdir 133
146#define __NR_bdflush 134
147#define __NR_sysfs 135
148#define __NR_personality 136
149#define __NR_afs_syscall 137 /* Syscall for Andrew File System */
150#define __NR_setfsuid 138
151#define __NR_setfsgid 139
152#define __NR__llseek 140
153#define __NR_getdents 141
154#define __NR__newselect 142
155#define __NR_flock 143
156#define __NR_msync 144
157#define __NR_readv 145
158#define __NR_writev 146
159#define __NR_getsid 147
160#define __NR_fdatasync 148
161#define __NR__sysctl 149
162#define __NR_mlock 150
163#define __NR_munlock 151
164#define __NR_mlockall 152
165#define __NR_munlockall 153
166#define __NR_sched_setparam 154
167#define __NR_sched_getparam 155
168#define __NR_sched_setscheduler 156
169#define __NR_sched_getscheduler 157
170#define __NR_sched_yield 158
171#define __NR_sched_get_priority_max 159
172#define __NR_sched_get_priority_min 160
173#define __NR_sched_rr_get_interval 161
174#define __NR_nanosleep 162
175#define __NR_mremap 163
176#define __NR_setresuid 164
177#define __NR_getresuid 165
178#define __NR_vm86 166
179#define __NR_query_module 167
180#define __NR_poll 168
181#define __NR_nfsservctl 169
182#define __NR_setresgid 170
183#define __NR_getresgid 171
184#define __NR_prctl 172
185#define __NR_rt_sigreturn 173
186#define __NR_rt_sigaction 174
187#define __NR_rt_sigprocmask 175
188#define __NR_rt_sigpending 176
189#define __NR_rt_sigtimedwait 177
190#define __NR_rt_sigqueueinfo 178
191#define __NR_rt_sigsuspend 179
192#define __NR_pread64 180
193#define __NR_pwrite64 181
194#define __NR_chown 182
195#define __NR_getcwd 183
196#define __NR_capget 184
197#define __NR_capset 185
198#define __NR_sigaltstack 186
199#define __NR_sendfile 187
200#define __NR_streams1 188 /* some people actually want it */
201#define __NR_streams2 189 /* some people actually want it */
202#define __NR_vfork 190
203#define __NR_ugetrlimit 191 /* SuS compliant getrlimit */
204#define __NR_mmap2 192
205#define __NR_truncate64 193
206#define __NR_ftruncate64 194
207#define __NR_stat64 195
208#define __NR_lstat64 196
209#define __NR_fstat64 197
210#define __NR_lchown32 198
211#define __NR_getuid32 199
212#define __NR_getgid32 200
213#define __NR_geteuid32 201
214#define __NR_getegid32 202
215#define __NR_setreuid32 203
216#define __NR_setregid32 204
217#define __NR_getgroups32 205
218#define __NR_setgroups32 206
219#define __NR_fchown32 207
220#define __NR_setresuid32 208
221#define __NR_getresuid32 209
222#define __NR_setresgid32 210
223#define __NR_getresgid32 211
224#define __NR_chown32 212
225#define __NR_setuid32 213
226#define __NR_setgid32 214
227#define __NR_setfsuid32 215
228#define __NR_setfsgid32 216
229#define __NR_pivot_root 217
230#define __NR_mincore 218
231#define __NR_madvise 219
232#define __NR_getdents64 220
233#define __NR_fcntl64 221
234/* 223 is unused */
235#define __NR_gettid 224
236#define __NR_readahead 225
237#define __NR_setxattr 226
238#define __NR_lsetxattr 227
239#define __NR_fsetxattr 228
240#define __NR_getxattr 229
241#define __NR_lgetxattr 230
242#define __NR_fgetxattr 231
243#define __NR_listxattr 232
244#define __NR_llistxattr 233
245#define __NR_flistxattr 234
246#define __NR_removexattr 235
247#define __NR_lremovexattr 236
248#define __NR_fremovexattr 237
249#define __NR_tkill 238
250#define __NR_sendfile64 239
251#define __NR_futex 240
252#define __NR_sched_setaffinity 241
253#define __NR_sched_getaffinity 242
254#define __NR_set_thread_area 243
255#define __NR_get_thread_area 244
256#define __NR_io_setup 245
257#define __NR_io_destroy 246
258#define __NR_io_getevents 247
259#define __NR_io_submit 248
260#define __NR_io_cancel 249
261#define __NR_fadvise64 250
262
263#define __NR_exit_group 252
264#define __NR_lookup_dcookie 253
265#define __NR_epoll_create 254
266#define __NR_epoll_ctl 255
267#define __NR_epoll_wait 256
268#define __NR_remap_file_pages 257
269#define __NR_set_tid_address 258
270#define __NR_timer_create 259
271#define __NR_timer_settime (__NR_timer_create+1)
272#define __NR_timer_gettime (__NR_timer_create+2)
273#define __NR_timer_getoverrun (__NR_timer_create+3)
274#define __NR_timer_delete (__NR_timer_create+4)
275#define __NR_clock_settime (__NR_timer_create+5)
276#define __NR_clock_gettime (__NR_timer_create+6)
277#define __NR_clock_getres (__NR_timer_create+7)
278#define __NR_clock_nanosleep (__NR_timer_create+8)
279#define __NR_statfs64 268
280#define __NR_fstatfs64 269
281#define __NR_tgkill 270
282#define __NR_utimes 271
283#define __NR_fadvise64_64 272
284#define __NR_vserver 273
285#define __NR_mbind 274
286#define __NR_get_mempolicy 275
287#define __NR_set_mempolicy 276
288#define __NR_mq_open 277
289#define __NR_mq_unlink (__NR_mq_open+1)
290#define __NR_mq_timedsend (__NR_mq_open+2)
291#define __NR_mq_timedreceive (__NR_mq_open+3)
292#define __NR_mq_notify (__NR_mq_open+4)
293#define __NR_mq_getsetattr (__NR_mq_open+5)
294#define __NR_kexec_load 283
295#define __NR_waitid 284
296#define __NR_add_key 285
297#define __NR_request_key 286
298#define __NR_keyctl 287
299#define __NR_ioprio_set 288
300#define __NR_ioprio_get 289
301#define __NR_inotify_init 290
302#define __NR_inotify_add_watch 291
303#define __NR_inotify_rm_watch 292
304/* 293 is unused */
305#define __NR_migrate_pages 294
306#define __NR_openat 295
307#define __NR_mkdirat 296
308#define __NR_mknodat 297
309#define __NR_fchownat 298
310#define __NR_futimesat 299
311#define __NR_fstatat64 300
312#define __NR_unlinkat 301
313#define __NR_renameat 302
314#define __NR_linkat 303
315#define __NR_symlinkat 304
316#define __NR_readlinkat 305
317#define __NR_fchmodat 306
318#define __NR_faccessat 307
319#define __NR_pselect6 308
320#define __NR_ppoll 309
321#define __NR_unshare 310
322#define __NR_set_robust_list 311
323#define __NR_get_robust_list 312
324#define __NR_splice 313
325#define __NR_sync_file_range 314
326#define __NR_tee 315
327#define __NR_vmsplice 316
328#define __NR_move_pages 317
329#define __NR_getcpu 318
330#define __NR_epoll_pwait 319
331#define __NR_utimensat 320
332#define __NR_signalfd 321
333#define __NR_timerfd 322
334#define __NR_eventfd 323
335#define __NR_fallocate 324
336
337#define NR_syscalls 325
338
339#ifdef __KERNEL__
340
341#define __ARCH_WANT_IPC_PARSE_VERSION
342#define __ARCH_WANT_OLD_READDIR
343#define __ARCH_WANT_OLD_STAT
344#define __ARCH_WANT_STAT64
345#define __ARCH_WANT_SYS_ALARM
346#define __ARCH_WANT_SYS_GETHOSTNAME
347#define __ARCH_WANT_SYS_PAUSE
348#define __ARCH_WANT_SYS_SGETMASK
349#define __ARCH_WANT_SYS_SIGNAL
350#define __ARCH_WANT_SYS_TIME
351#define __ARCH_WANT_SYS_UTIME
352#define __ARCH_WANT_SYS_WAITPID
353#define __ARCH_WANT_SYS_SOCKETCALL
354#define __ARCH_WANT_SYS_FADVISE64
355#define __ARCH_WANT_SYS_GETPGRP
356#define __ARCH_WANT_SYS_LLSEEK
357#define __ARCH_WANT_SYS_NICE
358#define __ARCH_WANT_SYS_OLD_GETRLIMIT
359#define __ARCH_WANT_SYS_OLDUMOUNT
360#define __ARCH_WANT_SYS_SIGPENDING
361#define __ARCH_WANT_SYS_SIGPROCMASK
362#define __ARCH_WANT_SYS_RT_SIGACTION
363#define __ARCH_WANT_SYS_RT_SIGSUSPEND
364
365/*
366 * "Conditional" syscalls
367 *
368 * What we want is __attribute__((weak,alias("sys_ni_syscall"))),
369 * but it doesn't work on all toolchains, so we just do it by hand
370 */
371#ifndef cond_syscall
372#define cond_syscall(x) asm(".weak\t" #x "\n\t.set\t" #x ",sys_ni_syscall")
373#endif
374
375#endif /* __KERNEL__ */
376#endif /* __ASM_SH_UNISTD_H */
diff --git a/include/asm-sh64/unistd.h b/include/asm-sh/unistd_64.h
index 1a5197f369b2..944511882cac 100644
--- a/include/asm-sh64/unistd.h
+++ b/include/asm-sh/unistd_64.h
@@ -1,21 +1,19 @@
1#ifndef __ASM_SH64_UNISTD_H 1#ifndef __ASM_SH_UNISTD_64_H
2#define __ASM_SH64_UNISTD_H 2#define __ASM_SH_UNISTD_64_H
3 3
4/* 4/*
5 * This file is subject to the terms and conditions of the GNU General Public 5 * include/asm-sh/unistd_64.h
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 * 6 *
9 * include/asm-sh64/unistd.h 7 * This file contains the system call numbers.
10 * 8 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli 9 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 - 2007 Paul Mundt 10 * Copyright (C) 2003 - 2007 Paul Mundt
13 * Copyright (C) 2004 Sean McGoogan 11 * Copyright (C) 2004 Sean McGoogan
14 * 12 *
15 * This file contains the system call numbers. 13 * This file is subject to the terms and conditions of the GNU General Public
16 * 14 * License. See the file "COPYING" in the main directory of this archive
15 * for more details.
17 */ 16 */
18
19#define __NR_restart_syscall 0 17#define __NR_restart_syscall 0
20#define __NR_exit 1 18#define __NR_exit 1
21#define __NR_fork 2 19#define __NR_fork 2
@@ -414,4 +412,4 @@
414#endif 412#endif
415 413
416#endif /* __KERNEL__ */ 414#endif /* __KERNEL__ */
417#endif /* __ASM_SH64_UNISTD_H */ 415#endif /* __ASM_SH_UNISTD_64_H */
diff --git a/include/asm-sh/user.h b/include/asm-sh/user.h
index d1b8511d9d9f..1a4f43c75126 100644
--- a/include/asm-sh/user.h
+++ b/include/asm-sh/user.h
@@ -27,12 +27,19 @@
27 * to write an integer number of pages. 27 * to write an integer number of pages.
28 */ 28 */
29 29
30#if defined(__SH5__) || defined(CONFIG_CPU_SH5)
31struct user_fpu_struct {
32 unsigned long fp_regs[32];
33 unsigned int fpscr;
34};
35#else
30struct user_fpu_struct { 36struct user_fpu_struct {
31 unsigned long fp_regs[16]; 37 unsigned long fp_regs[16];
32 unsigned long xfp_regs[16]; 38 unsigned long xfp_regs[16];
33 unsigned long fpscr; 39 unsigned long fpscr;
34 unsigned long fpul; 40 unsigned long fpul;
35}; 41};
42#endif
36 43
37struct user { 44struct user {
38 struct pt_regs regs; /* entire machine state */ 45 struct pt_regs regs; /* entire machine state */
diff --git a/include/asm-sh/voyagergx.h b/include/asm-sh/voyagergx.h
deleted file mode 100644
index d825596562df..000000000000
--- a/include/asm-sh/voyagergx.h
+++ /dev/null
@@ -1,341 +0,0 @@
1/* -------------------------------------------------------------------- */
2/* voyagergx.h */
3/* -------------------------------------------------------------------- */
4/* This program is free software; you can redistribute it and/or modify
5 it under the terms of the GNU General Public License as published by
6 the Free Software Foundation; either version 2 of the License, or
7 (at your option) any later version.
8
9 This program is distributed in the hope that it will be useful,
10 but WITHOUT ANY WARRANTY; without even the implied warranty of
11 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 GNU General Public License for more details.
13
14 You should have received a copy of the GNU General Public License
15 along with this program; if not, write to the Free Software
16 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17
18 Copyright 2003 (c) Lineo uSolutions,Inc.
19*/
20/* -------------------------------------------------------------------- */
21
22#ifndef _VOYAGER_GX_REG_H
23#define _VOYAGER_GX_REG_H
24
25#define VOYAGER_BASE 0xb3e00000
26#define VOYAGER_USBH_BASE (0x40000 + VOYAGER_BASE)
27#define VOYAGER_UART_BASE (0x30000 + VOYAGER_BASE)
28#define VOYAGER_AC97_BASE (0xa0000 + VOYAGER_BASE)
29
30#define VOYAGER_IRQ_NUM 26
31#define VOYAGER_IRQ_BASE 200
32
33#define IRQ_SM501_UP (VOYAGER_IRQ_BASE + 0)
34#define IRQ_SM501_G54 (VOYAGER_IRQ_BASE + 1)
35#define IRQ_SM501_G53 (VOYAGER_IRQ_BASE + 2)
36#define IRQ_SM501_G52 (VOYAGER_IRQ_BASE + 3)
37#define IRQ_SM501_G51 (VOYAGER_IRQ_BASE + 4)
38#define IRQ_SM501_G50 (VOYAGER_IRQ_BASE + 5)
39#define IRQ_SM501_G49 (VOYAGER_IRQ_BASE + 6)
40#define IRQ_SM501_G48 (VOYAGER_IRQ_BASE + 7)
41#define IRQ_SM501_I2C (VOYAGER_IRQ_BASE + 8)
42#define IRQ_SM501_PW (VOYAGER_IRQ_BASE + 9)
43#define IRQ_SM501_DMA (VOYAGER_IRQ_BASE + 10)
44#define IRQ_SM501_PCI (VOYAGER_IRQ_BASE + 11)
45#define IRQ_SM501_I2S (VOYAGER_IRQ_BASE + 12)
46#define IRQ_SM501_AC (VOYAGER_IRQ_BASE + 13)
47#define IRQ_SM501_US (VOYAGER_IRQ_BASE + 14)
48#define IRQ_SM501_U1 (VOYAGER_IRQ_BASE + 15)
49#define IRQ_SM501_U0 (VOYAGER_IRQ_BASE + 16)
50#define IRQ_SM501_CV (VOYAGER_IRQ_BASE + 17)
51#define IRQ_SM501_MC (VOYAGER_IRQ_BASE + 18)
52#define IRQ_SM501_S1 (VOYAGER_IRQ_BASE + 19)
53#define IRQ_SM501_S0 (VOYAGER_IRQ_BASE + 20)
54#define IRQ_SM501_UH (VOYAGER_IRQ_BASE + 21)
55#define IRQ_SM501_2D (VOYAGER_IRQ_BASE + 22)
56#define IRQ_SM501_ZD (VOYAGER_IRQ_BASE + 23)
57#define IRQ_SM501_PV (VOYAGER_IRQ_BASE + 24)
58#define IRQ_SM501_CI (VOYAGER_IRQ_BASE + 25)
59
60/* ----- MISC controle register ------------------------------ */
61#define MISC_CTRL (0x000004 + VOYAGER_BASE)
62#define MISC_CTRL_USBCLK_48 (3 << 28)
63#define MISC_CTRL_USBCLK_96 (2 << 28)
64#define MISC_CTRL_USBCLK_CRYSTAL (1 << 28)
65
66/* ----- GPIO[31:0] register --------------------------------- */
67#define GPIO_MUX_LOW (0x000008 + VOYAGER_BASE)
68#define GPIO_MUX_LOW_AC97 0x1F000000
69#define GPIO_MUX_LOW_8051 0x0000ffff
70#define GPIO_MUX_LOW_PWM (1 << 29)
71
72/* ----- GPIO[63:32] register --------------------------------- */
73#define GPIO_MUX_HIGH (0x00000C + VOYAGER_BASE)
74
75/* ----- DRAM controle register ------------------------------- */
76#define DRAM_CTRL (0x000010 + VOYAGER_BASE)
77#define DRAM_CTRL_EMBEDDED (1 << 31)
78#define DRAM_CTRL_CPU_BURST_1 (0 << 28)
79#define DRAM_CTRL_CPU_BURST_2 (1 << 28)
80#define DRAM_CTRL_CPU_BURST_4 (2 << 28)
81#define DRAM_CTRL_CPU_BURST_8 (3 << 28)
82#define DRAM_CTRL_CPU_CAS_LATENCY (1 << 27)
83#define DRAM_CTRL_CPU_SIZE_2 (0 << 24)
84#define DRAM_CTRL_CPU_SIZE_4 (1 << 24)
85#define DRAM_CTRL_CPU_SIZE_64 (4 << 24)
86#define DRAM_CTRL_CPU_SIZE_32 (5 << 24)
87#define DRAM_CTRL_CPU_SIZE_16 (6 << 24)
88#define DRAM_CTRL_CPU_SIZE_8 (7 << 24)
89#define DRAM_CTRL_CPU_COLUMN_SIZE_1024 (0 << 22)
90#define DRAM_CTRL_CPU_COLUMN_SIZE_512 (2 << 22)
91#define DRAM_CTRL_CPU_COLUMN_SIZE_256 (3 << 22)
92#define DRAM_CTRL_CPU_ACTIVE_PRECHARGE (1 << 21)
93#define DRAM_CTRL_CPU_RESET (1 << 20)
94#define DRAM_CTRL_CPU_BANKS (1 << 19)
95#define DRAM_CTRL_CPU_WRITE_PRECHARGE (1 << 18)
96#define DRAM_CTRL_BLOCK_WRITE (1 << 17)
97#define DRAM_CTRL_REFRESH_COMMAND (1 << 16)
98#define DRAM_CTRL_SIZE_4 (0 << 13)
99#define DRAM_CTRL_SIZE_8 (1 << 13)
100#define DRAM_CTRL_SIZE_16 (2 << 13)
101#define DRAM_CTRL_SIZE_32 (3 << 13)
102#define DRAM_CTRL_SIZE_64 (4 << 13)
103#define DRAM_CTRL_SIZE_2 (5 << 13)
104#define DRAM_CTRL_COLUMN_SIZE_256 (0 << 11)
105#define DRAM_CTRL_COLUMN_SIZE_512 (2 << 11)
106#define DRAM_CTRL_COLUMN_SIZE_1024 (3 << 11)
107#define DRAM_CTRL_BLOCK_WRITE_TIME (1 << 10)
108#define DRAM_CTRL_BLOCK_WRITE_PRECHARGE (1 << 9)
109#define DRAM_CTRL_ACTIVE_PRECHARGE (1 << 8)
110#define DRAM_CTRL_RESET (1 << 7)
111#define DRAM_CTRL_REMAIN_ACTIVE (1 << 6)
112#define DRAM_CTRL_BANKS (1 << 1)
113#define DRAM_CTRL_WRITE_PRECHARGE (1 << 0)
114
115/* ----- Arvitration control register -------------------------- */
116#define ARBITRATION_CTRL (0x000014 + VOYAGER_BASE)
117#define ARBITRATION_CTRL_CPUMEM (1 << 29)
118#define ARBITRATION_CTRL_INTMEM (1 << 28)
119#define ARBITRATION_CTRL_USB_OFF (0 << 24)
120#define ARBITRATION_CTRL_USB_PRIORITY_1 (1 << 24)
121#define ARBITRATION_CTRL_USB_PRIORITY_2 (2 << 24)
122#define ARBITRATION_CTRL_USB_PRIORITY_3 (3 << 24)
123#define ARBITRATION_CTRL_USB_PRIORITY_4 (4 << 24)
124#define ARBITRATION_CTRL_USB_PRIORITY_5 (5 << 24)
125#define ARBITRATION_CTRL_USB_PRIORITY_6 (6 << 24)
126#define ARBITRATION_CTRL_USB_PRIORITY_7 (7 << 24)
127#define ARBITRATION_CTRL_PANEL_OFF (0 << 20)
128#define ARBITRATION_CTRL_PANEL_PRIORITY_1 (1 << 20)
129#define ARBITRATION_CTRL_PANEL_PRIORITY_2 (2 << 20)
130#define ARBITRATION_CTRL_PANEL_PRIORITY_3 (3 << 20)
131#define ARBITRATION_CTRL_PANEL_PRIORITY_4 (4 << 20)
132#define ARBITRATION_CTRL_PANEL_PRIORITY_5 (5 << 20)
133#define ARBITRATION_CTRL_PANEL_PRIORITY_6 (6 << 20)
134#define ARBITRATION_CTRL_PANEL_PRIORITY_7 (7 << 20)
135#define ARBITRATION_CTRL_ZVPORT_OFF (0 << 16)
136#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_1 (1 << 16)
137#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_2 (2 << 16)
138#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_3 (3 << 16)
139#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_4 (4 << 16)
140#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_5 (5 << 16)
141#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_6 (6 << 16)
142#define ARBITRATION_CTRL_ZVPORTL_PRIORITY_7 (7 << 16)
143#define ARBITRATION_CTRL_CMD_INTPR_OFF (0 << 12)
144#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_1 (1 << 12)
145#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_2 (2 << 12)
146#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_3 (3 << 12)
147#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_4 (4 << 12)
148#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_5 (5 << 12)
149#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_6 (6 << 12)
150#define ARBITRATION_CTRL_CMD_INTPR_PRIORITY_7 (7 << 12)
151#define ARBITRATION_CTRL_DMA_OFF (0 << 8)
152#define ARBITRATION_CTRL_DMA_PRIORITY_1 (1 << 8)
153#define ARBITRATION_CTRL_DMA_PRIORITY_2 (2 << 8)
154#define ARBITRATION_CTRL_DMA_PRIORITY_3 (3 << 8)
155#define ARBITRATION_CTRL_DMA_PRIORITY_4 (4 << 8)
156#define ARBITRATION_CTRL_DMA_PRIORITY_5 (5 << 8)
157#define ARBITRATION_CTRL_DMA_PRIORITY_6 (6 << 8)
158#define ARBITRATION_CTRL_DMA_PRIORITY_7 (7 << 8)
159#define ARBITRATION_CTRL_VIDEO_OFF (0 << 4)
160#define ARBITRATION_CTRL_VIDEO_PRIORITY_1 (1 << 4)
161#define ARBITRATION_CTRL_VIDEO_PRIORITY_2 (2 << 4)
162#define ARBITRATION_CTRL_VIDEO_PRIORITY_3 (3 << 4)
163#define ARBITRATION_CTRL_VIDEO_PRIORITY_4 (4 << 4)
164#define ARBITRATION_CTRL_VIDEO_PRIORITY_5 (5 << 4)
165#define ARBITRATION_CTRL_VIDEO_PRIORITY_6 (6 << 4)
166#define ARBITRATION_CTRL_VIDEO_PRIORITY_7 (7 << 4)
167#define ARBITRATION_CTRL_CRT_OFF (0 << 0)
168#define ARBITRATION_CTRL_CRT_PRIORITY_1 (1 << 0)
169#define ARBITRATION_CTRL_CRT_PRIORITY_2 (2 << 0)
170#define ARBITRATION_CTRL_CRT_PRIORITY_3 (3 << 0)
171#define ARBITRATION_CTRL_CRT_PRIORITY_4 (4 << 0)
172#define ARBITRATION_CTRL_CRT_PRIORITY_5 (5 << 0)
173#define ARBITRATION_CTRL_CRT_PRIORITY_6 (6 << 0)
174#define ARBITRATION_CTRL_CRT_PRIORITY_7 (7 << 0)
175
176/* ----- Command list status register -------------------------- */
177#define CMD_INTPR_STATUS (0x000024 + VOYAGER_BASE)
178
179/* ----- Interrupt status register ----------------------------- */
180#define INT_STATUS (0x00002c + VOYAGER_BASE)
181#define INT_STATUS_UH (1 << 6)
182#define INT_STATUS_MC (1 << 10)
183#define INT_STATUS_U0 (1 << 12)
184#define INT_STATUS_U1 (1 << 13)
185#define INT_STATUS_AC (1 << 17)
186
187/* ----- Interrupt mask register ------------------------------ */
188#define VOYAGER_INT_MASK (0x000030 + VOYAGER_BASE)
189#define VOYAGER_INT_MASK_AC (1 << 17)
190
191/* ----- Current Gate register ---------------------------------*/
192#define CURRENT_GATE (0x000038 + VOYAGER_BASE)
193
194/* ----- Power mode 0 gate register --------------------------- */
195#define POWER_MODE0_GATE (0x000040 + VOYAGER_BASE)
196#define POWER_MODE0_GATE_G (1 << 6)
197#define POWER_MODE0_GATE_U0 (1 << 7)
198#define POWER_MODE0_GATE_U1 (1 << 8)
199#define POWER_MODE0_GATE_UH (1 << 11)
200#define POWER_MODE0_GATE_AC (1 << 18)
201
202/* ----- Power mode 1 gate register --------------------------- */
203#define POWER_MODE1_GATE (0x000048 + VOYAGER_BASE)
204#define POWER_MODE1_GATE_G (1 << 6)
205#define POWER_MODE1_GATE_U0 (1 << 7)
206#define POWER_MODE1_GATE_U1 (1 << 8)
207#define POWER_MODE1_GATE_UH (1 << 11)
208#define POWER_MODE1_GATE_AC (1 << 18)
209
210/* ----- Power mode 0 clock register -------------------------- */
211#define POWER_MODE0_CLOCK (0x000044 + VOYAGER_BASE)
212
213/* ----- Power mode 1 clock register -------------------------- */
214#define POWER_MODE1_CLOCK (0x00004C + VOYAGER_BASE)
215
216/* ----- Power mode controll register ------------------------- */
217#define POWER_MODE_CTRL (0x000054 + VOYAGER_BASE)
218
219/* ----- Miscellaneous Timing register ------------------------ */
220#define SYSTEM_DRAM_CTRL (0x000068 + VOYAGER_BASE)
221
222/* ----- PWM register ------------------------------------------*/
223#define PWM_0 (0x010020 + VOYAGER_BASE)
224#define PWM_0_HC(x) (((x)&0x0fff)<<20)
225#define PWM_0_LC(x) (((x)&0x0fff)<<8 )
226#define PWM_0_CLK_DEV(x) (((x)&0x000f)<<4 )
227#define PWM_0_EN (1<<0)
228
229/* ----- I2C register ----------------------------------------- */
230#define I2C_BYTECOUNT (0x010040 + VOYAGER_BASE)
231#define I2C_CONTROL (0x010041 + VOYAGER_BASE)
232#define I2C_STATUS (0x010042 + VOYAGER_BASE)
233#define I2C_RESET (0x010042 + VOYAGER_BASE)
234#define I2C_SADDRESS (0x010043 + VOYAGER_BASE)
235#define I2C_DATA (0x010044 + VOYAGER_BASE)
236
237/* ----- Controle register bits ----------------------------------------- */
238#define I2C_CONTROL_E (1 << 0)
239#define I2C_CONTROL_MODE (1 << 1)
240#define I2C_CONTROL_STATUS (1 << 2)
241#define I2C_CONTROL_INT (1 << 4)
242#define I2C_CONTROL_INTACK (1 << 5)
243#define I2C_CONTROL_REPEAT (1 << 6)
244
245/* ----- Status register bits ----------------------------------------- */
246#define I2C_STATUS_BUSY (1 << 0)
247#define I2C_STATUS_ACK (1 << 1)
248#define I2C_STATUS_ERROR (1 << 2)
249#define I2C_STATUS_COMPLETE (1 << 3)
250
251/* ----- Reset register ---------------------------------------------- */
252#define I2C_RESET_ERROR (1 << 2)
253
254/* ----- transmission frequencies ------------------------------------- */
255#define I2C_SADDRESS_SELECT (1 << 0)
256
257/* ----- Display Controll register ----------------------------------------- */
258#define PANEL_DISPLAY_CTRL (0x080000 + VOYAGER_BASE)
259#define PANEL_DISPLAY_CTRL_BIAS (1<<26)
260#define PANEL_PAN_CTRL (0x080004 + VOYAGER_BASE)
261#define PANEL_COLOR_KEY (0x080008 + VOYAGER_BASE)
262#define PANEL_FB_ADDRESS (0x08000C + VOYAGER_BASE)
263#define PANEL_FB_WIDTH (0x080010 + VOYAGER_BASE)
264#define PANEL_WINDOW_WIDTH (0x080014 + VOYAGER_BASE)
265#define PANEL_WINDOW_HEIGHT (0x080018 + VOYAGER_BASE)
266#define PANEL_PLANE_TL (0x08001C + VOYAGER_BASE)
267#define PANEL_PLANE_BR (0x080020 + VOYAGER_BASE)
268#define PANEL_HORIZONTAL_TOTAL (0x080024 + VOYAGER_BASE)
269#define PANEL_HORIZONTAL_SYNC (0x080028 + VOYAGER_BASE)
270#define PANEL_VERTICAL_TOTAL (0x08002C + VOYAGER_BASE)
271#define PANEL_VERTICAL_SYNC (0x080030 + VOYAGER_BASE)
272#define PANEL_CURRENT_LINE (0x080034 + VOYAGER_BASE)
273#define VIDEO_DISPLAY_CTRL (0x080040 + VOYAGER_BASE)
274#define VIDEO_FB_0_ADDRESS (0x080044 + VOYAGER_BASE)
275#define VIDEO_FB_WIDTH (0x080048 + VOYAGER_BASE)
276#define VIDEO_FB_0_LAST_ADDRESS (0x08004C + VOYAGER_BASE)
277#define VIDEO_PLANE_TL (0x080050 + VOYAGER_BASE)
278#define VIDEO_PLANE_BR (0x080054 + VOYAGER_BASE)
279#define VIDEO_SCALE (0x080058 + VOYAGER_BASE)
280#define VIDEO_INITIAL_SCALE (0x08005C + VOYAGER_BASE)
281#define VIDEO_YUV_CONSTANTS (0x080060 + VOYAGER_BASE)
282#define VIDEO_FB_1_ADDRESS (0x080064 + VOYAGER_BASE)
283#define VIDEO_FB_1_LAST_ADDRESS (0x080068 + VOYAGER_BASE)
284#define VIDEO_ALPHA_DISPLAY_CTRL (0x080080 + VOYAGER_BASE)
285#define VIDEO_ALPHA_FB_ADDRESS (0x080084 + VOYAGER_BASE)
286#define VIDEO_ALPHA_FB_WIDTH (0x080088 + VOYAGER_BASE)
287#define VIDEO_ALPHA_FB_LAST_ADDRESS (0x08008C + VOYAGER_BASE)
288#define VIDEO_ALPHA_PLANE_TL (0x080090 + VOYAGER_BASE)
289#define VIDEO_ALPHA_PLANE_BR (0x080094 + VOYAGER_BASE)
290#define VIDEO_ALPHA_SCALE (0x080098 + VOYAGER_BASE)
291#define VIDEO_ALPHA_INITIAL_SCALE (0x08009C + VOYAGER_BASE)
292#define VIDEO_ALPHA_CHROMA_KEY (0x0800A0 + VOYAGER_BASE)
293#define PANEL_HWC_ADDRESS (0x0800F0 + VOYAGER_BASE)
294#define PANEL_HWC_LOCATION (0x0800F4 + VOYAGER_BASE)
295#define PANEL_HWC_COLOR_12 (0x0800F8 + VOYAGER_BASE)
296#define PANEL_HWC_COLOR_3 (0x0800FC + VOYAGER_BASE)
297#define ALPHA_DISPLAY_CTRL (0x080100 + VOYAGER_BASE)
298#define ALPHA_FB_ADDRESS (0x080104 + VOYAGER_BASE)
299#define ALPHA_FB_WIDTH (0x080108 + VOYAGER_BASE)
300#define ALPHA_PLANE_TL (0x08010C + VOYAGER_BASE)
301#define ALPHA_PLANE_BR (0x080110 + VOYAGER_BASE)
302#define ALPHA_CHROMA_KEY (0x080114 + VOYAGER_BASE)
303#define CRT_DISPLAY_CTRL (0x080200 + VOYAGER_BASE)
304#define CRT_FB_ADDRESS (0x080204 + VOYAGER_BASE)
305#define CRT_FB_WIDTH (0x080208 + VOYAGER_BASE)
306#define CRT_HORIZONTAL_TOTAL (0x08020C + VOYAGER_BASE)
307#define CRT_HORIZONTAL_SYNC (0x080210 + VOYAGER_BASE)
308#define CRT_VERTICAL_TOTAL (0x080214 + VOYAGER_BASE)
309#define CRT_VERTICAL_SYNC (0x080218 + VOYAGER_BASE)
310#define CRT_SIGNATURE_ANALYZER (0x08021C + VOYAGER_BASE)
311#define CRT_CURRENT_LINE (0x080220 + VOYAGER_BASE)
312#define CRT_MONITOR_DETECT (0x080224 + VOYAGER_BASE)
313#define CRT_HWC_ADDRESS (0x080230 + VOYAGER_BASE)
314#define CRT_HWC_LOCATION (0x080234 + VOYAGER_BASE)
315#define CRT_HWC_COLOR_12 (0x080238 + VOYAGER_BASE)
316#define CRT_HWC_COLOR_3 (0x08023C + VOYAGER_BASE)
317#define CRT_PALETTE_RAM (0x080400 + VOYAGER_BASE)
318#define PANEL_PALETTE_RAM (0x080800 + VOYAGER_BASE)
319#define VIDEO_PALETTE_RAM (0x080C00 + VOYAGER_BASE)
320
321/* ----- 8051 Controle register ----------------------------------------- */
322#define VOYAGER_8051_BASE (0x000c0000 + VOYAGER_BASE)
323#define VOYAGER_8051_RESET (0x000b0000 + VOYAGER_BASE)
324#define VOYAGER_8051_SELECT (0x000b0004 + VOYAGER_BASE)
325#define VOYAGER_8051_CPU_INT (0x000b000c + VOYAGER_BASE)
326
327/* ----- AC97 Controle register ----------------------------------------- */
328#define AC97_TX_SLOT0 (0x00000000 + VOYAGER_AC97_BASE)
329#define AC97_CONTROL_STATUS (0x00000080 + VOYAGER_AC97_BASE)
330#define AC97C_READ (1 << 19)
331#define AC97C_WD_BIT (1 << 2)
332#define AC97C_INDEX_MASK 0x7f
333
334/* arch/sh/cchips/voyagergx/consistent.c */
335void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
336int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
337
338/* arch/sh/cchips/voyagergx/irq.c */
339void setup_voyagergx_irq(void);
340
341#endif /* _VOYAGER_GX_REG_H */
diff --git a/include/asm-sh64/Kbuild b/include/asm-sh64/Kbuild
deleted file mode 100644
index c68e1680da01..000000000000
--- a/include/asm-sh64/Kbuild
+++ /dev/null
@@ -1 +0,0 @@
1include include/asm-generic/Kbuild.asm
diff --git a/include/asm-sh64/a.out.h b/include/asm-sh64/a.out.h
deleted file mode 100644
index 237ee4e5b72a..000000000000
--- a/include/asm-sh64/a.out.h
+++ /dev/null
@@ -1,38 +0,0 @@
1#ifndef __ASM_SH64_A_OUT_H
2#define __ASM_SH64_A_OUT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/a.out.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15struct exec
16{
17 unsigned long a_info; /* Use macros N_MAGIC, etc for access */
18 unsigned a_text; /* length of text, in bytes */
19 unsigned a_data; /* length of data, in bytes */
20 unsigned a_bss; /* length of uninitialized data area for file, in bytes */
21 unsigned a_syms; /* length of symbol table data in file, in bytes */
22 unsigned a_entry; /* start address */
23 unsigned a_trsize; /* length of relocation info for text, in bytes */
24 unsigned a_drsize; /* length of relocation info for data, in bytes */
25};
26
27#define N_TRSIZE(a) ((a).a_trsize)
28#define N_DRSIZE(a) ((a).a_drsize)
29#define N_SYMSIZE(a) ((a).a_syms)
30
31#ifdef __KERNEL__
32
33#define STACK_TOP TASK_SIZE
34#define STACK_TOP_MAX STACK_TOP
35
36#endif
37
38#endif /* __ASM_SH64_A_OUT_H */
diff --git a/include/asm-sh64/atomic.h b/include/asm-sh64/atomic.h
deleted file mode 100644
index 28f2ea9b567b..000000000000
--- a/include/asm-sh64/atomic.h
+++ /dev/null
@@ -1,158 +0,0 @@
1#ifndef __ASM_SH64_ATOMIC_H
2#define __ASM_SH64_ATOMIC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/atomic.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 */
15
16/*
17 * Atomic operations that C can't guarantee us. Useful for
18 * resource counting etc..
19 *
20 */
21
22typedef struct { volatile int counter; } atomic_t;
23
24#define ATOMIC_INIT(i) ( (atomic_t) { (i) } )
25
26#define atomic_read(v) ((v)->counter)
27#define atomic_set(v,i) ((v)->counter = (i))
28
29#include <asm/system.h>
30
31/*
32 * To get proper branch prediction for the main line, we must branch
33 * forward to code at the end of this object's .text section, then
34 * branch back to restart the operation.
35 */
36
37static __inline__ void atomic_add(int i, atomic_t * v)
38{
39 unsigned long flags;
40
41 local_irq_save(flags);
42 *(long *)v += i;
43 local_irq_restore(flags);
44}
45
46static __inline__ void atomic_sub(int i, atomic_t *v)
47{
48 unsigned long flags;
49
50 local_irq_save(flags);
51 *(long *)v -= i;
52 local_irq_restore(flags);
53}
54
55static __inline__ int atomic_add_return(int i, atomic_t * v)
56{
57 unsigned long temp, flags;
58
59 local_irq_save(flags);
60 temp = *(long *)v;
61 temp += i;
62 *(long *)v = temp;
63 local_irq_restore(flags);
64
65 return temp;
66}
67
68#define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0)
69
70static __inline__ int atomic_sub_return(int i, atomic_t * v)
71{
72 unsigned long temp, flags;
73
74 local_irq_save(flags);
75 temp = *(long *)v;
76 temp -= i;
77 *(long *)v = temp;
78 local_irq_restore(flags);
79
80 return temp;
81}
82
83#define atomic_dec_return(v) atomic_sub_return(1,(v))
84#define atomic_inc_return(v) atomic_add_return(1,(v))
85
86/*
87 * atomic_inc_and_test - increment and test
88 * @v: pointer of type atomic_t
89 *
90 * Atomically increments @v by 1
91 * and returns true if the result is zero, or false for all
92 * other cases.
93 */
94#define atomic_inc_and_test(v) (atomic_inc_return(v) == 0)
95
96#define atomic_sub_and_test(i,v) (atomic_sub_return((i), (v)) == 0)
97#define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0)
98
99#define atomic_inc(v) atomic_add(1,(v))
100#define atomic_dec(v) atomic_sub(1,(v))
101
102static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
103{
104 int ret;
105 unsigned long flags;
106
107 local_irq_save(flags);
108 ret = v->counter;
109 if (likely(ret == old))
110 v->counter = new;
111 local_irq_restore(flags);
112
113 return ret;
114}
115
116#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
117
118static inline int atomic_add_unless(atomic_t *v, int a, int u)
119{
120 int ret;
121 unsigned long flags;
122
123 local_irq_save(flags);
124 ret = v->counter;
125 if (ret != u)
126 v->counter += a;
127 local_irq_restore(flags);
128
129 return ret != u;
130}
131#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
132
133static __inline__ void atomic_clear_mask(unsigned int mask, atomic_t *v)
134{
135 unsigned long flags;
136
137 local_irq_save(flags);
138 *(long *)v &= ~mask;
139 local_irq_restore(flags);
140}
141
142static __inline__ void atomic_set_mask(unsigned int mask, atomic_t *v)
143{
144 unsigned long flags;
145
146 local_irq_save(flags);
147 *(long *)v |= mask;
148 local_irq_restore(flags);
149}
150
151/* Atomic operations are already serializing on SH */
152#define smp_mb__before_atomic_dec() barrier()
153#define smp_mb__after_atomic_dec() barrier()
154#define smp_mb__before_atomic_inc() barrier()
155#define smp_mb__after_atomic_inc() barrier()
156
157#include <asm-generic/atomic.h>
158#endif /* __ASM_SH64_ATOMIC_H */
diff --git a/include/asm-sh64/auxvec.h b/include/asm-sh64/auxvec.h
deleted file mode 100644
index 1ad5a44bdc76..000000000000
--- a/include/asm-sh64/auxvec.h
+++ /dev/null
@@ -1,4 +0,0 @@
1#ifndef __ASM_SH64_AUXVEC_H
2#define __ASM_SH64_AUXVEC_H
3
4#endif /* __ASM_SH64_AUXVEC_H */
diff --git a/include/asm-sh64/bitops.h b/include/asm-sh64/bitops.h
deleted file mode 100644
index 600c59efb4c2..000000000000
--- a/include/asm-sh64/bitops.h
+++ /dev/null
@@ -1,155 +0,0 @@
1#ifndef __ASM_SH64_BITOPS_H
2#define __ASM_SH64_BITOPS_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/bitops.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 */
14
15#ifdef __KERNEL__
16
17#ifndef _LINUX_BITOPS_H
18#error only <linux/bitops.h> can be included directly
19#endif
20
21#include <linux/compiler.h>
22#include <asm/system.h>
23/* For __swab32 */
24#include <asm/byteorder.h>
25
26static __inline__ void set_bit(int nr, volatile void * addr)
27{
28 int mask;
29 volatile unsigned int *a = addr;
30 unsigned long flags;
31
32 a += nr >> 5;
33 mask = 1 << (nr & 0x1f);
34 local_irq_save(flags);
35 *a |= mask;
36 local_irq_restore(flags);
37}
38
39/*
40 * clear_bit() doesn't provide any barrier for the compiler.
41 */
42#define smp_mb__before_clear_bit() barrier()
43#define smp_mb__after_clear_bit() barrier()
44static inline void clear_bit(int nr, volatile unsigned long *a)
45{
46 int mask;
47 unsigned long flags;
48
49 a += nr >> 5;
50 mask = 1 << (nr & 0x1f);
51 local_irq_save(flags);
52 *a &= ~mask;
53 local_irq_restore(flags);
54}
55
56static __inline__ void change_bit(int nr, volatile void * addr)
57{
58 int mask;
59 volatile unsigned int *a = addr;
60 unsigned long flags;
61
62 a += nr >> 5;
63 mask = 1 << (nr & 0x1f);
64 local_irq_save(flags);
65 *a ^= mask;
66 local_irq_restore(flags);
67}
68
69static __inline__ int test_and_set_bit(int nr, volatile void * addr)
70{
71 int mask, retval;
72 volatile unsigned int *a = addr;
73 unsigned long flags;
74
75 a += nr >> 5;
76 mask = 1 << (nr & 0x1f);
77 local_irq_save(flags);
78 retval = (mask & *a) != 0;
79 *a |= mask;
80 local_irq_restore(flags);
81
82 return retval;
83}
84
85static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
86{
87 int mask, retval;
88 volatile unsigned int *a = addr;
89 unsigned long flags;
90
91 a += nr >> 5;
92 mask = 1 << (nr & 0x1f);
93 local_irq_save(flags);
94 retval = (mask & *a) != 0;
95 *a &= ~mask;
96 local_irq_restore(flags);
97
98 return retval;
99}
100
101static __inline__ int test_and_change_bit(int nr, volatile void * addr)
102{
103 int mask, retval;
104 volatile unsigned int *a = addr;
105 unsigned long flags;
106
107 a += nr >> 5;
108 mask = 1 << (nr & 0x1f);
109 local_irq_save(flags);
110 retval = (mask & *a) != 0;
111 *a ^= mask;
112 local_irq_restore(flags);
113
114 return retval;
115}
116
117#include <asm-generic/bitops/non-atomic.h>
118
119static __inline__ unsigned long ffz(unsigned long word)
120{
121 unsigned long result, __d2, __d3;
122
123 __asm__("gettr tr0, %2\n\t"
124 "pta $+32, tr0\n\t"
125 "andi %1, 1, %3\n\t"
126 "beq %3, r63, tr0\n\t"
127 "pta $+4, tr0\n"
128 "0:\n\t"
129 "shlri.l %1, 1, %1\n\t"
130 "addi %0, 1, %0\n\t"
131 "andi %1, 1, %3\n\t"
132 "beqi %3, 1, tr0\n"
133 "1:\n\t"
134 "ptabs %2, tr0\n\t"
135 : "=r" (result), "=r" (word), "=r" (__d2), "=r" (__d3)
136 : "0" (0L), "1" (word));
137
138 return result;
139}
140
141#include <asm-generic/bitops/__ffs.h>
142#include <asm-generic/bitops/find.h>
143#include <asm-generic/bitops/hweight.h>
144#include <asm-generic/bitops/lock.h>
145#include <asm-generic/bitops/sched.h>
146#include <asm-generic/bitops/ffs.h>
147#include <asm-generic/bitops/ext2-non-atomic.h>
148#include <asm-generic/bitops/ext2-atomic.h>
149#include <asm-generic/bitops/minix.h>
150#include <asm-generic/bitops/fls.h>
151#include <asm-generic/bitops/fls64.h>
152
153#endif /* __KERNEL__ */
154
155#endif /* __ASM_SH64_BITOPS_H */
diff --git a/include/asm-sh64/bug.h b/include/asm-sh64/bug.h
deleted file mode 100644
index f3a9c9248ef4..000000000000
--- a/include/asm-sh64/bug.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef __ASM_SH64_BUG_H
2#define __ASM_SH64_BUG_H
3
4#ifdef CONFIG_BUG
5/*
6 * Tell the user there is some problem, then force a segfault (in process
7 * context) or a panic (interrupt context).
8 */
9#define BUG() do { \
10 printk("kernel BUG at %s:%d!\n", __FILE__, __LINE__); \
11 *(volatile int *)0 = 0; \
12} while (0)
13
14#define HAVE_ARCH_BUG
15#endif
16
17#include <asm-generic/bug.h>
18
19#endif /* __ASM_SH64_BUG_H */
diff --git a/include/asm-sh64/bugs.h b/include/asm-sh64/bugs.h
deleted file mode 100644
index 05554aaea672..000000000000
--- a/include/asm-sh64/bugs.h
+++ /dev/null
@@ -1,38 +0,0 @@
1#ifndef __ASM_SH64_BUGS_H
2#define __ASM_SH64_BUGS_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/bugs.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 */
15
16/*
17 * This is included by init/main.c to check for architecture-dependent bugs.
18 *
19 * Needs:
20 * void check_bugs(void);
21 */
22
23/*
24 * I don't know of any Super-H bugs yet.
25 */
26
27#include <asm/processor.h>
28
29static void __init check_bugs(void)
30{
31 extern char *get_cpu_subtype(void);
32 extern unsigned long loops_per_jiffy;
33
34 cpu_data->loops_per_jiffy = loops_per_jiffy;
35
36 printk("CPU: %s\n", get_cpu_subtype());
37}
38#endif /* __ASM_SH64_BUGS_H */
diff --git a/include/asm-sh64/byteorder.h b/include/asm-sh64/byteorder.h
deleted file mode 100644
index 7419d78820ee..000000000000
--- a/include/asm-sh64/byteorder.h
+++ /dev/null
@@ -1,49 +0,0 @@
1#ifndef __ASM_SH64_BYTEORDER_H
2#define __ASM_SH64_BYTEORDER_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/byteorder.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#include <asm/types.h>
16
17static inline __attribute_const__ __u32 ___arch__swab32(__u32 x)
18{
19 __asm__("byterev %0, %0\n\t"
20 "shari %0, 32, %0"
21 : "=r" (x)
22 : "0" (x));
23 return x;
24}
25
26static inline __attribute_const__ __u16 ___arch__swab16(__u16 x)
27{
28 __asm__("byterev %0, %0\n\t"
29 "shari %0, 48, %0"
30 : "=r" (x)
31 : "0" (x));
32 return x;
33}
34
35#define __arch__swab32(x) ___arch__swab32(x)
36#define __arch__swab16(x) ___arch__swab16(x)
37
38#if !defined(__STRICT_ANSI__) || defined(__KERNEL__)
39# define __BYTEORDER_HAS_U64__
40# define __SWAB_64_THRU_32__
41#endif
42
43#ifdef __LITTLE_ENDIAN__
44#include <linux/byteorder/little_endian.h>
45#else
46#include <linux/byteorder/big_endian.h>
47#endif
48
49#endif /* __ASM_SH64_BYTEORDER_H */
diff --git a/include/asm-sh64/cayman.h b/include/asm-sh64/cayman.h
deleted file mode 100644
index 7b6b96844842..000000000000
--- a/include/asm-sh64/cayman.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * include/asm-sh64/cayman.h
7 *
8 * Cayman definitions
9 *
10 * Global defintions for the SH5 Cayman board
11 *
12 * Copyright (C) 2002 Stuart Menefy
13 */
14
15
16/* Setup for the SMSC FDC37C935 / LAN91C100FD */
17#define SMSC_IRQ IRQ_IRL1
18
19/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
20#define PCI2_IRQ IRQ_IRL3
diff --git a/include/asm-sh64/cpumask.h b/include/asm-sh64/cpumask.h
deleted file mode 100644
index b7b105dbedaf..000000000000
--- a/include/asm-sh64/cpumask.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_CPUMASK_H
2#define __ASM_SH64_CPUMASK_H
3
4#include <asm-generic/cpumask.h>
5
6#endif /* __ASM_SH64_CPUMASK_H */
diff --git a/include/asm-sh64/cputime.h b/include/asm-sh64/cputime.h
deleted file mode 100644
index 0fd89da2aa86..000000000000
--- a/include/asm-sh64/cputime.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __SH64_CPUTIME_H
2#define __SH64_CPUTIME_H
3
4#include <asm-generic/cputime.h>
5
6#endif /* __SH64_CPUTIME_H */
diff --git a/include/asm-sh64/current.h b/include/asm-sh64/current.h
deleted file mode 100644
index 261224339d6f..000000000000
--- a/include/asm-sh64/current.h
+++ /dev/null
@@ -1,28 +0,0 @@
1#ifndef __ASM_SH64_CURRENT_H
2#define __ASM_SH64_CURRENT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/current.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 */
15
16#include <linux/thread_info.h>
17
18struct task_struct;
19
20static __inline__ struct task_struct * get_current(void)
21{
22 return current_thread_info()->task;
23}
24
25#define current get_current()
26
27#endif /* __ASM_SH64_CURRENT_H */
28
diff --git a/include/asm-sh64/delay.h b/include/asm-sh64/delay.h
deleted file mode 100644
index 6ae31301a16a..000000000000
--- a/include/asm-sh64/delay.h
+++ /dev/null
@@ -1,11 +0,0 @@
1#ifndef __ASM_SH64_DELAY_H
2#define __ASM_SH64_DELAY_H
3
4extern void __delay(int loops);
5extern void __udelay(unsigned long long usecs, unsigned long lpj);
6extern void __ndelay(unsigned long long nsecs, unsigned long lpj);
7extern void udelay(unsigned long usecs);
8extern void ndelay(unsigned long nsecs);
9
10#endif /* __ASM_SH64_DELAY_H */
11
diff --git a/include/asm-sh64/device.h b/include/asm-sh64/device.h
deleted file mode 100644
index d8f9872b0e2d..000000000000
--- a/include/asm-sh64/device.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * Arch specific extensions to struct device
3 *
4 * This file is released under the GPLv2
5 */
6#include <asm-generic/device.h>
7
diff --git a/include/asm-sh64/div64.h b/include/asm-sh64/div64.h
deleted file mode 100644
index f75869565e2e..000000000000
--- a/include/asm-sh64/div64.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_DIV64_H
2#define __ASM_SH64_DIV64_H
3
4#include <asm-generic/div64.h>
5
6#endif /* __ASM_SH64_DIV64_H */
diff --git a/include/asm-sh64/dma-mapping.h b/include/asm-sh64/dma-mapping.h
deleted file mode 100644
index 18f8dd642ac5..000000000000
--- a/include/asm-sh64/dma-mapping.h
+++ /dev/null
@@ -1,194 +0,0 @@
1#ifndef __ASM_SH_DMA_MAPPING_H
2#define __ASM_SH_DMA_MAPPING_H
3
4#include <linux/mm.h>
5#include <linux/scatterlist.h>
6#include <asm/io.h>
7
8struct pci_dev;
9extern void *consistent_alloc(struct pci_dev *hwdev, size_t size,
10 dma_addr_t *dma_handle);
11extern void consistent_free(struct pci_dev *hwdev, size_t size,
12 void *vaddr, dma_addr_t dma_handle);
13
14#define dma_supported(dev, mask) (1)
15
16static inline int dma_set_mask(struct device *dev, u64 mask)
17{
18 if (!dev->dma_mask || !dma_supported(dev, mask))
19 return -EIO;
20
21 *dev->dma_mask = mask;
22
23 return 0;
24}
25
26static inline void *dma_alloc_coherent(struct device *dev, size_t size,
27 dma_addr_t *dma_handle, gfp_t flag)
28{
29 return consistent_alloc(NULL, size, dma_handle);
30}
31
32static inline void dma_free_coherent(struct device *dev, size_t size,
33 void *vaddr, dma_addr_t dma_handle)
34{
35 consistent_free(NULL, size, vaddr, dma_handle);
36}
37
38#define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
39#define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
40#define dma_is_consistent(d, h) (1)
41
42static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
43 enum dma_data_direction dir)
44{
45 unsigned long start = (unsigned long) vaddr;
46 unsigned long s = start & L1_CACHE_ALIGN_MASK;
47 unsigned long e = (start + size) & L1_CACHE_ALIGN_MASK;
48
49 for (; s <= e; s += L1_CACHE_BYTES)
50 asm volatile ("ocbp %0, 0" : : "r" (s));
51}
52
53static inline dma_addr_t dma_map_single(struct device *dev,
54 void *ptr, size_t size,
55 enum dma_data_direction dir)
56{
57#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
58 if (dev->bus == &pci_bus_type)
59 return virt_to_phys(ptr);
60#endif
61 dma_cache_sync(dev, ptr, size, dir);
62
63 return virt_to_phys(ptr);
64}
65
66#define dma_unmap_single(dev, addr, size, dir) do { } while (0)
67
68static inline int dma_map_sg(struct device *dev, struct scatterlist *sg,
69 int nents, enum dma_data_direction dir)
70{
71 int i;
72
73 for (i = 0; i < nents; i++) {
74#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
75 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
76#endif
77 sg[i].dma_address = sg_phys(&sg[i]);
78 }
79
80 return nents;
81}
82
83#define dma_unmap_sg(dev, sg, nents, dir) do { } while (0)
84
85static inline dma_addr_t dma_map_page(struct device *dev, struct page *page,
86 unsigned long offset, size_t size,
87 enum dma_data_direction dir)
88{
89 return dma_map_single(dev, page_address(page) + offset, size, dir);
90}
91
92static inline void dma_unmap_page(struct device *dev, dma_addr_t dma_address,
93 size_t size, enum dma_data_direction dir)
94{
95 dma_unmap_single(dev, dma_address, size, dir);
96}
97
98static inline void dma_sync_single(struct device *dev, dma_addr_t dma_handle,
99 size_t size, enum dma_data_direction dir)
100{
101#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
102 if (dev->bus == &pci_bus_type)
103 return;
104#endif
105 dma_cache_sync(dev, phys_to_virt(dma_handle), size, dir);
106}
107
108static inline void dma_sync_single_range(struct device *dev,
109 dma_addr_t dma_handle,
110 unsigned long offset, size_t size,
111 enum dma_data_direction dir)
112{
113#if defined(CONFIG_PCI) && !defined(CONFIG_SH_PCIDMA_NONCOHERENT)
114 if (dev->bus == &pci_bus_type)
115 return;
116#endif
117 dma_cache_sync(dev, phys_to_virt(dma_handle) + offset, size, dir);
118}
119
120static inline void dma_sync_sg(struct device *dev, struct scatterlist *sg,
121 int nelems, enum dma_data_direction dir)
122{
123 int i;
124
125 for (i = 0; i < nelems; i++) {
126#if !defined(CONFIG_PCI) || defined(CONFIG_SH_PCIDMA_NONCOHERENT)
127 dma_cache_sync(dev, sg_virt(&sg[i]), sg[i].length, dir);
128#endif
129 sg[i].dma_address = sg_phys(&sg[i]);
130 }
131}
132
133static inline void dma_sync_single_for_cpu(struct device *dev,
134 dma_addr_t dma_handle, size_t size,
135 enum dma_data_direction dir)
136{
137 dma_sync_single(dev, dma_handle, size, dir);
138}
139
140static inline void dma_sync_single_for_device(struct device *dev,
141 dma_addr_t dma_handle, size_t size,
142 enum dma_data_direction dir)
143{
144 dma_sync_single(dev, dma_handle, size, dir);
145}
146
147static inline void dma_sync_single_range_for_cpu(struct device *dev,
148 dma_addr_t dma_handle,
149 unsigned long offset,
150 size_t size,
151 enum dma_data_direction direction)
152{
153 dma_sync_single_for_cpu(dev, dma_handle+offset, size, direction);
154}
155
156static inline void dma_sync_single_range_for_device(struct device *dev,
157 dma_addr_t dma_handle,
158 unsigned long offset,
159 size_t size,
160 enum dma_data_direction direction)
161{
162 dma_sync_single_for_device(dev, dma_handle+offset, size, direction);
163}
164
165static inline void dma_sync_sg_for_cpu(struct device *dev,
166 struct scatterlist *sg, int nelems,
167 enum dma_data_direction dir)
168{
169 dma_sync_sg(dev, sg, nelems, dir);
170}
171
172static inline void dma_sync_sg_for_device(struct device *dev,
173 struct scatterlist *sg, int nelems,
174 enum dma_data_direction dir)
175{
176 dma_sync_sg(dev, sg, nelems, dir);
177}
178
179static inline int dma_get_cache_alignment(void)
180{
181 /*
182 * Each processor family will define its own L1_CACHE_SHIFT,
183 * L1_CACHE_BYTES wraps to this, so this is always safe.
184 */
185 return L1_CACHE_BYTES;
186}
187
188static inline int dma_mapping_error(dma_addr_t dma_addr)
189{
190 return dma_addr == 0;
191}
192
193#endif /* __ASM_SH_DMA_MAPPING_H */
194
diff --git a/include/asm-sh64/dma.h b/include/asm-sh64/dma.h
deleted file mode 100644
index e701f39470a2..000000000000
--- a/include/asm-sh64/dma.h
+++ /dev/null
@@ -1,41 +0,0 @@
1#ifndef __ASM_SH64_DMA_H
2#define __ASM_SH64_DMA_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/dma.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 */
15
16#include <linux/mm.h>
17#include <asm/io.h>
18#include <asm/pgtable.h>
19
20#define MAX_DMA_CHANNELS 4
21
22/*
23 * SH5 can DMA in any memory area.
24 *
25 * The static definition is dodgy because it should limit
26 * the highest DMA-able address based on the actual
27 * Physical memory available. This is actually performed
28 * at run time in defining the memory allowed to DMA_ZONE.
29 */
30#define MAX_DMA_ADDRESS ~(NPHYS_MASK)
31
32#define DMA_MODE_READ 0
33#define DMA_MODE_WRITE 1
34
35#ifdef CONFIG_PCI
36extern int isa_dma_bridge_buggy;
37#else
38#define isa_dma_bridge_buggy (0)
39#endif
40
41#endif /* __ASM_SH64_DMA_H */
diff --git a/include/asm-sh64/elf.h b/include/asm-sh64/elf.h
deleted file mode 100644
index f994286e1998..000000000000
--- a/include/asm-sh64/elf.h
+++ /dev/null
@@ -1,107 +0,0 @@
1#ifndef __ASM_SH64_ELF_H
2#define __ASM_SH64_ELF_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/elf.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * ELF register definitions..
17 */
18
19#include <asm/ptrace.h>
20#include <asm/user.h>
21#include <asm/byteorder.h>
22
23typedef unsigned long elf_greg_t;
24
25#define ELF_NGREG (sizeof (struct pt_regs) / sizeof(elf_greg_t))
26typedef elf_greg_t elf_gregset_t[ELF_NGREG];
27
28typedef struct user_fpu_struct elf_fpregset_t;
29
30/*
31 * This is used to ensure we don't load something for the wrong architecture.
32 */
33#define elf_check_arch(x) ( (x)->e_machine == EM_SH )
34
35/*
36 * These are used to set parameters in the core dumps.
37 */
38#define ELF_CLASS ELFCLASS32
39#ifdef __LITTLE_ENDIAN__
40#define ELF_DATA ELFDATA2LSB
41#else
42#define ELF_DATA ELFDATA2MSB
43#endif
44#define ELF_ARCH EM_SH
45
46#define USE_ELF_CORE_DUMP
47#define ELF_EXEC_PAGESIZE 4096
48
49/* This is the location that an ET_DYN program is loaded if exec'ed. Typical
50 use of this is to invoke "./ld.so someprog" to test out a new version of
51 the loader. We need to make sure that it is out of the way of the program
52 that it will "exec", and that there is sufficient room for the brk. */
53
54#define ELF_ET_DYN_BASE (2 * TASK_SIZE / 3)
55
56#define R_SH_DIR32 1
57#define R_SH_REL32 2
58#define R_SH_IMM_LOW16 246
59#define R_SH_IMM_LOW16_PCREL 247
60#define R_SH_IMM_MEDLOW16 248
61#define R_SH_IMM_MEDLOW16_PCREL 249
62
63#define ELF_CORE_COPY_REGS(_dest,_regs) \
64 memcpy((char *) &_dest, (char *) _regs, \
65 sizeof(struct pt_regs));
66
67/* This yields a mask that user programs can use to figure out what
68 instruction set this CPU supports. This could be done in user space,
69 but it's not easy, and we've already done it here. */
70
71#define ELF_HWCAP (0)
72
73/* This yields a string that ld.so will use to load implementation
74 specific libraries for optimization. This is more specific in
75 intent than poking at uname or /proc/cpuinfo.
76
77 For the moment, we have only optimizations for the Intel generations,
78 but that could change... */
79
80#define ELF_PLATFORM (NULL)
81
82#define ELF_PLAT_INIT(_r, load_addr) \
83 do { _r->regs[0]=0; _r->regs[1]=0; _r->regs[2]=0; _r->regs[3]=0; \
84 _r->regs[4]=0; _r->regs[5]=0; _r->regs[6]=0; _r->regs[7]=0; \
85 _r->regs[8]=0; _r->regs[9]=0; _r->regs[10]=0; _r->regs[11]=0; \
86 _r->regs[12]=0; _r->regs[13]=0; _r->regs[14]=0; _r->regs[15]=0; \
87 _r->regs[16]=0; _r->regs[17]=0; _r->regs[18]=0; _r->regs[19]=0; \
88 _r->regs[20]=0; _r->regs[21]=0; _r->regs[22]=0; _r->regs[23]=0; \
89 _r->regs[24]=0; _r->regs[25]=0; _r->regs[26]=0; _r->regs[27]=0; \
90 _r->regs[28]=0; _r->regs[29]=0; _r->regs[30]=0; _r->regs[31]=0; \
91 _r->regs[32]=0; _r->regs[33]=0; _r->regs[34]=0; _r->regs[35]=0; \
92 _r->regs[36]=0; _r->regs[37]=0; _r->regs[38]=0; _r->regs[39]=0; \
93 _r->regs[40]=0; _r->regs[41]=0; _r->regs[42]=0; _r->regs[43]=0; \
94 _r->regs[44]=0; _r->regs[45]=0; _r->regs[46]=0; _r->regs[47]=0; \
95 _r->regs[48]=0; _r->regs[49]=0; _r->regs[50]=0; _r->regs[51]=0; \
96 _r->regs[52]=0; _r->regs[53]=0; _r->regs[54]=0; _r->regs[55]=0; \
97 _r->regs[56]=0; _r->regs[57]=0; _r->regs[58]=0; _r->regs[59]=0; \
98 _r->regs[60]=0; _r->regs[61]=0; _r->regs[62]=0; \
99 _r->tregs[0]=0; _r->tregs[1]=0; _r->tregs[2]=0; _r->tregs[3]=0; \
100 _r->tregs[4]=0; _r->tregs[5]=0; _r->tregs[6]=0; _r->tregs[7]=0; \
101 _r->sr = SR_FD | SR_MMU; } while (0)
102
103#ifdef __KERNEL__
104#define SET_PERSONALITY(ex, ibcs2) set_personality(PER_LINUX_32BIT)
105#endif
106
107#endif /* __ASM_SH64_ELF_H */
diff --git a/include/asm-sh64/emergency-restart.h b/include/asm-sh64/emergency-restart.h
deleted file mode 100644
index 108d8c48e42e..000000000000
--- a/include/asm-sh64/emergency-restart.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_EMERGENCY_RESTART_H
2#define _ASM_EMERGENCY_RESTART_H
3
4#include <asm-generic/emergency-restart.h>
5
6#endif /* _ASM_EMERGENCY_RESTART_H */
diff --git a/include/asm-sh64/errno.h b/include/asm-sh64/errno.h
deleted file mode 100644
index 57b46d4bdd41..000000000000
--- a/include/asm-sh64/errno.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_ERRNO_H
2#define __ASM_SH64_ERRNO_H
3
4#include <asm-generic/errno.h>
5
6#endif /* __ASM_SH64_ERRNO_H */
diff --git a/include/asm-sh64/fb.h b/include/asm-sh64/fb.h
deleted file mode 100644
index d92e99cd8c8a..000000000000
--- a/include/asm-sh64/fb.h
+++ /dev/null
@@ -1,19 +0,0 @@
1#ifndef _ASM_FB_H_
2#define _ASM_FB_H_
3
4#include <linux/fb.h>
5#include <linux/fs.h>
6#include <asm/page.h>
7
8static inline void fb_pgprotect(struct file *file, struct vm_area_struct *vma,
9 unsigned long off)
10{
11 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
12}
13
14static inline int fb_is_primary_device(struct fb_info *info)
15{
16 return 0;
17}
18
19#endif /* _ASM_FB_H_ */
diff --git a/include/asm-sh64/fcntl.h b/include/asm-sh64/fcntl.h
deleted file mode 100644
index 744dd79b9d5d..000000000000
--- a/include/asm-sh64/fcntl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-sh/fcntl.h>
diff --git a/include/asm-sh64/futex.h b/include/asm-sh64/futex.h
deleted file mode 100644
index 6a332a9f099c..000000000000
--- a/include/asm-sh64/futex.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_FUTEX_H
2#define _ASM_FUTEX_H
3
4#include <asm-generic/futex.h>
5
6#endif
diff --git a/include/asm-sh64/gpio.h b/include/asm-sh64/gpio.h
deleted file mode 100644
index 6bc5a13d8415..000000000000
--- a/include/asm-sh64/gpio.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ASM_SH64_GPIO_H
2#define __ASM_SH64_GPIO_H
3
4/*
5 * This is just a stub, so that every arch using sh-sci has a gpio.h
6 */
7
8#endif /* __ASM_SH64_GPIO_H */
diff --git a/include/asm-sh64/hardirq.h b/include/asm-sh64/hardirq.h
deleted file mode 100644
index 555fd7a35108..000000000000
--- a/include/asm-sh64/hardirq.h
+++ /dev/null
@@ -1,18 +0,0 @@
1#ifndef __ASM_SH64_HARDIRQ_H
2#define __ASM_SH64_HARDIRQ_H
3
4#include <linux/threads.h>
5#include <linux/irq.h>
6
7/* entry.S is sensitive to the offsets of these fields */
8typedef struct {
9 unsigned int __softirq_pending;
10} ____cacheline_aligned irq_cpustat_t;
11
12#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
13
14/* arch/sh64/kernel/irq.c */
15extern void ack_bad_irq(unsigned int irq);
16
17#endif /* __ASM_SH64_HARDIRQ_H */
18
diff --git a/include/asm-sh64/hardware.h b/include/asm-sh64/hardware.h
deleted file mode 100644
index 931c1ad80847..000000000000
--- a/include/asm-sh64/hardware.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __ASM_SH64_HARDWARE_H
2#define __ASM_SH64_HARDWARE_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/hardware.h
10 *
11 * Copyright (C) 2002 Stuart Menefy
12 * Copyright (C) 2003 Paul Mundt
13 *
14 * Defitions of the locations of registers in the physical address space.
15 */
16
17#define PHYS_PERIPHERAL_BLOCK 0x09000000
18#define PHYS_DMAC_BLOCK 0x0e000000
19#define PHYS_PCI_BLOCK 0x60000000
20#define PHYS_EMI_BLOCK 0xff000000
21
22#endif /* __ASM_SH64_HARDWARE_H */
diff --git a/include/asm-sh64/hw_irq.h b/include/asm-sh64/hw_irq.h
deleted file mode 100644
index ebb39089b0ac..000000000000
--- a/include/asm-sh64/hw_irq.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef __ASM_SH64_HW_IRQ_H
2#define __ASM_SH64_HW_IRQ_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/hw_irq.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#endif /* __ASM_SH64_HW_IRQ_H */
diff --git a/include/asm-sh64/ide.h b/include/asm-sh64/ide.h
deleted file mode 100644
index b6e31e8b9410..000000000000
--- a/include/asm-sh64/ide.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * linux/include/asm-sh64/ide.h
3 *
4 * Copyright (C) 1994-1996 Linus Torvalds & authors
5 *
6 * sh64 version by Richard Curnow & Paul Mundt
7 */
8
9/*
10 * This file contains the sh64 architecture specific IDE code.
11 */
12
13#ifndef __ASM_SH64_IDE_H
14#define __ASM_SH64_IDE_H
15
16#ifdef __KERNEL__
17
18
19/* Without this, the initialisation of PCI IDE cards end up calling
20 * ide_init_hwif_ports, which won't work. */
21#ifdef CONFIG_BLK_DEV_IDEPCI
22#define ide_default_io_ctl(base) (0)
23#endif
24
25#include <asm-generic/ide_iops.h>
26
27#endif /* __KERNEL__ */
28
29#endif /* __ASM_SH64_IDE_H */
diff --git a/include/asm-sh64/io.h b/include/asm-sh64/io.h
deleted file mode 100644
index 7bd7314d38c2..000000000000
--- a/include/asm-sh64/io.h
+++ /dev/null
@@ -1,196 +0,0 @@
1#ifndef __ASM_SH64_IO_H
2#define __ASM_SH64_IO_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/io.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 */
15
16/*
17 * Convention:
18 * read{b,w,l}/write{b,w,l} are for PCI,
19 * while in{b,w,l}/out{b,w,l} are for ISA
20 * These may (will) be platform specific function.
21 *
22 * In addition, we have
23 * ctrl_in{b,w,l}/ctrl_out{b,w,l} for SuperH specific I/O.
24 * which are processor specific. Address should be the result of
25 * onchip_remap();
26 */
27
28#include <linux/compiler.h>
29#include <asm/cache.h>
30#include <asm/system.h>
31#include <asm/page.h>
32#include <asm-generic/iomap.h>
33
34/*
35 * Nothing overly special here.. instead of doing the same thing
36 * over and over again, we just define a set of sh64_in/out functions
37 * with an implicit size. The traditional read{b,w,l}/write{b,w,l}
38 * mess is wrapped to this, as are the SH-specific ctrl_in/out routines.
39 */
40static inline unsigned char sh64_in8(const volatile void __iomem *addr)
41{
42 return *(volatile unsigned char __force *)addr;
43}
44
45static inline unsigned short sh64_in16(const volatile void __iomem *addr)
46{
47 return *(volatile unsigned short __force *)addr;
48}
49
50static inline unsigned int sh64_in32(const volatile void __iomem *addr)
51{
52 return *(volatile unsigned int __force *)addr;
53}
54
55static inline unsigned long long sh64_in64(const volatile void __iomem *addr)
56{
57 return *(volatile unsigned long long __force *)addr;
58}
59
60static inline void sh64_out8(unsigned char b, volatile void __iomem *addr)
61{
62 *(volatile unsigned char __force *)addr = b;
63 wmb();
64}
65
66static inline void sh64_out16(unsigned short b, volatile void __iomem *addr)
67{
68 *(volatile unsigned short __force *)addr = b;
69 wmb();
70}
71
72static inline void sh64_out32(unsigned int b, volatile void __iomem *addr)
73{
74 *(volatile unsigned int __force *)addr = b;
75 wmb();
76}
77
78static inline void sh64_out64(unsigned long long b, volatile void __iomem *addr)
79{
80 *(volatile unsigned long long __force *)addr = b;
81 wmb();
82}
83
84#define readb(addr) sh64_in8(addr)
85#define readw(addr) sh64_in16(addr)
86#define readl(addr) sh64_in32(addr)
87#define readb_relaxed(addr) sh64_in8(addr)
88#define readw_relaxed(addr) sh64_in16(addr)
89#define readl_relaxed(addr) sh64_in32(addr)
90
91#define writeb(b, addr) sh64_out8(b, addr)
92#define writew(b, addr) sh64_out16(b, addr)
93#define writel(b, addr) sh64_out32(b, addr)
94
95#define ctrl_inb(addr) sh64_in8(ioport_map(addr, 1))
96#define ctrl_inw(addr) sh64_in16(ioport_map(addr, 2))
97#define ctrl_inl(addr) sh64_in32(ioport_map(addr, 4))
98
99#define ctrl_outb(b, addr) sh64_out8(b, ioport_map(addr, 1))
100#define ctrl_outw(b, addr) sh64_out16(b, ioport_map(addr, 2))
101#define ctrl_outl(b, addr) sh64_out32(b, ioport_map(addr, 4))
102
103#define ioread8(addr) sh64_in8(addr)
104#define ioread16(addr) sh64_in16(addr)
105#define ioread32(addr) sh64_in32(addr)
106#define iowrite8(b, addr) sh64_out8(b, addr)
107#define iowrite16(b, addr) sh64_out16(b, addr)
108#define iowrite32(b, addr) sh64_out32(b, addr)
109
110#define inb(addr) ctrl_inb(addr)
111#define inw(addr) ctrl_inw(addr)
112#define inl(addr) ctrl_inl(addr)
113#define outb(b, addr) ctrl_outb(b, addr)
114#define outw(b, addr) ctrl_outw(b, addr)
115#define outl(b, addr) ctrl_outl(b, addr)
116
117void outsw(unsigned long port, const void *addr, unsigned long count);
118void insw(unsigned long port, void *addr, unsigned long count);
119void outsl(unsigned long port, const void *addr, unsigned long count);
120void insl(unsigned long port, void *addr, unsigned long count);
121
122#define inb_p(addr) inb(addr)
123#define inw_p(addr) inw(addr)
124#define inl_p(addr) inl(addr)
125#define outb_p(x,addr) outb(x,addr)
126#define outw_p(x,addr) outw(x,addr)
127#define outl_p(x,addr) outl(x,addr)
128
129#define __raw_readb readb
130#define __raw_readw readw
131#define __raw_readl readl
132#define __raw_writeb writeb
133#define __raw_writew writew
134#define __raw_writel writel
135
136void memcpy_toio(void __iomem *to, const void *from, long count);
137void memcpy_fromio(void *to, void __iomem *from, long count);
138
139#define mmiowb()
140
141#ifdef __KERNEL__
142
143#ifdef CONFIG_SH_CAYMAN
144extern unsigned long smsc_superio_virt;
145#endif
146#ifdef CONFIG_PCI
147extern unsigned long pciio_virt;
148#endif
149
150#define IO_SPACE_LIMIT 0xffffffff
151
152/*
153 * Change virtual addresses to physical addresses and vv.
154 * These are trivial on the 1:1 Linux/SuperH mapping
155 */
156static inline unsigned long virt_to_phys(volatile void * address)
157{
158 return __pa(address);
159}
160
161static inline void * phys_to_virt(unsigned long address)
162{
163 return __va(address);
164}
165
166extern void * __ioremap(unsigned long phys_addr, unsigned long size,
167 unsigned long flags);
168
169static inline void * ioremap(unsigned long phys_addr, unsigned long size)
170{
171 return __ioremap(phys_addr, size, 1);
172}
173
174static inline void * ioremap_nocache (unsigned long phys_addr, unsigned long size)
175{
176 return __ioremap(phys_addr, size, 0);
177}
178
179extern void iounmap(void *addr);
180
181unsigned long onchip_remap(unsigned long addr, unsigned long size, const char* name);
182extern void onchip_unmap(unsigned long vaddr);
183
184/*
185 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
186 * access
187 */
188#define xlate_dev_mem_ptr(p) __va(p)
189
190/*
191 * Convert a virtual cached pointer to an uncached pointer
192 */
193#define xlate_dev_kmem_ptr(p) p
194
195#endif /* __KERNEL__ */
196#endif /* __ASM_SH64_IO_H */
diff --git a/include/asm-sh64/ioctl.h b/include/asm-sh64/ioctl.h
deleted file mode 100644
index b279fe06dfe5..000000000000
--- a/include/asm-sh64/ioctl.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/ioctl.h>
diff --git a/include/asm-sh64/ioctls.h b/include/asm-sh64/ioctls.h
deleted file mode 100644
index 6b0c04f63c57..000000000000
--- a/include/asm-sh64/ioctls.h
+++ /dev/null
@@ -1,116 +0,0 @@
1#ifndef __ASM_SH64_IOCTLS_H
2#define __ASM_SH64_IOCTLS_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/ioctls.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2004 Richard Curnow
13 *
14 */
15
16#include <asm/ioctl.h>
17
18#define FIOCLEX 0x6601 /* _IO('f', 1) */
19#define FIONCLEX 0x6602 /* _IO('f', 2) */
20#define FIOASYNC 0x4004667d /* _IOW('f', 125, int) */
21#define FIONBIO 0x4004667e /* _IOW('f', 126, int) */
22#define FIONREAD 0x8004667f /* _IOW('f', 127, int) */
23#define TIOCINQ FIONREAD
24#define FIOQSIZE 0x80086680 /* _IOR('f', 128, loff_t) */
25
26#define TCGETS 0x5401
27#define TCSETS 0x5402
28#define TCSETSW 0x5403
29#define TCSETSF 0x5404
30
31#define TCGETA 0x80127417 /* _IOR('t', 23, struct termio) */
32#define TCSETA 0x40127418 /* _IOW('t', 24, struct termio) */
33#define TCSETAW 0x40127419 /* _IOW('t', 25, struct termio) */
34#define TCSETAF 0x4012741c /* _IOW('t', 28, struct termio) */
35
36#define TCSBRK 0x741d /* _IO('t', 29) */
37#define TCXONC 0x741e /* _IO('t', 30) */
38#define TCFLSH 0x741f /* _IO('t', 31) */
39
40#define TIOCSWINSZ 0x40087467 /* _IOW('t', 103, struct winsize) */
41#define TIOCGWINSZ 0x80087468 /* _IOR('t', 104, struct winsize) */
42#define TIOCSTART 0x746e /* _IO('t', 110) start output, like ^Q */
43#define TIOCSTOP 0x746f /* _IO('t', 111) stop output, like ^S */
44#define TIOCOUTQ 0x80047473 /* _IOR('t', 115, int) output queue size */
45
46#define TIOCSPGRP 0x40047476 /* _IOW('t', 118, int) */
47#define TIOCGPGRP 0x80047477 /* _IOR('t', 119, int) */
48
49#define TIOCEXCL 0x540c /* _IO('T', 12) */
50#define TIOCNXCL 0x540d /* _IO('T', 13) */
51#define TIOCSCTTY 0x540e /* _IO('T', 14) */
52
53#define TIOCSTI 0x40015412 /* _IOW('T', 18, char) 0x5412 */
54#define TIOCMGET 0x80045415 /* _IOR('T', 21, unsigned int) 0x5415 */
55#define TIOCMBIS 0x40045416 /* _IOW('T', 22, unsigned int) 0x5416 */
56#define TIOCMBIC 0x40045417 /* _IOW('T', 23, unsigned int) 0x5417 */
57#define TIOCMSET 0x40045418 /* _IOW('T', 24, unsigned int) 0x5418 */
58
59#define TIOCM_LE 0x001
60#define TIOCM_DTR 0x002
61#define TIOCM_RTS 0x004
62#define TIOCM_ST 0x008
63#define TIOCM_SR 0x010
64#define TIOCM_CTS 0x020
65#define TIOCM_CAR 0x040
66#define TIOCM_RNG 0x080
67#define TIOCM_DSR 0x100
68#define TIOCM_CD TIOCM_CAR
69#define TIOCM_RI TIOCM_RNG
70
71#define TIOCGSOFTCAR 0x80045419 /* _IOR('T', 25, unsigned int) 0x5419 */
72#define TIOCSSOFTCAR 0x4004541a /* _IOW('T', 26, unsigned int) 0x541A */
73#define TIOCLINUX 0x4004541c /* _IOW('T', 28, char) 0x541C */
74#define TIOCCONS 0x541d /* _IO('T', 29) */
75#define TIOCGSERIAL 0x803c541e /* _IOR('T', 30, struct serial_struct) 0x541E */
76#define TIOCSSERIAL 0x403c541f /* _IOW('T', 31, struct serial_struct) 0x541F */
77#define TIOCPKT 0x40045420 /* _IOW('T', 32, int) 0x5420 */
78
79#define TIOCPKT_DATA 0
80#define TIOCPKT_FLUSHREAD 1
81#define TIOCPKT_FLUSHWRITE 2
82#define TIOCPKT_STOP 4
83#define TIOCPKT_START 8
84#define TIOCPKT_NOSTOP 16
85#define TIOCPKT_DOSTOP 32
86
87
88#define TIOCNOTTY 0x5422 /* _IO('T', 34) */
89#define TIOCSETD 0x40045423 /* _IOW('T', 35, int) 0x5423 */
90#define TIOCGETD 0x80045424 /* _IOR('T', 36, int) 0x5424 */
91#define TCSBRKP 0x40045424 /* _IOW('T', 37, int) 0x5425 */ /* Needed for POSIX tcsendbreak() */
92#define TIOCTTYGSTRUCT 0x8c105426 /* _IOR('T', 38, struct tty_struct) 0x5426 */ /* For debugging only */
93#define TIOCSBRK 0x5427 /* _IO('T', 39) */ /* BSD compatibility */
94#define TIOCCBRK 0x5428 /* _IO('T', 40) */ /* BSD compatibility */
95#define TIOCGSID 0x80045429 /* _IOR('T', 41, pid_t) 0x5429 */ /* Return the session ID of FD */
96#define TIOCGPTN 0x80045430 /* _IOR('T',0x30, unsigned int) 0x5430 Get Pty Number (of pty-mux device) */
97#define TIOCSPTLCK 0x40045431 /* _IOW('T',0x31, int) Lock/unlock Pty */
98
99#define TIOCSERCONFIG 0x5453 /* _IO('T', 83) */
100#define TIOCSERGWILD 0x80045454 /* _IOR('T', 84, int) 0x5454 */
101#define TIOCSERSWILD 0x40045455 /* _IOW('T', 85, int) 0x5455 */
102#define TIOCGLCKTRMIOS 0x5456
103#define TIOCSLCKTRMIOS 0x5457
104#define TIOCSERGSTRUCT 0x80d85458 /* _IOR('T', 88, struct async_struct) 0x5458 */ /* For debugging only */
105#define TIOCSERGETLSR 0x80045459 /* _IOR('T', 89, unsigned int) 0x5459 */ /* Get line status register */
106
107/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
108#define TIOCSER_TEMT 0x01 /* Transmitter physically empty */
109
110#define TIOCSERGETMULTI 0x80a8545a /* _IOR('T', 90, struct serial_multiport_struct) 0x545A */ /* Get multiport config */
111#define TIOCSERSETMULTI 0x40a8545b /* _IOW('T', 91, struct serial_multiport_struct) 0x545B */ /* Set multiport config */
112
113#define TIOCMIWAIT 0x545c /* _IO('T', 92) wait for a change on serial input line(s) */
114#define TIOCGICOUNT 0x545d /* read serial port inline interrupt counts */
115
116#endif /* __ASM_SH64_IOCTLS_H */
diff --git a/include/asm-sh64/ipcbuf.h b/include/asm-sh64/ipcbuf.h
deleted file mode 100644
index c441e35299c0..000000000000
--- a/include/asm-sh64/ipcbuf.h
+++ /dev/null
@@ -1,40 +0,0 @@
1#ifndef __ASM_SH64_IPCBUF_H__
2#define __ASM_SH64_IPCBUF_H__
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/ipcbuf.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * The ipc64_perm structure for i386 architecture.
17 * Note extra padding because this structure is passed back and forth
18 * between kernel and user space.
19 *
20 * Pad space is left for:
21 * - 32-bit mode_t and seq
22 * - 2 miscellaneous 32-bit values
23 */
24
25struct ipc64_perm
26{
27 __kernel_key_t key;
28 __kernel_uid32_t uid;
29 __kernel_gid32_t gid;
30 __kernel_uid32_t cuid;
31 __kernel_gid32_t cgid;
32 __kernel_mode_t mode;
33 unsigned short __pad1;
34 unsigned short seq;
35 unsigned short __pad2;
36 unsigned long __unused1;
37 unsigned long __unused2;
38};
39
40#endif /* __ASM_SH64_IPCBUF_H__ */
diff --git a/include/asm-sh64/irq_regs.h b/include/asm-sh64/irq_regs.h
deleted file mode 100644
index 3dd9c0b70270..000000000000
--- a/include/asm-sh64/irq_regs.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/irq_regs.h>
diff --git a/include/asm-sh64/kdebug.h b/include/asm-sh64/kdebug.h
deleted file mode 100644
index 6ece1b037665..000000000000
--- a/include/asm-sh64/kdebug.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-generic/kdebug.h>
diff --git a/include/asm-sh64/keyboard.h b/include/asm-sh64/keyboard.h
deleted file mode 100644
index 0b01c3beb2f8..000000000000
--- a/include/asm-sh64/keyboard.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * linux/include/asm-shmedia/keyboard.h
3 *
4 * Copied from i386 version:
5 * Created 3 Nov 1996 by Geert Uytterhoeven
6 */
7
8/*
9 * This file contains the i386 architecture specific keyboard definitions
10 */
11
12#ifndef __ASM_SH64_KEYBOARD_H
13#define __ASM_SH64_KEYBOARD_H
14
15#ifdef __KERNEL__
16
17#include <linux/kernel.h>
18#include <linux/ioport.h>
19#include <asm/io.h>
20
21#ifdef CONFIG_SH_CAYMAN
22#define KEYBOARD_IRQ (START_EXT_IRQS + 2) /* SMSC SuperIO IRQ 1 */
23#endif
24#define DISABLE_KBD_DURING_INTERRUPTS 0
25
26extern int pckbd_setkeycode(unsigned int scancode, unsigned int keycode);
27extern int pckbd_getkeycode(unsigned int scancode);
28extern int pckbd_translate(unsigned char scancode, unsigned char *keycode,
29 char raw_mode);
30extern char pckbd_unexpected_up(unsigned char keycode);
31extern void pckbd_leds(unsigned char leds);
32extern void pckbd_init_hw(void);
33
34#define kbd_setkeycode pckbd_setkeycode
35#define kbd_getkeycode pckbd_getkeycode
36#define kbd_translate pckbd_translate
37#define kbd_unexpected_up pckbd_unexpected_up
38#define kbd_leds pckbd_leds
39#define kbd_init_hw pckbd_init_hw
40
41/* resource allocation */
42#define kbd_request_region()
43#define kbd_request_irq(handler) request_irq(KEYBOARD_IRQ, handler, 0, \
44 "keyboard", NULL)
45
46/* How to access the keyboard macros on this platform. */
47#define kbd_read_input() inb(KBD_DATA_REG)
48#define kbd_read_status() inb(KBD_STATUS_REG)
49#define kbd_write_output(val) outb(val, KBD_DATA_REG)
50#define kbd_write_command(val) outb(val, KBD_CNTL_REG)
51
52/* Some stoneage hardware needs delays after some operations. */
53#define kbd_pause() do { } while(0)
54
55/*
56 * Machine specific bits for the PS/2 driver
57 */
58
59#ifdef CONFIG_SH_CAYMAN
60#define AUX_IRQ (START_EXT_IRQS + 6) /* SMSC SuperIO IRQ12 */
61#endif
62
63#define aux_request_irq(hand, dev_id) \
64 request_irq(AUX_IRQ, hand, IRQF_SHARED, "PS2 Mouse", dev_id)
65
66#define aux_free_irq(dev_id) free_irq(AUX_IRQ, dev_id)
67
68#endif /* __KERNEL__ */
69#endif /* __ASM_SH64_KEYBOARD_H */
70
diff --git a/include/asm-sh64/kmap_types.h b/include/asm-sh64/kmap_types.h
deleted file mode 100644
index 2ae7c7587919..000000000000
--- a/include/asm-sh64/kmap_types.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH64_KMAP_TYPES_H
2#define __ASM_SH64_KMAP_TYPES_H
3
4#include <asm-sh/kmap_types.h>
5
6#endif /* __ASM_SH64_KMAP_TYPES_H */
7
diff --git a/include/asm-sh64/linkage.h b/include/asm-sh64/linkage.h
deleted file mode 100644
index 1dd0e84a228d..000000000000
--- a/include/asm-sh64/linkage.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH64_LINKAGE_H
2#define __ASM_SH64_LINKAGE_H
3
4#include <asm-sh/linkage.h>
5
6#endif /* __ASM_SH64_LINKAGE_H */
7
diff --git a/include/asm-sh64/local.h b/include/asm-sh64/local.h
deleted file mode 100644
index d9bd95dd36e2..000000000000
--- a/include/asm-sh64/local.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH64_LOCAL_H
2#define __ASM_SH64_LOCAL_H
3
4#include <asm-generic/local.h>
5
6#endif /* __ASM_SH64_LOCAL_H */
7
diff --git a/include/asm-sh64/mc146818rtc.h b/include/asm-sh64/mc146818rtc.h
deleted file mode 100644
index 6cd3aec68dbe..000000000000
--- a/include/asm-sh64/mc146818rtc.h
+++ /dev/null
@@ -1,7 +0,0 @@
1/*
2 * linux/include/asm-sh64/mc146818rtc.h
3 *
4*/
5
6/* For now, an empty place-holder to get IDE to compile. */
7
diff --git a/include/asm-sh64/mman.h b/include/asm-sh64/mman.h
deleted file mode 100644
index a9be6d885c3e..000000000000
--- a/include/asm-sh64/mman.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_MMAN_H
2#define __ASM_SH64_MMAN_H
3
4#include <asm-sh/mman.h>
5
6#endif /* __ASM_SH64_MMAN_H */
diff --git a/include/asm-sh64/mmu.h b/include/asm-sh64/mmu.h
deleted file mode 100644
index ccd36d26615a..000000000000
--- a/include/asm-sh64/mmu.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __MMU_H
2#define __MMU_H
3
4/* Default "unsigned long" context */
5typedef unsigned long mm_context_t;
6
7#endif
diff --git a/include/asm-sh64/mmu_context.h b/include/asm-sh64/mmu_context.h
deleted file mode 100644
index 507bf72bb8e1..000000000000
--- a/include/asm-sh64/mmu_context.h
+++ /dev/null
@@ -1,208 +0,0 @@
1#ifndef __ASM_SH64_MMU_CONTEXT_H
2#define __ASM_SH64_MMU_CONTEXT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/mmu_context.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 * ASID handling idea taken from MIPS implementation.
15 *
16 */
17
18#ifndef __ASSEMBLY__
19
20/*
21 * Cache of MMU context last used.
22 *
23 * The MMU "context" consists of two things:
24 * (a) TLB cache version (or cycle, top 24 bits of mmu_context_cache)
25 * (b) ASID (Address Space IDentifier, bottom 8 bits of mmu_context_cache)
26 */
27extern unsigned long mmu_context_cache;
28
29#include <asm/page.h>
30#include <asm-generic/mm_hooks.h>
31
32/* Current mm's pgd */
33extern pgd_t *mmu_pdtp_cache;
34
35#define SR_ASID_MASK 0xffffffffff00ffffULL
36#define SR_ASID_SHIFT 16
37
38#define MMU_CONTEXT_ASID_MASK 0x000000ff
39#define MMU_CONTEXT_VERSION_MASK 0xffffff00
40#define MMU_CONTEXT_FIRST_VERSION 0x00000100
41#define NO_CONTEXT 0
42
43/* ASID is 8-bit value, so it can't be 0x100 */
44#define MMU_NO_ASID 0x100
45
46
47/*
48 * Virtual Page Number mask
49 */
50#define MMU_VPN_MASK 0xfffff000
51
52static inline void
53get_new_mmu_context(struct mm_struct *mm)
54{
55 extern void flush_tlb_all(void);
56 extern void flush_cache_all(void);
57
58 unsigned long mc = ++mmu_context_cache;
59
60 if (!(mc & MMU_CONTEXT_ASID_MASK)) {
61 /* We exhaust ASID of this version.
62 Flush all TLB and start new cycle. */
63 flush_tlb_all();
64 /* We have to flush all caches as ASIDs are
65 used in cache */
66 flush_cache_all();
67 /* Fix version if needed.
68 Note that we avoid version #0/asid #0 to distingush NO_CONTEXT. */
69 if (!mc)
70 mmu_context_cache = mc = MMU_CONTEXT_FIRST_VERSION;
71 }
72 mm->context = mc;
73}
74
75/*
76 * Get MMU context if needed.
77 */
78static __inline__ void
79get_mmu_context(struct mm_struct *mm)
80{
81 if (mm) {
82 unsigned long mc = mmu_context_cache;
83 /* Check if we have old version of context.
84 If it's old, we need to get new context with new version. */
85 if ((mm->context ^ mc) & MMU_CONTEXT_VERSION_MASK)
86 get_new_mmu_context(mm);
87 }
88}
89
90/*
91 * Initialize the context related info for a new mm_struct
92 * instance.
93 */
94static inline int init_new_context(struct task_struct *tsk,
95 struct mm_struct *mm)
96{
97 mm->context = NO_CONTEXT;
98
99 return 0;
100}
101
102/*
103 * Destroy context related info for an mm_struct that is about
104 * to be put to rest.
105 */
106static inline void destroy_context(struct mm_struct *mm)
107{
108 extern void flush_tlb_mm(struct mm_struct *mm);
109
110 /* Well, at least free TLB entries */
111 flush_tlb_mm(mm);
112}
113
114#endif /* __ASSEMBLY__ */
115
116/* Common defines */
117#define TLB_STEP 0x00000010
118#define TLB_PTEH 0x00000000
119#define TLB_PTEL 0x00000008
120
121/* PTEH defines */
122#define PTEH_ASID_SHIFT 2
123#define PTEH_VALID 0x0000000000000001
124#define PTEH_SHARED 0x0000000000000002
125#define PTEH_MATCH_ASID 0x00000000000003ff
126
127#ifndef __ASSEMBLY__
128/* This has to be a common function because the next location to fill
129 * information is shared. */
130extern void __do_tlb_refill(unsigned long address, unsigned long long is_text_not_data, pte_t *pte);
131
132/* Profiling counter. */
133#ifdef CONFIG_SH64_PROC_TLB
134extern unsigned long long calls_to_do_fast_page_fault;
135#endif
136
137static inline unsigned long get_asid(void)
138{
139 unsigned long long sr;
140
141 asm volatile ("getcon " __SR ", %0\n\t"
142 : "=r" (sr));
143
144 sr = (sr >> SR_ASID_SHIFT) & MMU_CONTEXT_ASID_MASK;
145 return (unsigned long) sr;
146}
147
148/* Set ASID into SR */
149static inline void set_asid(unsigned long asid)
150{
151 unsigned long long sr, pc;
152
153 asm volatile ("getcon " __SR ", %0" : "=r" (sr));
154
155 sr = (sr & SR_ASID_MASK) | (asid << SR_ASID_SHIFT);
156
157 /*
158 * It is possible that this function may be inlined and so to avoid
159 * the assembler reporting duplicate symbols we make use of the gas trick
160 * of generating symbols using numerics and forward reference.
161 */
162 asm volatile ("movi 1, %1\n\t"
163 "shlli %1, 28, %1\n\t"
164 "or %0, %1, %1\n\t"
165 "putcon %1, " __SR "\n\t"
166 "putcon %0, " __SSR "\n\t"
167 "movi 1f, %1\n\t"
168 "ori %1, 1 , %1\n\t"
169 "putcon %1, " __SPC "\n\t"
170 "rte\n"
171 "1:\n\t"
172 : "=r" (sr), "=r" (pc) : "0" (sr));
173}
174
175/*
176 * After we have set current->mm to a new value, this activates
177 * the context for the new mm so we see the new mappings.
178 */
179static __inline__ void activate_context(struct mm_struct *mm)
180{
181 get_mmu_context(mm);
182 set_asid(mm->context & MMU_CONTEXT_ASID_MASK);
183}
184
185
186static __inline__ void switch_mm(struct mm_struct *prev,
187 struct mm_struct *next,
188 struct task_struct *tsk)
189{
190 if (prev != next) {
191 mmu_pdtp_cache = next->pgd;
192 activate_context(next);
193 }
194}
195
196#define deactivate_mm(tsk,mm) do { } while (0)
197
198#define activate_mm(prev, next) \
199 switch_mm((prev),(next),NULL)
200
201static inline void
202enter_lazy_tlb(struct mm_struct *mm, struct task_struct *tsk)
203{
204}
205
206#endif /* __ASSEMBLY__ */
207
208#endif /* __ASM_SH64_MMU_CONTEXT_H */
diff --git a/include/asm-sh64/module.h b/include/asm-sh64/module.h
deleted file mode 100644
index c313650d3d93..000000000000
--- a/include/asm-sh64/module.h
+++ /dev/null
@@ -1,20 +0,0 @@
1#ifndef __ASM_SH64_MODULE_H
2#define __ASM_SH64_MODULE_H
3/*
4 * This file contains the SH architecture specific module code.
5 */
6
7struct mod_arch_specific {
8 /* empty */
9};
10
11#define Elf_Shdr Elf32_Shdr
12#define Elf_Sym Elf32_Sym
13#define Elf_Ehdr Elf32_Ehdr
14
15#define module_map(x) vmalloc(x)
16#define module_unmap(x) vfree(x)
17#define module_arch_init(x) (0)
18#define arch_init_modules(x) do { } while (0)
19
20#endif /* __ASM_SH64_MODULE_H */
diff --git a/include/asm-sh64/msgbuf.h b/include/asm-sh64/msgbuf.h
deleted file mode 100644
index cf0494ce0ba8..000000000000
--- a/include/asm-sh64/msgbuf.h
+++ /dev/null
@@ -1,42 +0,0 @@
1#ifndef __ASM_SH64_MSGBUF_H
2#define __ASM_SH64_MSGBUF_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/msgbuf.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * The msqid64_ds structure for i386 architecture.
17 * Note extra padding because this structure is passed back and forth
18 * between kernel and user space.
19 *
20 * Pad space is left for:
21 * - 64-bit time_t to solve y2038 problem
22 * - 2 miscellaneous 32-bit values
23 */
24
25struct msqid64_ds {
26 struct ipc64_perm msg_perm;
27 __kernel_time_t msg_stime; /* last msgsnd time */
28 unsigned long __unused1;
29 __kernel_time_t msg_rtime; /* last msgrcv time */
30 unsigned long __unused2;
31 __kernel_time_t msg_ctime; /* last change time */
32 unsigned long __unused3;
33 unsigned long msg_cbytes; /* current number of bytes on queue */
34 unsigned long msg_qnum; /* number of messages in queue */
35 unsigned long msg_qbytes; /* max number of bytes on queue */
36 __kernel_pid_t msg_lspid; /* pid of last msgsnd */
37 __kernel_pid_t msg_lrpid; /* last receive pid */
38 unsigned long __unused4;
39 unsigned long __unused5;
40};
41
42#endif /* __ASM_SH64_MSGBUF_H */
diff --git a/include/asm-sh64/mutex.h b/include/asm-sh64/mutex.h
deleted file mode 100644
index 458c1f7fbc18..000000000000
--- a/include/asm-sh64/mutex.h
+++ /dev/null
@@ -1,9 +0,0 @@
1/*
2 * Pull in the generic implementation for the mutex fastpath.
3 *
4 * TODO: implement optimized primitives instead, or leave the generic
5 * implementation in place, or pick the atomic_xchg() based generic
6 * implementation. (see asm-generic/mutex-xchg.h for details)
7 */
8
9#include <asm-generic/mutex-dec.h>
diff --git a/include/asm-sh64/namei.h b/include/asm-sh64/namei.h
deleted file mode 100644
index 99d759a805ce..000000000000
--- a/include/asm-sh64/namei.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef __ASM_SH64_NAMEI_H
2#define __ASM_SH64_NAMEI_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/namei.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 * Included from linux/fs/namei.c
14 *
15 */
16
17/* This dummy routine maybe changed to something useful
18 * for /usr/gnemul/ emulation stuff.
19 * Look at asm-sparc/namei.h for details.
20 */
21
22#define __emul_prefix() NULL
23
24#endif /* __ASM_SH64_NAMEI_H */
diff --git a/include/asm-sh64/page.h b/include/asm-sh64/page.h
deleted file mode 100644
index 472089aefc60..000000000000
--- a/include/asm-sh64/page.h
+++ /dev/null
@@ -1,119 +0,0 @@
1#ifndef __ASM_SH64_PAGE_H
2#define __ASM_SH64_PAGE_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/page.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003, 2004 Paul Mundt
13 *
14 * benedict.gaster@superh.com 19th, 24th July 2002.
15 *
16 * Modified to take account of enabling for D-CACHE support.
17 *
18 */
19
20
21/* PAGE_SHIFT determines the page size */
22#define PAGE_SHIFT 12
23#ifdef __ASSEMBLY__
24#define PAGE_SIZE 4096
25#else
26#define PAGE_SIZE (1UL << PAGE_SHIFT)
27#endif
28#define PAGE_MASK (~(PAGE_SIZE-1))
29#define PTE_MASK PAGE_MASK
30
31#if defined(CONFIG_HUGETLB_PAGE_SIZE_64K)
32#define HPAGE_SHIFT 16
33#elif defined(CONFIG_HUGETLB_PAGE_SIZE_1MB)
34#define HPAGE_SHIFT 20
35#elif defined(CONFIG_HUGETLB_PAGE_SIZE_512MB)
36#define HPAGE_SHIFT 29
37#endif
38
39#ifdef CONFIG_HUGETLB_PAGE
40#define HPAGE_SIZE (1UL << HPAGE_SHIFT)
41#define HPAGE_MASK (~(HPAGE_SIZE-1))
42#define HUGETLB_PAGE_ORDER (HPAGE_SHIFT-PAGE_SHIFT)
43#define ARCH_HAS_SETCLEAR_HUGE_PTE
44#endif
45
46#ifdef __KERNEL__
47#ifndef __ASSEMBLY__
48
49extern struct page *mem_map;
50extern void sh64_page_clear(void *page);
51extern void sh64_page_copy(void *from, void *to);
52
53#define clear_page(page) sh64_page_clear(page)
54#define copy_page(to,from) sh64_page_copy(from, to)
55
56#if defined(CONFIG_DCACHE_DISABLED)
57
58#define clear_user_page(page, vaddr, pg) clear_page(page)
59#define copy_user_page(to, from, vaddr, pg) copy_page(to, from)
60
61#else
62
63extern void clear_user_page(void *to, unsigned long address, struct page *pg);
64extern void copy_user_page(void *to, void *from, unsigned long address, struct page *pg);
65
66#endif /* defined(CONFIG_DCACHE_DISABLED) */
67
68/*
69 * These are used to make use of C type-checking..
70 */
71typedef struct { unsigned long long pte; } pte_t;
72typedef struct { unsigned long pmd; } pmd_t;
73typedef struct { unsigned long pgd; } pgd_t;
74typedef struct { unsigned long pgprot; } pgprot_t;
75
76#define pte_val(x) ((x).pte)
77#define pmd_val(x) ((x).pmd)
78#define pgd_val(x) ((x).pgd)
79#define pgprot_val(x) ((x).pgprot)
80
81#define __pte(x) ((pte_t) { (x) } )
82#define __pmd(x) ((pmd_t) { (x) } )
83#define __pgd(x) ((pgd_t) { (x) } )
84#define __pgprot(x) ((pgprot_t) { (x) } )
85
86#endif /* !__ASSEMBLY__ */
87
88/* to align the pointer to the (next) page boundary */
89#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
90
91/*
92 * Kconfig defined.
93 */
94#define __MEMORY_START (CONFIG_MEMORY_START)
95#define PAGE_OFFSET (CONFIG_CACHED_MEMORY_OFFSET)
96
97#define __pa(x) ((unsigned long)(x)-PAGE_OFFSET)
98#define __va(x) ((void *)((unsigned long)(x)+PAGE_OFFSET))
99#define MAP_NR(addr) ((__pa(addr)-__MEMORY_START) >> PAGE_SHIFT)
100#define VALID_PAGE(page) ((page - mem_map) < max_mapnr)
101
102#define phys_to_page(phys) (mem_map + (((phys) - __MEMORY_START) >> PAGE_SHIFT))
103#define page_to_phys(page) (((page - mem_map) << PAGE_SHIFT) + __MEMORY_START)
104
105/* PFN start number, because of __MEMORY_START */
106#define PFN_START (__MEMORY_START >> PAGE_SHIFT)
107#define ARCH_PFN_OFFSET (PFN_START)
108#define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
109#define pfn_valid(pfn) (((pfn) - PFN_START) < max_mapnr)
110#define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT)
111
112#define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \
113 VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
114
115#include <asm-generic/memory_model.h>
116#include <asm-generic/page.h>
117
118#endif /* __KERNEL__ */
119#endif /* __ASM_SH64_PAGE_H */
diff --git a/include/asm-sh64/param.h b/include/asm-sh64/param.h
deleted file mode 100644
index f409adb41540..000000000000
--- a/include/asm-sh64/param.h
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * include/asm-sh64/param.h
7 *
8 * Copyright (C) 2000, 2001 Paolo Alberelli
9 * Copyright (C) 2003 Paul Mundt
10 *
11 */
12#ifndef __ASM_SH64_PARAM_H
13#define __ASM_SH64_PARAM_H
14
15
16#ifdef __KERNEL__
17# ifdef CONFIG_SH_WDT
18# define HZ 1000 /* Needed for high-res WOVF */
19# else
20# define HZ 100
21# endif
22# define USER_HZ 100 /* User interfaces are in "ticks" */
23# define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */
24#endif
25
26#ifndef HZ
27#define HZ 100
28#endif
29
30#define EXEC_PAGESIZE 4096
31
32#ifndef NGROUPS
33#define NGROUPS 32
34#endif
35
36#ifndef NOGROUP
37#define NOGROUP (-1)
38#endif
39
40#define MAXHOSTNAMELEN 64 /* max length of hostname */
41
42#endif /* __ASM_SH64_PARAM_H */
diff --git a/include/asm-sh64/pci.h b/include/asm-sh64/pci.h
deleted file mode 100644
index 18055dbbb4b5..000000000000
--- a/include/asm-sh64/pci.h
+++ /dev/null
@@ -1,102 +0,0 @@
1#ifndef __ASM_SH64_PCI_H
2#define __ASM_SH64_PCI_H
3
4#ifdef __KERNEL__
5
6#include <linux/dma-mapping.h>
7
8/* Can be used to override the logic in pci_scan_bus for skipping
9 already-configured bus numbers - to be used for buggy BIOSes
10 or architectures with incomplete PCI setup by the loader */
11
12#define pcibios_assign_all_busses() 1
13
14/*
15 * These are currently the correct values for the STM overdrive board
16 * We need some way of setting this on a board specific way, it will
17 * not be the same on other boards I think
18 */
19#if defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
20#define PCIBIOS_MIN_IO 0x2000
21#define PCIBIOS_MIN_MEM 0x40000000
22#endif
23
24extern void pcibios_set_master(struct pci_dev *dev);
25
26/*
27 * Set penalize isa irq function
28 */
29static inline void pcibios_penalize_isa_irq(int irq, int active)
30{
31 /* We don't do dynamic PCI IRQ allocation */
32}
33
34/* Dynamic DMA mapping stuff.
35 * SuperH has everything mapped statically like x86.
36 */
37
38/* The PCI address space does equal the physical memory
39 * address space. The networking and block device layers use
40 * this boolean for bounce buffer decisions.
41 */
42#define PCI_DMA_BUS_IS_PHYS (1)
43
44#include <linux/types.h>
45#include <linux/slab.h>
46#include <asm/scatterlist.h>
47#include <linux/string.h>
48#include <asm/io.h>
49
50/* pci_unmap_{single,page} being a nop depends upon the
51 * configuration.
52 */
53#ifdef CONFIG_SH_PCIDMA_NONCOHERENT
54#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME) \
55 dma_addr_t ADDR_NAME;
56#define DECLARE_PCI_UNMAP_LEN(LEN_NAME) \
57 __u32 LEN_NAME;
58#define pci_unmap_addr(PTR, ADDR_NAME) \
59 ((PTR)->ADDR_NAME)
60#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) \
61 (((PTR)->ADDR_NAME) = (VAL))
62#define pci_unmap_len(PTR, LEN_NAME) \
63 ((PTR)->LEN_NAME)
64#define pci_unmap_len_set(PTR, LEN_NAME, VAL) \
65 (((PTR)->LEN_NAME) = (VAL))
66#else
67#define DECLARE_PCI_UNMAP_ADDR(ADDR_NAME)
68#define DECLARE_PCI_UNMAP_LEN(LEN_NAME)
69#define pci_unmap_addr(PTR, ADDR_NAME) (0)
70#define pci_unmap_addr_set(PTR, ADDR_NAME, VAL) do { } while (0)
71#define pci_unmap_len(PTR, LEN_NAME) (0)
72#define pci_unmap_len_set(PTR, LEN_NAME, VAL) do { } while (0)
73#endif
74
75#ifdef CONFIG_PCI
76static inline void pci_dma_burst_advice(struct pci_dev *pdev,
77 enum pci_dma_burst_strategy *strat,
78 unsigned long *strategy_parameter)
79{
80 *strat = PCI_DMA_BURST_INFINITY;
81 *strategy_parameter = ~0UL;
82}
83#endif
84
85/* Board-specific fixup routines. */
86extern void pcibios_fixup(void);
87extern void pcibios_fixup_irqs(void);
88
89#ifdef CONFIG_PCI_AUTO
90extern int pciauto_assign_resources(int busno, struct pci_channel *hose);
91#endif
92
93#endif /* __KERNEL__ */
94
95/* generic pci stuff */
96#include <asm-generic/pci.h>
97
98/* generic DMA-mapping stuff */
99#include <asm-generic/pci-dma-compat.h>
100
101#endif /* __ASM_SH64_PCI_H */
102
diff --git a/include/asm-sh64/percpu.h b/include/asm-sh64/percpu.h
deleted file mode 100644
index a01d16cd0e8c..000000000000
--- a/include/asm-sh64/percpu.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_PERCPU
2#define __ASM_SH64_PERCPU
3
4#include <asm-generic/percpu.h>
5
6#endif /* __ASM_SH64_PERCPU */
diff --git a/include/asm-sh64/pgalloc.h b/include/asm-sh64/pgalloc.h
deleted file mode 100644
index 6eccab770a6d..000000000000
--- a/include/asm-sh64/pgalloc.h
+++ /dev/null
@@ -1,125 +0,0 @@
1#ifndef __ASM_SH64_PGALLOC_H
2#define __ASM_SH64_PGALLOC_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/pgalloc.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003, 2004 Paul Mundt
13 * Copyright (C) 2003, 2004 Richard Curnow
14 *
15 */
16
17#include <linux/mm.h>
18#include <linux/quicklist.h>
19#include <asm/page.h>
20
21static inline void pgd_init(unsigned long page)
22{
23 unsigned long *pgd = (unsigned long *)page;
24 extern pte_t empty_bad_pte_table[PTRS_PER_PTE];
25 int i;
26
27 for (i = 0; i < USER_PTRS_PER_PGD; i++)
28 pgd[i] = (unsigned long)empty_bad_pte_table;
29}
30
31/*
32 * Allocate and free page tables. The xxx_kernel() versions are
33 * used to allocate a kernel page table - this turns on ASN bits
34 * if any.
35 */
36
37static inline pgd_t *get_pgd_slow(void)
38{
39 unsigned int pgd_size = (USER_PTRS_PER_PGD * sizeof(pgd_t));
40 pgd_t *ret = kmalloc(pgd_size, GFP_KERNEL);
41 return ret;
42}
43
44static inline pgd_t *pgd_alloc(struct mm_struct *mm)
45{
46 return quicklist_alloc(0, GFP_KERNEL, NULL);
47}
48
49static inline void pgd_free(pgd_t *pgd)
50{
51 quicklist_free(0, NULL, pgd);
52}
53
54static inline struct page *pte_alloc_one(struct mm_struct *mm,
55 unsigned long address)
56{
57 void *pg = quicklist_alloc(0, GFP_KERNEL, NULL);
58 return pg ? virt_to_page(pg) : NULL;
59}
60
61static inline void pte_free_kernel(pte_t *pte)
62{
63 quicklist_free(0, NULL, pte);
64}
65
66static inline void pte_free(struct page *pte)
67{
68 quicklist_free_page(0, NULL, pte);
69}
70
71static inline pte_t *pte_alloc_one_kernel(struct mm_struct *mm,
72 unsigned long address)
73{
74 return quicklist_alloc(0, GFP_KERNEL, NULL);
75}
76
77#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
78
79/*
80 * allocating and freeing a pmd is trivial: the 1-entry pmd is
81 * inside the pgd, so has no extra memory associated with it.
82 */
83
84#if defined(CONFIG_SH64_PGTABLE_2_LEVEL)
85
86#define pmd_alloc_one(mm, addr) ({ BUG(); ((pmd_t *)2); })
87#define pmd_free(x) do { } while (0)
88#define pgd_populate(mm, pmd, pte) BUG()
89#define __pte_free_tlb(tlb,pte) tlb_remove_page((tlb),(pte))
90#define __pmd_free_tlb(tlb,pmd) do { } while (0)
91
92#elif defined(CONFIG_SH64_PGTABLE_3_LEVEL)
93
94static inline pmd_t *pmd_alloc_one(struct mm_struct *mm, unsigned long address)
95{
96 return quicklist_alloc(0, GFP_KERNEL, NULL);
97}
98
99static inline void pmd_free(pmd_t *pmd)
100{
101 quicklist_free(0, NULL, pmd);
102}
103
104#define pgd_populate(mm, pgd, pmd) pgd_set(pgd, pmd)
105#define __pmd_free_tlb(tlb,pmd) pmd_free(pmd)
106
107#else
108#error "No defined page table size"
109#endif
110
111#define pmd_populate_kernel(mm, pmd, pte) \
112 set_pmd(pmd, __pmd(_PAGE_TABLE + (unsigned long) (pte)))
113
114static inline void pmd_populate(struct mm_struct *mm, pmd_t *pmd,
115 struct page *pte)
116{
117 set_pmd(pmd, __pmd(_PAGE_TABLE + (unsigned long) page_address (pte)));
118}
119
120static inline void check_pgt_cache(void)
121{
122 quicklist_trim(0, NULL, 25, 16);
123}
124
125#endif /* __ASM_SH64_PGALLOC_H */
diff --git a/include/asm-sh64/platform.h b/include/asm-sh64/platform.h
deleted file mode 100644
index bd0d9c405a80..000000000000
--- a/include/asm-sh64/platform.h
+++ /dev/null
@@ -1,64 +0,0 @@
1#ifndef __ASM_SH64_PLATFORM_H
2#define __ASM_SH64_PLATFORM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/platform.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 * benedict.gaster@superh.com: 3rd May 2002
14 * Added support for ramdisk, removing statically linked romfs at the same time.
15 */
16
17#include <linux/ioport.h>
18#include <asm/irq.h>
19
20
21/*
22 * Platform definition structure.
23 */
24struct sh64_platform {
25 unsigned int readonly_rootfs;
26 unsigned int ramdisk_flags;
27 unsigned int initial_root_dev;
28 unsigned int loader_type;
29 unsigned int initrd_start;
30 unsigned int initrd_size;
31 unsigned int fpu_flags;
32 unsigned int io_res_count;
33 unsigned int kram_res_count;
34 unsigned int xram_res_count;
35 unsigned int rom_res_count;
36 struct resource *io_res_p;
37 struct resource *kram_res_p;
38 struct resource *xram_res_p;
39 struct resource *rom_res_p;
40};
41
42extern struct sh64_platform platform_parms;
43
44extern unsigned long long memory_start, memory_end;
45
46extern unsigned long long fpu_in_use;
47
48extern int platform_int_priority[NR_INTC_IRQS];
49
50#define FPU_FLAGS (platform_parms.fpu_flags)
51#define STANDARD_IO_RESOURCES (platform_parms.io_res_count)
52#define STANDARD_KRAM_RESOURCES (platform_parms.kram_res_count)
53#define STANDARD_XRAM_RESOURCES (platform_parms.xram_res_count)
54#define STANDARD_ROM_RESOURCES (platform_parms.rom_res_count)
55
56/*
57 * Kernel Memory description, Respectively:
58 * code = last but one memory descriptor
59 * data = last memory descriptor
60 */
61#define code_resource (platform_parms.kram_res_p[STANDARD_KRAM_RESOURCES - 2])
62#define data_resource (platform_parms.kram_res_p[STANDARD_KRAM_RESOURCES - 1])
63
64#endif /* __ASM_SH64_PLATFORM_H */
diff --git a/include/asm-sh64/poll.h b/include/asm-sh64/poll.h
deleted file mode 100644
index ca2950267c53..000000000000
--- a/include/asm-sh64/poll.h
+++ /dev/null
@@ -1,8 +0,0 @@
1#ifndef __ASM_SH64_POLL_H
2#define __ASM_SH64_POLL_H
3
4#include <asm-generic/poll.h>
5
6#undef POLLREMOVE
7
8#endif /* __ASM_SH64_POLL_H */
diff --git a/include/asm-sh64/ptrace.h b/include/asm-sh64/ptrace.h
deleted file mode 100644
index c424f80e3ae0..000000000000
--- a/include/asm-sh64/ptrace.h
+++ /dev/null
@@ -1,35 +0,0 @@
1#ifndef __ASM_SH64_PTRACE_H
2#define __ASM_SH64_PTRACE_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/ptrace.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * This struct defines the way the registers are stored on the
17 * kernel stack during a system call or other kernel entry.
18 */
19struct pt_regs {
20 unsigned long long pc;
21 unsigned long long sr;
22 unsigned long long syscall_nr;
23 unsigned long long regs[63];
24 unsigned long long tregs[8];
25 unsigned long long pad[2];
26};
27
28#ifdef __KERNEL__
29#define user_mode(regs) (((regs)->sr & 0x40000000)==0)
30#define instruction_pointer(regs) ((regs)->pc)
31#define profile_pc(regs) ((unsigned long)instruction_pointer(regs))
32extern void show_regs(struct pt_regs *);
33#endif
34
35#endif /* __ASM_SH64_PTRACE_H */
diff --git a/include/asm-sh64/resource.h b/include/asm-sh64/resource.h
deleted file mode 100644
index 8ff93944ae66..000000000000
--- a/include/asm-sh64/resource.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_RESOURCE_H
2#define __ASM_SH64_RESOURCE_H
3
4#include <asm-sh/resource.h>
5
6#endif /* __ASM_SH64_RESOURCE_H */
diff --git a/include/asm-sh64/scatterlist.h b/include/asm-sh64/scatterlist.h
deleted file mode 100644
index 7f729bbfce43..000000000000
--- a/include/asm-sh64/scatterlist.h
+++ /dev/null
@@ -1,37 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * include/asm-sh64/scatterlist.h
7 *
8 * Copyright (C) 2003 Paul Mundt
9 *
10 */
11#ifndef __ASM_SH64_SCATTERLIST_H
12#define __ASM_SH64_SCATTERLIST_H
13
14#include <asm/types.h>
15
16struct scatterlist {
17#ifdef CONFIG_DEBUG_SG
18 unsigned long sg_magic;
19#endif
20 unsigned long page_link;
21 unsigned int offset;/* for highmem, page offset */
22 dma_addr_t dma_address;
23 unsigned int length;
24};
25
26/* These macros should be used after a pci_map_sg call has been done
27 * to get bus addresses of each of the SG entries and their lengths.
28 * You should only work with the number of sg entries pci_map_sg
29 * returns, or alternatively stop on the first sg_dma_len(sg) which
30 * is 0.
31 */
32#define sg_dma_address(sg) ((sg)->dma_address)
33#define sg_dma_len(sg) ((sg)->length)
34
35#define ISA_DMA_THRESHOLD (0xffffffff)
36
37#endif /* !__ASM_SH64_SCATTERLIST_H */
diff --git a/include/asm-sh64/sci.h b/include/asm-sh64/sci.h
deleted file mode 100644
index 793c568b7820..000000000000
--- a/include/asm-sh64/sci.h
+++ /dev/null
@@ -1 +0,0 @@
1#include <asm-sh/sci.h>
diff --git a/include/asm-sh64/sections.h b/include/asm-sh64/sections.h
deleted file mode 100644
index 897f36bcdf85..000000000000
--- a/include/asm-sh64/sections.h
+++ /dev/null
@@ -1,7 +0,0 @@
1#ifndef __ASM_SH64_SECTIONS_H
2#define __ASM_SH64_SECTIONS_H
3
4#include <asm-sh/sections.h>
5
6#endif /* __ASM_SH64_SECTIONS_H */
7
diff --git a/include/asm-sh64/segment.h b/include/asm-sh64/segment.h
deleted file mode 100644
index 92ac001fc483..000000000000
--- a/include/asm-sh64/segment.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef _ASM_SEGMENT_H
2#define _ASM_SEGMENT_H
3
4/* Only here because we have some old header files that expect it.. */
5
6#endif /* _ASM_SEGMENT_H */
diff --git a/include/asm-sh64/semaphore-helper.h b/include/asm-sh64/semaphore-helper.h
deleted file mode 100644
index fcfafe263e86..000000000000
--- a/include/asm-sh64/semaphore-helper.h
+++ /dev/null
@@ -1,101 +0,0 @@
1#ifndef __ASM_SH64_SEMAPHORE_HELPER_H
2#define __ASM_SH64_SEMAPHORE_HELPER_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/semaphore-helper.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14#include <asm/errno.h>
15
16/*
17 * SMP- and interrupt-safe semaphores helper functions.
18 *
19 * (C) Copyright 1996 Linus Torvalds
20 * (C) Copyright 1999 Andrea Arcangeli
21 */
22
23/*
24 * These two _must_ execute atomically wrt each other.
25 *
26 * This is trivially done with load_locked/store_cond,
27 * which we have. Let the rest of the losers suck eggs.
28 */
29static __inline__ void wake_one_more(struct semaphore * sem)
30{
31 atomic_inc((atomic_t *)&sem->sleepers);
32}
33
34static __inline__ int waking_non_zero(struct semaphore *sem)
35{
36 unsigned long flags;
37 int ret = 0;
38
39 spin_lock_irqsave(&semaphore_wake_lock, flags);
40 if (sem->sleepers > 0) {
41 sem->sleepers--;
42 ret = 1;
43 }
44 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
45 return ret;
46}
47
48/*
49 * waking_non_zero_interruptible:
50 * 1 got the lock
51 * 0 go to sleep
52 * -EINTR interrupted
53 *
54 * We must undo the sem->count down_interruptible() increment while we are
55 * protected by the spinlock in order to make atomic this atomic_inc() with the
56 * atomic_read() in wake_one_more(), otherwise we can race. -arca
57 */
58static __inline__ int waking_non_zero_interruptible(struct semaphore *sem,
59 struct task_struct *tsk)
60{
61 unsigned long flags;
62 int ret = 0;
63
64 spin_lock_irqsave(&semaphore_wake_lock, flags);
65 if (sem->sleepers > 0) {
66 sem->sleepers--;
67 ret = 1;
68 } else if (signal_pending(tsk)) {
69 atomic_inc(&sem->count);
70 ret = -EINTR;
71 }
72 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
73 return ret;
74}
75
76/*
77 * waking_non_zero_trylock:
78 * 1 failed to lock
79 * 0 got the lock
80 *
81 * We must undo the sem->count down_trylock() increment while we are
82 * protected by the spinlock in order to make atomic this atomic_inc() with the
83 * atomic_read() in wake_one_more(), otherwise we can race. -arca
84 */
85static __inline__ int waking_non_zero_trylock(struct semaphore *sem)
86{
87 unsigned long flags;
88 int ret = 1;
89
90 spin_lock_irqsave(&semaphore_wake_lock, flags);
91 if (sem->sleepers <= 0)
92 atomic_inc(&sem->count);
93 else {
94 sem->sleepers--;
95 ret = 0;
96 }
97 spin_unlock_irqrestore(&semaphore_wake_lock, flags);
98 return ret;
99}
100
101#endif /* __ASM_SH64_SEMAPHORE_HELPER_H */
diff --git a/include/asm-sh64/semaphore.h b/include/asm-sh64/semaphore.h
deleted file mode 100644
index f027cc14b55b..000000000000
--- a/include/asm-sh64/semaphore.h
+++ /dev/null
@@ -1,119 +0,0 @@
1#ifndef __ASM_SH64_SEMAPHORE_H
2#define __ASM_SH64_SEMAPHORE_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/semaphore.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 * SMP- and interrupt-safe semaphores.
14 *
15 * (C) Copyright 1996 Linus Torvalds
16 *
17 * SuperH verison by Niibe Yutaka
18 * (Currently no asm implementation but generic C code...)
19 *
20 */
21
22#include <linux/linkage.h>
23#include <linux/spinlock.h>
24#include <linux/wait.h>
25#include <linux/rwsem.h>
26
27#include <asm/system.h>
28#include <asm/atomic.h>
29
30struct semaphore {
31 atomic_t count;
32 int sleepers;
33 wait_queue_head_t wait;
34};
35
36#define __SEMAPHORE_INITIALIZER(name, n) \
37{ \
38 .count = ATOMIC_INIT(n), \
39 .sleepers = 0, \
40 .wait = __WAIT_QUEUE_HEAD_INITIALIZER((name).wait) \
41}
42
43#define __DECLARE_SEMAPHORE_GENERIC(name,count) \
44 struct semaphore name = __SEMAPHORE_INITIALIZER(name,count)
45
46#define DECLARE_MUTEX(name) __DECLARE_SEMAPHORE_GENERIC(name,1)
47
48static inline void sema_init (struct semaphore *sem, int val)
49{
50/*
51 * *sem = (struct semaphore)__SEMAPHORE_INITIALIZER((*sem),val);
52 *
53 * i'd rather use the more flexible initialization above, but sadly
54 * GCC 2.7.2.3 emits a bogus warning. EGCS doesnt. Oh well.
55 */
56 atomic_set(&sem->count, val);
57 sem->sleepers = 0;
58 init_waitqueue_head(&sem->wait);
59}
60
61static inline void init_MUTEX (struct semaphore *sem)
62{
63 sema_init(sem, 1);
64}
65
66static inline void init_MUTEX_LOCKED (struct semaphore *sem)
67{
68 sema_init(sem, 0);
69}
70
71#if 0
72asmlinkage void __down_failed(void /* special register calling convention */);
73asmlinkage int __down_failed_interruptible(void /* params in registers */);
74asmlinkage int __down_failed_trylock(void /* params in registers */);
75asmlinkage void __up_wakeup(void /* special register calling convention */);
76#endif
77
78asmlinkage void __down(struct semaphore * sem);
79asmlinkage int __down_interruptible(struct semaphore * sem);
80asmlinkage int __down_trylock(struct semaphore * sem);
81asmlinkage void __up(struct semaphore * sem);
82
83extern spinlock_t semaphore_wake_lock;
84
85static inline void down(struct semaphore * sem)
86{
87 if (atomic_dec_return(&sem->count) < 0)
88 __down(sem);
89}
90
91static inline int down_interruptible(struct semaphore * sem)
92{
93 int ret = 0;
94
95 if (atomic_dec_return(&sem->count) < 0)
96 ret = __down_interruptible(sem);
97 return ret;
98}
99
100static inline int down_trylock(struct semaphore * sem)
101{
102 int ret = 0;
103
104 if (atomic_dec_return(&sem->count) < 0)
105 ret = __down_trylock(sem);
106 return ret;
107}
108
109/*
110 * Note! This is subtle. We jump to wake people up only if
111 * the semaphore was negative (== somebody was waiting on it).
112 */
113static inline void up(struct semaphore * sem)
114{
115 if (atomic_inc_return(&sem->count) <= 0)
116 __up(sem);
117}
118
119#endif /* __ASM_SH64_SEMAPHORE_H */
diff --git a/include/asm-sh64/sembuf.h b/include/asm-sh64/sembuf.h
deleted file mode 100644
index ec4d9f143577..000000000000
--- a/include/asm-sh64/sembuf.h
+++ /dev/null
@@ -1,36 +0,0 @@
1#ifndef __ASM_SH64_SEMBUF_H
2#define __ASM_SH64_SEMBUF_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/sembuf.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * The semid64_ds structure for i386 architecture.
17 * Note extra padding because this structure is passed back and forth
18 * between kernel and user space.
19 *
20 * Pad space is left for:
21 * - 64-bit time_t to solve y2038 problem
22 * - 2 miscellaneous 32-bit values
23 */
24
25struct semid64_ds {
26 struct ipc64_perm sem_perm; /* permissions .. see ipc.h */
27 __kernel_time_t sem_otime; /* last semop time */
28 unsigned long __unused1;
29 __kernel_time_t sem_ctime; /* last change time */
30 unsigned long __unused2;
31 unsigned long sem_nsems; /* no. of semaphores in array */
32 unsigned long __unused3;
33 unsigned long __unused4;
34};
35
36#endif /* __ASM_SH64_SEMBUF_H */
diff --git a/include/asm-sh64/serial.h b/include/asm-sh64/serial.h
deleted file mode 100644
index e8d7b3f2da57..000000000000
--- a/include/asm-sh64/serial.h
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * include/asm-sh64/serial.h
3 *
4 * Configuration details for 8250, 16450, 16550, etc. serial ports
5 */
6
7#ifndef _ASM_SERIAL_H
8#define _ASM_SERIAL_H
9
10/*
11 * This assumes you have a 1.8432 MHz clock for your UART.
12 *
13 * It'd be nice if someone built a serial card with a 24.576 MHz
14 * clock, since the 16550A is capable of handling a top speed of 1.5
15 * megabits/second; but this requires the faster clock.
16 */
17#define BASE_BAUD ( 1843200 / 16 )
18
19#define RS_TABLE_SIZE 2
20
21#define STD_COM_FLAGS (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST)
22
23#define SERIAL_PORT_DFNS \
24 /* UART CLK PORT IRQ FLAGS */ \
25 { 0, BASE_BAUD, 0x3F8, 4, STD_COM_FLAGS }, /* ttyS0 */ \
26 { 0, BASE_BAUD, 0x2F8, 3, STD_COM_FLAGS } /* ttyS1 */
27
28/* XXX: This should be moved ino irq.h */
29#define irq_cannonicalize(x) (x)
30
31#endif /* _ASM_SERIAL_H */
diff --git a/include/asm-sh64/setup.h b/include/asm-sh64/setup.h
deleted file mode 100644
index 5b07b14c2927..000000000000
--- a/include/asm-sh64/setup.h
+++ /dev/null
@@ -1,22 +0,0 @@
1#ifndef __ASM_SH64_SETUP_H
2#define __ASM_SH64_SETUP_H
3
4#define COMMAND_LINE_SIZE 256
5
6#ifdef __KERNEL__
7
8#define PARAM ((unsigned char *)empty_zero_page)
9#define MOUNT_ROOT_RDONLY (*(unsigned long *) (PARAM+0x000))
10#define RAMDISK_FLAGS (*(unsigned long *) (PARAM+0x004))
11#define ORIG_ROOT_DEV (*(unsigned long *) (PARAM+0x008))
12#define LOADER_TYPE (*(unsigned long *) (PARAM+0x00c))
13#define INITRD_START (*(unsigned long *) (PARAM+0x010))
14#define INITRD_SIZE (*(unsigned long *) (PARAM+0x014))
15
16#define COMMAND_LINE ((char *) (PARAM+256))
17#define COMMAND_LINE_SIZE 256
18
19#endif /* __KERNEL__ */
20
21#endif /* __ASM_SH64_SETUP_H */
22
diff --git a/include/asm-sh64/shmbuf.h b/include/asm-sh64/shmbuf.h
deleted file mode 100644
index 022f3494dd64..000000000000
--- a/include/asm-sh64/shmbuf.h
+++ /dev/null
@@ -1,53 +0,0 @@
1#ifndef __ASM_SH64_SHMBUF_H
2#define __ASM_SH64_SHMBUF_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/shmbuf.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/*
16 * The shmid64_ds structure for i386 architecture.
17 * Note extra padding because this structure is passed back and forth
18 * between kernel and user space.
19 *
20 * Pad space is left for:
21 * - 64-bit time_t to solve y2038 problem
22 * - 2 miscellaneous 32-bit values
23 */
24
25struct shmid64_ds {
26 struct ipc64_perm shm_perm; /* operation perms */
27 size_t shm_segsz; /* size of segment (bytes) */
28 __kernel_time_t shm_atime; /* last attach time */
29 unsigned long __unused1;
30 __kernel_time_t shm_dtime; /* last detach time */
31 unsigned long __unused2;
32 __kernel_time_t shm_ctime; /* last change time */
33 unsigned long __unused3;
34 __kernel_pid_t shm_cpid; /* pid of creator */
35 __kernel_pid_t shm_lpid; /* pid of last operator */
36 unsigned long shm_nattch; /* no. of current attaches */
37 unsigned long __unused4;
38 unsigned long __unused5;
39};
40
41struct shminfo64 {
42 unsigned long shmmax;
43 unsigned long shmmin;
44 unsigned long shmmni;
45 unsigned long shmseg;
46 unsigned long shmall;
47 unsigned long __unused1;
48 unsigned long __unused2;
49 unsigned long __unused3;
50 unsigned long __unused4;
51};
52
53#endif /* __ASM_SH64_SHMBUF_H */
diff --git a/include/asm-sh64/shmparam.h b/include/asm-sh64/shmparam.h
deleted file mode 100644
index 1bb820c833ee..000000000000
--- a/include/asm-sh64/shmparam.h
+++ /dev/null
@@ -1,12 +0,0 @@
1#ifndef __ASM_SH64_SHMPARAM_H
2#define __ASM_SH64_SHMPARAM_H
3
4/*
5 * Set this to a sensible safe default, we'll work out the specifics for the
6 * align mask from the cache descriptor at run-time.
7 */
8#define SHMLBA 0x4000
9
10#define __ARCH_FORCE_SHMLBA
11
12#endif /* __ASM_SH64_SHMPARAM_H */
diff --git a/include/asm-sh64/sigcontext.h b/include/asm-sh64/sigcontext.h
deleted file mode 100644
index 6293509d8cc1..000000000000
--- a/include/asm-sh64/sigcontext.h
+++ /dev/null
@@ -1,30 +0,0 @@
1#ifndef __ASM_SH64_SIGCONTEXT_H
2#define __ASM_SH64_SIGCONTEXT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/sigcontext.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15struct sigcontext {
16 unsigned long oldmask;
17
18 /* CPU registers */
19 unsigned long long sc_regs[63];
20 unsigned long long sc_tregs[8];
21 unsigned long long sc_pc;
22 unsigned long long sc_sr;
23
24 /* FPU registers */
25 unsigned long long sc_fpregs[32];
26 unsigned int sc_fpscr;
27 unsigned int sc_fpvalid;
28};
29
30#endif /* __ASM_SH64_SIGCONTEXT_H */
diff --git a/include/asm-sh64/siginfo.h b/include/asm-sh64/siginfo.h
deleted file mode 100644
index 56ef1da534d7..000000000000
--- a/include/asm-sh64/siginfo.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_SIGINFO_H
2#define __ASM_SH64_SIGINFO_H
3
4#include <asm-generic/siginfo.h>
5
6#endif /* __ASM_SH64_SIGINFO_H */
diff --git a/include/asm-sh64/signal.h b/include/asm-sh64/signal.h
deleted file mode 100644
index 244e134730d9..000000000000
--- a/include/asm-sh64/signal.h
+++ /dev/null
@@ -1,159 +0,0 @@
1#ifndef __ASM_SH64_SIGNAL_H
2#define __ASM_SH64_SIGNAL_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/signal.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#include <linux/types.h>
16
17/* Avoid too many header ordering problems. */
18struct siginfo;
19
20#define _NSIG 64
21#define _NSIG_BPW 32
22#define _NSIG_WORDS (_NSIG / _NSIG_BPW)
23
24typedef unsigned long old_sigset_t; /* at least 32 bits */
25
26typedef struct {
27 unsigned long sig[_NSIG_WORDS];
28} sigset_t;
29
30#define SIGHUP 1
31#define SIGINT 2
32#define SIGQUIT 3
33#define SIGILL 4
34#define SIGTRAP 5
35#define SIGABRT 6
36#define SIGIOT 6
37#define SIGBUS 7
38#define SIGFPE 8
39#define SIGKILL 9
40#define SIGUSR1 10
41#define SIGSEGV 11
42#define SIGUSR2 12
43#define SIGPIPE 13
44#define SIGALRM 14
45#define SIGTERM 15
46#define SIGSTKFLT 16
47#define SIGCHLD 17
48#define SIGCONT 18
49#define SIGSTOP 19
50#define SIGTSTP 20
51#define SIGTTIN 21
52#define SIGTTOU 22
53#define SIGURG 23
54#define SIGXCPU 24
55#define SIGXFSZ 25
56#define SIGVTALRM 26
57#define SIGPROF 27
58#define SIGWINCH 28
59#define SIGIO 29
60#define SIGPOLL SIGIO
61/*
62#define SIGLOST 29
63*/
64#define SIGPWR 30
65#define SIGSYS 31
66#define SIGUNUSED 31
67
68/* These should not be considered constants from userland. */
69#define SIGRTMIN 32
70#define SIGRTMAX (_NSIG-1)
71
72/*
73 * SA_FLAGS values:
74 *
75 * SA_ONSTACK indicates that a registered stack_t will be used.
76 * SA_RESTART flag to get restarting signals (which were the default long ago)
77 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
78 * SA_RESETHAND clears the handler when the signal is delivered.
79 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
80 * SA_NODEFER prevents the current signal from being masked in the handler.
81 *
82 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
83 * Unix names RESETHAND and NODEFER respectively.
84 */
85#define SA_NOCLDSTOP 0x00000001
86#define SA_NOCLDWAIT 0x00000002 /* not supported yet */
87#define SA_SIGINFO 0x00000004
88#define SA_ONSTACK 0x08000000
89#define SA_RESTART 0x10000000
90#define SA_NODEFER 0x40000000
91#define SA_RESETHAND 0x80000000
92
93#define SA_NOMASK SA_NODEFER
94#define SA_ONESHOT SA_RESETHAND
95
96#define SA_RESTORER 0x04000000
97
98/*
99 * sigaltstack controls
100 */
101#define SS_ONSTACK 1
102#define SS_DISABLE 2
103
104#define MINSIGSTKSZ 2048
105#define SIGSTKSZ THREAD_SIZE
106
107#include <asm-generic/signal.h>
108
109#ifdef __KERNEL__
110struct old_sigaction {
111 __sighandler_t sa_handler;
112 old_sigset_t sa_mask;
113 unsigned long sa_flags;
114 void (*sa_restorer)(void);
115};
116
117struct sigaction {
118 __sighandler_t sa_handler;
119 unsigned long sa_flags;
120 void (*sa_restorer)(void);
121 sigset_t sa_mask; /* mask last for extensibility */
122};
123
124struct k_sigaction {
125 struct sigaction sa;
126};
127#else
128/* Here we must cater to libcs that poke about in kernel headers. */
129
130struct sigaction {
131 union {
132 __sighandler_t _sa_handler;
133 void (*_sa_sigaction)(int, struct siginfo *, void *);
134 } _u;
135 sigset_t sa_mask;
136 unsigned long sa_flags;
137 void (*sa_restorer)(void);
138};
139
140#define sa_handler _u._sa_handler
141#define sa_sigaction _u._sa_sigaction
142
143#endif /* __KERNEL__ */
144
145typedef struct sigaltstack {
146 void *ss_sp;
147 int ss_flags;
148 size_t ss_size;
149} stack_t;
150
151#ifdef __KERNEL__
152#include <asm/sigcontext.h>
153
154#define sigmask(sig) (1UL << ((sig) - 1))
155#define ptrace_signal_deliver(regs, cookie) do { } while (0)
156
157#endif /* __KERNEL__ */
158
159#endif /* __ASM_SH64_SIGNAL_H */
diff --git a/include/asm-sh64/smp.h b/include/asm-sh64/smp.h
deleted file mode 100644
index 4a4d0da39a84..000000000000
--- a/include/asm-sh64/smp.h
+++ /dev/null
@@ -1,15 +0,0 @@
1#ifndef __ASM_SH64_SMP_H
2#define __ASM_SH64_SMP_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/smp.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#endif /* __ASM_SH64_SMP_H */
diff --git a/include/asm-sh64/socket.h b/include/asm-sh64/socket.h
deleted file mode 100644
index 1853f7246ab0..000000000000
--- a/include/asm-sh64/socket.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_SOCKET_H
2#define __ASM_SH64_SOCKET_H
3
4#include <asm-sh/socket.h>
5
6#endif /* __ASM_SH64_SOCKET_H */
diff --git a/include/asm-sh64/sockios.h b/include/asm-sh64/sockios.h
deleted file mode 100644
index 419e76f12f41..000000000000
--- a/include/asm-sh64/sockios.h
+++ /dev/null
@@ -1,25 +0,0 @@
1#ifndef __ASM_SH64_SOCKIOS_H
2#define __ASM_SH64_SOCKIOS_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/sockios.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15/* Socket-level I/O control calls. */
16#define FIOGETOWN _IOR('f', 123, int)
17#define FIOSETOWN _IOW('f', 124, int)
18
19#define SIOCATMARK _IOR('s', 7, int)
20#define SIOCSPGRP _IOW('s', 8, pid_t)
21#define SIOCGPGRP _IOR('s', 9, pid_t)
22
23#define SIOCGSTAMP _IOR('s', 100, struct timeval) /* Get stamp (timeval) */
24#define SIOCGSTAMPNS _IOR('s', 101, struct timespec) /* Get stamp (timespec) */
25#endif /* __ASM_SH64_SOCKIOS_H */
diff --git a/include/asm-sh64/spinlock.h b/include/asm-sh64/spinlock.h
deleted file mode 100644
index 296b0c9b24a2..000000000000
--- a/include/asm-sh64/spinlock.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __ASM_SH64_SPINLOCK_H
2#define __ASM_SH64_SPINLOCK_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/spinlock.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#error "No SMP on SH64"
16
17#endif /* __ASM_SH64_SPINLOCK_H */
diff --git a/include/asm-sh64/stat.h b/include/asm-sh64/stat.h
deleted file mode 100644
index 86f551b1987e..000000000000
--- a/include/asm-sh64/stat.h
+++ /dev/null
@@ -1,88 +0,0 @@
1#ifndef __ASM_SH64_STAT_H
2#define __ASM_SH64_STAT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/stat.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15struct __old_kernel_stat {
16 unsigned short st_dev;
17 unsigned short st_ino;
18 unsigned short st_mode;
19 unsigned short st_nlink;
20 unsigned short st_uid;
21 unsigned short st_gid;
22 unsigned short st_rdev;
23 unsigned long st_size;
24 unsigned long st_atime;
25 unsigned long st_mtime;
26 unsigned long st_ctime;
27};
28
29struct stat {
30 unsigned short st_dev;
31 unsigned short __pad1;
32 unsigned long st_ino;
33 unsigned short st_mode;
34 unsigned short st_nlink;
35 unsigned short st_uid;
36 unsigned short st_gid;
37 unsigned short st_rdev;
38 unsigned short __pad2;
39 unsigned long st_size;
40 unsigned long st_blksize;
41 unsigned long st_blocks;
42 unsigned long st_atime;
43 unsigned long st_atime_nsec;
44 unsigned long st_mtime;
45 unsigned long st_mtime_nsec;
46 unsigned long st_ctime;
47 unsigned long st_ctime_nsec;
48 unsigned long __unused4;
49 unsigned long __unused5;
50};
51
52/* This matches struct stat64 in glibc2.1, hence the absolutely
53 * insane amounts of padding around dev_t's.
54 */
55struct stat64 {
56 unsigned short st_dev;
57 unsigned char __pad0[10];
58
59 unsigned long st_ino;
60 unsigned int st_mode;
61 unsigned int st_nlink;
62
63 unsigned long st_uid;
64 unsigned long st_gid;
65
66 unsigned short st_rdev;
67 unsigned char __pad3[10];
68
69 long long st_size;
70 unsigned long st_blksize;
71
72 unsigned long st_blocks; /* Number 512-byte blocks allocated. */
73 unsigned long __pad4; /* future possible st_blocks high bits */
74
75 unsigned long st_atime;
76 unsigned long st_atime_nsec;
77
78 unsigned long st_mtime;
79 unsigned long st_mtime_nsec;
80
81 unsigned long st_ctime;
82 unsigned long st_ctime_nsec; /* will be high 32 bits of ctime someday */
83
84 unsigned long __unused1;
85 unsigned long __unused2;
86};
87
88#endif /* __ASM_SH64_STAT_H */
diff --git a/include/asm-sh64/statfs.h b/include/asm-sh64/statfs.h
deleted file mode 100644
index 083fd79b2417..000000000000
--- a/include/asm-sh64/statfs.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_STATFS_H
2#define __ASM_SH64_STATFS_H
3
4#include <asm-generic/statfs.h>
5
6#endif /* __ASM_SH64_STATFS_H */
diff --git a/include/asm-sh64/system.h b/include/asm-sh64/system.h
deleted file mode 100644
index be2a15ffcc55..000000000000
--- a/include/asm-sh64/system.h
+++ /dev/null
@@ -1,190 +0,0 @@
1#ifndef __ASM_SH64_SYSTEM_H
2#define __ASM_SH64_SYSTEM_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/system.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 * Copyright (C) 2004 Richard Curnow
14 *
15 */
16
17#include <asm/registers.h>
18#include <asm/processor.h>
19
20/*
21 * switch_to() should switch tasks to task nr n, first
22 */
23
24typedef struct {
25 unsigned long seg;
26} mm_segment_t;
27
28extern struct task_struct *sh64_switch_to(struct task_struct *prev,
29 struct thread_struct *prev_thread,
30 struct task_struct *next,
31 struct thread_struct *next_thread);
32
33#define switch_to(prev,next,last) \
34 do {\
35 if (last_task_used_math != next) {\
36 struct pt_regs *regs = next->thread.uregs;\
37 if (regs) regs->sr |= SR_FD;\
38 }\
39 last = sh64_switch_to(prev, &prev->thread, next, &next->thread);\
40 } while(0)
41
42#define nop() __asm__ __volatile__ ("nop")
43
44#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
45
46extern void __xchg_called_with_bad_pointer(void);
47
48#define mb() __asm__ __volatile__ ("synco": : :"memory")
49#define rmb() mb()
50#define wmb() __asm__ __volatile__ ("synco": : :"memory")
51#define read_barrier_depends() do { } while (0)
52
53#ifdef CONFIG_SMP
54#define smp_mb() mb()
55#define smp_rmb() rmb()
56#define smp_wmb() wmb()
57#define smp_read_barrier_depends() read_barrier_depends()
58#else
59#define smp_mb() barrier()
60#define smp_rmb() barrier()
61#define smp_wmb() barrier()
62#define smp_read_barrier_depends() do { } while (0)
63#endif /* CONFIG_SMP */
64
65#define set_mb(var, value) do { (void)xchg(&var, value); } while (0)
66
67/* Interrupt Control */
68#ifndef HARD_CLI
69#define SR_MASK_L 0x000000f0L
70#define SR_MASK_LL 0x00000000000000f0LL
71#else
72#define SR_MASK_L 0x10000000L
73#define SR_MASK_LL 0x0000000010000000LL
74#endif
75
76static __inline__ void local_irq_enable(void)
77{
78 /* cli/sti based on SR.BL */
79 unsigned long long __dummy0, __dummy1=~SR_MASK_LL;
80
81 __asm__ __volatile__("getcon " __SR ", %0\n\t"
82 "and %0, %1, %0\n\t"
83 "putcon %0, " __SR "\n\t"
84 : "=&r" (__dummy0)
85 : "r" (__dummy1));
86}
87
88static __inline__ void local_irq_disable(void)
89{
90 /* cli/sti based on SR.BL */
91 unsigned long long __dummy0, __dummy1=SR_MASK_LL;
92 __asm__ __volatile__("getcon " __SR ", %0\n\t"
93 "or %0, %1, %0\n\t"
94 "putcon %0, " __SR "\n\t"
95 : "=&r" (__dummy0)
96 : "r" (__dummy1));
97}
98
99#define local_save_flags(x) \
100(__extension__ ({ unsigned long long __dummy=SR_MASK_LL; \
101 __asm__ __volatile__( \
102 "getcon " __SR ", %0\n\t" \
103 "and %0, %1, %0" \
104 : "=&r" (x) \
105 : "r" (__dummy));}))
106
107#define local_irq_save(x) \
108(__extension__ ({ unsigned long long __d2=SR_MASK_LL, __d1; \
109 __asm__ __volatile__( \
110 "getcon " __SR ", %1\n\t" \
111 "or %1, r63, %0\n\t" \
112 "or %1, %2, %1\n\t" \
113 "putcon %1, " __SR "\n\t" \
114 "and %0, %2, %0" \
115 : "=&r" (x), "=&r" (__d1) \
116 : "r" (__d2));}));
117
118#define local_irq_restore(x) do { \
119 if ( ((x) & SR_MASK_L) == 0 ) /* dropping to 0 ? */ \
120 local_irq_enable(); /* yes...re-enable */ \
121} while (0)
122
123#define irqs_disabled() \
124({ \
125 unsigned long flags; \
126 local_save_flags(flags); \
127 (flags != 0); \
128})
129
130static inline unsigned long xchg_u32(volatile int * m, unsigned long val)
131{
132 unsigned long flags, retval;
133
134 local_irq_save(flags);
135 retval = *m;
136 *m = val;
137 local_irq_restore(flags);
138 return retval;
139}
140
141static inline unsigned long xchg_u8(volatile unsigned char * m, unsigned long val)
142{
143 unsigned long flags, retval;
144
145 local_irq_save(flags);
146 retval = *m;
147 *m = val & 0xff;
148 local_irq_restore(flags);
149 return retval;
150}
151
152static __inline__ unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
153{
154 switch (size) {
155 case 4:
156 return xchg_u32(ptr, x);
157 break;
158 case 1:
159 return xchg_u8(ptr, x);
160 break;
161 }
162 __xchg_called_with_bad_pointer();
163 return x;
164}
165
166/* XXX
167 * disable hlt during certain critical i/o operations
168 */
169#define HAVE_DISABLE_HLT
170void disable_hlt(void);
171void enable_hlt(void);
172
173
174#define smp_mb() barrier()
175#define smp_rmb() barrier()
176#define smp_wmb() barrier()
177
178#ifdef CONFIG_SH_ALPHANUMERIC
179/* This is only used for debugging. */
180extern void print_seg(char *file,int line);
181#define PLS() print_seg(__FILE__,__LINE__)
182#else /* CONFIG_SH_ALPHANUMERIC */
183#define PLS()
184#endif /* CONFIG_SH_ALPHANUMERIC */
185
186#define PL() printk("@ <%s,%s:%d>\n",__FILE__,__FUNCTION__,__LINE__)
187
188#define arch_align_stack(x) (x)
189
190#endif /* __ASM_SH64_SYSTEM_H */
diff --git a/include/asm-sh64/termbits.h b/include/asm-sh64/termbits.h
deleted file mode 100644
index 86bde5ec1414..000000000000
--- a/include/asm-sh64/termbits.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_TERMBITS_H
2#define __ASM_SH64_TERMBITS_H
3
4#include <asm-sh/termbits.h>
5
6#endif /* __ASM_SH64_TERMBITS_H */
diff --git a/include/asm-sh64/termios.h b/include/asm-sh64/termios.h
deleted file mode 100644
index dc44e6ed3a7c..000000000000
--- a/include/asm-sh64/termios.h
+++ /dev/null
@@ -1,99 +0,0 @@
1#ifndef __ASM_SH64_TERMIOS_H
2#define __ASM_SH64_TERMIOS_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/termios.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#include <asm/termbits.h>
16#include <asm/ioctls.h>
17
18struct winsize {
19 unsigned short ws_row;
20 unsigned short ws_col;
21 unsigned short ws_xpixel;
22 unsigned short ws_ypixel;
23};
24
25#define NCC 8
26struct termio {
27 unsigned short c_iflag; /* input mode flags */
28 unsigned short c_oflag; /* output mode flags */
29 unsigned short c_cflag; /* control mode flags */
30 unsigned short c_lflag; /* local mode flags */
31 unsigned char c_line; /* line discipline */
32 unsigned char c_cc[NCC]; /* control characters */
33};
34
35/* modem lines */
36#define TIOCM_LE 0x001
37#define TIOCM_DTR 0x002
38#define TIOCM_RTS 0x004
39#define TIOCM_ST 0x008
40#define TIOCM_SR 0x010
41#define TIOCM_CTS 0x020
42#define TIOCM_CAR 0x040
43#define TIOCM_RNG 0x080
44#define TIOCM_DSR 0x100
45#define TIOCM_CD TIOCM_CAR
46#define TIOCM_RI TIOCM_RNG
47#define TIOCM_OUT1 0x2000
48#define TIOCM_OUT2 0x4000
49#define TIOCM_LOOP 0x8000
50
51/* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */
52
53#ifdef __KERNEL__
54
55/* intr=^C quit=^\ erase=del kill=^U
56 eof=^D vtime=\0 vmin=\1 sxtc=\0
57 start=^Q stop=^S susp=^Z eol=\0
58 reprint=^R discard=^U werase=^W lnext=^V
59 eol2=\0
60*/
61#define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0"
62
63/*
64 * Translate a "termio" structure into a "termios". Ugh.
65 */
66#define SET_LOW_TERMIOS_BITS(termios, termio, x) { \
67 unsigned short __tmp; \
68 get_user(__tmp,&(termio)->x); \
69 *(unsigned short *) &(termios)->x = __tmp; \
70}
71
72#define user_termio_to_kernel_termios(termios, termio) \
73({ \
74 SET_LOW_TERMIOS_BITS(termios, termio, c_iflag); \
75 SET_LOW_TERMIOS_BITS(termios, termio, c_oflag); \
76 SET_LOW_TERMIOS_BITS(termios, termio, c_cflag); \
77 SET_LOW_TERMIOS_BITS(termios, termio, c_lflag); \
78 copy_from_user((termios)->c_cc, (termio)->c_cc, NCC); \
79})
80
81/*
82 * Translate a "termios" structure into a "termio". Ugh.
83 */
84#define kernel_termios_to_user_termio(termio, termios) \
85({ \
86 put_user((termios)->c_iflag, &(termio)->c_iflag); \
87 put_user((termios)->c_oflag, &(termio)->c_oflag); \
88 put_user((termios)->c_cflag, &(termio)->c_cflag); \
89 put_user((termios)->c_lflag, &(termio)->c_lflag); \
90 put_user((termios)->c_line, &(termio)->c_line); \
91 copy_to_user((termio)->c_cc, (termios)->c_cc, NCC); \
92})
93
94#define user_termios_to_kernel_termios(k, u) copy_from_user(k, u, sizeof(struct termios))
95#define kernel_termios_to_user_termios(u, k) copy_to_user(u, k, sizeof(struct termios))
96
97#endif /* __KERNEL__ */
98
99#endif /* __ASM_SH64_TERMIOS_H */
diff --git a/include/asm-sh64/thread_info.h b/include/asm-sh64/thread_info.h
deleted file mode 100644
index f6d5117c53af..000000000000
--- a/include/asm-sh64/thread_info.h
+++ /dev/null
@@ -1,91 +0,0 @@
1#ifndef __ASM_SH64_THREAD_INFO_H
2#define __ASM_SH64_THREAD_INFO_H
3
4/*
5 * SuperH 5 version
6 * Copyright (C) 2003 Paul Mundt
7 */
8
9#ifdef __KERNEL__
10
11#ifndef __ASSEMBLY__
12#include <asm/registers.h>
13
14/*
15 * low level task data that entry.S needs immediate access to
16 * - this struct should fit entirely inside of one cache line
17 * - this struct shares the supervisor stack pages
18 * - if the contents of this structure are changed, the assembly constants must also be changed
19 */
20struct thread_info {
21 struct task_struct *task; /* main task structure */
22 struct exec_domain *exec_domain; /* execution domain */
23 unsigned long flags; /* low level flags */
24 /* Put the 4 32-bit fields together to make asm offsetting easier. */
25 int preempt_count; /* 0 => preemptable, <0 => BUG */
26 __u16 cpu;
27
28 mm_segment_t addr_limit;
29 struct restart_block restart_block;
30
31 __u8 supervisor_stack[0];
32};
33
34/*
35 * macros/functions for gaining access to the thread information structure
36 */
37#define INIT_THREAD_INFO(tsk) \
38{ \
39 .task = &tsk, \
40 .exec_domain = &default_exec_domain, \
41 .flags = 0, \
42 .cpu = 0, \
43 .preempt_count = 1, \
44 .addr_limit = KERNEL_DS, \
45 .restart_block = { \
46 .fn = do_no_restart_syscall, \
47 }, \
48}
49
50#define init_thread_info (init_thread_union.thread_info)
51#define init_stack (init_thread_union.stack)
52
53/* how to get the thread information struct from C */
54static inline struct thread_info *current_thread_info(void)
55{
56 struct thread_info *ti;
57
58 __asm__ __volatile__ ("getcon " __KCR0 ", %0\n\t" : "=r" (ti));
59
60 return ti;
61}
62
63/* thread information allocation */
64
65
66
67#define alloc_thread_info(ti) ((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
68#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
69
70#endif /* __ASSEMBLY__ */
71
72#define THREAD_SIZE 8192
73
74#define PREEMPT_ACTIVE 0x10000000
75
76/* thread information flags */
77#define TIF_SYSCALL_TRACE 0 /* syscall trace active */
78#define TIF_SIGPENDING 2 /* signal pending */
79#define TIF_NEED_RESCHED 3 /* rescheduling necessary */
80#define TIF_MEMDIE 4
81#define TIF_RESTORE_SIGMASK 5 /* Restore signal mask in do_signal */
82
83#define _TIF_SYSCALL_TRACE (1 << TIF_SYSCALL_TRACE)
84#define _TIF_SIGPENDING (1 << TIF_SIGPENDING)
85#define _TIF_NEED_RESCHED (1 << TIF_NEED_RESCHED)
86#define _TIF_MEMDIE (1 << TIF_MEMDIE)
87#define _TIF_RESTORE_SIGMASK (1 << TIF_RESTORE_SIGMASK)
88
89#endif /* __KERNEL__ */
90
91#endif /* __ASM_SH64_THREAD_INFO_H */
diff --git a/include/asm-sh64/timex.h b/include/asm-sh64/timex.h
deleted file mode 100644
index 163e2b62fe27..000000000000
--- a/include/asm-sh64/timex.h
+++ /dev/null
@@ -1,31 +0,0 @@
1#ifndef __ASM_SH64_TIMEX_H
2#define __ASM_SH64_TIMEX_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/timex.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 * Copyright (C) 2003 Paul Mundt
13 *
14 * sh-5 architecture timex specifications
15 *
16 */
17
18#define CLOCK_TICK_RATE 1193180 /* Underlying HZ */
19#define CLOCK_TICK_FACTOR 20 /* Factor of both 1000000 and CLOCK_TICK_RATE */
20
21typedef unsigned long cycles_t;
22
23static __inline__ cycles_t get_cycles (void)
24{
25 return 0;
26}
27
28#define vxtime_lock() do {} while (0)
29#define vxtime_unlock() do {} while (0)
30
31#endif /* __ASM_SH64_TIMEX_H */
diff --git a/include/asm-sh64/tlbflush.h b/include/asm-sh64/tlbflush.h
deleted file mode 100644
index 16a164a23754..000000000000
--- a/include/asm-sh64/tlbflush.h
+++ /dev/null
@@ -1,27 +0,0 @@
1#ifndef __ASM_SH64_TLBFLUSH_H
2#define __ASM_SH64_TLBFLUSH_H
3
4#include <asm/pgalloc.h>
5
6/*
7 * TLB flushing:
8 *
9 * - flush_tlb() flushes the current mm struct TLBs
10 * - flush_tlb_all() flushes all processes TLBs
11 * - flush_tlb_mm(mm) flushes the specified mm context TLB's
12 * - flush_tlb_page(vma, vmaddr) flushes one page
13 * - flush_tlb_range(mm, start, end) flushes a range of pages
14 *
15 */
16
17extern void flush_tlb(void);
18extern void flush_tlb_all(void);
19extern void flush_tlb_mm(struct mm_struct *mm);
20extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
21 unsigned long end);
22extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long page);
23
24extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);
25
26#endif /* __ASM_SH64_TLBFLUSH_H */
27
diff --git a/include/asm-sh64/topology.h b/include/asm-sh64/topology.h
deleted file mode 100644
index 34211787345f..000000000000
--- a/include/asm-sh64/topology.h
+++ /dev/null
@@ -1,6 +0,0 @@
1#ifndef __ASM_SH64_TOPOLOGY_H
2#define __ASM_SH64_TOPOLOGY_H
3
4#include <asm-generic/topology.h>
5
6#endif /* __ASM_SH64_TOPOLOGY_H */
diff --git a/include/asm-sh64/types.h b/include/asm-sh64/types.h
deleted file mode 100644
index 2c7ad73b3883..000000000000
--- a/include/asm-sh64/types.h
+++ /dev/null
@@ -1,74 +0,0 @@
1#ifndef __ASM_SH64_TYPES_H
2#define __ASM_SH64_TYPES_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/types.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#ifndef __ASSEMBLY__
16
17typedef unsigned short umode_t;
18
19/*
20 * __xx is ok: it doesn't pollute the POSIX namespace. Use these in the
21 * header files exported to user space
22 */
23
24typedef __signed__ char __s8;
25typedef unsigned char __u8;
26
27typedef __signed__ short __s16;
28typedef unsigned short __u16;
29
30typedef __signed__ int __s32;
31typedef unsigned int __u32;
32
33#if defined(__GNUC__)
34__extension__ typedef __signed__ long long __s64;
35__extension__ typedef unsigned long long __u64;
36#endif
37
38#endif /* __ASSEMBLY__ */
39
40/*
41 * These aren't exported outside the kernel to avoid name space clashes
42 */
43#ifdef __KERNEL__
44
45#ifndef __ASSEMBLY__
46
47typedef __signed__ char s8;
48typedef unsigned char u8;
49
50typedef __signed__ short s16;
51typedef unsigned short u16;
52
53typedef __signed__ int s32;
54typedef unsigned int u32;
55
56typedef __signed__ long long s64;
57typedef unsigned long long u64;
58
59/* DMA addresses come in generic and 64-bit flavours. */
60
61#ifdef CONFIG_HIGHMEM64G
62typedef u64 dma_addr_t;
63#else
64typedef u32 dma_addr_t;
65#endif
66typedef u64 dma64_addr_t;
67
68#endif /* __ASSEMBLY__ */
69
70#define BITS_PER_LONG 32
71
72#endif /* __KERNEL__ */
73
74#endif /* __ASM_SH64_TYPES_H */
diff --git a/include/asm-sh64/ucontext.h b/include/asm-sh64/ucontext.h
deleted file mode 100644
index cf77a08551ca..000000000000
--- a/include/asm-sh64/ucontext.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef __ASM_SH64_UCONTEXT_H
2#define __ASM_SH64_UCONTEXT_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/ucontext.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15struct ucontext {
16 unsigned long uc_flags;
17 struct ucontext *uc_link;
18 stack_t uc_stack;
19 struct sigcontext uc_mcontext;
20 sigset_t uc_sigmask; /* mask last for extensibility */
21};
22
23#endif /* __ASM_SH64_UCONTEXT_H */
diff --git a/include/asm-sh64/unaligned.h b/include/asm-sh64/unaligned.h
deleted file mode 100644
index 74481b186ae8..000000000000
--- a/include/asm-sh64/unaligned.h
+++ /dev/null
@@ -1,17 +0,0 @@
1#ifndef __ASM_SH64_UNALIGNED_H
2#define __ASM_SH64_UNALIGNED_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/unaligned.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#include <asm-generic/unaligned.h>
16
17#endif /* __ASM_SH64_UNALIGNED_H */
diff --git a/include/asm-sh64/user.h b/include/asm-sh64/user.h
deleted file mode 100644
index eb3b33edd73e..000000000000
--- a/include/asm-sh64/user.h
+++ /dev/null
@@ -1,70 +0,0 @@
1#ifndef __ASM_SH64_USER_H
2#define __ASM_SH64_USER_H
3
4/*
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 *
9 * include/asm-sh64/user.h
10 *
11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 *
13 */
14
15#include <linux/types.h>
16#include <asm/ptrace.h>
17#include <asm/page.h>
18
19/*
20 * Core file format: The core file is written in such a way that gdb
21 * can understand it and provide useful information to the user (under
22 * linux we use the `trad-core' bfd). The file contents are as follows:
23 *
24 * upage: 1 page consisting of a user struct that tells gdb
25 * what is present in the file. Directly after this is a
26 * copy of the task_struct, which is currently not used by gdb,
27 * but it may come in handy at some point. All of the registers
28 * are stored as part of the upage. The upage should always be
29 * only one page long.
30 * data: The data segment follows next. We use current->end_text to
31 * current->brk to pick up all of the user variables, plus any memory
32 * that may have been sbrk'ed. No attempt is made to determine if a
33 * page is demand-zero or if a page is totally unused, we just cover
34 * the entire range. All of the addresses are rounded in such a way
35 * that an integral number of pages is written.
36 * stack: We need the stack information in order to get a meaningful
37 * backtrace. We need to write the data from usp to
38 * current->start_stack, so we round each of these in order to be able
39 * to write an integer number of pages.
40 */
41
42struct user_fpu_struct {
43 unsigned long long fp_regs[32];
44 unsigned int fpscr;
45};
46
47struct user {
48 struct pt_regs regs; /* entire machine state */
49 struct user_fpu_struct fpu; /* Math Co-processor registers */
50 int u_fpvalid; /* True if math co-processor being used */
51 size_t u_tsize; /* text size (pages) */
52 size_t u_dsize; /* data size (pages) */
53 size_t u_ssize; /* stack size (pages) */
54 unsigned long start_code; /* text starting address */
55 unsigned long start_data; /* data starting address */
56 unsigned long start_stack; /* stack starting address */
57 long int signal; /* signal causing core dump */
58 struct regs * u_ar0; /* help gdb find registers */
59 struct user_fpu_struct* u_fpstate; /* Math Co-processor pointer */
60 unsigned long magic; /* identifies a core file */
61 char u_comm[32]; /* user command name */
62};
63
64#define NBPG PAGE_SIZE
65#define UPAGES 1
66#define HOST_TEXT_START_ADDR (u.start_code)
67#define HOST_DATA_START_ADDR (u.start_data)
68#define HOST_STACK_END_ADDR (u.start_stack + u.u_ssize * NBPG)
69
70#endif /* __ASM_SH64_USER_H */
diff --git a/init/Kconfig b/init/Kconfig
index 0eda68f0ad54..288444b4cd8a 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -238,7 +238,7 @@ config AUDIT
238 238
239config AUDITSYSCALL 239config AUDITSYSCALL
240 bool "Enable system-call auditing support" 240 bool "Enable system-call auditing support"
241 depends on AUDIT && (X86 || PPC || PPC64 || S390 || IA64 || UML || SPARC64) 241 depends on AUDIT && (X86 || PPC || PPC64 || S390 || IA64 || UML || SPARC64|| SUPERH)
242 default y if SECURITY_SELINUX 242 default y if SECURITY_SELINUX
243 help 243 help
244 Enable low-overhead system-call auditing infrastructure that 244 Enable low-overhead system-call auditing infrastructure that
diff --git a/mm/Kconfig b/mm/Kconfig
index 9ef97417a0b9..0016ebd4dcba 100644
--- a/mm/Kconfig
+++ b/mm/Kconfig
@@ -187,7 +187,7 @@ config BOUNCE
187config NR_QUICK 187config NR_QUICK
188 int 188 int
189 depends on QUICKLIST 189 depends on QUICKLIST
190 default "2" if (SUPERH && !SUPERH64) 190 default "2" if SUPERH
191 default "1" 191 default "1"
192 192
193config VIRT_TO_BUS 193config VIRT_TO_BUS