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authorEric W. Biederman <ebiederm@xmission.com>2006-10-04 05:16:54 -0400
committerLinus Torvalds <torvalds@g5.osdl.org>2006-10-04 10:55:29 -0400
commite78d01693be38bf93dd6bb49b86e143da450de86 (patch)
tree95fb24b9ffad0d0441118e8ea072a6af64348006
parentcd1182f56a064d42d10e289ef4018f9c2230247d (diff)
[PATCH] Add Hypertransport capability defines
This adds defines for the hypertransport capability subtypes and starts using them a little. [akpm@osdl.org: fix typo] Signed-off-by: Eric W. Biederman <ebiederm@xmission.com> Acked-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Greg KH <greg@kroah.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/powerpc/sysdev/mpic.c2
-rw-r--r--include/linux/pci_regs.h21
2 files changed, 22 insertions, 1 deletions
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 723972bb5bd9..3ee03a9a98fa 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -341,7 +341,7 @@ static void __init mpic_scan_ht_pic(struct mpic *mpic, u8 __iomem *devbase,
341 u8 id = readb(devbase + pos + PCI_CAP_LIST_ID); 341 u8 id = readb(devbase + pos + PCI_CAP_LIST_ID);
342 if (id == PCI_CAP_ID_HT) { 342 if (id == PCI_CAP_ID_HT) {
343 id = readb(devbase + pos + 3); 343 id = readb(devbase + pos + 3);
344 if (id == 0x80) 344 if (id == HT_CAPTYPE_IRQ)
345 break; 345 break;
346 } 346 }
347 } 347 }
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index 7d0e26cba420..c312a12ad2d6 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -12,6 +12,11 @@
12 * PCI Local Bus Specification 12 * PCI Local Bus Specification
13 * PCI to PCI Bridge Specification 13 * PCI to PCI Bridge Specification
14 * PCI System Design Guide 14 * PCI System Design Guide
15 *
16 * For hypertransport information, please consult the following manuals
17 * from http://www.hypertransport.org
18 *
19 * The Hypertransport I/O Link Specification
15 */ 20 */
16 21
17#ifndef LINUX_PCI_REGS_H 22#ifndef LINUX_PCI_REGS_H
@@ -463,4 +468,20 @@
463#define PCI_PWR_CAP 12 /* Capability */ 468#define PCI_PWR_CAP 12 /* Capability */
464#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */ 469#define PCI_PWR_CAP_BUDGET(x) ((x) & 1) /* Included in system budget */
465 470
471/* Hypertransport sub capability types */
472#define HT_CAPTYPE_SLAVE 0x00 /* Slave/Primary link configuration */
473#define HT_CAPTYPE_HOST 0x20 /* Host/Secondary link configuration */
474#define HT_CAPTYPE_IRQ 0x80 /* IRQ Configuration */
475#define HT_CAPTYPE_REMAPPING_40 0xA0 /* 40 bit address remapping */
476#define HT_CAPTYPE_REMAPPING_64 0xA2 /* 64 bit address remapping */
477#define HT_CAPTYPE_UNITID_CLUMP 0x90 /* Unit ID clumping */
478#define HT_CAPTYPE_EXTCONF 0x98 /* Extended Configuration Space Access */
479#define HT_CAPTYPE_MSI_MAPPING 0xA8 /* MSI Mapping Capability */
480#define HT_CAPTYPE_DIRECT_ROUTE 0xB0 /* Direct routing configuration */
481#define HT_CAPTYPE_VCSET 0xB8 /* Virtual Channel configuration */
482#define HT_CAPTYPE_ERROR_RETRY 0xC0 /* Retry on error configuration */
483#define HT_CAPTYPE_GEN3 0xD0 /* Generation 3 hypertransport configuration */
484#define HT_CAPTYPE_PM 0xE0 /* Hypertransport powermanagement configuration */
485
486
466#endif /* LINUX_PCI_REGS_H */ 487#endif /* LINUX_PCI_REGS_H */