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authorLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-10 16:32:24 -0400
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-05-10 16:32:24 -0400
commit62933d36ac98360da45f43df989277df002b034b (patch)
tree1164d4f10bb56b757f0507ed49d7aa4b17a9dc2b
parent0ab598099c18affd73a21482274c00e8119236be (diff)
parentf64071200acc124bd0d641ef7d750f38fbf5f8b8 (diff)
Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc
* 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc: (24 commits) [POWERPC] Fix compile error with kexec and CONFIG_SMP=n [POWERPC] Split initrd logic out of early_init_dt_scan_chosen() to fix warning [POWERPC] Fix warning in hpte_decode(), and generalize it [POWERPC] Minor pSeries IOMMU debug cleanup [POWERPC] PS3: Fix sys manager build error [POWERPC] Assorted janitorial EEH cleanups [POWERPC] We don't define CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID [POWERPC] pmu_sys_suspended is only defined for PPC32 [POWERPC] Fix incorrect calculation of I/O window addresses [POWERPC] celleb: Update celleb_defconfig [POWERPC] celleb: Fix parsing of machine type hack command line option [POWERPC] celleb: Fix PCI config space accesses to subordinate buses [POWERPC] celleb: Fix support for multiple PCI domains [POWERPC] Wire up sys_utimensat [POWERPC] CPM_UART: Removed __init from cpm_uart_init_portdesc to fix warning [POWERPC] User rheap from arch/powerpc/lib [POWERPC] 83xx: Fix the PCI ranges in the MPC834x_MDS device tree. [POWERPC] 83xx: Fix the PCI ranges in the MPC832x_MDS device tree. [POWERPC] CPM_UART: cpm_uart_set_termios should take ktermios, not termios [POWERPC] Change rheap functions to use ulongs instead of pointers ...
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts4
-rw-r--r--arch/powerpc/configs/celleb_defconfig129
-rw-r--r--arch/powerpc/kernel/pci_64.c37
-rw-r--r--arch/powerpc/kernel/prom.c47
-rw-r--r--arch/powerpc/lib/Makefile2
-rw-r--r--arch/powerpc/lib/rheap.c117
-rw-r--r--arch/powerpc/mm/hash_native_64.c37
-rw-r--r--arch/powerpc/platforms/83xx/mpc8313_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc832x_rdb.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_itx.c2
-rw-r--r--arch/powerpc/platforms/83xx/mpc834x_mds.c2
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c7
-rw-r--r--arch/powerpc/platforms/celleb/pci.c1
-rw-r--r--arch/powerpc/platforms/celleb/scc_epci.c8
-rw-r--r--arch/powerpc/platforms/celleb/setup.c2
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c13
-rw-r--r--arch/powerpc/platforms/pseries/eeh_driver.c7
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c3
-rw-r--r--arch/powerpc/platforms/pseries/kexec.c1
-rw-r--r--arch/powerpc/sysdev/commproc.c20
-rw-r--r--arch/powerpc/sysdev/cpm2_common.c21
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c29
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc_fast.c5
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc_slow.c7
-rw-r--r--arch/ppc/8xx_io/commproc.c22
-rw-r--r--arch/ppc/lib/Makefile3
-rw-r--r--arch/ppc/lib/rheap.c692
-rw-r--r--arch/ppc/syslib/cpm2_common.c23
-rw-r--r--drivers/net/fs_enet/mac-scc.c2
-rw-r--r--drivers/net/ucc_geth.c30
-rw-r--r--drivers/serial/cpm_uart/cpm_uart.h2
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_core.c3
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm1.c6
-rw-r--r--drivers/serial/cpm_uart/cpm_uart_cpm2.c6
-rw-r--r--include/asm-powerpc/mmu-hash64.h12
-rw-r--r--include/asm-powerpc/mmzone.h4
-rw-r--r--include/asm-powerpc/ppc-pci.h18
-rw-r--r--include/asm-powerpc/ps3.h5
-rw-r--r--include/asm-powerpc/qe.h13
-rw-r--r--include/asm-powerpc/reg_booke.h469
-rw-r--r--include/asm-powerpc/rheap.h (renamed from include/asm-ppc/rheap.h)20
-rw-r--r--include/asm-powerpc/systbl.h1
-rw-r--r--include/asm-powerpc/unistd.h3
-rw-r--r--include/asm-ppc/commproc.h13
-rw-r--r--include/asm-ppc/cpm2.h13
-rw-r--r--include/linux/pmu.h2
47 files changed, 867 insertions, 1002 deletions
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 93b760696010..112dd5198fe2 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -146,7 +146,7 @@
146 interrupt-parent = < &ipic >; 146 interrupt-parent = < &ipic >;
147 interrupts = <42 8>; 147 interrupts = <42 8>;
148 bus-range = <0 0>; 148 bus-range = <0 0>;
149 ranges = <02000000 0 a0000000 90000000 0 10000000 149 ranges = <02000000 0 90000000 90000000 0 10000000
150 42000000 0 80000000 80000000 0 10000000 150 42000000 0 80000000 80000000 0 10000000
151 01000000 0 00000000 d0000000 0 00100000>; 151 01000000 0 00000000 d0000000 0 00100000>;
152 clock-frequency = <0>; 152 clock-frequency = <0>;
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 07bcc5194d2b..df773fafe9d1 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -223,7 +223,7 @@
223 interrupt-parent = < &ipic >; 223 interrupt-parent = < &ipic >;
224 interrupts = <42 8>; 224 interrupts = <42 8>;
225 bus-range = <0 0>; 225 bus-range = <0 0>;
226 ranges = <02000000 0 a0000000 a0000000 0 10000000 226 ranges = <02000000 0 90000000 90000000 0 10000000
227 42000000 0 80000000 80000000 0 10000000 227 42000000 0 80000000 80000000 0 10000000
228 01000000 0 00000000 e2000000 0 00100000>; 228 01000000 0 00000000 e2000000 0 00100000>;
229 clock-frequency = <3f940aa>; 229 clock-frequency = <3f940aa>;
@@ -284,7 +284,7 @@
284 interrupts = <42 8>; 284 interrupts = <42 8>;
285 bus-range = <0 0>; 285 bus-range = <0 0>;
286 ranges = <02000000 0 b0000000 b0000000 0 10000000 286 ranges = <02000000 0 b0000000 b0000000 0 10000000
287 42000000 0 90000000 90000000 0 10000000 287 42000000 0 a0000000 a0000000 0 10000000
288 01000000 0 00000000 e2100000 0 00100000>; 288 01000000 0 00000000 e2100000 0 00100000>;
289 clock-frequency = <3f940aa>; 289 clock-frequency = <3f940aa>;
290 #interrupt-cells = <1>; 290 #interrupt-cells = <1>;
diff --git a/arch/powerpc/configs/celleb_defconfig b/arch/powerpc/configs/celleb_defconfig
index a1fe97197ead..91b657b339b4 100644
--- a/arch/powerpc/configs/celleb_defconfig
+++ b/arch/powerpc/configs/celleb_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.20-rc4 3# Linux kernel version: 2.6.21
4# Thu Jan 11 20:55:33 2007 4# Tue May 8 12:32:16 2007
5# 5#
6CONFIG_PPC64=y 6CONFIG_PPC64=y
7CONFIG_64BIT=y 7CONFIG_64BIT=y
@@ -60,6 +60,7 @@ CONFIG_LOCALVERSION_AUTO=y
60CONFIG_SWAP=y 60CONFIG_SWAP=y
61CONFIG_SYSVIPC=y 61CONFIG_SYSVIPC=y
62# CONFIG_IPC_NS is not set 62# CONFIG_IPC_NS is not set
63CONFIG_SYSVIPC_SYSCTL=y
63# CONFIG_POSIX_MQUEUE is not set 64# CONFIG_POSIX_MQUEUE is not set
64# CONFIG_BSD_PROCESS_ACCT is not set 65# CONFIG_BSD_PROCESS_ACCT is not set
65# CONFIG_TASKSTATS is not set 66# CONFIG_TASKSTATS is not set
@@ -70,6 +71,7 @@ CONFIG_IKCONFIG_PROC=y
70# CONFIG_CPUSETS is not set 71# CONFIG_CPUSETS is not set
71CONFIG_SYSFS_DEPRECATED=y 72CONFIG_SYSFS_DEPRECATED=y
72# CONFIG_RELAY is not set 73# CONFIG_RELAY is not set
74CONFIG_BLK_DEV_INITRD=y
73CONFIG_INITRAMFS_SOURCE="" 75CONFIG_INITRAMFS_SOURCE=""
74CONFIG_CC_OPTIMIZE_FOR_SIZE=y 76CONFIG_CC_OPTIMIZE_FOR_SIZE=y
75CONFIG_SYSCTL=y 77CONFIG_SYSCTL=y
@@ -132,15 +134,26 @@ CONFIG_PPC_MULTIPLATFORM=y
132# CONFIG_PPC_PSERIES is not set 134# CONFIG_PPC_PSERIES is not set
133# CONFIG_PPC_ISERIES is not set 135# CONFIG_PPC_ISERIES is not set
134# CONFIG_PPC_MPC52xx is not set 136# CONFIG_PPC_MPC52xx is not set
137# CONFIG_PPC_MPC5200 is not set
135# CONFIG_PPC_PMAC is not set 138# CONFIG_PPC_PMAC is not set
136# CONFIG_PPC_MAPLE is not set 139# CONFIG_PPC_MAPLE is not set
137# CONFIG_PPC_PASEMI is not set 140# CONFIG_PPC_PASEMI is not set
141CONFIG_PPC_CELLEB=y
142# CONFIG_PPC_PS3 is not set
138CONFIG_PPC_CELL=y 143CONFIG_PPC_CELL=y
139# CONFIG_PPC_CELL_NATIVE is not set 144# CONFIG_PPC_CELL_NATIVE is not set
140# CONFIG_PPC_IBM_CELL_BLADE is not set 145# CONFIG_PPC_IBM_CELL_BLADE is not set
141# CONFIG_PPC_PS3 is not set 146
142CONFIG_PPC_CELLEB=y 147#
148# Cell Broadband Engine options
149#
150CONFIG_SPU_FS=y
151CONFIG_SPU_BASE=y
152# CONFIG_PQ2ADS is not set
143CONFIG_PPC_UDBG_BEAT=y 153CONFIG_PPC_UDBG_BEAT=y
154# CONFIG_MPIC is not set
155# CONFIG_MPIC_WEIRD is not set
156# CONFIG_PPC_I8259 is not set
144# CONFIG_U3_DART is not set 157# CONFIG_U3_DART is not set
145# CONFIG_PPC_RTAS is not set 158# CONFIG_PPC_RTAS is not set
146# CONFIG_MMIO_NVRAM is not set 159# CONFIG_MMIO_NVRAM is not set
@@ -149,15 +162,7 @@ CONFIG_PPC_UDBG_BEAT=y
149# CONFIG_PPC_INDIRECT_IO is not set 162# CONFIG_PPC_INDIRECT_IO is not set
150# CONFIG_GENERIC_IOMAP is not set 163# CONFIG_GENERIC_IOMAP is not set
151# CONFIG_CPU_FREQ is not set 164# CONFIG_CPU_FREQ is not set
152# CONFIG_WANT_EARLY_SERIAL is not set 165# CONFIG_CPM2 is not set
153# CONFIG_MPIC is not set
154
155#
156# Cell Broadband Engine options
157#
158CONFIG_SPU_FS=y
159CONFIG_SPU_BASE=y
160# CONFIG_CBE_RAS is not set
161 166
162# 167#
163# Kernel options 168# Kernel options
@@ -183,7 +188,6 @@ CONFIG_NUMA=y
183CONFIG_NODES_SHIFT=4 188CONFIG_NODES_SHIFT=4
184CONFIG_ARCH_SELECT_MEMORY_MODEL=y 189CONFIG_ARCH_SELECT_MEMORY_MODEL=y
185CONFIG_ARCH_SPARSEMEM_ENABLE=y 190CONFIG_ARCH_SPARSEMEM_ENABLE=y
186CONFIG_ARCH_SPARSEMEM_DEFAULT=y
187CONFIG_ARCH_POPULATES_NODE_MAP=y 191CONFIG_ARCH_POPULATES_NODE_MAP=y
188CONFIG_SELECT_MEMORY_MODEL=y 192CONFIG_SELECT_MEMORY_MODEL=y
189# CONFIG_FLATMEM_MANUAL is not set 193# CONFIG_FLATMEM_MANUAL is not set
@@ -199,6 +203,7 @@ CONFIG_MEMORY_HOTPLUG_SPARSE=y
199CONFIG_SPLIT_PTLOCK_CPUS=4 203CONFIG_SPLIT_PTLOCK_CPUS=4
200CONFIG_MIGRATION=y 204CONFIG_MIGRATION=y
201CONFIG_RESOURCES_64BIT=y 205CONFIG_RESOURCES_64BIT=y
206CONFIG_ZONE_DMA_FLAG=1
202CONFIG_ARCH_MEMORY_PROBE=y 207CONFIG_ARCH_MEMORY_PROBE=y
203CONFIG_NODES_SPAN_OTHER_NODES=y 208CONFIG_NODES_SPAN_OTHER_NODES=y
204# CONFIG_PPC_64K_PAGES is not set 209# CONFIG_PPC_64K_PAGES is not set
@@ -207,14 +212,14 @@ CONFIG_PROC_DEVICETREE=y
207# CONFIG_CMDLINE_BOOL is not set 212# CONFIG_CMDLINE_BOOL is not set
208# CONFIG_PM is not set 213# CONFIG_PM is not set
209CONFIG_SECCOMP=y 214CONFIG_SECCOMP=y
215# CONFIG_WANT_DEVICE_TREE is not set
210CONFIG_ISA_DMA_API=y 216CONFIG_ISA_DMA_API=y
211 217
212# 218#
213# Bus options 219# Bus options
214# 220#
221CONFIG_ZONE_DMA=y
215CONFIG_GENERIC_ISA_DMA=y 222CONFIG_GENERIC_ISA_DMA=y
216# CONFIG_MPIC_WEIRD is not set
217# CONFIG_PPC_I8259 is not set
218# CONFIG_PPC_INDIRECT_PCI is not set 223# CONFIG_PPC_INDIRECT_PCI is not set
219CONFIG_PCI=y 224CONFIG_PCI=y
220CONFIG_PCI_DOMAINS=y 225CONFIG_PCI_DOMAINS=y
@@ -240,13 +245,13 @@ CONFIG_NET=y
240# 245#
241# Networking options 246# Networking options
242# 247#
243# CONFIG_NETDEBUG is not set
244CONFIG_PACKET=y 248CONFIG_PACKET=y
245# CONFIG_PACKET_MMAP is not set 249# CONFIG_PACKET_MMAP is not set
246CONFIG_UNIX=y 250CONFIG_UNIX=y
247CONFIG_XFRM=y 251CONFIG_XFRM=y
248# CONFIG_XFRM_USER is not set 252# CONFIG_XFRM_USER is not set
249# CONFIG_XFRM_SUB_POLICY is not set 253# CONFIG_XFRM_SUB_POLICY is not set
254# CONFIG_XFRM_MIGRATE is not set
250# CONFIG_NET_KEY is not set 255# CONFIG_NET_KEY is not set
251CONFIG_INET=y 256CONFIG_INET=y
252CONFIG_IP_MULTICAST=y 257CONFIG_IP_MULTICAST=y
@@ -262,7 +267,7 @@ CONFIG_SYN_COOKIES=y
262# CONFIG_INET_ESP is not set 267# CONFIG_INET_ESP is not set
263# CONFIG_INET_IPCOMP is not set 268# CONFIG_INET_IPCOMP is not set
264# CONFIG_INET_XFRM_TUNNEL is not set 269# CONFIG_INET_XFRM_TUNNEL is not set
265# CONFIG_INET_TUNNEL is not set 270CONFIG_INET_TUNNEL=y
266CONFIG_INET_XFRM_MODE_TRANSPORT=y 271CONFIG_INET_XFRM_MODE_TRANSPORT=y
267CONFIG_INET_XFRM_MODE_TUNNEL=y 272CONFIG_INET_XFRM_MODE_TUNNEL=y
268CONFIG_INET_XFRM_MODE_BEET=y 273CONFIG_INET_XFRM_MODE_BEET=y
@@ -280,6 +285,7 @@ CONFIG_DEFAULT_TCP_CONG="cubic"
280CONFIG_IPV6=y 285CONFIG_IPV6=y
281# CONFIG_IPV6_PRIVACY is not set 286# CONFIG_IPV6_PRIVACY is not set
282# CONFIG_IPV6_ROUTER_PREF is not set 287# CONFIG_IPV6_ROUTER_PREF is not set
288# CONFIG_IPV6_OPTIMISTIC_DAD is not set
283CONFIG_INET6_AH=m 289CONFIG_INET6_AH=m
284CONFIG_INET6_ESP=m 290CONFIG_INET6_ESP=m
285CONFIG_INET6_IPCOMP=m 291CONFIG_INET6_IPCOMP=m
@@ -302,17 +308,21 @@ CONFIG_NETFILTER=y
302# 308#
303# CONFIG_NETFILTER_NETLINK is not set 309# CONFIG_NETFILTER_NETLINK is not set
304# CONFIG_NF_CONNTRACK_ENABLED is not set 310# CONFIG_NF_CONNTRACK_ENABLED is not set
311# CONFIG_NF_CONNTRACK is not set
305# CONFIG_NETFILTER_XTABLES is not set 312# CONFIG_NETFILTER_XTABLES is not set
306 313
307# 314#
308# IP: Netfilter Configuration 315# IP: Netfilter Configuration
309# 316#
310CONFIG_IP_NF_QUEUE=m 317CONFIG_IP_NF_QUEUE=m
318# CONFIG_IP_NF_IPTABLES is not set
319# CONFIG_IP_NF_ARPTABLES is not set
311 320
312# 321#
313# IPv6: Netfilter Configuration (EXPERIMENTAL) 322# IPv6: Netfilter Configuration (EXPERIMENTAL)
314# 323#
315# CONFIG_IP6_NF_QUEUE is not set 324# CONFIG_IP6_NF_QUEUE is not set
325# CONFIG_IP6_NF_IPTABLES is not set
316 326
317# 327#
318# DCCP Configuration (EXPERIMENTAL) 328# DCCP Configuration (EXPERIMENTAL)
@@ -352,6 +362,13 @@ CONFIG_IP_NF_QUEUE=m
352# CONFIG_HAMRADIO is not set 362# CONFIG_HAMRADIO is not set
353# CONFIG_IRDA is not set 363# CONFIG_IRDA is not set
354# CONFIG_BT is not set 364# CONFIG_BT is not set
365# CONFIG_AF_RXRPC is not set
366
367#
368# Wireless
369#
370# CONFIG_CFG80211 is not set
371# CONFIG_WIRELESS_EXT is not set
355# CONFIG_IEEE80211 is not set 372# CONFIG_IEEE80211 is not set
356 373
357# 374#
@@ -365,16 +382,13 @@ CONFIG_STANDALONE=y
365CONFIG_PREVENT_FIRMWARE_BUILD=y 382CONFIG_PREVENT_FIRMWARE_BUILD=y
366CONFIG_FW_LOADER=y 383CONFIG_FW_LOADER=y
367# CONFIG_DEBUG_DRIVER is not set 384# CONFIG_DEBUG_DRIVER is not set
385# CONFIG_DEBUG_DEVRES is not set
368# CONFIG_SYS_HYPERVISOR is not set 386# CONFIG_SYS_HYPERVISOR is not set
369 387
370# 388#
371# Connector - unified userspace <-> kernelspace linker 389# Connector - unified userspace <-> kernelspace linker
372# 390#
373# CONFIG_CONNECTOR is not set 391# CONFIG_CONNECTOR is not set
374
375#
376# Memory Technology Devices (MTD)
377#
378# CONFIG_MTD is not set 392# CONFIG_MTD is not set
379 393
380# 394#
@@ -385,6 +399,7 @@ CONFIG_FW_LOADER=y
385# 399#
386# Plug and Play support 400# Plug and Play support
387# 401#
402# CONFIG_PNPACPI is not set
388 403
389# 404#
390# Block devices 405# Block devices
@@ -404,7 +419,6 @@ CONFIG_BLK_DEV_RAM=y
404CONFIG_BLK_DEV_RAM_COUNT=16 419CONFIG_BLK_DEV_RAM_COUNT=16
405CONFIG_BLK_DEV_RAM_SIZE=131072 420CONFIG_BLK_DEV_RAM_SIZE=131072
406CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024 421CONFIG_BLK_DEV_RAM_BLOCKSIZE=1024
407CONFIG_BLK_DEV_INITRD=y
408# CONFIG_CDROM_PKTCDVD is not set 422# CONFIG_CDROM_PKTCDVD is not set
409# CONFIG_ATA_OVER_ETH is not set 423# CONFIG_ATA_OVER_ETH is not set
410 424
@@ -443,7 +457,6 @@ CONFIG_BLK_DEV_GENERIC=y
443# CONFIG_BLK_DEV_OPTI621 is not set 457# CONFIG_BLK_DEV_OPTI621 is not set
444CONFIG_BLK_DEV_IDEDMA_PCI=y 458CONFIG_BLK_DEV_IDEDMA_PCI=y
445# CONFIG_BLK_DEV_IDEDMA_FORCED is not set 459# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
446CONFIG_IDEDMA_PCI_AUTO=y
447# CONFIG_IDEDMA_ONLYDISK is not set 460# CONFIG_IDEDMA_ONLYDISK is not set
448# CONFIG_BLK_DEV_AEC62XX is not set 461# CONFIG_BLK_DEV_AEC62XX is not set
449# CONFIG_BLK_DEV_ALI15X3 is not set 462# CONFIG_BLK_DEV_ALI15X3 is not set
@@ -458,6 +471,7 @@ CONFIG_IDEDMA_PCI_AUTO=y
458# CONFIG_BLK_DEV_JMICRON is not set 471# CONFIG_BLK_DEV_JMICRON is not set
459# CONFIG_BLK_DEV_SC1200 is not set 472# CONFIG_BLK_DEV_SC1200 is not set
460# CONFIG_BLK_DEV_PIIX is not set 473# CONFIG_BLK_DEV_PIIX is not set
474# CONFIG_BLK_DEV_IT8213 is not set
461# CONFIG_BLK_DEV_IT821X is not set 475# CONFIG_BLK_DEV_IT821X is not set
462# CONFIG_BLK_DEV_NS87415 is not set 476# CONFIG_BLK_DEV_NS87415 is not set
463# CONFIG_BLK_DEV_PDC202XX_OLD is not set 477# CONFIG_BLK_DEV_PDC202XX_OLD is not set
@@ -468,11 +482,11 @@ CONFIG_IDEDMA_PCI_AUTO=y
468# CONFIG_BLK_DEV_SLC90E66 is not set 482# CONFIG_BLK_DEV_SLC90E66 is not set
469# CONFIG_BLK_DEV_TRM290 is not set 483# CONFIG_BLK_DEV_TRM290 is not set
470# CONFIG_BLK_DEV_VIA82CXXX is not set 484# CONFIG_BLK_DEV_VIA82CXXX is not set
471CONFIG_BLK_DEV_IDE_CELLEB=y 485# CONFIG_BLK_DEV_TC86C001 is not set
486CONFIG_BLK_DEV_CELLEB=y
472# CONFIG_IDE_ARM is not set 487# CONFIG_IDE_ARM is not set
473CONFIG_BLK_DEV_IDEDMA=y 488CONFIG_BLK_DEV_IDEDMA=y
474# CONFIG_IDEDMA_IVB is not set 489# CONFIG_IDEDMA_IVB is not set
475CONFIG_IDEDMA_AUTO=y
476# CONFIG_BLK_DEV_HD is not set 490# CONFIG_BLK_DEV_HD is not set
477 491
478# 492#
@@ -546,6 +560,7 @@ CONFIG_SCSI_MULTI_LUN=y
546# CONFIG_SCSI_DC395x is not set 560# CONFIG_SCSI_DC395x is not set
547# CONFIG_SCSI_DC390T is not set 561# CONFIG_SCSI_DC390T is not set
548# CONFIG_SCSI_DEBUG is not set 562# CONFIG_SCSI_DEBUG is not set
563# CONFIG_SCSI_ESP_CORE is not set
549# CONFIG_SCSI_SRP is not set 564# CONFIG_SCSI_SRP is not set
550 565
551# 566#
@@ -591,12 +606,7 @@ CONFIG_DM_MULTIPATH=m
591# I2O device support 606# I2O device support
592# 607#
593# CONFIG_I2O is not set 608# CONFIG_I2O is not set
594 609# CONFIG_MACINTOSH_DRIVERS is not set
595#
596# Macintosh device drivers
597#
598# CONFIG_MAC_EMUMOUSEBTN is not set
599# CONFIG_WINDFARM is not set
600 610
601# 611#
602# Network device support 612# Network device support
@@ -652,15 +662,18 @@ CONFIG_MII=y
652# CONFIG_BNX2 is not set 662# CONFIG_BNX2 is not set
653CONFIG_SPIDER_NET=y 663CONFIG_SPIDER_NET=y
654# CONFIG_QLA3XXX is not set 664# CONFIG_QLA3XXX is not set
665# CONFIG_ATL1 is not set
655 666
656# 667#
657# Ethernet (10000 Mbit) 668# Ethernet (10000 Mbit)
658# 669#
659# CONFIG_CHELSIO_T1 is not set 670# CONFIG_CHELSIO_T1 is not set
671# CONFIG_CHELSIO_T3 is not set
660# CONFIG_IXGB is not set 672# CONFIG_IXGB is not set
661# CONFIG_S2IO is not set 673# CONFIG_S2IO is not set
662# CONFIG_MYRI10GE is not set 674# CONFIG_MYRI10GE is not set
663# CONFIG_NETXEN_NIC is not set 675# CONFIG_NETXEN_NIC is not set
676# CONFIG_PASEMI_MAC is not set
664 677
665# 678#
666# Token Ring devices 679# Token Ring devices
@@ -668,9 +681,10 @@ CONFIG_SPIDER_NET=y
668# CONFIG_TR is not set 681# CONFIG_TR is not set
669 682
670# 683#
671# Wireless LAN (non-hamradio) 684# Wireless LAN
672# 685#
673# CONFIG_NET_RADIO is not set 686# CONFIG_WLAN_PRE80211 is not set
687# CONFIG_WLAN_80211 is not set
674 688
675# 689#
676# Wan interfaces 690# Wan interfaces
@@ -770,6 +784,7 @@ CONFIG_SERIAL_CORE=y
770CONFIG_SERIAL_CORE_CONSOLE=y 784CONFIG_SERIAL_CORE_CONSOLE=y
771CONFIG_SERIAL_TXX9=y 785CONFIG_SERIAL_TXX9=y
772CONFIG_HAS_TXX9_SERIAL=y 786CONFIG_HAS_TXX9_SERIAL=y
787CONFIG_SERIAL_TXX9_NR_UARTS=3
773CONFIG_SERIAL_TXX9_CONSOLE=y 788CONFIG_SERIAL_TXX9_CONSOLE=y
774# CONFIG_SERIAL_TXX9_STDSERIAL is not set 789# CONFIG_SERIAL_TXX9_STDSERIAL is not set
775# CONFIG_SERIAL_JSM is not set 790# CONFIG_SERIAL_JSM is not set
@@ -891,6 +906,11 @@ CONFIG_I2C_ALGOBIT=y
891# CONFIG_HWMON_VID is not set 906# CONFIG_HWMON_VID is not set
892 907
893# 908#
909# Multifunction device drivers
910#
911# CONFIG_MFD_SM501 is not set
912
913#
894# Multimedia devices 914# Multimedia devices
895# 915#
896# CONFIG_VIDEO_DEV is not set 916# CONFIG_VIDEO_DEV is not set
@@ -904,7 +924,7 @@ CONFIG_I2C_ALGOBIT=y
904# 924#
905# Graphics support 925# Graphics support
906# 926#
907# CONFIG_FIRMWARE_EDID is not set 927# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
908# CONFIG_FB is not set 928# CONFIG_FB is not set
909# CONFIG_FB_IBM_GXT4500 is not set 929# CONFIG_FB_IBM_GXT4500 is not set
910 930
@@ -913,7 +933,6 @@ CONFIG_I2C_ALGOBIT=y
913# 933#
914# CONFIG_VGA_CONSOLE is not set 934# CONFIG_VGA_CONSOLE is not set
915CONFIG_DUMMY_CONSOLE=y 935CONFIG_DUMMY_CONSOLE=y
916# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
917 936
918# 937#
919# Sound 938# Sound
@@ -924,6 +943,15 @@ CONFIG_DUMMY_CONSOLE=y
924# HID Devices 943# HID Devices
925# 944#
926CONFIG_HID=y 945CONFIG_HID=y
946# CONFIG_HID_DEBUG is not set
947
948#
949# USB Input Devices
950#
951CONFIG_USB_HID=y
952# CONFIG_USB_HIDINPUT_POWERBOOK is not set
953# CONFIG_HID_FF is not set
954CONFIG_USB_HIDDEV=y
927 955
928# 956#
929# USB support 957# USB support
@@ -938,9 +966,8 @@ CONFIG_USB=y
938# Miscellaneous USB options 966# Miscellaneous USB options
939# 967#
940CONFIG_USB_DEVICEFS=y 968CONFIG_USB_DEVICEFS=y
941# CONFIG_USB_BANDWIDTH is not set 969# CONFIG_USB_DEVICE_CLASS is not set
942# CONFIG_USB_DYNAMIC_MINORS is not set 970# CONFIG_USB_DYNAMIC_MINORS is not set
943# CONFIG_USB_MULTITHREAD_PROBE is not set
944# CONFIG_USB_OTG is not set 971# CONFIG_USB_OTG is not set
945 972
946# 973#
@@ -953,6 +980,7 @@ CONFIG_USB_EHCI_HCD=m
953CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y 980CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y
954# CONFIG_USB_ISP116X_HCD is not set 981# CONFIG_USB_ISP116X_HCD is not set
955CONFIG_USB_OHCI_HCD=m 982CONFIG_USB_OHCI_HCD=m
983# CONFIG_USB_OHCI_HCD_PPC_OF is not set
956# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set 984# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
957CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y 985CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
958CONFIG_USB_OHCI_LITTLE_ENDIAN=y 986CONFIG_USB_OHCI_LITTLE_ENDIAN=y
@@ -989,10 +1017,6 @@ CONFIG_USB_STORAGE=m
989# 1017#
990# USB Input Devices 1018# USB Input Devices
991# 1019#
992CONFIG_USB_HID=y
993# CONFIG_USB_HIDINPUT_POWERBOOK is not set
994# CONFIG_HID_FF is not set
995CONFIG_USB_HIDDEV=y
996# CONFIG_USB_AIPTEK is not set 1020# CONFIG_USB_AIPTEK is not set
997# CONFIG_USB_WACOM is not set 1021# CONFIG_USB_WACOM is not set
998# CONFIG_USB_ACECAD is not set 1022# CONFIG_USB_ACECAD is not set
@@ -1005,6 +1029,7 @@ CONFIG_USB_HIDDEV=y
1005# CONFIG_USB_ATI_REMOTE2 is not set 1029# CONFIG_USB_ATI_REMOTE2 is not set
1006# CONFIG_USB_KEYSPAN_REMOTE is not set 1030# CONFIG_USB_KEYSPAN_REMOTE is not set
1007# CONFIG_USB_APPLETOUCH is not set 1031# CONFIG_USB_APPLETOUCH is not set
1032# CONFIG_USB_GTCO is not set
1008 1033
1009# 1034#
1010# USB Imaging devices 1035# USB Imaging devices
@@ -1042,6 +1067,7 @@ CONFIG_USB_MON=y
1042# CONFIG_USB_RIO500 is not set 1067# CONFIG_USB_RIO500 is not set
1043# CONFIG_USB_LEGOTOWER is not set 1068# CONFIG_USB_LEGOTOWER is not set
1044# CONFIG_USB_LCD is not set 1069# CONFIG_USB_LCD is not set
1070# CONFIG_USB_BERRY_CHARGE is not set
1045# CONFIG_USB_LED is not set 1071# CONFIG_USB_LED is not set
1046# CONFIG_USB_CYPRESS_CY7C63 is not set 1072# CONFIG_USB_CYPRESS_CY7C63 is not set
1047# CONFIG_USB_CYTHERM is not set 1073# CONFIG_USB_CYTHERM is not set
@@ -1052,6 +1078,7 @@ CONFIG_USB_MON=y
1052# CONFIG_USB_SISUSBVGA is not set 1078# CONFIG_USB_SISUSBVGA is not set
1053# CONFIG_USB_LD is not set 1079# CONFIG_USB_LD is not set
1054# CONFIG_USB_TRANCEVIBRATOR is not set 1080# CONFIG_USB_TRANCEVIBRATOR is not set
1081# CONFIG_USB_IOWARRIOR is not set
1055# CONFIG_USB_TEST is not set 1082# CONFIG_USB_TEST is not set
1056 1083
1057# 1084#
@@ -1109,6 +1136,10 @@ CONFIG_USB_MON=y
1109# 1136#
1110 1137
1111# 1138#
1139# Auxiliary Display support
1140#
1141
1142#
1112# Virtualization 1143# Virtualization
1113# 1144#
1114 1145
@@ -1293,6 +1324,8 @@ CONFIG_NLS_ISO8859_15=m
1293# Distributed Lock Manager 1324# Distributed Lock Manager
1294# 1325#
1295# CONFIG_DLM is not set 1326# CONFIG_DLM is not set
1327# CONFIG_UCC_SLOW is not set
1328# CONFIG_UCC_FAST is not set
1296 1329
1297# 1330#
1298# Library routines 1331# Library routines
@@ -1305,7 +1338,8 @@ CONFIG_LIBCRC32C=m
1305CONFIG_ZLIB_INFLATE=m 1338CONFIG_ZLIB_INFLATE=m
1306CONFIG_ZLIB_DEFLATE=m 1339CONFIG_ZLIB_DEFLATE=m
1307CONFIG_PLIST=y 1340CONFIG_PLIST=y
1308CONFIG_IOMAP_COPY=y 1341CONFIG_HAS_IOMEM=y
1342CONFIG_HAS_IOPORT=y
1309 1343
1310# 1344#
1311# Instrumentation Support 1345# Instrumentation Support
@@ -1323,15 +1357,16 @@ CONFIG_MAGIC_SYSRQ=y
1323CONFIG_DEBUG_FS=y 1357CONFIG_DEBUG_FS=y
1324# CONFIG_HEADERS_CHECK is not set 1358# CONFIG_HEADERS_CHECK is not set
1325CONFIG_DEBUG_KERNEL=y 1359CONFIG_DEBUG_KERNEL=y
1360# CONFIG_DEBUG_SHIRQ is not set
1326CONFIG_LOG_BUF_SHIFT=15 1361CONFIG_LOG_BUF_SHIFT=15
1327CONFIG_DETECT_SOFTLOCKUP=y 1362CONFIG_DETECT_SOFTLOCKUP=y
1328# CONFIG_SCHEDSTATS is not set 1363# CONFIG_SCHEDSTATS is not set
1364# CONFIG_TIMER_STATS is not set
1329# CONFIG_DEBUG_SLAB is not set 1365# CONFIG_DEBUG_SLAB is not set
1330# CONFIG_DEBUG_RT_MUTEXES is not set 1366# CONFIG_DEBUG_RT_MUTEXES is not set
1331# CONFIG_RT_MUTEX_TESTER is not set 1367# CONFIG_RT_MUTEX_TESTER is not set
1332# CONFIG_DEBUG_SPINLOCK is not set 1368# CONFIG_DEBUG_SPINLOCK is not set
1333CONFIG_DEBUG_MUTEXES=y 1369CONFIG_DEBUG_MUTEXES=y
1334# CONFIG_DEBUG_RWSEMS is not set
1335CONFIG_DEBUG_SPINLOCK_SLEEP=y 1370CONFIG_DEBUG_SPINLOCK_SLEEP=y
1336# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set 1371# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1337# CONFIG_DEBUG_KOBJECT is not set 1372# CONFIG_DEBUG_KOBJECT is not set
@@ -1341,8 +1376,10 @@ CONFIG_DEBUG_BUGVERBOSE=y
1341# CONFIG_DEBUG_LIST is not set 1376# CONFIG_DEBUG_LIST is not set
1342# CONFIG_FORCED_INLINING is not set 1377# CONFIG_FORCED_INLINING is not set
1343# CONFIG_RCU_TORTURE_TEST is not set 1378# CONFIG_RCU_TORTURE_TEST is not set
1379# CONFIG_FAULT_INJECTION is not set
1344# CONFIG_DEBUG_STACKOVERFLOW is not set 1380# CONFIG_DEBUG_STACKOVERFLOW is not set
1345# CONFIG_DEBUG_STACK_USAGE is not set 1381# CONFIG_DEBUG_STACK_USAGE is not set
1382# CONFIG_DEBUG_PAGEALLOC is not set
1346CONFIG_DEBUGGER=y 1383CONFIG_DEBUGGER=y
1347CONFIG_XMON=y 1384CONFIG_XMON=y
1348CONFIG_XMON_DEFAULT=y 1385CONFIG_XMON_DEFAULT=y
@@ -1356,6 +1393,7 @@ CONFIG_PPC_EARLY_DEBUG=y
1356# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set 1393# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
1357# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set 1394# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
1358# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set 1395# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
1396# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
1359CONFIG_PPC_EARLY_DEBUG_BEAT=y 1397CONFIG_PPC_EARLY_DEBUG_BEAT=y
1360 1398
1361# 1399#
@@ -1385,8 +1423,10 @@ CONFIG_CRYPTO_TGR192=m
1385# CONFIG_CRYPTO_GF128MUL is not set 1423# CONFIG_CRYPTO_GF128MUL is not set
1386CONFIG_CRYPTO_ECB=m 1424CONFIG_CRYPTO_ECB=m
1387CONFIG_CRYPTO_CBC=m 1425CONFIG_CRYPTO_CBC=m
1426CONFIG_CRYPTO_PCBC=m
1388# CONFIG_CRYPTO_LRW is not set 1427# CONFIG_CRYPTO_LRW is not set
1389CONFIG_CRYPTO_DES=m 1428CONFIG_CRYPTO_DES=m
1429# CONFIG_CRYPTO_FCRYPT is not set
1390CONFIG_CRYPTO_BLOWFISH=m 1430CONFIG_CRYPTO_BLOWFISH=m
1391CONFIG_CRYPTO_TWOFISH=m 1431CONFIG_CRYPTO_TWOFISH=m
1392CONFIG_CRYPTO_TWOFISH_COMMON=m 1432CONFIG_CRYPTO_TWOFISH_COMMON=m
@@ -1401,6 +1441,7 @@ CONFIG_CRYPTO_ANUBIS=m
1401CONFIG_CRYPTO_DEFLATE=m 1441CONFIG_CRYPTO_DEFLATE=m
1402CONFIG_CRYPTO_MICHAEL_MIC=m 1442CONFIG_CRYPTO_MICHAEL_MIC=m
1403CONFIG_CRYPTO_CRC32C=m 1443CONFIG_CRYPTO_CRC32C=m
1444# CONFIG_CRYPTO_CAMELLIA is not set
1404CONFIG_CRYPTO_TEST=m 1445CONFIG_CRYPTO_TEST=m
1405 1446
1406# 1447#
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index 6d05a1f377b5..b0409e19b1c1 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -1098,35 +1098,24 @@ static int get_bus_io_range(struct pci_bus *bus, unsigned long *start_phys,
1098 unsigned long *start_virt, unsigned long *size) 1098 unsigned long *start_virt, unsigned long *size)
1099{ 1099{
1100 struct pci_controller *hose = pci_bus_to_host(bus); 1100 struct pci_controller *hose = pci_bus_to_host(bus);
1101 struct pci_bus_region region;
1102 struct resource *res; 1101 struct resource *res;
1103 1102
1104 if (bus->self) { 1103 if (bus->self)
1105 res = bus->resource[0]; 1104 res = bus->resource[0];
1106 pcibios_resource_to_bus(bus->self, &region, res); 1105 else
1107 *start_phys = hose->io_base_phys + region.start;
1108 *start_virt = (unsigned long) hose->io_base_virt +
1109 region.start;
1110 if (region.end > region.start)
1111 *size = region.end - region.start + 1;
1112 else {
1113 printk("%s(): unexpected region 0x%lx->0x%lx\n",
1114 __FUNCTION__, region.start, region.end);
1115 return 1;
1116 }
1117
1118 } else {
1119 /* Root Bus */ 1106 /* Root Bus */
1120 res = &hose->io_resource; 1107 res = &hose->io_resource;
1121 *start_phys = hose->io_base_phys + res->start; 1108
1122 *start_virt = (unsigned long) hose->io_base_virt + res->start; 1109 *start_virt = pci_io_base + res->start;
1123 if (res->end > res->start) 1110 *start_phys = *start_virt + hose->io_base_phys
1124 *size = res->end - res->start + 1; 1111 - (unsigned long) hose->io_base_virt;
1125 else { 1112
1126 printk("%s(): unexpected region 0x%lx->0x%lx\n", 1113 if (res->end > res->start)
1127 __FUNCTION__, res->start, res->end); 1114 *size = res->end - res->start + 1;
1128 return 1; 1115 else {
1129 } 1116 printk("%s(): unexpected region 0x%lx->0x%lx\n",
1117 __FUNCTION__, res->start, res->end);
1118 return 1;
1130 } 1119 }
1131 1120
1132 return 0; 1121 return 0;
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index caef555f2dc0..c065b5550368 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -716,11 +716,40 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
716 return 0; 716 return 0;
717} 717}
718 718
719#ifdef CONFIG_BLK_DEV_INITRD
720static void __init early_init_dt_check_for_initrd(unsigned long node)
721{
722 unsigned long l;
723 u32 *prop;
724
725 DBG("Looking for initrd properties... ");
726
727 prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l);
728 if (prop) {
729 initrd_start = (unsigned long)__va(of_read_ulong(prop, l/4));
730
731 prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l);
732 if (prop) {
733 initrd_end = (unsigned long)
734 __va(of_read_ulong(prop, l/4));
735 initrd_below_start_ok = 1;
736 } else {
737 initrd_start = 0;
738 }
739 }
740
741 DBG("initrd_start=0x%lx initrd_end=0x%lx\n", initrd_start, initrd_end);
742}
743#else
744static inline void early_init_dt_check_for_initrd(unsigned long node)
745{
746}
747#endif /* CONFIG_BLK_DEV_INITRD */
748
719static int __init early_init_dt_scan_chosen(unsigned long node, 749static int __init early_init_dt_scan_chosen(unsigned long node,
720 const char *uname, int depth, void *data) 750 const char *uname, int depth, void *data)
721{ 751{
722 unsigned long *lprop; 752 unsigned long *lprop;
723 u32 *prop;
724 unsigned long l; 753 unsigned long l;
725 char *p; 754 char *p;
726 755
@@ -762,21 +791,7 @@ static int __init early_init_dt_scan_chosen(unsigned long node,
762 crashk_res.end = crashk_res.start + *lprop - 1; 791 crashk_res.end = crashk_res.start + *lprop - 1;
763#endif 792#endif
764 793
765#ifdef CONFIG_BLK_DEV_INITRD 794 early_init_dt_check_for_initrd(node);
766 DBG("Looking for initrd properties... ");
767 prop = of_get_flat_dt_prop(node, "linux,initrd-start", &l);
768 if (prop) {
769 initrd_start = (unsigned long)__va(of_read_ulong(prop, l/4));
770 prop = of_get_flat_dt_prop(node, "linux,initrd-end", &l);
771 if (prop) {
772 initrd_end = (unsigned long)__va(of_read_ulong(prop, l/4));
773 initrd_below_start_ok = 1;
774 } else {
775 initrd_start = 0;
776 }
777 }
778 DBG("initrd_start=0x%lx initrd_end=0x%lx\n", initrd_start, initrd_end);
779#endif /* CONFIG_BLK_DEV_INITRD */
780 795
781 /* Retreive command line */ 796 /* Retreive command line */
782 p = of_get_flat_dt_prop(node, "bootargs", &l); 797 p = of_get_flat_dt_prop(node, "bootargs", &l);
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 450258de7ca1..0a486d4b2547 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -23,7 +23,5 @@ obj-$(CONFIG_SMP) += locks.o
23endif 23endif
24 24
25# Temporary hack until we have migrated to asm-powerpc 25# Temporary hack until we have migrated to asm-powerpc
26ifeq ($(CONFIG_PPC_MERGE),y)
27obj-$(CONFIG_8xx) += rheap.o 26obj-$(CONFIG_8xx) += rheap.o
28obj-$(CONFIG_CPM2) += rheap.o 27obj-$(CONFIG_CPM2) += rheap.o
29endif
diff --git a/arch/powerpc/lib/rheap.c b/arch/powerpc/lib/rheap.c
index 6c5c5dd183ee..b2f6dcc59600 100644
--- a/arch/powerpc/lib/rheap.c
+++ b/arch/powerpc/lib/rheap.c
@@ -133,7 +133,7 @@ static rh_block_t *get_slot(rh_info_t * info)
133 info->empty_slots--; 133 info->empty_slots--;
134 134
135 /* Initialize */ 135 /* Initialize */
136 blk->start = NULL; 136 blk->start = 0;
137 blk->size = 0; 137 blk->size = 0;
138 blk->owner = NULL; 138 blk->owner = NULL;
139 139
@@ -158,7 +158,7 @@ static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
158 158
159 /* We assume that they are aligned properly */ 159 /* We assume that they are aligned properly */
160 size = blkn->size; 160 size = blkn->size;
161 s = (unsigned long)blkn->start; 161 s = blkn->start;
162 e = s + size; 162 e = s + size;
163 163
164 /* Find the blocks immediately before and after the given one 164 /* Find the blocks immediately before and after the given one
@@ -170,7 +170,7 @@ static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
170 list_for_each(l, &info->free_list) { 170 list_for_each(l, &info->free_list) {
171 blk = list_entry(l, rh_block_t, list); 171 blk = list_entry(l, rh_block_t, list);
172 172
173 bs = (unsigned long)blk->start; 173 bs = blk->start;
174 be = bs + blk->size; 174 be = bs + blk->size;
175 175
176 if (next == NULL && s >= bs) 176 if (next == NULL && s >= bs)
@@ -188,10 +188,10 @@ static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
188 } 188 }
189 189
190 /* Now check if they are really adjacent */ 190 /* Now check if they are really adjacent */
191 if (before != NULL && s != (unsigned long)before->start + before->size) 191 if (before && s != (before->start + before->size))
192 before = NULL; 192 before = NULL;
193 193
194 if (after != NULL && e != (unsigned long)after->start) 194 if (after && e != after->start)
195 after = NULL; 195 after = NULL;
196 196
197 /* No coalescing; list insert and return */ 197 /* No coalescing; list insert and return */
@@ -216,7 +216,7 @@ static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
216 216
217 /* Grow the after block backwards */ 217 /* Grow the after block backwards */
218 if (before == NULL && after != NULL) { 218 if (before == NULL && after != NULL) {
219 after->start = (int8_t *)after->start - size; 219 after->start -= size;
220 after->size += size; 220 after->size += size;
221 return; 221 return;
222 } 222 }
@@ -321,14 +321,14 @@ void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
321} 321}
322 322
323/* Attach a free memory region, coalesces regions if adjuscent */ 323/* Attach a free memory region, coalesces regions if adjuscent */
324int rh_attach_region(rh_info_t * info, void *start, int size) 324int rh_attach_region(rh_info_t * info, unsigned long start, int size)
325{ 325{
326 rh_block_t *blk; 326 rh_block_t *blk;
327 unsigned long s, e, m; 327 unsigned long s, e, m;
328 int r; 328 int r;
329 329
330 /* The region must be aligned */ 330 /* The region must be aligned */
331 s = (unsigned long)start; 331 s = start;
332 e = s + size; 332 e = s + size;
333 m = info->alignment - 1; 333 m = info->alignment - 1;
334 334
@@ -338,9 +338,12 @@ int rh_attach_region(rh_info_t * info, void *start, int size)
338 /* Round end down */ 338 /* Round end down */
339 e = e & ~m; 339 e = e & ~m;
340 340
341 if (IS_ERR_VALUE(e) || (e < s))
342 return -ERANGE;
343
341 /* Take final values */ 344 /* Take final values */
342 start = (void *)s; 345 start = s;
343 size = (int)(e - s); 346 size = e - s;
344 347
345 /* Grow the blocks, if needed */ 348 /* Grow the blocks, if needed */
346 r = assure_empty(info, 1); 349 r = assure_empty(info, 1);
@@ -358,7 +361,7 @@ int rh_attach_region(rh_info_t * info, void *start, int size)
358} 361}
359 362
360/* Detatch given address range, splits free block if needed. */ 363/* Detatch given address range, splits free block if needed. */
361void *rh_detach_region(rh_info_t * info, void *start, int size) 364unsigned long rh_detach_region(rh_info_t * info, unsigned long start, int size)
362{ 365{
363 struct list_head *l; 366 struct list_head *l;
364 rh_block_t *blk, *newblk; 367 rh_block_t *blk, *newblk;
@@ -366,10 +369,10 @@ void *rh_detach_region(rh_info_t * info, void *start, int size)
366 369
367 /* Validate size */ 370 /* Validate size */
368 if (size <= 0) 371 if (size <= 0)
369 return ERR_PTR(-EINVAL); 372 return (unsigned long) -EINVAL;
370 373
371 /* The region must be aligned */ 374 /* The region must be aligned */
372 s = (unsigned long)start; 375 s = start;
373 e = s + size; 376 e = s + size;
374 m = info->alignment - 1; 377 m = info->alignment - 1;
375 378
@@ -380,34 +383,34 @@ void *rh_detach_region(rh_info_t * info, void *start, int size)
380 e = e & ~m; 383 e = e & ~m;
381 384
382 if (assure_empty(info, 1) < 0) 385 if (assure_empty(info, 1) < 0)
383 return ERR_PTR(-ENOMEM); 386 return (unsigned long) -ENOMEM;
384 387
385 blk = NULL; 388 blk = NULL;
386 list_for_each(l, &info->free_list) { 389 list_for_each(l, &info->free_list) {
387 blk = list_entry(l, rh_block_t, list); 390 blk = list_entry(l, rh_block_t, list);
388 /* The range must lie entirely inside one free block */ 391 /* The range must lie entirely inside one free block */
389 bs = (unsigned long)blk->start; 392 bs = blk->start;
390 be = (unsigned long)blk->start + blk->size; 393 be = blk->start + blk->size;
391 if (s >= bs && e <= be) 394 if (s >= bs && e <= be)
392 break; 395 break;
393 blk = NULL; 396 blk = NULL;
394 } 397 }
395 398
396 if (blk == NULL) 399 if (blk == NULL)
397 return ERR_PTR(-ENOMEM); 400 return (unsigned long) -ENOMEM;
398 401
399 /* Perfect fit */ 402 /* Perfect fit */
400 if (bs == s && be == e) { 403 if (bs == s && be == e) {
401 /* Delete from free list, release slot */ 404 /* Delete from free list, release slot */
402 list_del(&blk->list); 405 list_del(&blk->list);
403 release_slot(info, blk); 406 release_slot(info, blk);
404 return (void *)s; 407 return s;
405 } 408 }
406 409
407 /* blk still in free list, with updated start and/or size */ 410 /* blk still in free list, with updated start and/or size */
408 if (bs == s || be == e) { 411 if (bs == s || be == e) {
409 if (bs == s) 412 if (bs == s)
410 blk->start = (int8_t *)blk->start + size; 413 blk->start += size;
411 blk->size -= size; 414 blk->size -= size;
412 415
413 } else { 416 } else {
@@ -416,25 +419,29 @@ void *rh_detach_region(rh_info_t * info, void *start, int size)
416 419
417 /* the back free fragment */ 420 /* the back free fragment */
418 newblk = get_slot(info); 421 newblk = get_slot(info);
419 newblk->start = (void *)e; 422 newblk->start = e;
420 newblk->size = be - e; 423 newblk->size = be - e;
421 424
422 list_add(&newblk->list, &blk->list); 425 list_add(&newblk->list, &blk->list);
423 } 426 }
424 427
425 return (void *)s; 428 return s;
426} 429}
427 430
428void *rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owner) 431/* Allocate a block of memory at the specified alignment. The value returned
432 * is an offset into the buffer initialized by rh_init(), or a negative number
433 * if there is an error.
434 */
435unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owner)
429{ 436{
430 struct list_head *l; 437 struct list_head *l;
431 rh_block_t *blk; 438 rh_block_t *blk;
432 rh_block_t *newblk; 439 rh_block_t *newblk;
433 void *start; 440 unsigned long start;
434 441
435 /* Validate size, (must be power of two) */ 442 /* Validate size, and alignment must be power of two */
436 if (size <= 0 || (alignment & (alignment - 1)) != 0) 443 if (size <= 0 || (alignment & (alignment - 1)) != 0)
437 return ERR_PTR(-EINVAL); 444 return (unsigned long) -EINVAL;
438 445
439 /* given alignment larger that default rheap alignment */ 446 /* given alignment larger that default rheap alignment */
440 if (alignment > info->alignment) 447 if (alignment > info->alignment)
@@ -444,7 +451,7 @@ void *rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owne
444 size = (size + (info->alignment - 1)) & ~(info->alignment - 1); 451 size = (size + (info->alignment - 1)) & ~(info->alignment - 1);
445 452
446 if (assure_empty(info, 1) < 0) 453 if (assure_empty(info, 1) < 0)
447 return ERR_PTR(-ENOMEM); 454 return (unsigned long) -ENOMEM;
448 455
449 blk = NULL; 456 blk = NULL;
450 list_for_each(l, &info->free_list) { 457 list_for_each(l, &info->free_list) {
@@ -455,7 +462,7 @@ void *rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owne
455 } 462 }
456 463
457 if (blk == NULL) 464 if (blk == NULL)
458 return ERR_PTR(-ENOMEM); 465 return (unsigned long) -ENOMEM;
459 466
460 /* Just fits */ 467 /* Just fits */
461 if (blk->size == size) { 468 if (blk->size == size) {
@@ -475,7 +482,7 @@ void *rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owne
475 newblk->owner = owner; 482 newblk->owner = owner;
476 483
477 /* blk still in free list, with updated start, size */ 484 /* blk still in free list, with updated start, size */
478 blk->start = (int8_t *)blk->start + size; 485 blk->start += size;
479 blk->size -= size; 486 blk->size -= size;
480 487
481 start = newblk->start; 488 start = newblk->start;
@@ -486,19 +493,25 @@ void *rh_alloc_align(rh_info_t * info, int size, int alignment, const char *owne
486 /* this is no problem with the deallocator since */ 493 /* this is no problem with the deallocator since */
487 /* we scan for pointers that lie in the blocks */ 494 /* we scan for pointers that lie in the blocks */
488 if (alignment > info->alignment) 495 if (alignment > info->alignment)
489 start = (void *)(((unsigned long)start + alignment - 1) & 496 start = (start + alignment - 1) & ~(alignment - 1);
490 ~(alignment - 1));
491 497
492 return start; 498 return start;
493} 499}
494 500
495void *rh_alloc(rh_info_t * info, int size, const char *owner) 501/* Allocate a block of memory at the default alignment. The value returned is
502 * an offset into the buffer initialized by rh_init(), or a negative number if
503 * there is an error.
504 */
505unsigned long rh_alloc(rh_info_t * info, int size, const char *owner)
496{ 506{
497 return rh_alloc_align(info, size, info->alignment, owner); 507 return rh_alloc_align(info, size, info->alignment, owner);
498} 508}
499 509
500/* allocate at precisely the given address */ 510/* Allocate a block of memory at the given offset, rounded up to the default
501void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner) 511 * alignment. The value returned is an offset into the buffer initialized by
512 * rh_init(), or a negative number if there is an error.
513 */
514unsigned long rh_alloc_fixed(rh_info_t * info, unsigned long start, int size, const char *owner)
502{ 515{
503 struct list_head *l; 516 struct list_head *l;
504 rh_block_t *blk, *newblk1, *newblk2; 517 rh_block_t *blk, *newblk1, *newblk2;
@@ -506,10 +519,10 @@ void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
506 519
507 /* Validate size */ 520 /* Validate size */
508 if (size <= 0) 521 if (size <= 0)
509 return ERR_PTR(-EINVAL); 522 return (unsigned long) -EINVAL;
510 523
511 /* The region must be aligned */ 524 /* The region must be aligned */
512 s = (unsigned long)start; 525 s = start;
513 e = s + size; 526 e = s + size;
514 m = info->alignment - 1; 527 m = info->alignment - 1;
515 528
@@ -520,20 +533,20 @@ void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
520 e = e & ~m; 533 e = e & ~m;
521 534
522 if (assure_empty(info, 2) < 0) 535 if (assure_empty(info, 2) < 0)
523 return ERR_PTR(-ENOMEM); 536 return (unsigned long) -ENOMEM;
524 537
525 blk = NULL; 538 blk = NULL;
526 list_for_each(l, &info->free_list) { 539 list_for_each(l, &info->free_list) {
527 blk = list_entry(l, rh_block_t, list); 540 blk = list_entry(l, rh_block_t, list);
528 /* The range must lie entirely inside one free block */ 541 /* The range must lie entirely inside one free block */
529 bs = (unsigned long)blk->start; 542 bs = blk->start;
530 be = (unsigned long)blk->start + blk->size; 543 be = blk->start + blk->size;
531 if (s >= bs && e <= be) 544 if (s >= bs && e <= be)
532 break; 545 break;
533 } 546 }
534 547
535 if (blk == NULL) 548 if (blk == NULL)
536 return ERR_PTR(-ENOMEM); 549 return (unsigned long) -ENOMEM;
537 550
538 /* Perfect fit */ 551 /* Perfect fit */
539 if (bs == s && be == e) { 552 if (bs == s && be == e) {
@@ -551,7 +564,7 @@ void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
551 /* blk still in free list, with updated start and/or size */ 564 /* blk still in free list, with updated start and/or size */
552 if (bs == s || be == e) { 565 if (bs == s || be == e) {
553 if (bs == s) 566 if (bs == s)
554 blk->start = (int8_t *)blk->start + size; 567 blk->start += size;
555 blk->size -= size; 568 blk->size -= size;
556 569
557 } else { 570 } else {
@@ -560,14 +573,14 @@ void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
560 573
561 /* The back free fragment */ 574 /* The back free fragment */
562 newblk2 = get_slot(info); 575 newblk2 = get_slot(info);
563 newblk2->start = (void *)e; 576 newblk2->start = e;
564 newblk2->size = be - e; 577 newblk2->size = be - e;
565 578
566 list_add(&newblk2->list, &blk->list); 579 list_add(&newblk2->list, &blk->list);
567 } 580 }
568 581
569 newblk1 = get_slot(info); 582 newblk1 = get_slot(info);
570 newblk1->start = (void *)s; 583 newblk1->start = s;
571 newblk1->size = e - s; 584 newblk1->size = e - s;
572 newblk1->owner = owner; 585 newblk1->owner = owner;
573 586
@@ -577,7 +590,11 @@ void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
577 return start; 590 return start;
578} 591}
579 592
580int rh_free(rh_info_t * info, void *start) 593/* Deallocate the memory previously allocated by one of the rh_alloc functions.
594 * The return value is the size of the deallocated block, or a negative number
595 * if there is an error.
596 */
597int rh_free(rh_info_t * info, unsigned long start)
581{ 598{
582 rh_block_t *blk, *blk2; 599 rh_block_t *blk, *blk2;
583 struct list_head *l; 600 struct list_head *l;
@@ -642,7 +659,7 @@ int rh_get_stats(rh_info_t * info, int what, int max_stats, rh_stats_t * stats)
642 return nr; 659 return nr;
643} 660}
644 661
645int rh_set_owner(rh_info_t * info, void *start, const char *owner) 662int rh_set_owner(rh_info_t * info, unsigned long start, const char *owner)
646{ 663{
647 rh_block_t *blk, *blk2; 664 rh_block_t *blk, *blk2;
648 struct list_head *l; 665 struct list_head *l;
@@ -684,8 +701,8 @@ void rh_dump(rh_info_t * info)
684 nr = maxnr; 701 nr = maxnr;
685 for (i = 0; i < nr; i++) 702 for (i = 0; i < nr; i++)
686 printk(KERN_INFO 703 printk(KERN_INFO
687 " 0x%p-0x%p (%u)\n", 704 " 0x%lx-0x%lx (%u)\n",
688 st[i].start, (int8_t *) st[i].start + st[i].size, 705 st[i].start, st[i].start + st[i].size,
689 st[i].size); 706 st[i].size);
690 printk(KERN_INFO "\n"); 707 printk(KERN_INFO "\n");
691 708
@@ -695,8 +712,8 @@ void rh_dump(rh_info_t * info)
695 nr = maxnr; 712 nr = maxnr;
696 for (i = 0; i < nr; i++) 713 for (i = 0; i < nr; i++)
697 printk(KERN_INFO 714 printk(KERN_INFO
698 " 0x%p-0x%p (%u) %s\n", 715 " 0x%lx-0x%lx (%u) %s\n",
699 st[i].start, (int8_t *) st[i].start + st[i].size, 716 st[i].start, st[i].start + st[i].size,
700 st[i].size, st[i].owner != NULL ? st[i].owner : ""); 717 st[i].size, st[i].owner != NULL ? st[i].owner : "");
701 printk(KERN_INFO "\n"); 718 printk(KERN_INFO "\n");
702} 719}
@@ -704,6 +721,6 @@ void rh_dump(rh_info_t * info)
704void rh_dump_blk(rh_info_t * info, rh_block_t * blk) 721void rh_dump_blk(rh_info_t * info, rh_block_t * blk)
705{ 722{
706 printk(KERN_INFO 723 printk(KERN_INFO
707 "blk @0x%p: 0x%p-0x%p (%u)\n", 724 "blk @0x%p: 0x%lx-0x%lx (%u)\n",
708 blk, blk->start, (int8_t *) blk->start + blk->size, blk->size); 725 blk, blk->start, blk->start + blk->size, blk->size);
709} 726}
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 7b7fe2d7b9dc..7d722eea4ea8 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -376,31 +376,28 @@ static void hpte_decode(hpte_t *hpte, unsigned long slot,
376 } 376 }
377 } 377 }
378 378
379 /* 379 /* This works for all page sizes, and for 256M and 1T segments */
380 * FIXME, the code below works for 16M, 64K, and 4K pages as these
381 * fall under the p<=23 rules for calculating the virtual address.
382 * In the case of 16M pages, an extra bit is stolen from the AVPN
383 * field to achieve the requisite 24 bits.
384 *
385 * Does not work for 16G pages or 1 TB segments.
386 */
387 shift = mmu_psize_defs[size].shift; 380 shift = mmu_psize_defs[size].shift;
388 if (mmu_psize_defs[size].avpnm) 381 avpn = (HPTE_V_AVPN_VAL(hpte_v) & ~mmu_psize_defs[size].avpnm) << 23;
389 avpnm_bits = __ilog2_u64(mmu_psize_defs[size].avpnm) + 1;
390 else
391 avpnm_bits = 0;
392 if (shift - avpnm_bits <= 23) {
393 avpn = HPTE_V_AVPN_VAL(hpte_v) << 23;
394 382
395 if (shift < 23) { 383 if (shift < 23) {
396 unsigned long vpi, pteg; 384 unsigned long vpi, vsid, pteg;
397 385
398 pteg = slot / HPTES_PER_GROUP; 386 pteg = slot / HPTES_PER_GROUP;
399 if (hpte_v & HPTE_V_SECONDARY) 387 if (hpte_v & HPTE_V_SECONDARY)
400 pteg = ~pteg; 388 pteg = ~pteg;
389 switch (hpte_v >> HPTE_V_SSIZE_SHIFT) {
390 case MMU_SEGSIZE_256M:
401 vpi = ((avpn >> 28) ^ pteg) & htab_hash_mask; 391 vpi = ((avpn >> 28) ^ pteg) & htab_hash_mask;
402 avpn |= (vpi << mmu_psize_defs[size].shift); 392 break;
393 case MMU_SEGSIZE_1T:
394 vsid = avpn >> 40;
395 vpi = (vsid ^ (vsid << 25) ^ pteg) & htab_hash_mask;
396 break;
397 default:
398 avpn = vpi = psize = 0;
403 } 399 }
400 avpn |= (vpi << mmu_psize_defs[size].shift);
404 } 401 }
405 402
406 *va = avpn; 403 *va = avpn;
diff --git a/arch/powerpc/platforms/83xx/mpc8313_rdb.c b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
index 32e9e9492841..96970ac887ee 100644
--- a/arch/powerpc/platforms/83xx/mpc8313_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc8313_rdb.c
@@ -40,7 +40,9 @@ unsigned long isa_mem_base = 0;
40 */ 40 */
41static void __init mpc8313_rdb_setup_arch(void) 41static void __init mpc8313_rdb_setup_arch(void)
42{ 42{
43#ifdef CONFIG_PCI
43 struct device_node *np; 44 struct device_node *np;
45#endif
44 46
45 if (ppc_md.progress) 47 if (ppc_md.progress)
46 ppc_md.progress("mpc8313_rdb_setup_arch()", 0); 48 ppc_md.progress("mpc8313_rdb_setup_arch()", 0);
diff --git a/arch/powerpc/platforms/83xx/mpc832x_rdb.c b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
index b0b22bb29de7..3db68b73fc32 100644
--- a/arch/powerpc/platforms/83xx/mpc832x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc832x_rdb.c
@@ -44,7 +44,9 @@ unsigned long isa_mem_base = 0;
44 */ 44 */
45static void __init mpc832x_rdb_setup_arch(void) 45static void __init mpc832x_rdb_setup_arch(void)
46{ 46{
47#if defined(CONFIG_PCI) || defined(CONFIG_QUICC_ENGINE)
47 struct device_node *np; 48 struct device_node *np;
49#endif
48 50
49 if (ppc_md.progress) 51 if (ppc_md.progress)
50 ppc_md.progress("mpc832x_rdb_setup_arch()", 0); 52 ppc_md.progress("mpc832x_rdb_setup_arch()", 0);
diff --git a/arch/powerpc/platforms/83xx/mpc834x_itx.c b/arch/powerpc/platforms/83xx/mpc834x_itx.c
index 3c009f6d4a4f..40a01947d684 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_itx.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_itx.c
@@ -50,7 +50,9 @@ unsigned long isa_mem_base = 0;
50 */ 50 */
51static void __init mpc834x_itx_setup_arch(void) 51static void __init mpc834x_itx_setup_arch(void)
52{ 52{
53#ifdef CONFIG_PCI
53 struct device_node *np; 54 struct device_node *np;
55#endif
54 56
55 if (ppc_md.progress) 57 if (ppc_md.progress)
56 ppc_md.progress("mpc834x_itx_setup_arch()", 0); 58 ppc_md.progress("mpc834x_itx_setup_arch()", 0);
diff --git a/arch/powerpc/platforms/83xx/mpc834x_mds.c b/arch/powerpc/platforms/83xx/mpc834x_mds.c
index 8aa9a93e2aa2..10394b2d7e7a 100644
--- a/arch/powerpc/platforms/83xx/mpc834x_mds.c
+++ b/arch/powerpc/platforms/83xx/mpc834x_mds.c
@@ -120,7 +120,9 @@ static int mpc834x_usb_cfg(void)
120 */ 120 */
121static void __init mpc834x_mds_setup_arch(void) 121static void __init mpc834x_mds_setup_arch(void)
122{ 122{
123#ifdef CONFIG_PCI
123 struct device_node *np; 124 struct device_node *np;
125#endif
124 126
125 if (ppc_md.progress) 127 if (ppc_md.progress)
126 ppc_md.progress("mpc834x_mds_setup_arch()", 0); 128 ppc_md.progress("mpc834x_mds_setup_arch()", 0);
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 90877565caa3..1051702c8d4f 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -168,7 +168,7 @@ static void __devinit quirk_uli1575(struct pci_dev *dev)
168{ 168{
169 unsigned short temp; 169 unsigned short temp;
170 struct pci_controller *hose = pci_bus_to_host(dev->bus); 170 struct pci_controller *hose = pci_bus_to_host(dev->bus);
171 unsigned char irq2pin[16]; 171 unsigned char irq2pin[16], c;
172 unsigned long pirq_map_word = 0; 172 unsigned long pirq_map_word = 0;
173 u32 irq; 173 u32 irq;
174 int i; 174 int i;
@@ -288,6 +288,11 @@ static void __devinit quirk_uli1575(struct pci_dev *dev)
288 outb(0x1e, 0x4d1); 288 outb(0x1e, 0x4d1);
289 289
290#undef ULI1575_SET_DEV_IRQ 290#undef ULI1575_SET_DEV_IRQ
291
292 /* Disable the HD interface and enable the AC97 interface. */
293 pci_read_config_byte(dev, 0xb8, &c);
294 c &= 0x7f;
295 pci_write_config_byte(dev, 0xb8, c);
291} 296}
292 297
293static void __devinit quirk_uli5288(struct pci_dev *dev) 298static void __devinit quirk_uli5288(struct pci_dev *dev)
diff --git a/arch/powerpc/platforms/celleb/pci.c b/arch/powerpc/platforms/celleb/pci.c
index d1adf34cd5e8..e9ac19c4bba4 100644
--- a/arch/powerpc/platforms/celleb/pci.c
+++ b/arch/powerpc/platforms/celleb/pci.c
@@ -457,6 +457,7 @@ int __devinit celleb_setup_phb(struct pci_controller *phb)
457 457
458 pr_debug("PCI: celleb_setup_phb() %s\n", name); 458 pr_debug("PCI: celleb_setup_phb() %s\n", name);
459 phb_set_bus_ranges(dev, phb); 459 phb_set_bus_ranges(dev, phb);
460 phb->buid = 1;
460 461
461 if (strcmp(name, "epci") == 0) { 462 if (strcmp(name, "epci") == 0) {
462 phb->ops = &celleb_epci_ops; 463 phb->ops = &celleb_epci_ops;
diff --git a/arch/powerpc/platforms/celleb/scc_epci.c b/arch/powerpc/platforms/celleb/scc_epci.c
index fb23d53eb09c..c4b011094bd6 100644
--- a/arch/powerpc/platforms/celleb/scc_epci.c
+++ b/arch/powerpc/platforms/celleb/scc_epci.c
@@ -133,13 +133,13 @@ static int celleb_epci_check_abort(struct pci_controller *hose,
133} 133}
134 134
135static volatile void __iomem *celleb_epci_make_config_addr( 135static volatile void __iomem *celleb_epci_make_config_addr(
136 struct pci_bus *bus,
136 struct pci_controller *hose, 137 struct pci_controller *hose,
137 unsigned int devfn, int where) 138 unsigned int devfn, int where)
138{ 139{
139 volatile void __iomem *addr; 140 volatile void __iomem *addr;
140 struct pci_bus *bus = hose->bus;
141 141
142 if (bus->self) 142 if (bus != hose->bus)
143 addr = celleb_epci_get_epci_cfg(hose) + 143 addr = celleb_epci_get_epci_cfg(hose) +
144 (((bus->number & 0xff) << 16) 144 (((bus->number & 0xff) << 16)
145 | ((devfn & 0xff) << 8) 145 | ((devfn & 0xff) << 8)
@@ -193,7 +193,7 @@ static int celleb_epci_read_config(struct pci_bus *bus,
193 } else { 193 } else {
194 194
195 clear_and_disable_master_abort_interrupt(hose); 195 clear_and_disable_master_abort_interrupt(hose);
196 addr = celleb_epci_make_config_addr(hose, devfn, where); 196 addr = celleb_epci_make_config_addr(bus, hose, devfn, where);
197 197
198 switch (size) { 198 switch (size) {
199 case 1: 199 case 1:
@@ -257,7 +257,7 @@ static int celleb_epci_write_config(struct pci_bus *bus,
257 } else { 257 } else {
258 258
259 clear_and_disable_master_abort_interrupt(hose); 259 clear_and_disable_master_abort_interrupt(hose);
260 addr = celleb_epci_make_config_addr(hose, devfn, where); 260 addr = celleb_epci_make_config_addr(bus, hose, devfn, where);
261 261
262 switch (size) { 262 switch (size) {
263 case 1: 263 case 1:
diff --git a/arch/powerpc/platforms/celleb/setup.c b/arch/powerpc/platforms/celleb/setup.c
index 596ab2a788d4..5e9f7f163571 100644
--- a/arch/powerpc/platforms/celleb/setup.c
+++ b/arch/powerpc/platforms/celleb/setup.c
@@ -80,7 +80,7 @@ static int celleb_machine_type_hack(char *ptr)
80 return 0; 80 return 0;
81} 81}
82 82
83__setup("celleb_machine_type_hack", celleb_machine_type_hack); 83__setup("celleb_machine_type_hack=", celleb_machine_type_hack);
84 84
85static void celleb_progress(char *s, unsigned short hex) 85static void celleb_progress(char *s, unsigned short hex)
86{ 86{
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 093438b93bd9..5f3e6d8659fe 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -76,7 +76,7 @@
76 */ 76 */
77#define EEH_MAX_FAILS 2100000 77#define EEH_MAX_FAILS 2100000
78 78
79/* Time to wait for a PCI slot to retport status, in milliseconds */ 79/* Time to wait for a PCI slot to report status, in milliseconds */
80#define PCI_BUS_RESET_WAIT_MSEC (60*1000) 80#define PCI_BUS_RESET_WAIT_MSEC (60*1000)
81 81
82/* RTAS tokens */ 82/* RTAS tokens */
@@ -95,11 +95,18 @@ EXPORT_SYMBOL(eeh_subsystem_enabled);
95/* Lock to avoid races due to multiple reports of an error */ 95/* Lock to avoid races due to multiple reports of an error */
96static DEFINE_SPINLOCK(confirm_error_lock); 96static DEFINE_SPINLOCK(confirm_error_lock);
97 97
98/* Buffer for reporting slot-error-detail rtas calls */ 98/* Buffer for reporting slot-error-detail rtas calls. Its here
99 * in BSS, and not dynamically alloced, so that it ends up in
100 * RMO where RTAS can access it.
101 */
99static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX]; 102static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
100static DEFINE_SPINLOCK(slot_errbuf_lock); 103static DEFINE_SPINLOCK(slot_errbuf_lock);
101static int eeh_error_buf_size; 104static int eeh_error_buf_size;
102 105
106/* Buffer for reporting pci register dumps. Its here in BSS, and
107 * not dynamically alloced, so that it ends up in RMO where RTAS
108 * can access it.
109 */
103#define EEH_PCI_REGS_LOG_LEN 4096 110#define EEH_PCI_REGS_LOG_LEN 4096
104static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN]; 111static unsigned char pci_regs_buf[EEH_PCI_REGS_LOG_LEN];
105 112
@@ -218,7 +225,7 @@ static size_t gather_pci_data(struct pci_dn *pdn, char * buf, size_t len)
218void eeh_slot_error_detail(struct pci_dn *pdn, int severity) 225void eeh_slot_error_detail(struct pci_dn *pdn, int severity)
219{ 226{
220 size_t loglen = 0; 227 size_t loglen = 0;
221 memset(pci_regs_buf, 0, EEH_PCI_REGS_LOG_LEN); 228 pci_regs_buf[0] = 0;
222 229
223 rtas_pci_enable(pdn, EEH_THAW_MMIO); 230 rtas_pci_enable(pdn, EEH_THAW_MMIO);
224 loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN); 231 loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index f07d849cfc84..161a5844ab6c 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -378,8 +378,9 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
378 378
379 /* Since rtas may enable MMIO when posting the error log, 379 /* Since rtas may enable MMIO when posting the error log,
380 * don't post the error log until after all dev drivers 380 * don't post the error log until after all dev drivers
381 * have been informed. */ 381 * have been informed.
382 eeh_slot_error_detail(frozen_pdn, 1 /* Temporary Error */); 382 */
383 eeh_slot_error_detail(frozen_pdn, EEH_LOG_TEMP_FAILURE);
383 384
384 /* If all device drivers were EEH-unaware, then shut 385 /* If all device drivers were EEH-unaware, then shut
385 * down all of the device drivers, and hope they 386 * down all of the device drivers, and hope they
@@ -470,7 +471,7 @@ hard_fail:
470 location, drv_str, pci_str); 471 location, drv_str, pci_str);
471 472
472perm_error: 473perm_error:
473 eeh_slot_error_detail(frozen_pdn, 2 /* Permanent Error */); 474 eeh_slot_error_detail(frozen_pdn, EEH_LOG_PERM_FAILURE);
474 475
475 /* Notify all devices that they're about to go down. */ 476 /* Notify all devices that they're about to go down. */
476 pci_walk_bus(frozen_bus, eeh_report_failure, NULL); 477 pci_walk_bus(frozen_bus, eeh_report_failure, NULL);
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index eec684a8e44e..be17d2395072 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -520,7 +520,6 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
520 dev->dev.archdata.dma_data = PCI_DN(pdn)->iommu_table; 520 dev->dev.archdata.dma_data = PCI_DN(pdn)->iommu_table;
521 return; 521 return;
522 } 522 }
523 DBG(" found DMA window, table: %p\n", pci->iommu_table);
524 523
525 pci = PCI_DN(pdn); 524 pci = PCI_DN(pdn);
526 if (!pci->iommu_table) { 525 if (!pci->iommu_table) {
@@ -534,6 +533,8 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
534 533
535 pci->iommu_table = iommu_init_table(tbl, pci->phb->node); 534 pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
536 DBG(" created table: %p\n", pci->iommu_table); 535 DBG(" created table: %p\n", pci->iommu_table);
536 } else {
537 DBG(" found DMA window, table: %p\n", pci->iommu_table);
537 } 538 }
538 539
539 dev->dev.archdata.dma_data = pci->iommu_table; 540 dev->dev.archdata.dma_data = pci->iommu_table;
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index af2685607458..412a5e7aff2d 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -12,6 +12,7 @@
12#include <asm/firmware.h> 12#include <asm/firmware.h>
13#include <asm/kexec.h> 13#include <asm/kexec.h>
14#include <asm/mpic.h> 14#include <asm/mpic.h>
15#include <asm/smp.h>
15 16
16#include "pseries.h" 17#include "pseries.h"
17#include "xics.h" 18#include "xics.h"
diff --git a/arch/powerpc/sysdev/commproc.c b/arch/powerpc/sysdev/commproc.c
index 9b4fafd9a840..4f67b89ba1d0 100644
--- a/arch/powerpc/sysdev/commproc.c
+++ b/arch/powerpc/sysdev/commproc.c
@@ -330,7 +330,7 @@ void m8xx_cpm_dpinit(void)
330 * with the processor and the microcode patches applied / activated. 330 * with the processor and the microcode patches applied / activated.
331 * But the following should be at least safe. 331 * But the following should be at least safe.
332 */ 332 */
333 rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); 333 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
334} 334}
335 335
336/* 336/*
@@ -338,9 +338,9 @@ void m8xx_cpm_dpinit(void)
338 * This function returns an offset into the DPRAM area. 338 * This function returns an offset into the DPRAM area.
339 * Use cpm_dpram_addr() to get the virtual address of the area. 339 * Use cpm_dpram_addr() to get the virtual address of the area.
340 */ 340 */
341uint cpm_dpalloc(uint size, uint align) 341unsigned long cpm_dpalloc(uint size, uint align)
342{ 342{
343 void *start; 343 unsigned long start;
344 unsigned long flags; 344 unsigned long flags;
345 345
346 spin_lock_irqsave(&cpm_dpmem_lock, flags); 346 spin_lock_irqsave(&cpm_dpmem_lock, flags);
@@ -352,30 +352,30 @@ uint cpm_dpalloc(uint size, uint align)
352} 352}
353EXPORT_SYMBOL(cpm_dpalloc); 353EXPORT_SYMBOL(cpm_dpalloc);
354 354
355int cpm_dpfree(uint offset) 355int cpm_dpfree(unsigned long offset)
356{ 356{
357 int ret; 357 int ret;
358 unsigned long flags; 358 unsigned long flags;
359 359
360 spin_lock_irqsave(&cpm_dpmem_lock, flags); 360 spin_lock_irqsave(&cpm_dpmem_lock, flags);
361 ret = rh_free(&cpm_dpmem_info, (void *)offset); 361 ret = rh_free(&cpm_dpmem_info, offset);
362 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 362 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
363 363
364 return ret; 364 return ret;
365} 365}
366EXPORT_SYMBOL(cpm_dpfree); 366EXPORT_SYMBOL(cpm_dpfree);
367 367
368uint cpm_dpalloc_fixed(uint offset, uint size, uint align) 368unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
369{ 369{
370 void *start; 370 unsigned long start;
371 unsigned long flags; 371 unsigned long flags;
372 372
373 spin_lock_irqsave(&cpm_dpmem_lock, flags); 373 spin_lock_irqsave(&cpm_dpmem_lock, flags);
374 cpm_dpmem_info.alignment = align; 374 cpm_dpmem_info.alignment = align;
375 start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); 375 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
376 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 376 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
377 377
378 return (uint)start; 378 return start;
379} 379}
380EXPORT_SYMBOL(cpm_dpalloc_fixed); 380EXPORT_SYMBOL(cpm_dpalloc_fixed);
381 381
@@ -385,7 +385,7 @@ void cpm_dpdump(void)
385} 385}
386EXPORT_SYMBOL(cpm_dpdump); 386EXPORT_SYMBOL(cpm_dpdump);
387 387
388void *cpm_dpram_addr(uint offset) 388void *cpm_dpram_addr(unsigned long offset)
389{ 389{
390 return (void *)(dpram_vbase + offset); 390 return (void *)(dpram_vbase + offset);
391} 391}
diff --git a/arch/powerpc/sysdev/cpm2_common.c b/arch/powerpc/sysdev/cpm2_common.c
index ec265995d5d8..924412974795 100644
--- a/arch/powerpc/sysdev/cpm2_common.c
+++ b/arch/powerpc/sysdev/cpm2_common.c
@@ -248,15 +248,14 @@ static void cpm2_dpinit(void)
248 * varies with the processor and the microcode patches activated. 248 * varies with the processor and the microcode patches activated.
249 * But the following should be at least safe. 249 * But the following should be at least safe.
250 */ 250 */
251 rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, 251 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
252 CPM_DATAONLY_SIZE);
253} 252}
254 253
255/* This function returns an index into the DPRAM area. 254/* This function returns an index into the DPRAM area.
256 */ 255 */
257uint cpm_dpalloc(uint size, uint align) 256unsigned long cpm_dpalloc(uint size, uint align)
258{ 257{
259 void *start; 258 unsigned long start;
260 unsigned long flags; 259 unsigned long flags;
261 260
262 spin_lock_irqsave(&cpm_dpmem_lock, flags); 261 spin_lock_irqsave(&cpm_dpmem_lock, flags);
@@ -268,13 +267,13 @@ uint cpm_dpalloc(uint size, uint align)
268} 267}
269EXPORT_SYMBOL(cpm_dpalloc); 268EXPORT_SYMBOL(cpm_dpalloc);
270 269
271int cpm_dpfree(uint offset) 270int cpm_dpfree(unsigned long offset)
272{ 271{
273 int ret; 272 int ret;
274 unsigned long flags; 273 unsigned long flags;
275 274
276 spin_lock_irqsave(&cpm_dpmem_lock, flags); 275 spin_lock_irqsave(&cpm_dpmem_lock, flags);
277 ret = rh_free(&cpm_dpmem_info, (void *)offset); 276 ret = rh_free(&cpm_dpmem_info, offset);
278 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 277 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
279 278
280 return ret; 279 return ret;
@@ -282,17 +281,17 @@ int cpm_dpfree(uint offset)
282EXPORT_SYMBOL(cpm_dpfree); 281EXPORT_SYMBOL(cpm_dpfree);
283 282
284/* not sure if this is ever needed */ 283/* not sure if this is ever needed */
285uint cpm_dpalloc_fixed(uint offset, uint size, uint align) 284unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
286{ 285{
287 void *start; 286 unsigned long start;
288 unsigned long flags; 287 unsigned long flags;
289 288
290 spin_lock_irqsave(&cpm_dpmem_lock, flags); 289 spin_lock_irqsave(&cpm_dpmem_lock, flags);
291 cpm_dpmem_info.alignment = align; 290 cpm_dpmem_info.alignment = align;
292 start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); 291 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
293 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 292 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
294 293
295 return (uint)start; 294 return start;
296} 295}
297EXPORT_SYMBOL(cpm_dpalloc_fixed); 296EXPORT_SYMBOL(cpm_dpalloc_fixed);
298 297
@@ -302,7 +301,7 @@ void cpm_dpdump(void)
302} 301}
303EXPORT_SYMBOL(cpm_dpdump); 302EXPORT_SYMBOL(cpm_dpdump);
304 303
305void *cpm_dpram_addr(uint offset) 304void *cpm_dpram_addr(unsigned long offset)
306{ 305{
307 return (void *)(im_dprambase + offset); 306 return (void *)(im_dprambase + offset);
308} 307}
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 7f4c07543961..90f87408b5d5 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -244,7 +244,7 @@ EXPORT_SYMBOL(qe_put_snum);
244static int qe_sdma_init(void) 244static int qe_sdma_init(void)
245{ 245{
246 struct sdma *sdma = &qe_immr->sdma; 246 struct sdma *sdma = &qe_immr->sdma;
247 u32 sdma_buf_offset; 247 unsigned long sdma_buf_offset;
248 248
249 if (!sdma) 249 if (!sdma)
250 return -ENODEV; 250 return -ENODEV;
@@ -252,10 +252,10 @@ static int qe_sdma_init(void)
252 /* allocate 2 internal temporary buffers (512 bytes size each) for 252 /* allocate 2 internal temporary buffers (512 bytes size each) for
253 * the SDMA */ 253 * the SDMA */
254 sdma_buf_offset = qe_muram_alloc(512 * 2, 4096); 254 sdma_buf_offset = qe_muram_alloc(512 * 2, 4096);
255 if (IS_MURAM_ERR(sdma_buf_offset)) 255 if (IS_ERR_VALUE(sdma_buf_offset))
256 return -ENOMEM; 256 return -ENOMEM;
257 257
258 out_be32(&sdma->sdebcr, sdma_buf_offset & QE_SDEBCR_BA_MASK); 258 out_be32(&sdma->sdebcr, (u32) sdma_buf_offset & QE_SDEBCR_BA_MASK);
259 out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK | 259 out_be32(&sdma->sdmr, (QE_SDMR_GLB_1_MSK |
260 (0x1 << QE_SDMR_CEN_SHIFT))); 260 (0x1 << QE_SDMR_CEN_SHIFT)));
261 261
@@ -291,33 +291,32 @@ static void qe_muram_init(void)
291 if ((np = of_find_node_by_name(NULL, "data-only")) != NULL) { 291 if ((np = of_find_node_by_name(NULL, "data-only")) != NULL) {
292 address = *of_get_address(np, 0, &size, &flags); 292 address = *of_get_address(np, 0, &size, &flags);
293 of_node_put(np); 293 of_node_put(np);
294 rh_attach_region(&qe_muram_info, 294 rh_attach_region(&qe_muram_info, address, (int) size);
295 (void *)address, (int)size);
296 } 295 }
297} 296}
298 297
299/* This function returns an index into the MURAM area. 298/* This function returns an index into the MURAM area.
300 */ 299 */
301u32 qe_muram_alloc(u32 size, u32 align) 300unsigned long qe_muram_alloc(int size, int align)
302{ 301{
303 void *start; 302 unsigned long start;
304 unsigned long flags; 303 unsigned long flags;
305 304
306 spin_lock_irqsave(&qe_muram_lock, flags); 305 spin_lock_irqsave(&qe_muram_lock, flags);
307 start = rh_alloc_align(&qe_muram_info, size, align, "QE"); 306 start = rh_alloc_align(&qe_muram_info, size, align, "QE");
308 spin_unlock_irqrestore(&qe_muram_lock, flags); 307 spin_unlock_irqrestore(&qe_muram_lock, flags);
309 308
310 return (u32) start; 309 return start;
311} 310}
312EXPORT_SYMBOL(qe_muram_alloc); 311EXPORT_SYMBOL(qe_muram_alloc);
313 312
314int qe_muram_free(u32 offset) 313int qe_muram_free(unsigned long offset)
315{ 314{
316 int ret; 315 int ret;
317 unsigned long flags; 316 unsigned long flags;
318 317
319 spin_lock_irqsave(&qe_muram_lock, flags); 318 spin_lock_irqsave(&qe_muram_lock, flags);
320 ret = rh_free(&qe_muram_info, (void *)offset); 319 ret = rh_free(&qe_muram_info, offset);
321 spin_unlock_irqrestore(&qe_muram_lock, flags); 320 spin_unlock_irqrestore(&qe_muram_lock, flags);
322 321
323 return ret; 322 return ret;
@@ -325,16 +324,16 @@ int qe_muram_free(u32 offset)
325EXPORT_SYMBOL(qe_muram_free); 324EXPORT_SYMBOL(qe_muram_free);
326 325
327/* not sure if this is ever needed */ 326/* not sure if this is ever needed */
328u32 qe_muram_alloc_fixed(u32 offset, u32 size) 327unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
329{ 328{
330 void *start; 329 unsigned long start;
331 unsigned long flags; 330 unsigned long flags;
332 331
333 spin_lock_irqsave(&qe_muram_lock, flags); 332 spin_lock_irqsave(&qe_muram_lock, flags);
334 start = rh_alloc_fixed(&qe_muram_info, (void *)offset, size, "commproc"); 333 start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
335 spin_unlock_irqrestore(&qe_muram_lock, flags); 334 spin_unlock_irqrestore(&qe_muram_lock, flags);
336 335
337 return (u32) start; 336 return start;
338} 337}
339EXPORT_SYMBOL(qe_muram_alloc_fixed); 338EXPORT_SYMBOL(qe_muram_alloc_fixed);
340 339
@@ -344,7 +343,7 @@ void qe_muram_dump(void)
344} 343}
345EXPORT_SYMBOL(qe_muram_dump); 344EXPORT_SYMBOL(qe_muram_dump);
346 345
347void *qe_muram_addr(u32 offset) 346void *qe_muram_addr(unsigned long offset)
348{ 347{
349 return (void *)&qe_immr->muram[offset]; 348 return (void *)&qe_immr->muram[offset];
350} 349}
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_fast.c b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
index 66137bf2dfb0..9143236853fc 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_fast.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_fast.c
@@ -18,6 +18,7 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/stddef.h> 19#include <linux/stddef.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/err.h>
21 22
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/immap_qe.h> 24#include <asm/immap_qe.h>
@@ -268,7 +269,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
268 /* Allocate memory for Tx Virtual Fifo */ 269 /* Allocate memory for Tx Virtual Fifo */
269 uccf->ucc_fast_tx_virtual_fifo_base_offset = 270 uccf->ucc_fast_tx_virtual_fifo_base_offset =
270 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 271 qe_muram_alloc(uf_info->utfs, UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
271 if (IS_MURAM_ERR(uccf->ucc_fast_tx_virtual_fifo_base_offset)) { 272 if (IS_ERR_VALUE(uccf->ucc_fast_tx_virtual_fifo_base_offset)) {
272 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__); 273 printk(KERN_ERR "%s: cannot allocate MURAM for TX FIFO", __FUNCTION__);
273 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0; 274 uccf->ucc_fast_tx_virtual_fifo_base_offset = 0;
274 ucc_fast_free(uccf); 275 ucc_fast_free(uccf);
@@ -280,7 +281,7 @@ int ucc_fast_init(struct ucc_fast_info * uf_info, struct ucc_fast_private ** ucc
280 qe_muram_alloc(uf_info->urfs + 281 qe_muram_alloc(uf_info->urfs +
281 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR, 282 UCC_FAST_RECEIVE_VIRTUAL_FIFO_SIZE_FUDGE_FACTOR,
282 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT); 283 UCC_FAST_VIRT_FIFO_REGS_ALIGNMENT);
283 if (IS_MURAM_ERR(uccf->ucc_fast_rx_virtual_fifo_base_offset)) { 284 if (IS_ERR_VALUE(uccf->ucc_fast_rx_virtual_fifo_base_offset)) {
284 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__); 285 printk(KERN_ERR "%s: cannot allocate MURAM for RX FIFO", __FUNCTION__);
285 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0; 286 uccf->ucc_fast_rx_virtual_fifo_base_offset = 0;
286 ucc_fast_free(uccf); 287 ucc_fast_free(uccf);
diff --git a/arch/powerpc/sysdev/qe_lib/ucc_slow.c b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
index b930d686a4d1..1f65c26ce63f 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc_slow.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc_slow.c
@@ -18,6 +18,7 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/stddef.h> 19#include <linux/stddef.h>
20#include <linux/interrupt.h> 20#include <linux/interrupt.h>
21#include <linux/err.h>
21 22
22#include <asm/io.h> 23#include <asm/io.h>
23#include <asm/immap_qe.h> 24#include <asm/immap_qe.h>
@@ -175,7 +176,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
175 /* Get PRAM base */ 176 /* Get PRAM base */
176 uccs->us_pram_offset = 177 uccs->us_pram_offset =
177 qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM); 178 qe_muram_alloc(UCC_SLOW_PRAM_SIZE, ALIGNMENT_OF_UCC_SLOW_PRAM);
178 if (IS_MURAM_ERR(uccs->us_pram_offset)) { 179 if (IS_ERR_VALUE(uccs->us_pram_offset)) {
179 printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__); 180 printk(KERN_ERR "%s: cannot allocate MURAM for PRAM", __FUNCTION__);
180 ucc_slow_free(uccs); 181 ucc_slow_free(uccs);
181 return -ENOMEM; 182 return -ENOMEM;
@@ -210,7 +211,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
210 uccs->rx_base_offset = 211 uccs->rx_base_offset =
211 qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd), 212 qe_muram_alloc(us_info->rx_bd_ring_len * sizeof(struct qe_bd),
212 QE_ALIGNMENT_OF_BD); 213 QE_ALIGNMENT_OF_BD);
213 if (IS_MURAM_ERR(uccs->rx_base_offset)) { 214 if (IS_ERR_VALUE(uccs->rx_base_offset)) {
214 printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__); 215 printk(KERN_ERR "%s: cannot allocate RX BDs", __FUNCTION__);
215 uccs->rx_base_offset = 0; 216 uccs->rx_base_offset = 0;
216 ucc_slow_free(uccs); 217 ucc_slow_free(uccs);
@@ -220,7 +221,7 @@ int ucc_slow_init(struct ucc_slow_info * us_info, struct ucc_slow_private ** ucc
220 uccs->tx_base_offset = 221 uccs->tx_base_offset =
221 qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd), 222 qe_muram_alloc(us_info->tx_bd_ring_len * sizeof(struct qe_bd),
222 QE_ALIGNMENT_OF_BD); 223 QE_ALIGNMENT_OF_BD);
223 if (IS_MURAM_ERR(uccs->tx_base_offset)) { 224 if (IS_ERR_VALUE(uccs->tx_base_offset)) {
224 printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__); 225 printk(KERN_ERR "%s: cannot allocate TX BDs", __FUNCTION__);
225 uccs->tx_base_offset = 0; 226 uccs->tx_base_offset = 0;
226 ucc_slow_free(uccs); 227 ucc_slow_free(uccs);
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 7a8722beac12..e2c6210f234b 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -402,7 +402,7 @@ void m8xx_cpm_dpinit(void)
402 * with the processor and the microcode patches applied / activated. 402 * with the processor and the microcode patches applied / activated.
403 * But the following should be at least safe. 403 * But the following should be at least safe.
404 */ 404 */
405 rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE); 405 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
406} 406}
407 407
408/* 408/*
@@ -410,9 +410,9 @@ void m8xx_cpm_dpinit(void)
410 * This function returns an offset into the DPRAM area. 410 * This function returns an offset into the DPRAM area.
411 * Use cpm_dpram_addr() to get the virtual address of the area. 411 * Use cpm_dpram_addr() to get the virtual address of the area.
412 */ 412 */
413uint cpm_dpalloc(uint size, uint align) 413unsigned long cpm_dpalloc(uint size, uint align)
414{ 414{
415 void *start; 415 unsigned long start;
416 unsigned long flags; 416 unsigned long flags;
417 417
418 spin_lock_irqsave(&cpm_dpmem_lock, flags); 418 spin_lock_irqsave(&cpm_dpmem_lock, flags);
@@ -420,34 +420,34 @@ uint cpm_dpalloc(uint size, uint align)
420 start = rh_alloc(&cpm_dpmem_info, size, "commproc"); 420 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
421 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 421 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
422 422
423 return (uint)start; 423 return start;
424} 424}
425EXPORT_SYMBOL(cpm_dpalloc); 425EXPORT_SYMBOL(cpm_dpalloc);
426 426
427int cpm_dpfree(uint offset) 427int cpm_dpfree(unsigned long offset)
428{ 428{
429 int ret; 429 int ret;
430 unsigned long flags; 430 unsigned long flags;
431 431
432 spin_lock_irqsave(&cpm_dpmem_lock, flags); 432 spin_lock_irqsave(&cpm_dpmem_lock, flags);
433 ret = rh_free(&cpm_dpmem_info, (void *)offset); 433 ret = rh_free(&cpm_dpmem_info, offset);
434 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 434 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
435 435
436 return ret; 436 return ret;
437} 437}
438EXPORT_SYMBOL(cpm_dpfree); 438EXPORT_SYMBOL(cpm_dpfree);
439 439
440uint cpm_dpalloc_fixed(uint offset, uint size, uint align) 440unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
441{ 441{
442 void *start; 442 unsigned long start;
443 unsigned long flags; 443 unsigned long flags;
444 444
445 spin_lock_irqsave(&cpm_dpmem_lock, flags); 445 spin_lock_irqsave(&cpm_dpmem_lock, flags);
446 cpm_dpmem_info.alignment = align; 446 cpm_dpmem_info.alignment = align;
447 start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); 447 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
448 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 448 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
449 449
450 return (uint)start; 450 return start;
451} 451}
452EXPORT_SYMBOL(cpm_dpalloc_fixed); 452EXPORT_SYMBOL(cpm_dpalloc_fixed);
453 453
@@ -457,7 +457,7 @@ void cpm_dpdump(void)
457} 457}
458EXPORT_SYMBOL(cpm_dpdump); 458EXPORT_SYMBOL(cpm_dpdump);
459 459
460void *cpm_dpram_addr(uint offset) 460void *cpm_dpram_addr(unsigned long offset)
461{ 461{
462 return ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem + offset; 462 return ((immap_t *)IMAP_ADDR)->im_cpm.cp_dpmem + offset;
463} 463}
diff --git a/arch/ppc/lib/Makefile b/arch/ppc/lib/Makefile
index 422bef9bae7b..095e661e79dd 100644
--- a/arch/ppc/lib/Makefile
+++ b/arch/ppc/lib/Makefile
@@ -3,6 +3,3 @@
3# 3#
4 4
5obj-y := checksum.o string.o div64.o 5obj-y := checksum.o string.o div64.o
6
7obj-$(CONFIG_8xx) += rheap.o
8obj-$(CONFIG_CPM2) += rheap.o
diff --git a/arch/ppc/lib/rheap.c b/arch/ppc/lib/rheap.c
deleted file mode 100644
index d40700795a9c..000000000000
--- a/arch/ppc/lib/rheap.c
+++ /dev/null
@@ -1,692 +0,0 @@
1/*
2 * A Remote Heap. Remote means that we don't touch the memory that the
3 * heap points to. Normal heap implementations use the memory they manage
4 * to place their list. We cannot do that because the memory we manage may
5 * have special properties, for example it is uncachable or of different
6 * endianess.
7 *
8 * Author: Pantelis Antoniou <panto@intracom.gr>
9 *
10 * 2004 (c) INTRACOM S.A. Greece. This file is licensed under
11 * the terms of the GNU General Public License version 2. This program
12 * is licensed "as is" without any warranty of any kind, whether express
13 * or implied.
14 */
15#include <linux/types.h>
16#include <linux/errno.h>
17#include <linux/kernel.h>
18#include <linux/mm.h>
19#include <linux/slab.h>
20
21#include <asm/rheap.h>
22
23/*
24 * Fixup a list_head, needed when copying lists. If the pointers fall
25 * between s and e, apply the delta. This assumes that
26 * sizeof(struct list_head *) == sizeof(unsigned long *).
27 */
28static inline void fixup(unsigned long s, unsigned long e, int d,
29 struct list_head *l)
30{
31 unsigned long *pp;
32
33 pp = (unsigned long *)&l->next;
34 if (*pp >= s && *pp < e)
35 *pp += d;
36
37 pp = (unsigned long *)&l->prev;
38 if (*pp >= s && *pp < e)
39 *pp += d;
40}
41
42/* Grow the allocated blocks */
43static int grow(rh_info_t * info, int max_blocks)
44{
45 rh_block_t *block, *blk;
46 int i, new_blocks;
47 int delta;
48 unsigned long blks, blke;
49
50 if (max_blocks <= info->max_blocks)
51 return -EINVAL;
52
53 new_blocks = max_blocks - info->max_blocks;
54
55 block = kmalloc(sizeof(rh_block_t) * max_blocks, GFP_KERNEL);
56 if (block == NULL)
57 return -ENOMEM;
58
59 if (info->max_blocks > 0) {
60
61 /* copy old block area */
62 memcpy(block, info->block,
63 sizeof(rh_block_t) * info->max_blocks);
64
65 delta = (char *)block - (char *)info->block;
66
67 /* and fixup list pointers */
68 blks = (unsigned long)info->block;
69 blke = (unsigned long)(info->block + info->max_blocks);
70
71 for (i = 0, blk = block; i < info->max_blocks; i++, blk++)
72 fixup(blks, blke, delta, &blk->list);
73
74 fixup(blks, blke, delta, &info->empty_list);
75 fixup(blks, blke, delta, &info->free_list);
76 fixup(blks, blke, delta, &info->taken_list);
77
78 /* free the old allocated memory */
79 if ((info->flags & RHIF_STATIC_BLOCK) == 0)
80 kfree(info->block);
81 }
82
83 info->block = block;
84 info->empty_slots += new_blocks;
85 info->max_blocks = max_blocks;
86 info->flags &= ~RHIF_STATIC_BLOCK;
87
88 /* add all new blocks to the free list */
89 for (i = 0, blk = block + info->max_blocks; i < new_blocks; i++, blk++)
90 list_add(&blk->list, &info->empty_list);
91
92 return 0;
93}
94
95/*
96 * Assure at least the required amount of empty slots. If this function
97 * causes a grow in the block area then all pointers kept to the block
98 * area are invalid!
99 */
100static int assure_empty(rh_info_t * info, int slots)
101{
102 int max_blocks;
103
104 /* This function is not meant to be used to grow uncontrollably */
105 if (slots >= 4)
106 return -EINVAL;
107
108 /* Enough space */
109 if (info->empty_slots >= slots)
110 return 0;
111
112 /* Next 16 sized block */
113 max_blocks = ((info->max_blocks + slots) + 15) & ~15;
114
115 return grow(info, max_blocks);
116}
117
118static rh_block_t *get_slot(rh_info_t * info)
119{
120 rh_block_t *blk;
121
122 /* If no more free slots, and failure to extend. */
123 /* XXX: You should have called assure_empty before */
124 if (info->empty_slots == 0) {
125 printk(KERN_ERR "rh: out of slots; crash is imminent.\n");
126 return NULL;
127 }
128
129 /* Get empty slot to use */
130 blk = list_entry(info->empty_list.next, rh_block_t, list);
131 list_del_init(&blk->list);
132 info->empty_slots--;
133
134 /* Initialize */
135 blk->start = NULL;
136 blk->size = 0;
137 blk->owner = NULL;
138
139 return blk;
140}
141
142static inline void release_slot(rh_info_t * info, rh_block_t * blk)
143{
144 list_add(&blk->list, &info->empty_list);
145 info->empty_slots++;
146}
147
148static void attach_free_block(rh_info_t * info, rh_block_t * blkn)
149{
150 rh_block_t *blk;
151 rh_block_t *before;
152 rh_block_t *after;
153 rh_block_t *next;
154 int size;
155 unsigned long s, e, bs, be;
156 struct list_head *l;
157
158 /* We assume that they are aligned properly */
159 size = blkn->size;
160 s = (unsigned long)blkn->start;
161 e = s + size;
162
163 /* Find the blocks immediately before and after the given one
164 * (if any) */
165 before = NULL;
166 after = NULL;
167 next = NULL;
168
169 list_for_each(l, &info->free_list) {
170 blk = list_entry(l, rh_block_t, list);
171
172 bs = (unsigned long)blk->start;
173 be = bs + blk->size;
174
175 if (next == NULL && s >= bs)
176 next = blk;
177
178 if (be == s)
179 before = blk;
180
181 if (e == bs)
182 after = blk;
183
184 /* If both are not null, break now */
185 if (before != NULL && after != NULL)
186 break;
187 }
188
189 /* Now check if they are really adjacent */
190 if (before != NULL && s != (unsigned long)before->start + before->size)
191 before = NULL;
192
193 if (after != NULL && e != (unsigned long)after->start)
194 after = NULL;
195
196 /* No coalescing; list insert and return */
197 if (before == NULL && after == NULL) {
198
199 if (next != NULL)
200 list_add(&blkn->list, &next->list);
201 else
202 list_add(&blkn->list, &info->free_list);
203
204 return;
205 }
206
207 /* We don't need it anymore */
208 release_slot(info, blkn);
209
210 /* Grow the before block */
211 if (before != NULL && after == NULL) {
212 before->size += size;
213 return;
214 }
215
216 /* Grow the after block backwards */
217 if (before == NULL && after != NULL) {
218 after->start = (int8_t *)after->start - size;
219 after->size += size;
220 return;
221 }
222
223 /* Grow the before block, and release the after block */
224 before->size += size + after->size;
225 list_del(&after->list);
226 release_slot(info, after);
227}
228
229static void attach_taken_block(rh_info_t * info, rh_block_t * blkn)
230{
231 rh_block_t *blk;
232 struct list_head *l;
233
234 /* Find the block immediately before the given one (if any) */
235 list_for_each(l, &info->taken_list) {
236 blk = list_entry(l, rh_block_t, list);
237 if (blk->start > blkn->start) {
238 list_add_tail(&blkn->list, &blk->list);
239 return;
240 }
241 }
242
243 list_add_tail(&blkn->list, &info->taken_list);
244}
245
246/*
247 * Create a remote heap dynamically. Note that no memory for the blocks
248 * are allocated. It will upon the first allocation
249 */
250rh_info_t *rh_create(unsigned int alignment)
251{
252 rh_info_t *info;
253
254 /* Alignment must be a power of two */
255 if ((alignment & (alignment - 1)) != 0)
256 return ERR_PTR(-EINVAL);
257
258 info = kmalloc(sizeof(*info), GFP_KERNEL);
259 if (info == NULL)
260 return ERR_PTR(-ENOMEM);
261
262 info->alignment = alignment;
263
264 /* Initially everything as empty */
265 info->block = NULL;
266 info->max_blocks = 0;
267 info->empty_slots = 0;
268 info->flags = 0;
269
270 INIT_LIST_HEAD(&info->empty_list);
271 INIT_LIST_HEAD(&info->free_list);
272 INIT_LIST_HEAD(&info->taken_list);
273
274 return info;
275}
276
277/*
278 * Destroy a dynamically created remote heap. Deallocate only if the areas
279 * are not static
280 */
281void rh_destroy(rh_info_t * info)
282{
283 if ((info->flags & RHIF_STATIC_BLOCK) == 0 && info->block != NULL)
284 kfree(info->block);
285
286 if ((info->flags & RHIF_STATIC_INFO) == 0)
287 kfree(info);
288}
289
290/*
291 * Initialize in place a remote heap info block. This is needed to support
292 * operation very early in the startup of the kernel, when it is not yet safe
293 * to call kmalloc.
294 */
295void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
296 rh_block_t * block)
297{
298 int i;
299 rh_block_t *blk;
300
301 /* Alignment must be a power of two */
302 if ((alignment & (alignment - 1)) != 0)
303 return;
304
305 info->alignment = alignment;
306
307 /* Initially everything as empty */
308 info->block = block;
309 info->max_blocks = max_blocks;
310 info->empty_slots = max_blocks;
311 info->flags = RHIF_STATIC_INFO | RHIF_STATIC_BLOCK;
312
313 INIT_LIST_HEAD(&info->empty_list);
314 INIT_LIST_HEAD(&info->free_list);
315 INIT_LIST_HEAD(&info->taken_list);
316
317 /* Add all new blocks to the free list */
318 for (i = 0, blk = block; i < max_blocks; i++, blk++)
319 list_add(&blk->list, &info->empty_list);
320}
321
322/* Attach a free memory region, coalesces regions if adjuscent */
323int rh_attach_region(rh_info_t * info, void *start, int size)
324{
325 rh_block_t *blk;
326 unsigned long s, e, m;
327 int r;
328
329 /* The region must be aligned */
330 s = (unsigned long)start;
331 e = s + size;
332 m = info->alignment - 1;
333
334 /* Round start up */
335 s = (s + m) & ~m;
336
337 /* Round end down */
338 e = e & ~m;
339
340 /* Take final values */
341 start = (void *)s;
342 size = (int)(e - s);
343
344 /* Grow the blocks, if needed */
345 r = assure_empty(info, 1);
346 if (r < 0)
347 return r;
348
349 blk = get_slot(info);
350 blk->start = start;
351 blk->size = size;
352 blk->owner = NULL;
353
354 attach_free_block(info, blk);
355
356 return 0;
357}
358
359/* Detatch given address range, splits free block if needed. */
360void *rh_detach_region(rh_info_t * info, void *start, int size)
361{
362 struct list_head *l;
363 rh_block_t *blk, *newblk;
364 unsigned long s, e, m, bs, be;
365
366 /* Validate size */
367 if (size <= 0)
368 return ERR_PTR(-EINVAL);
369
370 /* The region must be aligned */
371 s = (unsigned long)start;
372 e = s + size;
373 m = info->alignment - 1;
374
375 /* Round start up */
376 s = (s + m) & ~m;
377
378 /* Round end down */
379 e = e & ~m;
380
381 if (assure_empty(info, 1) < 0)
382 return ERR_PTR(-ENOMEM);
383
384 blk = NULL;
385 list_for_each(l, &info->free_list) {
386 blk = list_entry(l, rh_block_t, list);
387 /* The range must lie entirely inside one free block */
388 bs = (unsigned long)blk->start;
389 be = (unsigned long)blk->start + blk->size;
390 if (s >= bs && e <= be)
391 break;
392 blk = NULL;
393 }
394
395 if (blk == NULL)
396 return ERR_PTR(-ENOMEM);
397
398 /* Perfect fit */
399 if (bs == s && be == e) {
400 /* Delete from free list, release slot */
401 list_del(&blk->list);
402 release_slot(info, blk);
403 return (void *)s;
404 }
405
406 /* blk still in free list, with updated start and/or size */
407 if (bs == s || be == e) {
408 if (bs == s)
409 blk->start = (int8_t *)blk->start + size;
410 blk->size -= size;
411
412 } else {
413 /* The front free fragment */
414 blk->size = s - bs;
415
416 /* the back free fragment */
417 newblk = get_slot(info);
418 newblk->start = (void *)e;
419 newblk->size = be - e;
420
421 list_add(&newblk->list, &blk->list);
422 }
423
424 return (void *)s;
425}
426
427void *rh_alloc(rh_info_t * info, int size, const char *owner)
428{
429 struct list_head *l;
430 rh_block_t *blk;
431 rh_block_t *newblk;
432 void *start;
433
434 /* Validate size */
435 if (size <= 0)
436 return ERR_PTR(-EINVAL);
437
438 /* Align to configured alignment */
439 size = (size + (info->alignment - 1)) & ~(info->alignment - 1);
440
441 if (assure_empty(info, 1) < 0)
442 return ERR_PTR(-ENOMEM);
443
444 blk = NULL;
445 list_for_each(l, &info->free_list) {
446 blk = list_entry(l, rh_block_t, list);
447 if (size <= blk->size)
448 break;
449 blk = NULL;
450 }
451
452 if (blk == NULL)
453 return ERR_PTR(-ENOMEM);
454
455 /* Just fits */
456 if (blk->size == size) {
457 /* Move from free list to taken list */
458 list_del(&blk->list);
459 blk->owner = owner;
460 start = blk->start;
461
462 attach_taken_block(info, blk);
463
464 return start;
465 }
466
467 newblk = get_slot(info);
468 newblk->start = blk->start;
469 newblk->size = size;
470 newblk->owner = owner;
471
472 /* blk still in free list, with updated start, size */
473 blk->start = (int8_t *)blk->start + size;
474 blk->size -= size;
475
476 start = newblk->start;
477
478 attach_taken_block(info, newblk);
479
480 return start;
481}
482
483/* allocate at precisely the given address */
484void *rh_alloc_fixed(rh_info_t * info, void *start, int size, const char *owner)
485{
486 struct list_head *l;
487 rh_block_t *blk, *newblk1, *newblk2;
488 unsigned long s, e, m, bs, be;
489
490 /* Validate size */
491 if (size <= 0)
492 return ERR_PTR(-EINVAL);
493
494 /* The region must be aligned */
495 s = (unsigned long)start;
496 e = s + size;
497 m = info->alignment - 1;
498
499 /* Round start up */
500 s = (s + m) & ~m;
501
502 /* Round end down */
503 e = e & ~m;
504
505 if (assure_empty(info, 2) < 0)
506 return ERR_PTR(-ENOMEM);
507
508 blk = NULL;
509 list_for_each(l, &info->free_list) {
510 blk = list_entry(l, rh_block_t, list);
511 /* The range must lie entirely inside one free block */
512 bs = (unsigned long)blk->start;
513 be = (unsigned long)blk->start + blk->size;
514 if (s >= bs && e <= be)
515 break;
516 }
517
518 if (blk == NULL)
519 return ERR_PTR(-ENOMEM);
520
521 /* Perfect fit */
522 if (bs == s && be == e) {
523 /* Move from free list to taken list */
524 list_del(&blk->list);
525 blk->owner = owner;
526
527 start = blk->start;
528 attach_taken_block(info, blk);
529
530 return start;
531
532 }
533
534 /* blk still in free list, with updated start and/or size */
535 if (bs == s || be == e) {
536 if (bs == s)
537 blk->start = (int8_t *)blk->start + size;
538 blk->size -= size;
539
540 } else {
541 /* The front free fragment */
542 blk->size = s - bs;
543
544 /* The back free fragment */
545 newblk2 = get_slot(info);
546 newblk2->start = (void *)e;
547 newblk2->size = be - e;
548
549 list_add(&newblk2->list, &blk->list);
550 }
551
552 newblk1 = get_slot(info);
553 newblk1->start = (void *)s;
554 newblk1->size = e - s;
555 newblk1->owner = owner;
556
557 start = newblk1->start;
558 attach_taken_block(info, newblk1);
559
560 return start;
561}
562
563int rh_free(rh_info_t * info, void *start)
564{
565 rh_block_t *blk, *blk2;
566 struct list_head *l;
567 int size;
568
569 /* Linear search for block */
570 blk = NULL;
571 list_for_each(l, &info->taken_list) {
572 blk2 = list_entry(l, rh_block_t, list);
573 if (start < blk2->start)
574 break;
575 blk = blk2;
576 }
577
578 if (blk == NULL || start > (blk->start + blk->size))
579 return -EINVAL;
580
581 /* Remove from taken list */
582 list_del(&blk->list);
583
584 /* Get size of freed block */
585 size = blk->size;
586 attach_free_block(info, blk);
587
588 return size;
589}
590
591int rh_get_stats(rh_info_t * info, int what, int max_stats, rh_stats_t * stats)
592{
593 rh_block_t *blk;
594 struct list_head *l;
595 struct list_head *h;
596 int nr;
597
598 switch (what) {
599
600 case RHGS_FREE:
601 h = &info->free_list;
602 break;
603
604 case RHGS_TAKEN:
605 h = &info->taken_list;
606 break;
607
608 default:
609 return -EINVAL;
610 }
611
612 /* Linear search for block */
613 nr = 0;
614 list_for_each(l, h) {
615 blk = list_entry(l, rh_block_t, list);
616 if (stats != NULL && nr < max_stats) {
617 stats->start = blk->start;
618 stats->size = blk->size;
619 stats->owner = blk->owner;
620 stats++;
621 }
622 nr++;
623 }
624
625 return nr;
626}
627
628int rh_set_owner(rh_info_t * info, void *start, const char *owner)
629{
630 rh_block_t *blk, *blk2;
631 struct list_head *l;
632 int size;
633
634 /* Linear search for block */
635 blk = NULL;
636 list_for_each(l, &info->taken_list) {
637 blk2 = list_entry(l, rh_block_t, list);
638 if (start < blk2->start)
639 break;
640 blk = blk2;
641 }
642
643 if (blk == NULL || start > (blk->start + blk->size))
644 return -EINVAL;
645
646 blk->owner = owner;
647 size = blk->size;
648
649 return size;
650}
651
652void rh_dump(rh_info_t * info)
653{
654 static rh_stats_t st[32]; /* XXX maximum 32 blocks */
655 int maxnr;
656 int i, nr;
657
658 maxnr = ARRAY_SIZE(st);
659
660 printk(KERN_INFO
661 "info @0x%p (%d slots empty / %d max)\n",
662 info, info->empty_slots, info->max_blocks);
663
664 printk(KERN_INFO " Free:\n");
665 nr = rh_get_stats(info, RHGS_FREE, maxnr, st);
666 if (nr > maxnr)
667 nr = maxnr;
668 for (i = 0; i < nr; i++)
669 printk(KERN_INFO
670 " 0x%p-0x%p (%u)\n",
671 st[i].start, (int8_t *) st[i].start + st[i].size,
672 st[i].size);
673 printk(KERN_INFO "\n");
674
675 printk(KERN_INFO " Taken:\n");
676 nr = rh_get_stats(info, RHGS_TAKEN, maxnr, st);
677 if (nr > maxnr)
678 nr = maxnr;
679 for (i = 0; i < nr; i++)
680 printk(KERN_INFO
681 " 0x%p-0x%p (%u) %s\n",
682 st[i].start, (int8_t *) st[i].start + st[i].size,
683 st[i].size, st[i].owner != NULL ? st[i].owner : "");
684 printk(KERN_INFO "\n");
685}
686
687void rh_dump_blk(rh_info_t * info, rh_block_t * blk)
688{
689 printk(KERN_INFO
690 "blk @0x%p: 0x%p-0x%p (%u)\n",
691 blk, blk->start, (int8_t *) blk->start + blk->size, blk->size);
692}
diff --git a/arch/ppc/syslib/cpm2_common.c b/arch/ppc/syslib/cpm2_common.c
index cbac44b1620c..6cd859d7721f 100644
--- a/arch/ppc/syslib/cpm2_common.c
+++ b/arch/ppc/syslib/cpm2_common.c
@@ -136,15 +136,14 @@ static void cpm2_dpinit(void)
136 * varies with the processor and the microcode patches activated. 136 * varies with the processor and the microcode patches activated.
137 * But the following should be at least safe. 137 * But the following should be at least safe.
138 */ 138 */
139 rh_attach_region(&cpm_dpmem_info, (void *)CPM_DATAONLY_BASE, 139 rh_attach_region(&cpm_dpmem_info, CPM_DATAONLY_BASE, CPM_DATAONLY_SIZE);
140 CPM_DATAONLY_SIZE);
141} 140}
142 141
143/* This function returns an index into the DPRAM area. 142/* This function returns an index into the DPRAM area.
144 */ 143 */
145uint cpm_dpalloc(uint size, uint align) 144unsigned long cpm_dpalloc(uint size, uint align)
146{ 145{
147 void *start; 146 unsigned long start;
148 unsigned long flags; 147 unsigned long flags;
149 148
150 spin_lock_irqsave(&cpm_dpmem_lock, flags); 149 spin_lock_irqsave(&cpm_dpmem_lock, flags);
@@ -152,17 +151,17 @@ uint cpm_dpalloc(uint size, uint align)
152 start = rh_alloc(&cpm_dpmem_info, size, "commproc"); 151 start = rh_alloc(&cpm_dpmem_info, size, "commproc");
153 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 152 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
154 153
155 return (uint)start; 154 return start;
156} 155}
157EXPORT_SYMBOL(cpm_dpalloc); 156EXPORT_SYMBOL(cpm_dpalloc);
158 157
159int cpm_dpfree(uint offset) 158int cpm_dpfree(unsigned long offset)
160{ 159{
161 int ret; 160 int ret;
162 unsigned long flags; 161 unsigned long flags;
163 162
164 spin_lock_irqsave(&cpm_dpmem_lock, flags); 163 spin_lock_irqsave(&cpm_dpmem_lock, flags);
165 ret = rh_free(&cpm_dpmem_info, (void *)offset); 164 ret = rh_free(&cpm_dpmem_info, offset);
166 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 165 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
167 166
168 return ret; 167 return ret;
@@ -170,17 +169,17 @@ int cpm_dpfree(uint offset)
170EXPORT_SYMBOL(cpm_dpfree); 169EXPORT_SYMBOL(cpm_dpfree);
171 170
172/* not sure if this is ever needed */ 171/* not sure if this is ever needed */
173uint cpm_dpalloc_fixed(uint offset, uint size, uint align) 172unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align)
174{ 173{
175 void *start; 174 unsigned long start;
176 unsigned long flags; 175 unsigned long flags;
177 176
178 spin_lock_irqsave(&cpm_dpmem_lock, flags); 177 spin_lock_irqsave(&cpm_dpmem_lock, flags);
179 cpm_dpmem_info.alignment = align; 178 cpm_dpmem_info.alignment = align;
180 start = rh_alloc_fixed(&cpm_dpmem_info, (void *)offset, size, "commproc"); 179 start = rh_alloc_fixed(&cpm_dpmem_info, offset, size, "commproc");
181 spin_unlock_irqrestore(&cpm_dpmem_lock, flags); 180 spin_unlock_irqrestore(&cpm_dpmem_lock, flags);
182 181
183 return (uint)start; 182 return start;
184} 183}
185EXPORT_SYMBOL(cpm_dpalloc_fixed); 184EXPORT_SYMBOL(cpm_dpalloc_fixed);
186 185
@@ -190,7 +189,7 @@ void cpm_dpdump(void)
190} 189}
191EXPORT_SYMBOL(cpm_dpdump); 190EXPORT_SYMBOL(cpm_dpdump);
192 191
193void *cpm_dpram_addr(uint offset) 192void *cpm_dpram_addr(unsigned long offset)
194{ 193{
195 return (void *)&cpm2_immr->im_dprambase[offset]; 194 return (void *)&cpm2_immr->im_dprambase[offset];
196} 195}
diff --git a/drivers/net/fs_enet/mac-scc.c b/drivers/net/fs_enet/mac-scc.c
index d0f28981b55a..7540966687ec 100644
--- a/drivers/net/fs_enet/mac-scc.c
+++ b/drivers/net/fs_enet/mac-scc.c
@@ -167,7 +167,7 @@ static int allocate_bd(struct net_device *dev)
167 167
168 fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) * 168 fep->ring_mem_addr = cpm_dpalloc((fpi->tx_ring + fpi->rx_ring) *
169 sizeof(cbd_t), 8); 169 sizeof(cbd_t), 8);
170 if (IS_DPERR(fep->ring_mem_addr)) 170 if (IS_ERR_VALUE(fep->ring_mem_addr))
171 return -ENOMEM; 171 return -ENOMEM;
172 172
173 fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr); 173 fep->ring_base = cpm_dpram_addr(fep->ring_mem_addr);
diff --git a/drivers/net/ucc_geth.c b/drivers/net/ucc_geth.c
index d7aff8189377..0f667652fda9 100644
--- a/drivers/net/ucc_geth.c
+++ b/drivers/net/ucc_geth.c
@@ -293,7 +293,7 @@ static int fill_init_enet_entries(struct ucc_geth_private *ugeth,
293 else { 293 else {
294 init_enet_offset = 294 init_enet_offset =
295 qe_muram_alloc(thread_size, thread_alignment); 295 qe_muram_alloc(thread_size, thread_alignment);
296 if (IS_MURAM_ERR(init_enet_offset)) { 296 if (IS_ERR_VALUE(init_enet_offset)) {
297 ugeth_err 297 ugeth_err
298 ("fill_init_enet_entries: Can not allocate DPRAM memory."); 298 ("fill_init_enet_entries: Can not allocate DPRAM memory.");
299 qe_put_snum((u8) snum); 299 qe_put_snum((u8) snum);
@@ -2594,7 +2594,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2594 ugeth->tx_bd_ring_offset[j] = 2594 ugeth->tx_bd_ring_offset[j] =
2595 qe_muram_alloc(length, 2595 qe_muram_alloc(length,
2596 UCC_GETH_TX_BD_RING_ALIGNMENT); 2596 UCC_GETH_TX_BD_RING_ALIGNMENT);
2597 if (!IS_MURAM_ERR(ugeth->tx_bd_ring_offset[j])) 2597 if (!IS_ERR_VALUE(ugeth->tx_bd_ring_offset[j]))
2598 ugeth->p_tx_bd_ring[j] = 2598 ugeth->p_tx_bd_ring[j] =
2599 (u8 *) qe_muram_addr(ugeth-> 2599 (u8 *) qe_muram_addr(ugeth->
2600 tx_bd_ring_offset[j]); 2600 tx_bd_ring_offset[j]);
@@ -2629,7 +2629,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2629 ugeth->rx_bd_ring_offset[j] = 2629 ugeth->rx_bd_ring_offset[j] =
2630 qe_muram_alloc(length, 2630 qe_muram_alloc(length,
2631 UCC_GETH_RX_BD_RING_ALIGNMENT); 2631 UCC_GETH_RX_BD_RING_ALIGNMENT);
2632 if (!IS_MURAM_ERR(ugeth->rx_bd_ring_offset[j])) 2632 if (!IS_ERR_VALUE(ugeth->rx_bd_ring_offset[j]))
2633 ugeth->p_rx_bd_ring[j] = 2633 ugeth->p_rx_bd_ring[j] =
2634 (u8 *) qe_muram_addr(ugeth-> 2634 (u8 *) qe_muram_addr(ugeth->
2635 rx_bd_ring_offset[j]); 2635 rx_bd_ring_offset[j]);
@@ -2713,7 +2713,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2713 ugeth->tx_glbl_pram_offset = 2713 ugeth->tx_glbl_pram_offset =
2714 qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram), 2714 qe_muram_alloc(sizeof(struct ucc_geth_tx_global_pram),
2715 UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT); 2715 UCC_GETH_TX_GLOBAL_PRAM_ALIGNMENT);
2716 if (IS_MURAM_ERR(ugeth->tx_glbl_pram_offset)) { 2716 if (IS_ERR_VALUE(ugeth->tx_glbl_pram_offset)) {
2717 ugeth_err 2717 ugeth_err
2718 ("%s: Can not allocate DPRAM memory for p_tx_glbl_pram.", 2718 ("%s: Can not allocate DPRAM memory for p_tx_glbl_pram.",
2719 __FUNCTION__); 2719 __FUNCTION__);
@@ -2735,7 +2735,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2735 sizeof(struct ucc_geth_thread_data_tx) + 2735 sizeof(struct ucc_geth_thread_data_tx) +
2736 32 * (numThreadsTxNumerical == 1), 2736 32 * (numThreadsTxNumerical == 1),
2737 UCC_GETH_THREAD_DATA_ALIGNMENT); 2737 UCC_GETH_THREAD_DATA_ALIGNMENT);
2738 if (IS_MURAM_ERR(ugeth->thread_dat_tx_offset)) { 2738 if (IS_ERR_VALUE(ugeth->thread_dat_tx_offset)) {
2739 ugeth_err 2739 ugeth_err
2740 ("%s: Can not allocate DPRAM memory for p_thread_data_tx.", 2740 ("%s: Can not allocate DPRAM memory for p_thread_data_tx.",
2741 __FUNCTION__); 2741 __FUNCTION__);
@@ -2763,7 +2763,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2763 qe_muram_alloc(ug_info->numQueuesTx * 2763 qe_muram_alloc(ug_info->numQueuesTx *
2764 sizeof(struct ucc_geth_send_queue_qd), 2764 sizeof(struct ucc_geth_send_queue_qd),
2765 UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT); 2765 UCC_GETH_SEND_QUEUE_QUEUE_DESCRIPTOR_ALIGNMENT);
2766 if (IS_MURAM_ERR(ugeth->send_q_mem_reg_offset)) { 2766 if (IS_ERR_VALUE(ugeth->send_q_mem_reg_offset)) {
2767 ugeth_err 2767 ugeth_err
2768 ("%s: Can not allocate DPRAM memory for p_send_q_mem_reg.", 2768 ("%s: Can not allocate DPRAM memory for p_send_q_mem_reg.",
2769 __FUNCTION__); 2769 __FUNCTION__);
@@ -2806,7 +2806,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2806 ugeth->scheduler_offset = 2806 ugeth->scheduler_offset =
2807 qe_muram_alloc(sizeof(struct ucc_geth_scheduler), 2807 qe_muram_alloc(sizeof(struct ucc_geth_scheduler),
2808 UCC_GETH_SCHEDULER_ALIGNMENT); 2808 UCC_GETH_SCHEDULER_ALIGNMENT);
2809 if (IS_MURAM_ERR(ugeth->scheduler_offset)) { 2809 if (IS_ERR_VALUE(ugeth->scheduler_offset)) {
2810 ugeth_err 2810 ugeth_err
2811 ("%s: Can not allocate DPRAM memory for p_scheduler.", 2811 ("%s: Can not allocate DPRAM memory for p_scheduler.",
2812 __FUNCTION__); 2812 __FUNCTION__);
@@ -2854,7 +2854,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2854 qe_muram_alloc(sizeof 2854 qe_muram_alloc(sizeof
2855 (struct ucc_geth_tx_firmware_statistics_pram), 2855 (struct ucc_geth_tx_firmware_statistics_pram),
2856 UCC_GETH_TX_STATISTICS_ALIGNMENT); 2856 UCC_GETH_TX_STATISTICS_ALIGNMENT);
2857 if (IS_MURAM_ERR(ugeth->tx_fw_statistics_pram_offset)) { 2857 if (IS_ERR_VALUE(ugeth->tx_fw_statistics_pram_offset)) {
2858 ugeth_err 2858 ugeth_err
2859 ("%s: Can not allocate DPRAM memory for" 2859 ("%s: Can not allocate DPRAM memory for"
2860 " p_tx_fw_statistics_pram.", __FUNCTION__); 2860 " p_tx_fw_statistics_pram.", __FUNCTION__);
@@ -2893,7 +2893,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2893 ugeth->rx_glbl_pram_offset = 2893 ugeth->rx_glbl_pram_offset =
2894 qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram), 2894 qe_muram_alloc(sizeof(struct ucc_geth_rx_global_pram),
2895 UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT); 2895 UCC_GETH_RX_GLOBAL_PRAM_ALIGNMENT);
2896 if (IS_MURAM_ERR(ugeth->rx_glbl_pram_offset)) { 2896 if (IS_ERR_VALUE(ugeth->rx_glbl_pram_offset)) {
2897 ugeth_err 2897 ugeth_err
2898 ("%s: Can not allocate DPRAM memory for p_rx_glbl_pram.", 2898 ("%s: Can not allocate DPRAM memory for p_rx_glbl_pram.",
2899 __FUNCTION__); 2899 __FUNCTION__);
@@ -2914,7 +2914,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2914 qe_muram_alloc(numThreadsRxNumerical * 2914 qe_muram_alloc(numThreadsRxNumerical *
2915 sizeof(struct ucc_geth_thread_data_rx), 2915 sizeof(struct ucc_geth_thread_data_rx),
2916 UCC_GETH_THREAD_DATA_ALIGNMENT); 2916 UCC_GETH_THREAD_DATA_ALIGNMENT);
2917 if (IS_MURAM_ERR(ugeth->thread_dat_rx_offset)) { 2917 if (IS_ERR_VALUE(ugeth->thread_dat_rx_offset)) {
2918 ugeth_err 2918 ugeth_err
2919 ("%s: Can not allocate DPRAM memory for p_thread_data_rx.", 2919 ("%s: Can not allocate DPRAM memory for p_thread_data_rx.",
2920 __FUNCTION__); 2920 __FUNCTION__);
@@ -2937,7 +2937,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2937 qe_muram_alloc(sizeof 2937 qe_muram_alloc(sizeof
2938 (struct ucc_geth_rx_firmware_statistics_pram), 2938 (struct ucc_geth_rx_firmware_statistics_pram),
2939 UCC_GETH_RX_STATISTICS_ALIGNMENT); 2939 UCC_GETH_RX_STATISTICS_ALIGNMENT);
2940 if (IS_MURAM_ERR(ugeth->rx_fw_statistics_pram_offset)) { 2940 if (IS_ERR_VALUE(ugeth->rx_fw_statistics_pram_offset)) {
2941 ugeth_err 2941 ugeth_err
2942 ("%s: Can not allocate DPRAM memory for" 2942 ("%s: Can not allocate DPRAM memory for"
2943 " p_rx_fw_statistics_pram.", __FUNCTION__); 2943 " p_rx_fw_statistics_pram.", __FUNCTION__);
@@ -2959,7 +2959,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
2959 qe_muram_alloc(ug_info->numQueuesRx * 2959 qe_muram_alloc(ug_info->numQueuesRx *
2960 sizeof(struct ucc_geth_rx_interrupt_coalescing_entry) 2960 sizeof(struct ucc_geth_rx_interrupt_coalescing_entry)
2961 + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT); 2961 + 4, UCC_GETH_RX_INTERRUPT_COALESCING_ALIGNMENT);
2962 if (IS_MURAM_ERR(ugeth->rx_irq_coalescing_tbl_offset)) { 2962 if (IS_ERR_VALUE(ugeth->rx_irq_coalescing_tbl_offset)) {
2963 ugeth_err 2963 ugeth_err
2964 ("%s: Can not allocate DPRAM memory for" 2964 ("%s: Can not allocate DPRAM memory for"
2965 " p_rx_irq_coalescing_tbl.", __FUNCTION__); 2965 " p_rx_irq_coalescing_tbl.", __FUNCTION__);
@@ -3027,7 +3027,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3027 (sizeof(struct ucc_geth_rx_bd_queues_entry) + 3027 (sizeof(struct ucc_geth_rx_bd_queues_entry) +
3028 sizeof(struct ucc_geth_rx_prefetched_bds)), 3028 sizeof(struct ucc_geth_rx_prefetched_bds)),
3029 UCC_GETH_RX_BD_QUEUES_ALIGNMENT); 3029 UCC_GETH_RX_BD_QUEUES_ALIGNMENT);
3030 if (IS_MURAM_ERR(ugeth->rx_bd_qs_tbl_offset)) { 3030 if (IS_ERR_VALUE(ugeth->rx_bd_qs_tbl_offset)) {
3031 ugeth_err 3031 ugeth_err
3032 ("%s: Can not allocate DPRAM memory for p_rx_bd_qs_tbl.", 3032 ("%s: Can not allocate DPRAM memory for p_rx_bd_qs_tbl.",
3033 __FUNCTION__); 3033 __FUNCTION__);
@@ -3116,7 +3116,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3116 ugeth->exf_glbl_param_offset = 3116 ugeth->exf_glbl_param_offset =
3117 qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram), 3117 qe_muram_alloc(sizeof(struct ucc_geth_exf_global_pram),
3118 UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT); 3118 UCC_GETH_RX_EXTENDED_FILTERING_GLOBAL_PARAMETERS_ALIGNMENT);
3119 if (IS_MURAM_ERR(ugeth->exf_glbl_param_offset)) { 3119 if (IS_ERR_VALUE(ugeth->exf_glbl_param_offset)) {
3120 ugeth_err 3120 ugeth_err
3121 ("%s: Can not allocate DPRAM memory for" 3121 ("%s: Can not allocate DPRAM memory for"
3122 " p_exf_glbl_param.", __FUNCTION__); 3122 " p_exf_glbl_param.", __FUNCTION__);
@@ -3258,7 +3258,7 @@ static int ucc_geth_startup(struct ucc_geth_private *ugeth)
3258 3258
3259 /* Allocate InitEnet command parameter structure */ 3259 /* Allocate InitEnet command parameter structure */
3260 init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4); 3260 init_enet_pram_offset = qe_muram_alloc(sizeof(struct ucc_geth_init_pram), 4);
3261 if (IS_MURAM_ERR(init_enet_pram_offset)) { 3261 if (IS_ERR_VALUE(init_enet_pram_offset)) {
3262 ugeth_err 3262 ugeth_err
3263 ("%s: Can not allocate DPRAM memory for p_init_enet_pram.", 3263 ("%s: Can not allocate DPRAM memory for p_init_enet_pram.",
3264 __FUNCTION__); 3264 __FUNCTION__);
diff --git a/drivers/serial/cpm_uart/cpm_uart.h b/drivers/serial/cpm_uart/cpm_uart.h
index 69715e556506..a8f894c78194 100644
--- a/drivers/serial/cpm_uart/cpm_uart.h
+++ b/drivers/serial/cpm_uart/cpm_uart.h
@@ -88,7 +88,7 @@ extern struct uart_cpm_port cpm_uart_ports[UART_NR];
88 88
89/* these are located in their respective files */ 89/* these are located in their respective files */
90void cpm_line_cr_cmd(int line, int cmd); 90void cpm_line_cr_cmd(int line, int cmd);
91int __init cpm_uart_init_portdesc(void); 91int cpm_uart_init_portdesc(void);
92int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con); 92int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con);
93void cpm_uart_freebuf(struct uart_cpm_port *pinfo); 93void cpm_uart_freebuf(struct uart_cpm_port *pinfo);
94 94
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c b/drivers/serial/cpm_uart/cpm_uart_core.c
index f23972bc00c0..b63ff8dd7304 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -482,7 +482,8 @@ static void cpm_uart_shutdown(struct uart_port *port)
482} 482}
483 483
484static void cpm_uart_set_termios(struct uart_port *port, 484static void cpm_uart_set_termios(struct uart_port *port,
485 struct termios *termios, struct termios *old) 485 struct ktermios *termios,
486 struct ktermios *old)
486{ 487{
487 int baud; 488 int baud;
488 unsigned long flags; 489 unsigned long flags;
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm1.c b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
index 925fb607d8c4..8c6324ed0202 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm1.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm1.c
@@ -125,7 +125,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
125{ 125{
126 int dpmemsz, memsz; 126 int dpmemsz, memsz;
127 u8 *dp_mem; 127 u8 *dp_mem;
128 uint dp_offset; 128 unsigned long dp_offset;
129 u8 *mem_addr; 129 u8 *mem_addr;
130 dma_addr_t dma_addr = 0; 130 dma_addr_t dma_addr = 0;
131 131
@@ -133,7 +133,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
133 133
134 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); 134 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
135 dp_offset = cpm_dpalloc(dpmemsz, 8); 135 dp_offset = cpm_dpalloc(dpmemsz, 8);
136 if (IS_DPERR(dp_offset)) { 136 if (IS_ERR_VALUE(dp_offset)) {
137 printk(KERN_ERR 137 printk(KERN_ERR
138 "cpm_uart_cpm1.c: could not allocate buffer descriptors\n"); 138 "cpm_uart_cpm1.c: could not allocate buffer descriptors\n");
139 return -ENOMEM; 139 return -ENOMEM;
@@ -185,7 +185,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
185} 185}
186 186
187/* Setup any dynamic params in the uart desc */ 187/* Setup any dynamic params in the uart desc */
188int __init cpm_uart_init_portdesc(void) 188int cpm_uart_init_portdesc(void)
189{ 189{
190 pr_debug("CPM uart[-]:init portdesc\n"); 190 pr_debug("CPM uart[-]:init portdesc\n");
191 191
diff --git a/drivers/serial/cpm_uart/cpm_uart_cpm2.c b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
index fa455996ad8f..7b61d805ebe9 100644
--- a/drivers/serial/cpm_uart/cpm_uart_cpm2.c
+++ b/drivers/serial/cpm_uart/cpm_uart_cpm2.c
@@ -222,7 +222,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
222{ 222{
223 int dpmemsz, memsz; 223 int dpmemsz, memsz;
224 u8 *dp_mem; 224 u8 *dp_mem;
225 uint dp_offset; 225 unsigned long dp_offset;
226 u8 *mem_addr; 226 u8 *mem_addr;
227 dma_addr_t dma_addr = 0; 227 dma_addr_t dma_addr = 0;
228 228
@@ -230,7 +230,7 @@ int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
230 230
231 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos); 231 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
232 dp_offset = cpm_dpalloc(dpmemsz, 8); 232 dp_offset = cpm_dpalloc(dpmemsz, 8);
233 if (IS_DPERR(dp_offset)) { 233 if (IS_ERR_VALUE(dp_offset)) {
234 printk(KERN_ERR 234 printk(KERN_ERR
235 "cpm_uart_cpm.c: could not allocate buffer descriptors\n"); 235 "cpm_uart_cpm.c: could not allocate buffer descriptors\n");
236 return -ENOMEM; 236 return -ENOMEM;
@@ -282,7 +282,7 @@ void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
282} 282}
283 283
284/* Setup any dynamic params in the uart desc */ 284/* Setup any dynamic params in the uart desc */
285int __init cpm_uart_init_portdesc(void) 285int cpm_uart_init_portdesc(void)
286{ 286{
287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2) 287#if defined(CONFIG_SERIAL_CPM_SMC1) || defined(CONFIG_SERIAL_CPM_SMC2)
288 u16 *addr; 288 u16 *addr;
diff --git a/include/asm-powerpc/mmu-hash64.h b/include/asm-powerpc/mmu-hash64.h
index e2ca55bcfe0b..b8dca30bd0b5 100644
--- a/include/asm-powerpc/mmu-hash64.h
+++ b/include/asm-powerpc/mmu-hash64.h
@@ -73,8 +73,9 @@ extern char initial_stab[];
73 73
74#define HPTES_PER_GROUP 8 74#define HPTES_PER_GROUP 8
75 75
76#define HPTE_V_SSIZE_SHIFT 62
76#define HPTE_V_AVPN_SHIFT 7 77#define HPTE_V_AVPN_SHIFT 7
77#define HPTE_V_AVPN ASM_CONST(0xffffffffffffff80) 78#define HPTE_V_AVPN ASM_CONST(0x3fffffffffffff80)
78#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT) 79#define HPTE_V_AVPN_VAL(x) (((x) & HPTE_V_AVPN) >> HPTE_V_AVPN_SHIFT)
79#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN)) 80#define HPTE_V_COMPARE(x,y) (!(((x) ^ (y)) & HPTE_V_AVPN))
80#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010) 81#define HPTE_V_BOLTED ASM_CONST(0x0000000000000010)
@@ -151,6 +152,15 @@ struct mmu_psize_def
151#define MMU_PAGE_16G 5 /* 16G */ 152#define MMU_PAGE_16G 5 /* 16G */
152#define MMU_PAGE_COUNT 6 153#define MMU_PAGE_COUNT 6
153 154
155/*
156 * Segment sizes.
157 * These are the values used by hardware in the B field of
158 * SLB entries and the first dword of MMU hashtable entries.
159 * The B field is 2 bits; the values 2 and 3 are unused and reserved.
160 */
161#define MMU_SEGSIZE_256M 0
162#define MMU_SEGSIZE_1T 1
163
154#ifndef __ASSEMBLY__ 164#ifndef __ASSEMBLY__
155 165
156/* 166/*
diff --git a/include/asm-powerpc/mmzone.h b/include/asm-powerpc/mmzone.h
index d484ca94cb7c..19f299b7e256 100644
--- a/include/asm-powerpc/mmzone.h
+++ b/include/asm-powerpc/mmzone.h
@@ -43,9 +43,5 @@ extern unsigned long max_pfn;
43 43
44#endif /* CONFIG_NEED_MULTIPLE_NODES */ 44#endif /* CONFIG_NEED_MULTIPLE_NODES */
45 45
46#ifdef CONFIG_HAVE_ARCH_EARLY_PFN_TO_NID
47extern int __init early_pfn_to_nid(unsigned long pfn);
48#endif
49
50#endif /* __KERNEL__ */ 46#endif /* __KERNEL__ */
51#endif /* _ASM_MMZONE_H_ */ 47#endif /* _ASM_MMZONE_H_ */
diff --git a/include/asm-powerpc/ppc-pci.h b/include/asm-powerpc/ppc-pci.h
index 6dcd7a811fe1..8e2005159ffd 100644
--- a/include/asm-powerpc/ppc-pci.h
+++ b/include/asm-powerpc/ppc-pci.h
@@ -62,11 +62,14 @@ struct pci_dev *pci_get_device_by_addr(unsigned long addr);
62 62
63/** 63/**
64 * eeh_slot_error_detail -- record and EEH error condition to the log 64 * eeh_slot_error_detail -- record and EEH error condition to the log
65 * @severity: 1 if temporary, 2 if permanent failure. 65 * @pdn: pci device node
66 * @severity: EEH_LOG_TEMP_FAILURE or EEH_LOG_PERM_FAILURE
66 * 67 *
67 * Obtains the EEH error details from the RTAS subsystem, 68 * Obtains the EEH error details from the RTAS subsystem,
68 * and then logs these details with the RTAS error log system. 69 * and then logs these details with the RTAS error log system.
69 */ 70 */
71#define EEH_LOG_TEMP_FAILURE 1
72#define EEH_LOG_PERM_FAILURE 2
70void eeh_slot_error_detail (struct pci_dn *pdn, int severity); 73void eeh_slot_error_detail (struct pci_dn *pdn, int severity);
71 74
72/** 75/**
@@ -82,6 +85,7 @@ int rtas_pci_enable(struct pci_dn *pdn, int function);
82 85
83/** 86/**
84 * rtas_set_slot_reset -- unfreeze a frozen slot 87 * rtas_set_slot_reset -- unfreeze a frozen slot
88 * @pdn: pci device node
85 * 89 *
86 * Clear the EEH-frozen condition on a slot. This routine 90 * Clear the EEH-frozen condition on a slot. This routine
87 * does this by asserting the PCI #RST line for 1/8th of 91 * does this by asserting the PCI #RST line for 1/8th of
@@ -95,6 +99,7 @@ int eeh_wait_for_slot_status(struct pci_dn *pdn, int max_wait_msecs);
95 99
96/** 100/**
97 * eeh_restore_bars - Restore device configuration info. 101 * eeh_restore_bars - Restore device configuration info.
102 * @pdn: pci device node
98 * 103 *
99 * A reset of a PCI device will clear out its config space. 104 * A reset of a PCI device will clear out its config space.
100 * This routines will restore the config space for this 105 * This routines will restore the config space for this
@@ -105,6 +110,7 @@ void eeh_restore_bars(struct pci_dn *);
105 110
106/** 111/**
107 * rtas_configure_bridge -- firmware initialization of pci bridge 112 * rtas_configure_bridge -- firmware initialization of pci bridge
113 * @pdn: pci device node
108 * 114 *
109 * Ask the firmware to configure all PCI bridges devices 115 * Ask the firmware to configure all PCI bridges devices
110 * located behind the indicated node. Required after a 116 * located behind the indicated node. Required after a
@@ -118,16 +124,22 @@ int rtas_write_config(struct pci_dn *, int where, int size, u32 val);
118int rtas_read_config(struct pci_dn *, int where, int size, u32 *val); 124int rtas_read_config(struct pci_dn *, int where, int size, u32 *val);
119 125
120/** 126/**
127 * eeh_mark_slot -- set mode flags for pertition endpoint
128 * @pdn: pci device node
129 *
121 * mark and clear slots: find "partition endpoint" PE and set or 130 * mark and clear slots: find "partition endpoint" PE and set or
122 * clear the flags for each subnode of the PE. 131 * clear the flags for each subnode of the PE.
123 */ 132 */
124void eeh_mark_slot (struct device_node *dn, int mode_flag); 133void eeh_mark_slot (struct device_node *dn, int mode_flag);
125void eeh_clear_slot (struct device_node *dn, int mode_flag); 134void eeh_clear_slot (struct device_node *dn, int mode_flag);
126 135
127/* Find the associated "Partiationable Endpoint" PE */ 136/**
137 * find_device_pe -- Find the associated "Partiationable Endpoint" PE
138 * @pdn: pci device node
139 */
128struct device_node * find_device_pe(struct device_node *dn); 140struct device_node * find_device_pe(struct device_node *dn);
129 141
130#endif 142#endif /* CONFIG_EEH */
131 143
132#else /* CONFIG_PCI */ 144#else /* CONFIG_PCI */
133static inline void find_and_init_phbs(void) { } 145static inline void find_and_init_phbs(void) { }
diff --git a/include/asm-powerpc/ps3.h b/include/asm-powerpc/ps3.h
index 13c372df99e8..1e04651eedc4 100644
--- a/include/asm-powerpc/ps3.h
+++ b/include/asm-powerpc/ps3.h
@@ -377,8 +377,13 @@ int ps3_vuart_port_device_register(struct ps3_vuart_port_device *dev);
377 377
378/* system manager */ 378/* system manager */
379 379
380#ifdef CONFIG_PS3_SYS_MANAGER
380void ps3_sys_manager_restart(void); 381void ps3_sys_manager_restart(void);
381void ps3_sys_manager_power_off(void); 382void ps3_sys_manager_power_off(void);
383#else
384static inline void ps3_sys_manager_restart(void) {}
385static inline void ps3_sys_manager_power_off(void) {}
386#endif
382 387
383struct ps3_prealloc { 388struct ps3_prealloc {
384 const char *name; 389 const char *name;
diff --git a/include/asm-powerpc/qe.h b/include/asm-powerpc/qe.h
index a62168ec535f..9d304b1f1608 100644
--- a/include/asm-powerpc/qe.h
+++ b/include/asm-powerpc/qe.h
@@ -38,11 +38,11 @@ int qe_issue_cmd(u32 cmd, u32 device, u8 mcn_protocol, u32 cmd_input);
38void qe_setbrg(u32 brg, u32 rate); 38void qe_setbrg(u32 brg, u32 rate);
39int qe_get_snum(void); 39int qe_get_snum(void);
40void qe_put_snum(u8 snum); 40void qe_put_snum(u8 snum);
41u32 qe_muram_alloc(u32 size, u32 align); 41unsigned long qe_muram_alloc(int size, int align);
42int qe_muram_free(u32 offset); 42int qe_muram_free(unsigned long offset);
43u32 qe_muram_alloc_fixed(u32 offset, u32 size); 43unsigned long qe_muram_alloc_fixed(unsigned long offset, int size);
44void qe_muram_dump(void); 44void qe_muram_dump(void);
45void *qe_muram_addr(u32 offset); 45void *qe_muram_addr(unsigned long offset);
46 46
47/* Buffer descriptors */ 47/* Buffer descriptors */
48struct qe_bd { 48struct qe_bd {
@@ -448,10 +448,5 @@ struct ucc_slow_pram {
448#define UCC_FAST_FUNCTION_CODE_DTB_LCL 0x02 448#define UCC_FAST_FUNCTION_CODE_DTB_LCL 0x02
449#define UCC_FAST_FUNCTION_CODE_BDB_LCL 0x01 449#define UCC_FAST_FUNCTION_CODE_BDB_LCL 0x01
450 450
451static inline long IS_MURAM_ERR(const u32 offset)
452{
453 return offset > (u32) - 1000L;
454}
455
456#endif /* __KERNEL__ */ 451#endif /* __KERNEL__ */
457#endif /* _ASM_POWERPC_QE_H */ 452#endif /* _ASM_POWERPC_QE_H */
diff --git a/include/asm-powerpc/reg_booke.h b/include/asm-powerpc/reg_booke.h
new file mode 100644
index 000000000000..064405c207bf
--- /dev/null
+++ b/include/asm-powerpc/reg_booke.h
@@ -0,0 +1,469 @@
1/*
2 * Contains register definitions common to the Book E PowerPC
3 * specification. Notice that while the IBM-40x series of CPUs
4 * are not true Book E PowerPCs, they borrowed a number of features
5 * before Book E was finalized, and are included here as well. Unfortunatly,
6 * they sometimes used different locations than true Book E CPUs did.
7 */
8#ifdef __KERNEL__
9#ifndef __ASM_POWERPC_REG_BOOKE_H__
10#define __ASM_POWERPC_REG_BOOKE_H__
11
12#ifndef __ASSEMBLY__
13/* Performance Monitor Registers */
14#define mfpmr(rn) ({unsigned int rval; \
15 asm volatile("mfpmr %0," __stringify(rn) \
16 : "=r" (rval)); rval;})
17#define mtpmr(rn, v) asm volatile("mtpmr " __stringify(rn) ",%0" : : "r" (v))
18#endif /* __ASSEMBLY__ */
19
20/* Freescale Book E Performance Monitor APU Registers */
21#define PMRN_PMC0 0x010 /* Performance Monitor Counter 0 */
22#define PMRN_PMC1 0x011 /* Performance Monitor Counter 1 */
23#define PMRN_PMC2 0x012 /* Performance Monitor Counter 1 */
24#define PMRN_PMC3 0x013 /* Performance Monitor Counter 1 */
25#define PMRN_PMLCA0 0x090 /* PM Local Control A0 */
26#define PMRN_PMLCA1 0x091 /* PM Local Control A1 */
27#define PMRN_PMLCA2 0x092 /* PM Local Control A2 */
28#define PMRN_PMLCA3 0x093 /* PM Local Control A3 */
29
30#define PMLCA_FC 0x80000000 /* Freeze Counter */
31#define PMLCA_FCS 0x40000000 /* Freeze in Supervisor */
32#define PMLCA_FCU 0x20000000 /* Freeze in User */
33#define PMLCA_FCM1 0x10000000 /* Freeze when PMM==1 */
34#define PMLCA_FCM0 0x08000000 /* Freeze when PMM==0 */
35#define PMLCA_CE 0x04000000 /* Condition Enable */
36
37#define PMLCA_EVENT_MASK 0x007f0000 /* Event field */
38#define PMLCA_EVENT_SHIFT 16
39
40#define PMRN_PMLCB0 0x110 /* PM Local Control B0 */
41#define PMRN_PMLCB1 0x111 /* PM Local Control B1 */
42#define PMRN_PMLCB2 0x112 /* PM Local Control B2 */
43#define PMRN_PMLCB3 0x113 /* PM Local Control B3 */
44
45#define PMLCB_THRESHMUL_MASK 0x0700 /* Threshhold Multiple Field */
46#define PMLCB_THRESHMUL_SHIFT 8
47
48#define PMLCB_THRESHOLD_MASK 0x003f /* Threshold Field */
49#define PMLCB_THRESHOLD_SHIFT 0
50
51#define PMRN_PMGC0 0x190 /* PM Global Control 0 */
52
53#define PMGC0_FAC 0x80000000 /* Freeze all Counters */
54#define PMGC0_PMIE 0x40000000 /* Interrupt Enable */
55#define PMGC0_FCECE 0x20000000 /* Freeze countes on
56 Enabled Condition or
57 Event */
58
59#define PMRN_UPMC0 0x000 /* User Performance Monitor Counter 0 */
60#define PMRN_UPMC1 0x001 /* User Performance Monitor Counter 1 */
61#define PMRN_UPMC2 0x002 /* User Performance Monitor Counter 1 */
62#define PMRN_UPMC3 0x003 /* User Performance Monitor Counter 1 */
63#define PMRN_UPMLCA0 0x080 /* User PM Local Control A0 */
64#define PMRN_UPMLCA1 0x081 /* User PM Local Control A1 */
65#define PMRN_UPMLCA2 0x082 /* User PM Local Control A2 */
66#define PMRN_UPMLCA3 0x083 /* User PM Local Control A3 */
67#define PMRN_UPMLCB0 0x100 /* User PM Local Control B0 */
68#define PMRN_UPMLCB1 0x101 /* User PM Local Control B1 */
69#define PMRN_UPMLCB2 0x102 /* User PM Local Control B2 */
70#define PMRN_UPMLCB3 0x103 /* User PM Local Control B3 */
71#define PMRN_UPMGC0 0x180 /* User PM Global Control 0 */
72
73
74/* Machine State Register (MSR) Fields */
75#define MSR_UCLE (1<<26) /* User-mode cache lock enable */
76#define MSR_SPE (1<<25) /* Enable SPE */
77#define MSR_DWE (1<<10) /* Debug Wait Enable */
78#define MSR_UBLE (1<<10) /* BTB lock enable (e500) */
79#define MSR_IS MSR_IR /* Instruction Space */
80#define MSR_DS MSR_DR /* Data Space */
81#define MSR_PMM (1<<2) /* Performance monitor mark bit */
82
83/* Default MSR for kernel mode. */
84#if defined (CONFIG_40x)
85#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
86#elif defined(CONFIG_BOOKE)
87#define MSR_KERNEL (MSR_ME|MSR_RI|MSR_CE)
88#endif
89
90/* Special Purpose Registers (SPRNs)*/
91#define SPRN_DECAR 0x036 /* Decrementer Auto Reload Register */
92#define SPRN_IVPR 0x03F /* Interrupt Vector Prefix Register */
93#define SPRN_USPRG0 0x100 /* User Special Purpose Register General 0 */
94#define SPRN_SPRG4R 0x104 /* Special Purpose Register General 4 Read */
95#define SPRN_SPRG5R 0x105 /* Special Purpose Register General 5 Read */
96#define SPRN_SPRG6R 0x106 /* Special Purpose Register General 6 Read */
97#define SPRN_SPRG7R 0x107 /* Special Purpose Register General 7 Read */
98#define SPRN_SPRG4W 0x114 /* Special Purpose Register General 4 Write */
99#define SPRN_SPRG5W 0x115 /* Special Purpose Register General 5 Write */
100#define SPRN_SPRG6W 0x116 /* Special Purpose Register General 6 Write */
101#define SPRN_SPRG7W 0x117 /* Special Purpose Register General 7 Write */
102#define SPRN_DBCR2 0x136 /* Debug Control Register 2 */
103#define SPRN_IAC3 0x13A /* Instruction Address Compare 3 */
104#define SPRN_IAC4 0x13B /* Instruction Address Compare 4 */
105#define SPRN_DVC1 0x13E /* Data Value Compare Register 1 */
106#define SPRN_DVC2 0x13F /* Data Value Compare Register 2 */
107#define SPRN_IVOR0 0x190 /* Interrupt Vector Offset Register 0 */
108#define SPRN_IVOR1 0x191 /* Interrupt Vector Offset Register 1 */
109#define SPRN_IVOR2 0x192 /* Interrupt Vector Offset Register 2 */
110#define SPRN_IVOR3 0x193 /* Interrupt Vector Offset Register 3 */
111#define SPRN_IVOR4 0x194 /* Interrupt Vector Offset Register 4 */
112#define SPRN_IVOR5 0x195 /* Interrupt Vector Offset Register 5 */
113#define SPRN_IVOR6 0x196 /* Interrupt Vector Offset Register 6 */
114#define SPRN_IVOR7 0x197 /* Interrupt Vector Offset Register 7 */
115#define SPRN_IVOR8 0x198 /* Interrupt Vector Offset Register 8 */
116#define SPRN_IVOR9 0x199 /* Interrupt Vector Offset Register 9 */
117#define SPRN_IVOR10 0x19A /* Interrupt Vector Offset Register 10 */
118#define SPRN_IVOR11 0x19B /* Interrupt Vector Offset Register 11 */
119#define SPRN_IVOR12 0x19C /* Interrupt Vector Offset Register 12 */
120#define SPRN_IVOR13 0x19D /* Interrupt Vector Offset Register 13 */
121#define SPRN_IVOR14 0x19E /* Interrupt Vector Offset Register 14 */
122#define SPRN_IVOR15 0x19F /* Interrupt Vector Offset Register 15 */
123#define SPRN_SPEFSCR 0x200 /* SPE & Embedded FP Status & Control */
124#define SPRN_BBEAR 0x201 /* Branch Buffer Entry Address Register */
125#define SPRN_BBTAR 0x202 /* Branch Buffer Target Address Register */
126#define SPRN_IVOR32 0x210 /* Interrupt Vector Offset Register 32 */
127#define SPRN_IVOR33 0x211 /* Interrupt Vector Offset Register 33 */
128#define SPRN_IVOR34 0x212 /* Interrupt Vector Offset Register 34 */
129#define SPRN_IVOR35 0x213 /* Interrupt Vector Offset Register 35 */
130#define SPRN_MCSRR0 0x23A /* Machine Check Save and Restore Register 0 */
131#define SPRN_MCSRR1 0x23B /* Machine Check Save and Restore Register 1 */
132#define SPRN_MCSR 0x23C /* Machine Check Status Register */
133#define SPRN_MCAR 0x23D /* Machine Check Address Register */
134#define SPRN_DSRR0 0x23E /* Debug Save and Restore Register 0 */
135#define SPRN_DSRR1 0x23F /* Debug Save and Restore Register 1 */
136#define SPRN_MAS0 0x270 /* MMU Assist Register 0 */
137#define SPRN_MAS1 0x271 /* MMU Assist Register 1 */
138#define SPRN_MAS2 0x272 /* MMU Assist Register 2 */
139#define SPRN_MAS3 0x273 /* MMU Assist Register 3 */
140#define SPRN_MAS4 0x274 /* MMU Assist Register 4 */
141#define SPRN_MAS5 0x275 /* MMU Assist Register 5 */
142#define SPRN_MAS6 0x276 /* MMU Assist Register 6 */
143#define SPRN_MAS7 0x3b0 /* MMU Assist Register 7 */
144#define SPRN_PID1 0x279 /* Process ID Register 1 */
145#define SPRN_PID2 0x27A /* Process ID Register 2 */
146#define SPRN_TLB0CFG 0x2B0 /* TLB 0 Config Register */
147#define SPRN_TLB1CFG 0x2B1 /* TLB 1 Config Register */
148#define SPRN_CCR1 0x378 /* Core Configuration Register 1 */
149#define SPRN_ZPR 0x3B0 /* Zone Protection Register (40x) */
150#define SPRN_MMUCR 0x3B2 /* MMU Control Register */
151#define SPRN_CCR0 0x3B3 /* Core Configuration Register 0 */
152#define SPRN_SGR 0x3B9 /* Storage Guarded Register */
153#define SPRN_DCWR 0x3BA /* Data Cache Write-thru Register */
154#define SPRN_SLER 0x3BB /* Little-endian real mode */
155#define SPRN_SU0R 0x3BC /* "User 0" real mode (40x) */
156#define SPRN_DCMP 0x3D1 /* Data TLB Compare Register */
157#define SPRN_ICDBDR 0x3D3 /* Instruction Cache Debug Data Register */
158#define SPRN_EVPR 0x3D6 /* Exception Vector Prefix Register */
159#define SPRN_L1CSR0 0x3F2 /* L1 Cache Control and Status Register 0 */
160#define SPRN_L1CSR1 0x3F3 /* L1 Cache Control and Status Register 1 */
161#define SPRN_PIT 0x3DB /* Programmable Interval Timer */
162#define SPRN_DCCR 0x3FA /* Data Cache Cacheability Register */
163#define SPRN_ICCR 0x3FB /* Instruction Cache Cacheability Register */
164#define SPRN_SVR 0x3FF /* System Version Register */
165
166/*
167 * SPRs which have conflicting definitions on true Book E versus classic,
168 * or IBM 40x.
169 */
170#ifdef CONFIG_BOOKE
171#define SPRN_PID 0x030 /* Process ID */
172#define SPRN_PID0 SPRN_PID/* Process ID Register 0 */
173#define SPRN_CSRR0 0x03A /* Critical Save and Restore Register 0 */
174#define SPRN_CSRR1 0x03B /* Critical Save and Restore Register 1 */
175#define SPRN_DEAR 0x03D /* Data Error Address Register */
176#define SPRN_ESR 0x03E /* Exception Syndrome Register */
177#define SPRN_PIR 0x11E /* Processor Identification Register */
178#define SPRN_DBSR 0x130 /* Debug Status Register */
179#define SPRN_DBCR0 0x134 /* Debug Control Register 0 */
180#define SPRN_DBCR1 0x135 /* Debug Control Register 1 */
181#define SPRN_IAC1 0x138 /* Instruction Address Compare 1 */
182#define SPRN_IAC2 0x139 /* Instruction Address Compare 2 */
183#define SPRN_DAC1 0x13C /* Data Address Compare 1 */
184#define SPRN_DAC2 0x13D /* Data Address Compare 2 */
185#define SPRN_TSR 0x150 /* Timer Status Register */
186#define SPRN_TCR 0x154 /* Timer Control Register */
187#endif /* Book E */
188#ifdef CONFIG_40x
189#define SPRN_PID 0x3B1 /* Process ID */
190#define SPRN_DBCR1 0x3BD /* Debug Control Register 1 */
191#define SPRN_ESR 0x3D4 /* Exception Syndrome Register */
192#define SPRN_DEAR 0x3D5 /* Data Error Address Register */
193#define SPRN_TSR 0x3D8 /* Timer Status Register */
194#define SPRN_TCR 0x3DA /* Timer Control Register */
195#define SPRN_SRR2 0x3DE /* Save/Restore Register 2 */
196#define SPRN_SRR3 0x3DF /* Save/Restore Register 3 */
197#define SPRN_DBSR 0x3F0 /* Debug Status Register */
198#define SPRN_DBCR0 0x3F2 /* Debug Control Register 0 */
199#define SPRN_DAC1 0x3F6 /* Data Address Compare 1 */
200#define SPRN_DAC2 0x3F7 /* Data Address Compare 2 */
201#define SPRN_CSRR0 SPRN_SRR2 /* Critical Save and Restore Register 0 */
202#define SPRN_CSRR1 SPRN_SRR3 /* Critical Save and Restore Register 1 */
203#endif
204
205/* Bit definitions for CCR1. */
206#define CCR1_DPC 0x00000100 /* Disable L1 I-Cache/D-Cache parity checking */
207#define CCR1_TCS 0x00000080 /* Timer Clock Select */
208
209/* Bit definitions for the MCSR. */
210#ifdef CONFIG_440A
211#define MCSR_MCS 0x80000000 /* Machine Check Summary */
212#define MCSR_IB 0x40000000 /* Instruction PLB Error */
213#define MCSR_DRB 0x20000000 /* Data Read PLB Error */
214#define MCSR_DWB 0x10000000 /* Data Write PLB Error */
215#define MCSR_TLBP 0x08000000 /* TLB Parity Error */
216#define MCSR_ICP 0x04000000 /* I-Cache Parity Error */
217#define MCSR_DCSP 0x02000000 /* D-Cache Search Parity Error */
218#define MCSR_DCFP 0x01000000 /* D-Cache Flush Parity Error */
219#define MCSR_IMPE 0x00800000 /* Imprecise Machine Check Exception */
220#endif
221#ifdef CONFIG_E500
222#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
223#define MCSR_ICPERR 0x40000000UL /* I-Cache Parity Error */
224#define MCSR_DCP_PERR 0x20000000UL /* D-Cache Push Parity Error */
225#define MCSR_DCPERR 0x10000000UL /* D-Cache Parity Error */
226#define MCSR_GL_CI 0x00010000UL /* Guarded Load or Cache-Inhibited stwcx. */
227#define MCSR_BUS_IAERR 0x00000080UL /* Instruction Address Error */
228#define MCSR_BUS_RAERR 0x00000040UL /* Read Address Error */
229#define MCSR_BUS_WAERR 0x00000020UL /* Write Address Error */
230#define MCSR_BUS_IBERR 0x00000010UL /* Instruction Data Error */
231#define MCSR_BUS_RBERR 0x00000008UL /* Read Data Bus Error */
232#define MCSR_BUS_WBERR 0x00000004UL /* Write Data Bus Error */
233#define MCSR_BUS_IPERR 0x00000002UL /* Instruction parity Error */
234#define MCSR_BUS_RPERR 0x00000001UL /* Read parity Error */
235#endif
236#ifdef CONFIG_E200
237#define MCSR_MCP 0x80000000UL /* Machine Check Input Pin */
238#define MCSR_CP_PERR 0x20000000UL /* Cache Push Parity Error */
239#define MCSR_CPERR 0x10000000UL /* Cache Parity Error */
240#define MCSR_EXCP_ERR 0x08000000UL /* ISI, ITLB, or Bus Error on 1st insn
241 fetch for an exception handler */
242#define MCSR_BUS_IRERR 0x00000010UL /* Read Bus Error on instruction fetch*/
243#define MCSR_BUS_DRERR 0x00000008UL /* Read Bus Error on data load */
244#define MCSR_BUS_WRERR 0x00000004UL /* Write Bus Error on buffered
245 store or cache line push */
246#endif
247
248/* Bit definitions for the DBSR. */
249/*
250 * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
251 */
252#ifdef CONFIG_BOOKE
253#define DBSR_IC 0x08000000 /* Instruction Completion */
254#define DBSR_BT 0x04000000 /* Branch Taken */
255#define DBSR_TIE 0x01000000 /* Trap Instruction Event */
256#define DBSR_IAC1 0x00800000 /* Instr Address Compare 1 Event */
257#define DBSR_IAC2 0x00400000 /* Instr Address Compare 2 Event */
258#define DBSR_IAC3 0x00200000 /* Instr Address Compare 3 Event */
259#define DBSR_IAC4 0x00100000 /* Instr Address Compare 4 Event */
260#define DBSR_DAC1R 0x00080000 /* Data Addr Compare 1 Read Event */
261#define DBSR_DAC1W 0x00040000 /* Data Addr Compare 1 Write Event */
262#define DBSR_DAC2R 0x00020000 /* Data Addr Compare 2 Read Event */
263#define DBSR_DAC2W 0x00010000 /* Data Addr Compare 2 Write Event */
264#endif
265#ifdef CONFIG_40x
266#define DBSR_IC 0x80000000 /* Instruction Completion */
267#define DBSR_BT 0x40000000 /* Branch taken */
268#define DBSR_TIE 0x10000000 /* Trap Instruction debug Event */
269#define DBSR_IAC1 0x04000000 /* Instruction Address Compare 1 Event */
270#define DBSR_IAC2 0x02000000 /* Instruction Address Compare 2 Event */
271#define DBSR_IAC3 0x00080000 /* Instruction Address Compare 3 Event */
272#define DBSR_IAC4 0x00040000 /* Instruction Address Compare 4 Event */
273#define DBSR_DAC1R 0x01000000 /* Data Address Compare 1 Read Event */
274#define DBSR_DAC1W 0x00800000 /* Data Address Compare 1 Write Event */
275#define DBSR_DAC2R 0x00400000 /* Data Address Compare 2 Read Event */
276#define DBSR_DAC2W 0x00200000 /* Data Address Compare 2 Write Event */
277#endif
278
279/* Bit definitions related to the ESR. */
280#define ESR_MCI 0x80000000 /* Machine Check - Instruction */
281#define ESR_IMCP 0x80000000 /* Instr. Machine Check - Protection */
282#define ESR_IMCN 0x40000000 /* Instr. Machine Check - Non-config */
283#define ESR_IMCB 0x20000000 /* Instr. Machine Check - Bus error */
284#define ESR_IMCT 0x10000000 /* Instr. Machine Check - Timeout */
285#define ESR_PIL 0x08000000 /* Program Exception - Illegal */
286#define ESR_PPR 0x04000000 /* Program Exception - Priveleged */
287#define ESR_PTR 0x02000000 /* Program Exception - Trap */
288#define ESR_FP 0x01000000 /* Floating Point Operation */
289#define ESR_DST 0x00800000 /* Storage Exception - Data miss */
290#define ESR_DIZ 0x00400000 /* Storage Exception - Zone fault */
291#define ESR_ST 0x00800000 /* Store Operation */
292#define ESR_DLK 0x00200000 /* Data Cache Locking */
293#define ESR_ILK 0x00100000 /* Instr. Cache Locking */
294#define ESR_PUO 0x00040000 /* Unimplemented Operation exception */
295#define ESR_BO 0x00020000 /* Byte Ordering */
296
297/* Bit definitions related to the DBCR0. */
298#define DBCR0_EDM 0x80000000 /* External Debug Mode */
299#define DBCR0_IDM 0x40000000 /* Internal Debug Mode */
300#define DBCR0_RST 0x30000000 /* all the bits in the RST field */
301#define DBCR0_RST_SYSTEM 0x30000000 /* System Reset */
302#define DBCR0_RST_CHIP 0x20000000 /* Chip Reset */
303#define DBCR0_RST_CORE 0x10000000 /* Core Reset */
304#define DBCR0_RST_NONE 0x00000000 /* No Reset */
305#define DBCR0_IC 0x08000000 /* Instruction Completion */
306#define DBCR0_BT 0x04000000 /* Branch Taken */
307#define DBCR0_EDE 0x02000000 /* Exception Debug Event */
308#define DBCR0_TDE 0x01000000 /* TRAP Debug Event */
309#define DBCR0_IA1 0x00800000 /* Instr Addr compare 1 enable */
310#define DBCR0_IA2 0x00400000 /* Instr Addr compare 2 enable */
311#define DBCR0_IA12 0x00200000 /* Instr Addr 1-2 range enable */
312#define DBCR0_IA12X 0x00100000 /* Instr Addr 1-2 range eXclusive */
313#define DBCR0_IA3 0x00080000 /* Instr Addr compare 3 enable */
314#define DBCR0_IA4 0x00040000 /* Instr Addr compare 4 enable */
315#define DBCR0_IA34 0x00020000 /* Instr Addr 3-4 range Enable */
316#define DBCR0_IA34X 0x00010000 /* Instr Addr 3-4 range eXclusive */
317#define DBCR0_IA12T 0x00008000 /* Instr Addr 1-2 range Toggle */
318#define DBCR0_IA34T 0x00004000 /* Instr Addr 3-4 range Toggle */
319#define DBCR0_FT 0x00000001 /* Freeze Timers on debug event */
320
321/* Bit definitions related to the TCR. */
322#define TCR_WP(x) (((x)&0x3)<<30) /* WDT Period */
323#define TCR_WP_MASK TCR_WP(3)
324#define WP_2_17 0 /* 2^17 clocks */
325#define WP_2_21 1 /* 2^21 clocks */
326#define WP_2_25 2 /* 2^25 clocks */
327#define WP_2_29 3 /* 2^29 clocks */
328#define TCR_WRC(x) (((x)&0x3)<<28) /* WDT Reset Control */
329#define TCR_WRC_MASK TCR_WRC(3)
330#define WRC_NONE 0 /* No reset will occur */
331#define WRC_CORE 1 /* Core reset will occur */
332#define WRC_CHIP 2 /* Chip reset will occur */
333#define WRC_SYSTEM 3 /* System reset will occur */
334#define TCR_WIE 0x08000000 /* WDT Interrupt Enable */
335#define TCR_PIE 0x04000000 /* PIT Interrupt Enable */
336#define TCR_DIE TCR_PIE /* DEC Interrupt Enable */
337#define TCR_FP(x) (((x)&0x3)<<24) /* FIT Period */
338#define TCR_FP_MASK TCR_FP(3)
339#define FP_2_9 0 /* 2^9 clocks */
340#define FP_2_13 1 /* 2^13 clocks */
341#define FP_2_17 2 /* 2^17 clocks */
342#define FP_2_21 3 /* 2^21 clocks */
343#define TCR_FIE 0x00800000 /* FIT Interrupt Enable */
344#define TCR_ARE 0x00400000 /* Auto Reload Enable */
345
346/* Bit definitions for the TSR. */
347#define TSR_ENW 0x80000000 /* Enable Next Watchdog */
348#define TSR_WIS 0x40000000 /* WDT Interrupt Status */
349#define TSR_WRS(x) (((x)&0x3)<<28) /* WDT Reset Status */
350#define WRS_NONE 0 /* No WDT reset occurred */
351#define WRS_CORE 1 /* WDT forced core reset */
352#define WRS_CHIP 2 /* WDT forced chip reset */
353#define WRS_SYSTEM 3 /* WDT forced system reset */
354#define TSR_PIS 0x08000000 /* PIT Interrupt Status */
355#define TSR_DIS TSR_PIS /* DEC Interrupt Status */
356#define TSR_FIS 0x04000000 /* FIT Interrupt Status */
357
358/* Bit definitions for the DCCR. */
359#define DCCR_NOCACHE 0 /* Noncacheable */
360#define DCCR_CACHE 1 /* Cacheable */
361
362/* Bit definitions for DCWR. */
363#define DCWR_COPY 0 /* Copy-back */
364#define DCWR_WRITE 1 /* Write-through */
365
366/* Bit definitions for ICCR. */
367#define ICCR_NOCACHE 0 /* Noncacheable */
368#define ICCR_CACHE 1 /* Cacheable */
369
370/* Bit definitions for L1CSR0. */
371#define L1CSR0_CLFC 0x00000100 /* Cache Lock Bits Flash Clear */
372#define L1CSR0_DCFI 0x00000002 /* Data Cache Flash Invalidate */
373#define L1CSR0_CFI 0x00000002 /* Cache Flash Invalidate */
374#define L1CSR0_DCE 0x00000001 /* Data Cache Enable */
375
376/* Bit definitions for L1CSR1. */
377#define L1CSR1_ICLFR 0x00000100 /* Instr Cache Lock Bits Flash Reset */
378#define L1CSR1_ICFI 0x00000002 /* Instr Cache Flash Invalidate */
379#define L1CSR1_ICE 0x00000001 /* Instr Cache Enable */
380
381/* Bit definitions for SGR. */
382#define SGR_NORMAL 0 /* Speculative fetching allowed. */
383#define SGR_GUARDED 1 /* Speculative fetching disallowed. */
384
385/* Bit definitions for SPEFSCR. */
386#define SPEFSCR_SOVH 0x80000000 /* Summary integer overflow high */
387#define SPEFSCR_OVH 0x40000000 /* Integer overflow high */
388#define SPEFSCR_FGH 0x20000000 /* Embedded FP guard bit high */
389#define SPEFSCR_FXH 0x10000000 /* Embedded FP sticky bit high */
390#define SPEFSCR_FINVH 0x08000000 /* Embedded FP invalid operation high */
391#define SPEFSCR_FDBZH 0x04000000 /* Embedded FP div by zero high */
392#define SPEFSCR_FUNFH 0x02000000 /* Embedded FP underflow high */
393#define SPEFSCR_FOVFH 0x01000000 /* Embedded FP overflow high */
394#define SPEFSCR_FINXS 0x00200000 /* Embedded FP inexact sticky */
395#define SPEFSCR_FINVS 0x00100000 /* Embedded FP invalid op. sticky */
396#define SPEFSCR_FDBZS 0x00080000 /* Embedded FP div by zero sticky */
397#define SPEFSCR_FUNFS 0x00040000 /* Embedded FP underflow sticky */
398#define SPEFSCR_FOVFS 0x00020000 /* Embedded FP overflow sticky */
399#define SPEFSCR_MODE 0x00010000 /* Embedded FP mode */
400#define SPEFSCR_SOV 0x00008000 /* Integer summary overflow */
401#define SPEFSCR_OV 0x00004000 /* Integer overflow */
402#define SPEFSCR_FG 0x00002000 /* Embedded FP guard bit */
403#define SPEFSCR_FX 0x00001000 /* Embedded FP sticky bit */
404#define SPEFSCR_FINV 0x00000800 /* Embedded FP invalid operation */
405#define SPEFSCR_FDBZ 0x00000400 /* Embedded FP div by zero */
406#define SPEFSCR_FUNF 0x00000200 /* Embedded FP underflow */
407#define SPEFSCR_FOVF 0x00000100 /* Embedded FP overflow */
408#define SPEFSCR_FINXE 0x00000040 /* Embedded FP inexact enable */
409#define SPEFSCR_FINVE 0x00000020 /* Embedded FP invalid op. enable */
410#define SPEFSCR_FDBZE 0x00000010 /* Embedded FP div by zero enable */
411#define SPEFSCR_FUNFE 0x00000008 /* Embedded FP underflow enable */
412#define SPEFSCR_FOVFE 0x00000004 /* Embedded FP overflow enable */
413#define SPEFSCR_FRMC 0x00000003 /* Embedded FP rounding mode control */
414
415/*
416 * The IBM-403 is an even more odd special case, as it is much
417 * older than the IBM-405 series. We put these down here incase someone
418 * wishes to support these machines again.
419 */
420#ifdef CONFIG_403GCX
421/* Special Purpose Registers (SPRNs)*/
422#define SPRN_TBHU 0x3CC /* Time Base High User-mode */
423#define SPRN_TBLU 0x3CD /* Time Base Low User-mode */
424#define SPRN_CDBCR 0x3D7 /* Cache Debug Control Register */
425#define SPRN_TBHI 0x3DC /* Time Base High */
426#define SPRN_TBLO 0x3DD /* Time Base Low */
427#define SPRN_DBCR 0x3F2 /* Debug Control Regsiter */
428#define SPRN_PBL1 0x3FC /* Protection Bound Lower 1 */
429#define SPRN_PBL2 0x3FE /* Protection Bound Lower 2 */
430#define SPRN_PBU1 0x3FD /* Protection Bound Upper 1 */
431#define SPRN_PBU2 0x3FF /* Protection Bound Upper 2 */
432
433
434/* Bit definitions for the DBCR. */
435#define DBCR_EDM DBCR0_EDM
436#define DBCR_IDM DBCR0_IDM
437#define DBCR_RST(x) (((x) & 0x3) << 28)
438#define DBCR_RST_NONE 0
439#define DBCR_RST_CORE 1
440#define DBCR_RST_CHIP 2
441#define DBCR_RST_SYSTEM 3
442#define DBCR_IC DBCR0_IC /* Instruction Completion Debug Evnt */
443#define DBCR_BT DBCR0_BT /* Branch Taken Debug Event */
444#define DBCR_EDE DBCR0_EDE /* Exception Debug Event */
445#define DBCR_TDE DBCR0_TDE /* TRAP Debug Event */
446#define DBCR_FER 0x00F80000 /* First Events Remaining Mask */
447#define DBCR_FT 0x00040000 /* Freeze Timers on Debug Event */
448#define DBCR_IA1 0x00020000 /* Instr. Addr. Compare 1 Enable */
449#define DBCR_IA2 0x00010000 /* Instr. Addr. Compare 2 Enable */
450#define DBCR_D1R 0x00008000 /* Data Addr. Compare 1 Read Enable */
451#define DBCR_D1W 0x00004000 /* Data Addr. Compare 1 Write Enable */
452#define DBCR_D1S(x) (((x) & 0x3) << 12) /* Data Adrr. Compare 1 Size */
453#define DAC_BYTE 0
454#define DAC_HALF 1
455#define DAC_WORD 2
456#define DAC_QUAD 3
457#define DBCR_D2R 0x00000800 /* Data Addr. Compare 2 Read Enable */
458#define DBCR_D2W 0x00000400 /* Data Addr. Compare 2 Write Enable */
459#define DBCR_D2S(x) (((x) & 0x3) << 8) /* Data Addr. Compare 2 Size */
460#define DBCR_SBT 0x00000040 /* Second Branch Taken Debug Event */
461#define DBCR_SED 0x00000020 /* Second Exception Debug Event */
462#define DBCR_STD 0x00000010 /* Second Trap Debug Event */
463#define DBCR_SIA 0x00000008 /* Second IAC Enable */
464#define DBCR_SDA 0x00000004 /* Second DAC Enable */
465#define DBCR_JOI 0x00000002 /* JTAG Serial Outbound Int. Enable */
466#define DBCR_JII 0x00000001 /* JTAG Serial Inbound Int. Enable */
467#endif /* 403GCX */
468#endif /* __ASM_POWERPC_REG_BOOKE_H__ */
469#endif /* __KERNEL__ */
diff --git a/include/asm-ppc/rheap.h b/include/asm-powerpc/rheap.h
index 39a10d862244..172381769cfc 100644
--- a/include/asm-ppc/rheap.h
+++ b/include/asm-powerpc/rheap.h
@@ -18,7 +18,7 @@
18 18
19typedef struct _rh_block { 19typedef struct _rh_block {
20 struct list_head list; 20 struct list_head list;
21 void *start; 21 unsigned long start;
22 int size; 22 int size;
23 const char *owner; 23 const char *owner;
24} rh_block_t; 24} rh_block_t;
@@ -37,8 +37,8 @@ typedef struct _rh_info {
37#define RHIF_STATIC_INFO 0x1 37#define RHIF_STATIC_INFO 0x1
38#define RHIF_STATIC_BLOCK 0x2 38#define RHIF_STATIC_BLOCK 0x2
39 39
40typedef struct rh_stats_t { 40typedef struct _rh_stats {
41 void *start; 41 unsigned long start;
42 int size; 42 int size;
43 const char *owner; 43 const char *owner;
44} rh_stats_t; 44} rh_stats_t;
@@ -57,24 +57,24 @@ extern void rh_init(rh_info_t * info, unsigned int alignment, int max_blocks,
57 rh_block_t * block); 57 rh_block_t * block);
58 58
59/* Attach a free region to manage */ 59/* Attach a free region to manage */
60extern int rh_attach_region(rh_info_t * info, void *start, int size); 60extern int rh_attach_region(rh_info_t * info, unsigned long start, int size);
61 61
62/* Detach a free region */ 62/* Detach a free region */
63extern void *rh_detach_region(rh_info_t * info, void *start, int size); 63extern unsigned long rh_detach_region(rh_info_t * info, unsigned long start, int size);
64 64
65/* Allocate the given size from the remote heap (with alignment) */ 65/* Allocate the given size from the remote heap (with alignment) */
66extern void *rh_alloc_align(rh_info_t * info, int size, int alignment, 66extern unsigned long rh_alloc_align(rh_info_t * info, int size, int alignment,
67 const char *owner); 67 const char *owner);
68 68
69/* Allocate the given size from the remote heap */ 69/* Allocate the given size from the remote heap */
70extern void *rh_alloc(rh_info_t * info, int size, const char *owner); 70extern unsigned long rh_alloc(rh_info_t * info, int size, const char *owner);
71 71
72/* Allocate the given size from the given address */ 72/* Allocate the given size from the given address */
73extern void *rh_alloc_fixed(rh_info_t * info, void *start, int size, 73extern unsigned long rh_alloc_fixed(rh_info_t * info, unsigned long start, int size,
74 const char *owner); 74 const char *owner);
75 75
76/* Free the allocated area */ 76/* Free the allocated area */
77extern int rh_free(rh_info_t * info, void *start); 77extern int rh_free(rh_info_t * info, unsigned long start);
78 78
79/* Get stats for debugging purposes */ 79/* Get stats for debugging purposes */
80extern int rh_get_stats(rh_info_t * info, int what, int max_stats, 80extern int rh_get_stats(rh_info_t * info, int what, int max_stats,
@@ -84,6 +84,6 @@ extern int rh_get_stats(rh_info_t * info, int what, int max_stats,
84extern void rh_dump(rh_info_t * info); 84extern void rh_dump(rh_info_t * info);
85 85
86/* Set owner of taken block */ 86/* Set owner of taken block */
87extern int rh_set_owner(rh_info_t * info, void *start, const char *owner); 87extern int rh_set_owner(rh_info_t * info, unsigned long start, const char *owner);
88 88
89#endif /* __ASM_PPC_RHEAP_H__ */ 89#endif /* __ASM_PPC_RHEAP_H__ */
diff --git a/include/asm-powerpc/systbl.h b/include/asm-powerpc/systbl.h
index 0b00068313f9..3d44446fb74f 100644
--- a/include/asm-powerpc/systbl.h
+++ b/include/asm-powerpc/systbl.h
@@ -307,3 +307,4 @@ COMPAT_SYS_SPU(set_robust_list)
307COMPAT_SYS_SPU(move_pages) 307COMPAT_SYS_SPU(move_pages)
308SYSCALL_SPU(getcpu) 308SYSCALL_SPU(getcpu)
309COMPAT_SYS(epoll_pwait) 309COMPAT_SYS(epoll_pwait)
310COMPAT_SYS_SPU(utimensat)
diff --git a/include/asm-powerpc/unistd.h b/include/asm-powerpc/unistd.h
index 2baedbe54e13..21f004aef508 100644
--- a/include/asm-powerpc/unistd.h
+++ b/include/asm-powerpc/unistd.h
@@ -326,10 +326,11 @@
326#define __NR_move_pages 301 326#define __NR_move_pages 301
327#define __NR_getcpu 302 327#define __NR_getcpu 302
328#define __NR_epoll_pwait 303 328#define __NR_epoll_pwait 303
329#define __NR_utimensat 304
329 330
330#ifdef __KERNEL__ 331#ifdef __KERNEL__
331 332
332#define __NR_syscalls 304 333#define __NR_syscalls 305
333 334
334#define __NR__exit __NR_exit 335#define __NR__exit __NR_exit
335#define NR_syscalls __NR_syscalls 336#define NR_syscalls __NR_syscalls
diff --git a/include/asm-ppc/commproc.h b/include/asm-ppc/commproc.h
index 4f99df1bafd7..397248705e0e 100644
--- a/include/asm-ppc/commproc.h
+++ b/include/asm-ppc/commproc.h
@@ -63,20 +63,15 @@
63#define CPM_DATAONLY_SIZE ((uint)0x0700) 63#define CPM_DATAONLY_SIZE ((uint)0x0700)
64#define CPM_DP_NOSPACE ((uint)0x7fffffff) 64#define CPM_DP_NOSPACE ((uint)0x7fffffff)
65 65
66static inline long IS_DPERR(const uint offset)
67{
68 return (uint)offset > (uint)-1000L;
69}
70
71/* Export the base address of the communication processor registers 66/* Export the base address of the communication processor registers
72 * and dual port ram. 67 * and dual port ram.
73 */ 68 */
74extern cpm8xx_t *cpmp; /* Pointer to comm processor */ 69extern cpm8xx_t *cpmp; /* Pointer to comm processor */
75extern uint cpm_dpalloc(uint size, uint align); 70extern unsigned long cpm_dpalloc(uint size, uint align);
76extern int cpm_dpfree(uint offset); 71extern int cpm_dpfree(unsigned long offset);
77extern uint cpm_dpalloc_fixed(uint offset, uint size, uint align); 72extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
78extern void cpm_dpdump(void); 73extern void cpm_dpdump(void);
79extern void *cpm_dpram_addr(uint offset); 74extern void *cpm_dpram_addr(unsigned long offset);
80extern uint cpm_dpram_phys(u8* addr); 75extern uint cpm_dpram_phys(u8* addr);
81extern void cpm_setbrg(uint brg, uint rate); 76extern void cpm_setbrg(uint brg, uint rate);
82 77
diff --git a/include/asm-ppc/cpm2.h b/include/asm-ppc/cpm2.h
index 220cc2debe08..12a2860f9a9c 100644
--- a/include/asm-ppc/cpm2.h
+++ b/include/asm-ppc/cpm2.h
@@ -104,21 +104,16 @@
104 */ 104 */
105#define NUM_CPM_HOST_PAGES 2 105#define NUM_CPM_HOST_PAGES 2
106 106
107static inline long IS_DPERR(const uint offset)
108{
109 return (uint)offset > (uint)-1000L;
110}
111
112/* Export the base address of the communication processor registers 107/* Export the base address of the communication processor registers
113 * and dual port ram. 108 * and dual port ram.
114 */ 109 */
115extern cpm_cpm2_t *cpmp; /* Pointer to comm processor */ 110extern cpm_cpm2_t *cpmp; /* Pointer to comm processor */
116 111
117extern uint cpm_dpalloc(uint size, uint align); 112extern unsigned long cpm_dpalloc(uint size, uint align);
118extern int cpm_dpfree(uint offset); 113extern int cpm_dpfree(unsigned long offset);
119extern uint cpm_dpalloc_fixed(uint offset, uint size, uint align); 114extern unsigned long cpm_dpalloc_fixed(unsigned long offset, uint size, uint align);
120extern void cpm_dpdump(void); 115extern void cpm_dpdump(void);
121extern void *cpm_dpram_addr(uint offset); 116extern void *cpm_dpram_addr(unsigned long offset);
122extern void cpm_setbrg(uint brg, uint rate); 117extern void cpm_setbrg(uint brg, uint rate);
123extern void cpm2_fastbrg(uint brg, uint rate, int div16); 118extern void cpm2_fastbrg(uint brg, uint rate, int div16);
124extern void cpm2_reset(void); 119extern void cpm2_reset(void);
diff --git a/include/linux/pmu.h b/include/linux/pmu.h
index 37ca57392add..5ad913ff02b2 100644
--- a/include/linux/pmu.h
+++ b/include/linux/pmu.h
@@ -226,7 +226,7 @@ extern unsigned int pmu_power_flags;
226extern void pmu_backlight_init(void); 226extern void pmu_backlight_init(void);
227 227
228/* some code needs to know if the PMU was suspended for hibernation */ 228/* some code needs to know if the PMU was suspended for hibernation */
229#ifdef CONFIG_PM 229#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
230extern int pmu_sys_suspended; 230extern int pmu_sys_suspended;
231#else 231#else
232/* if power management is not configured it can't be suspended */ 232/* if power management is not configured it can't be suspended */