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authorPhil Sutter <n0-1@freewrt.org>2009-01-19 17:42:52 -0500
committerRalf Baechle <ralf@linux-mips.org>2009-01-30 16:33:00 -0500
commit36f2db4b9c01689b1311d57a6297022d82000185 (patch)
tree209deaa3c9dba38e633ba4e8ac7875749c54c490
parent7060886fb745b705bcf189131eb49c50485ba233 (diff)
MIPS: RB532: Move dev3 init code to devices.c
This code doesn't belong to gpio.c, as it's completely unrelated to GPIO. As dev1 and dev2 init code is in devices.c, it seems to be a more adequate place. Signed-off-by: Phil Sutter <n0-1@freewrt.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/rb532/devices.c39
-rw-r--r--arch/mips/rb532/gpio.c39
2 files changed, 39 insertions, 39 deletions
diff --git a/arch/mips/rb532/devices.c b/arch/mips/rb532/devices.c
index 3c74561b4ee5..1a0209eca789 100644
--- a/arch/mips/rb532/devices.c
+++ b/arch/mips/rb532/devices.c
@@ -42,6 +42,34 @@
42 42
43extern unsigned int idt_cpu_freq; 43extern unsigned int idt_cpu_freq;
44 44
45static struct mpmc_device dev3;
46
47void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
48{
49 unsigned long flags;
50
51 spin_lock_irqsave(&dev3.lock, flags);
52
53 dev3.state = (dev3.state | or_mask) & ~nand_mask;
54 writeb(dev3.state, dev3.base);
55
56 spin_unlock_irqrestore(&dev3.lock, flags);
57}
58EXPORT_SYMBOL(set_latch_u5);
59
60unsigned char get_latch_u5(void)
61{
62 return dev3.state;
63}
64EXPORT_SYMBOL(get_latch_u5);
65
66static struct resource rb532_dev3_ctl_res[] = {
67 {
68 .name = "dev3_ctl",
69 .flags = IORESOURCE_MEM,
70 }
71};
72
45static struct resource korina_dev0_res[] = { 73static struct resource korina_dev0_res[] = {
46 { 74 {
47 .name = "korina_regs", 75 .name = "korina_regs",
@@ -314,6 +342,17 @@ static int __init plat_setup_devices(void)
314 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE); 342 nand_slot0_res[0].start = readl(IDT434_REG_BASE + DEV2BASE);
315 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000; 343 nand_slot0_res[0].end = nand_slot0_res[0].start + 0x1000;
316 344
345 /* Read the third (multi purpose) resources from the DC */
346 rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
347 rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
348
349 dev3.base = ioremap_nocache(rb532_dev3_ctl_res[0].start, 0x1000);
350
351 if (!dev3.base) {
352 printk(KERN_ERR "rb532: cannot remap device controller 3\n");
353 return -ENXIO;
354 }
355
317 /* Initialise the NAND device */ 356 /* Initialise the NAND device */
318 rb532_nand_setup(); 357 rb532_nand_setup();
319 358
diff --git a/arch/mips/rb532/gpio.c b/arch/mips/rb532/gpio.c
index be977a4c2f9c..6229173946ad 100644
--- a/arch/mips/rb532/gpio.c
+++ b/arch/mips/rb532/gpio.c
@@ -41,8 +41,6 @@ struct rb532_gpio_chip {
41 void __iomem *regbase; 41 void __iomem *regbase;
42}; 42};
43 43
44struct mpmc_device dev3;
45
46static struct resource rb532_gpio_reg0_res[] = { 44static struct resource rb532_gpio_reg0_res[] = {
47 { 45 {
48 .name = "gpio_reg0", 46 .name = "gpio_reg0",
@@ -52,13 +50,6 @@ static struct resource rb532_gpio_reg0_res[] = {
52 } 50 }
53}; 51};
54 52
55static struct resource rb532_dev3_ctl_res[] = {
56 {
57 .name = "dev3_ctl",
58 .flags = IORESOURCE_MEM,
59 }
60};
61
62void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val) 53void set_434_reg(unsigned reg_offs, unsigned bit, unsigned len, unsigned val)
63{ 54{
64 unsigned long flags; 55 unsigned long flags;
@@ -86,25 +77,6 @@ unsigned get_434_reg(unsigned reg_offs)
86} 77}
87EXPORT_SYMBOL(get_434_reg); 78EXPORT_SYMBOL(get_434_reg);
88 79
89void set_latch_u5(unsigned char or_mask, unsigned char nand_mask)
90{
91 unsigned long flags;
92
93 spin_lock_irqsave(&dev3.lock, flags);
94
95 dev3.state = (dev3.state | or_mask) & ~nand_mask;
96 writeb(dev3.state, dev3.base);
97
98 spin_unlock_irqrestore(&dev3.lock, flags);
99}
100EXPORT_SYMBOL(set_latch_u5);
101
102unsigned char get_latch_u5(void)
103{
104 return dev3.state;
105}
106EXPORT_SYMBOL(get_latch_u5);
107
108/* rb532_set_bit - sanely set a bit 80/* rb532_set_bit - sanely set a bit
109 * 81 *
110 * bitval: new value for the bit 82 * bitval: new value for the bit
@@ -249,17 +221,6 @@ int __init rb532_gpio_init(void)
249 /* Register our GPIO chip */ 221 /* Register our GPIO chip */
250 gpiochip_add(&rb532_gpio_chip->chip); 222 gpiochip_add(&rb532_gpio_chip->chip);
251 223
252 rb532_dev3_ctl_res[0].start = readl(IDT434_REG_BASE + DEV3BASE);
253 rb532_dev3_ctl_res[0].end = rb532_dev3_ctl_res[0].start + 0x1000;
254
255 r = rb532_dev3_ctl_res;
256 dev3.base = ioremap_nocache(r->start, r->end - r->start);
257
258 if (!dev3.base) {
259 printk(KERN_ERR "rb532: cannot remap device controller 3\n");
260 return -ENXIO;
261 }
262
263 return 0; 224 return 0;
264} 225}
265arch_initcall(rb532_gpio_init); 226arch_initcall(rb532_gpio_init);