diff options
author | Sangbeom Kim <sbkim73@samsung.com> | 2011-06-23 08:43:58 -0400 |
---|---|---|
committer | Kukjin Kim <kgene.kim@samsung.com> | 2011-07-05 19:43:02 -0400 |
commit | 27ea7fd2889eb93041480b18de655b1ff003e05d (patch) | |
tree | 2e9ed68ea86f1af38056c7687aeb98d5f3b73a79 | |
parent | bb8bb57b213f63ffba29b3a7f1c7974782b8127d (diff) |
ARM: S5P: Fix bug on init of PWMTimers for HRTimer
This patch fixes following.
<6>[ 0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[ 128.651309] Calibrating delay loop...
There is a big jump. The reason is that PWM Timer which
is for HRTimer was used before its initialization.
So this patch changes its order and following is kernel
boot log message after this.
<6>[ 0.000000] sched_clock: 32 bits at 33MHz, ...
<6>[ 0.000088] Calibrating delay loop...
Signed-off-by: Sangbeom Kim <sbkim73@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r-- | arch/arm/plat-s5p/s5p-time.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/plat-s5p/s5p-time.c b/arch/arm/plat-s5p/s5p-time.c index 899a8cc011ff..612934c48b0d 100644 --- a/arch/arm/plat-s5p/s5p-time.c +++ b/arch/arm/plat-s5p/s5p-time.c | |||
@@ -370,11 +370,11 @@ static void __init s5p_clocksource_init(void) | |||
370 | 370 | ||
371 | clock_rate = clk_get_rate(tin_source); | 371 | clock_rate = clk_get_rate(tin_source); |
372 | 372 | ||
373 | init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); | ||
374 | |||
375 | s5p_time_setup(timer_source.source_id, TCNT_MAX); | 373 | s5p_time_setup(timer_source.source_id, TCNT_MAX); |
376 | s5p_time_start(timer_source.source_id, PERIODIC); | 374 | s5p_time_start(timer_source.source_id, PERIODIC); |
377 | 375 | ||
376 | init_sched_clock(&cd, s5p_update_sched_clock, 32, clock_rate); | ||
377 | |||
378 | if (clocksource_register_hz(&time_clocksource, clock_rate)) | 378 | if (clocksource_register_hz(&time_clocksource, clock_rate)) |
379 | panic("%s: can't register clocksource\n", time_clocksource.name); | 379 | panic("%s: can't register clocksource\n", time_clocksource.name); |
380 | } | 380 | } |