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authorRafał Miłecki <zajec5@gmail.com>2013-05-09 15:24:24 -0400
committerJohn W. Linville <linville@tuxdriver.com>2013-05-17 14:31:05 -0400
commitd4988d4c733ba0b61cb372edd3d1992d26dd10d3 (patch)
tree4ffc79de1da2f342bd7ee4617774bb9c732cd877
parentbecdbc592580f76df58fdae14544f5db36ae05b4 (diff)
bcma: add more core IDs
PCIe and ARM CR4 cores were found on 14e4:43b1 AKA BCM4352. Reported-by: Gabriel Thörnblad <gabriel@thornblad.com> Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r--drivers/bcma/scan.c2
-rw-r--r--include/linux/bcma/bcma.h5
2 files changed, 6 insertions, 1 deletions
diff --git a/drivers/bcma/scan.c b/drivers/bcma/scan.c
index bca9c80056fe..8bffa5c9818c 100644
--- a/drivers/bcma/scan.c
+++ b/drivers/bcma/scan.c
@@ -84,6 +84,8 @@ static const struct bcma_device_id_name bcma_bcm_device_names[] = {
84 { BCMA_CORE_I2S, "I2S" }, 84 { BCMA_CORE_I2S, "I2S" },
85 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" }, 85 { BCMA_CORE_SDR_DDR1_MEM_CTL, "SDR/DDR1 Memory Controller" },
86 { BCMA_CORE_SHIM, "SHIM" }, 86 { BCMA_CORE_SHIM, "SHIM" },
87 { BCMA_CORE_PCIE2, "PCIe Gen2" },
88 { BCMA_CORE_ARM_CR4, "ARM CR4" },
87 { BCMA_CORE_DEFAULT, "Default" }, 89 { BCMA_CORE_DEFAULT, "Default" },
88}; 90};
89 91
diff --git a/include/linux/bcma/bcma.h b/include/linux/bcma/bcma.h
index f14a98a79c9d..2e34db82a643 100644
--- a/include/linux/bcma/bcma.h
+++ b/include/linux/bcma/bcma.h
@@ -134,7 +134,10 @@ struct bcma_host_ops {
134#define BCMA_CORE_I2S 0x834 134#define BCMA_CORE_I2S 0x834
135#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */ 135#define BCMA_CORE_SDR_DDR1_MEM_CTL 0x835 /* SDR/DDR1 memory controller core */
136#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */ 136#define BCMA_CORE_SHIM 0x837 /* SHIM component in ubus/6362 */
137#define BCMA_CORE_ARM_CR4 0x83e 137#define BCMA_CORE_PHY_AC 0x83B
138#define BCMA_CORE_PCIE2 0x83C /* PCI Express Gen2 */
139#define BCMA_CORE_USB30_DEV 0x83D
140#define BCMA_CORE_ARM_CR4 0x83E
138#define BCMA_CORE_DEFAULT 0xFFF 141#define BCMA_CORE_DEFAULT 0xFFF
139 142
140#define BCMA_MAX_NR_CORES 16 143#define BCMA_MAX_NR_CORES 16