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authorLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:52:37 -0500
committerLinus Torvalds <torvalds@g5.osdl.org>2006-03-28 16:52:37 -0500
commitd4965b3e2ff94d0c7b7e6e7e9794b54950a2f4b9 (patch)
treee96e7a3e02acacd4ee200592ec176b94802d11e7
parent9561b03dc360068504cb296d325fb84295f91fbb (diff)
parentaee85fe8e8143d3f54d9e6d3c6cdd40ead563267 (diff)
Merge master.kernel.org:/home/rmk/linux-2.6-serial
* master.kernel.org:/home/rmk/linux-2.6-serial: [SERIAL] Provide Cirrus EP93xx AMBA PL010 serial support. [SERIAL] amba-pl010: allow platforms to specify modem control method [SERIAL] Remove obsoleted au1x00_uart driver [SERIAL] Small time UART configuration fix for AU1100 processor
Diffstat
-rw-r--r--arch/arm/mach-ep93xx/core.c68
-rw-r--r--arch/arm/mach-integrator/core.c46
-rw-r--r--arch/mips/au1000/common/setup.c2
-rw-r--r--drivers/serial/8250_au1x00.c2
-rw-r--r--drivers/serial/Kconfig16
-rw-r--r--drivers/serial/Makefile1
-rw-r--r--drivers/serial/amba-pl010.c160
-rw-r--r--drivers/serial/au1x00_uart.c1287
-rw-r--r--include/asm-mips/serial.h85
-rw-r--r--include/linux/amba/serial.h6
10 files changed, 190 insertions, 1483 deletions
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 865427bfad7e..2d892e4daa07 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -30,7 +30,9 @@
30#include <linux/time.h> 30#include <linux/time.h>
31#include <linux/timex.h> 31#include <linux/timex.h>
32#include <linux/delay.h> 32#include <linux/delay.h>
33#include <linux/termios.h>
33#include <linux/amba/bus.h> 34#include <linux/amba/bus.h>
35#include <linux/amba/serial.h>
34 36
35#include <asm/types.h> 37#include <asm/types.h>
36#include <asm/setup.h> 38#include <asm/setup.h>
@@ -360,6 +362,68 @@ void __init ep93xx_init_irq(void)
360/************************************************************************* 362/*************************************************************************
361 * EP93xx peripheral handling 363 * EP93xx peripheral handling
362 *************************************************************************/ 364 *************************************************************************/
365#define EP93XX_UART_MCR_OFFSET (0x0100)
366
367static void ep93xx_uart_set_mctrl(struct amba_device *dev,
368 void __iomem *base, unsigned int mctrl)
369{
370 unsigned int mcr;
371
372 mcr = 0;
373 if (!(mctrl & TIOCM_RTS))
374 mcr |= 2;
375 if (!(mctrl & TIOCM_DTR))
376 mcr |= 1;
377
378 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
379}
380
381static struct amba_pl010_data ep93xx_uart_data = {
382 .set_mctrl = ep93xx_uart_set_mctrl,
383};
384
385static struct amba_device uart1_device = {
386 .dev = {
387 .bus_id = "apb:uart1",
388 .platform_data = &ep93xx_uart_data,
389 },
390 .res = {
391 .start = EP93XX_UART1_PHYS_BASE,
392 .end = EP93XX_UART1_PHYS_BASE + 0x0fff,
393 .flags = IORESOURCE_MEM,
394 },
395 .irq = { IRQ_EP93XX_UART1, NO_IRQ },
396 .periphid = 0x00041010,
397};
398
399static struct amba_device uart2_device = {
400 .dev = {
401 .bus_id = "apb:uart2",
402 .platform_data = &ep93xx_uart_data,
403 },
404 .res = {
405 .start = EP93XX_UART2_PHYS_BASE,
406 .end = EP93XX_UART2_PHYS_BASE + 0x0fff,
407 .flags = IORESOURCE_MEM,
408 },
409 .irq = { IRQ_EP93XX_UART2, NO_IRQ },
410 .periphid = 0x00041010,
411};
412
413static struct amba_device uart3_device = {
414 .dev = {
415 .bus_id = "apb:uart3",
416 .platform_data = &ep93xx_uart_data,
417 },
418 .res = {
419 .start = EP93XX_UART3_PHYS_BASE,
420 .end = EP93XX_UART3_PHYS_BASE + 0x0fff,
421 .flags = IORESOURCE_MEM,
422 },
423 .irq = { IRQ_EP93XX_UART3, NO_IRQ },
424 .periphid = 0x00041010,
425};
426
363void __init ep93xx_init_devices(void) 427void __init ep93xx_init_devices(void)
364{ 428{
365 unsigned int v; 429 unsigned int v;
@@ -371,4 +435,8 @@ void __init ep93xx_init_devices(void)
371 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE; 435 v &= ~EP93XX_SYSCON_DEVICE_CONFIG_CRUNCH_ENABLE;
372 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK); 436 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
373 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG); 437 __raw_writel(v, EP93XX_SYSCON_DEVICE_CONFIG);
438
439 amba_device_register(&uart1_device, &iomem_resource);
440 amba_device_register(&uart2_device, &iomem_resource);
441 amba_device_register(&uart3_device, &iomem_resource);
374} 442}
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index 20071a2767cc..576a5e979c00 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -15,7 +15,9 @@
15#include <linux/interrupt.h> 15#include <linux/interrupt.h>
16#include <linux/sched.h> 16#include <linux/sched.h>
17#include <linux/smp.h> 17#include <linux/smp.h>
18#include <linux/termios.h>
18#include <linux/amba/bus.h> 19#include <linux/amba/bus.h>
20#include <linux/amba/serial.h>
19 21
20#include <asm/hardware.h> 22#include <asm/hardware.h>
21#include <asm/irq.h> 23#include <asm/irq.h>
@@ -28,6 +30,8 @@
28 30
29#include "common.h" 31#include "common.h"
30 32
33static struct amba_pl010_data integrator_uart_data;
34
31static struct amba_device rtc_device = { 35static struct amba_device rtc_device = {
32 .dev = { 36 .dev = {
33 .bus_id = "mb:15", 37 .bus_id = "mb:15",
@@ -44,6 +48,7 @@ static struct amba_device rtc_device = {
44static struct amba_device uart0_device = { 48static struct amba_device uart0_device = {
45 .dev = { 49 .dev = {
46 .bus_id = "mb:16", 50 .bus_id = "mb:16",
51 .platform_data = &integrator_uart_data,
47 }, 52 },
48 .res = { 53 .res = {
49 .start = INTEGRATOR_UART0_BASE, 54 .start = INTEGRATOR_UART0_BASE,
@@ -57,6 +62,7 @@ static struct amba_device uart0_device = {
57static struct amba_device uart1_device = { 62static struct amba_device uart1_device = {
58 .dev = { 63 .dev = {
59 .bus_id = "mb:17", 64 .bus_id = "mb:17",
65 .platform_data = &integrator_uart_data,
60 }, 66 },
61 .res = { 67 .res = {
62 .start = INTEGRATOR_UART1_BASE, 68 .start = INTEGRATOR_UART1_BASE,
@@ -115,6 +121,46 @@ static int __init integrator_init(void)
115 121
116arch_initcall(integrator_init); 122arch_initcall(integrator_init);
117 123
124/*
125 * On the Integrator platform, the port RTS and DTR are provided by
126 * bits in the following SC_CTRLS register bits:
127 * RTS DTR
128 * UART0 7 6
129 * UART1 5 4
130 */
131#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
132#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
133
134static void integrator_uart_set_mctrl(struct amba_device *dev, void __iomem *base, unsigned int mctrl)
135{
136 unsigned int ctrls = 0, ctrlc = 0, rts_mask, dtr_mask;
137
138 if (dev == &uart0_device) {
139 rts_mask = 1 << 4;
140 dtr_mask = 1 << 5;
141 } else {
142 rts_mask = 1 << 6;
143 dtr_mask = 1 << 7;
144 }
145
146 if (mctrl & TIOCM_RTS)
147 ctrlc |= rts_mask;
148 else
149 ctrls |= rts_mask;
150
151 if (mctrl & TIOCM_DTR)
152 ctrlc |= dtr_mask;
153 else
154 ctrls |= dtr_mask;
155
156 __raw_writel(ctrls, SC_CTRLS);
157 __raw_writel(ctrlc, SC_CTRLC);
158}
159
160static struct amba_pl010_data integrator_uart_data = {
161 .set_mctrl = integrator_uart_set_mctrl,
162};
163
118#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET 164#define CM_CTRL IO_ADDRESS(INTEGRATOR_HDR_BASE) + INTEGRATOR_HDR_CTRL_OFFSET
119 165
120static DEFINE_SPINLOCK(cm_lock); 166static DEFINE_SPINLOCK(cm_lock);
diff --git a/arch/mips/au1000/common/setup.c b/arch/mips/au1000/common/setup.c
index 1080558c8100..307e98c29ddc 100644
--- a/arch/mips/au1000/common/setup.c
+++ b/arch/mips/au1000/common/setup.c
@@ -94,7 +94,7 @@ void __init plat_setup(void)
94 94
95 argptr = prom_getcmdline(); 95 argptr = prom_getcmdline();
96 96
97#if defined(CONFIG_SERIAL_AU1X00_CONSOLE) || defined(CONFIG_SERIAL_8250_CONSOLE) 97#ifdef CONFIG_SERIAL_8250_CONSOLE
98 if ((argptr = strstr(argptr, "console=")) == NULL) { 98 if ((argptr = strstr(argptr, "console=")) == NULL) {
99 argptr = prom_getcmdline(); 99 argptr = prom_getcmdline();
100 strcat(argptr, " console=ttyS0,115200"); 100 strcat(argptr, " console=ttyS0,115200");
diff --git a/drivers/serial/8250_au1x00.c b/drivers/serial/8250_au1x00.c
index 8d8d7a70d03e..3d1bfd07208d 100644
--- a/drivers/serial/8250_au1x00.c
+++ b/drivers/serial/8250_au1x00.c
@@ -51,7 +51,7 @@ static struct plat_serial8250_port au1x00_data[] = {
51#elif defined(CONFIG_SOC_AU1100) 51#elif defined(CONFIG_SOC_AU1100)
52 PORT(UART0_ADDR, AU1100_UART0_INT), 52 PORT(UART0_ADDR, AU1100_UART0_INT),
53 PORT(UART1_ADDR, AU1100_UART1_INT), 53 PORT(UART1_ADDR, AU1100_UART1_INT),
54 PORT(UART2_ADDR, AU1100_UART2_INT), 54 /* The internal UART2 does not exist on the AU1100 processor. */
55 PORT(UART3_ADDR, AU1100_UART3_INT), 55 PORT(UART3_ADDR, AU1100_UART3_INT),
56#elif defined(CONFIG_SOC_AU1550) 56#elif defined(CONFIG_SOC_AU1550)
57 PORT(UART0_ADDR, AU1550_UART0_INT), 57 PORT(UART0_ADDR, AU1550_UART0_INT),
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index ceb3697bf84d..fe0d8b8e91c8 100644
--- a/drivers/serial/Kconfig
+++ b/drivers/serial/Kconfig
@@ -620,22 +620,6 @@ config SERIAL_SH_SCI_CONSOLE
620 depends on SERIAL_SH_SCI=y 620 depends on SERIAL_SH_SCI=y
621 select SERIAL_CORE_CONSOLE 621 select SERIAL_CORE_CONSOLE
622 622
623config SERIAL_AU1X00
624 bool "Enable Au1x00 UART Support"
625 depends on MIPS && SOC_AU1X00
626 select SERIAL_CORE
627 help
628 If you have an Alchemy AU1X00 processor (MIPS based) and you want
629 to use serial ports, say Y. Otherwise, say N.
630
631config SERIAL_AU1X00_CONSOLE
632 bool "Enable Au1x00 serial console"
633 depends on SERIAL_AU1X00
634 select SERIAL_CORE_CONSOLE
635 help
636 If you have an Alchemy AU1X00 processor (MIPS based) and you want
637 to use a console on a serial port, say Y. Otherwise, say N.
638
639config SERIAL_CORE 623config SERIAL_CORE
640 tristate 624 tristate
641 625
diff --git a/drivers/serial/Makefile b/drivers/serial/Makefile
index a3a4323d9c86..d2b4c214876b 100644
--- a/drivers/serial/Makefile
+++ b/drivers/serial/Makefile
@@ -41,7 +41,6 @@ obj-$(CONFIG_SERIAL_COLDFIRE) += mcfserial.o
41obj-$(CONFIG_V850E_UART) += v850e_uart.o 41obj-$(CONFIG_V850E_UART) += v850e_uart.o
42obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o 42obj-$(CONFIG_SERIAL_PMACZILOG) += pmac_zilog.o
43obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o 43obj-$(CONFIG_SERIAL_LH7A40X) += serial_lh7a40x.o
44obj-$(CONFIG_SERIAL_AU1X00) += au1x00_uart.o
45obj-$(CONFIG_SERIAL_DZ) += dz.o 44obj-$(CONFIG_SERIAL_DZ) += dz.o
46obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o 45obj-$(CONFIG_SERIAL_SH_SCI) += sh-sci.o
47obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o 46obj-$(CONFIG_SERIAL_SGI_L1_CONSOLE) += sn_console.o
diff --git a/drivers/serial/amba-pl010.c b/drivers/serial/amba-pl010.c
index 127d6cd5de7f..1631414000a2 100644
--- a/drivers/serial/amba-pl010.c
+++ b/drivers/serial/amba-pl010.c
@@ -51,8 +51,6 @@
51#include <linux/amba/serial.h> 51#include <linux/amba/serial.h>
52 52
53#include <asm/io.h> 53#include <asm/io.h>
54#include <asm/irq.h>
55#include <asm/hardware.h>
56 54
57#define UART_NR 2 55#define UART_NR 2
58 56
@@ -65,26 +63,16 @@
65#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0) 63#define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
66#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0) 64#define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
67 65
68#define UART_DUMMY_RSR_RX /*256*/0 66#define UART_DUMMY_RSR_RX 256
69#define UART_PORT_SIZE 64 67#define UART_PORT_SIZE 64
70 68
71/* 69/*
72 * On the Integrator platform, the port RTS and DTR are provided by
73 * bits in the following SC_CTRLS register bits:
74 * RTS DTR
75 * UART0 7 6
76 * UART1 5 4
77 */
78#define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
79#define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
80
81/*
82 * We wrap our port structure around the generic uart_port. 70 * We wrap our port structure around the generic uart_port.
83 */ 71 */
84struct uart_amba_port { 72struct uart_amba_port {
85 struct uart_port port; 73 struct uart_port port;
86 unsigned int dtr_mask; 74 struct amba_device *dev;
87 unsigned int rts_mask; 75 struct amba_pl010_data *data;
88 unsigned int old_status; 76 unsigned int old_status;
89}; 77};
90 78
@@ -300,20 +288,9 @@ static unsigned int pl010_get_mctrl(struct uart_port *port)
300static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl) 288static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
301{ 289{
302 struct uart_amba_port *uap = (struct uart_amba_port *)port; 290 struct uart_amba_port *uap = (struct uart_amba_port *)port;
303 unsigned int ctrls = 0, ctrlc = 0;
304
305 if (mctrl & TIOCM_RTS)
306 ctrlc |= uap->rts_mask;
307 else
308 ctrls |= uap->rts_mask;
309 291
310 if (mctrl & TIOCM_DTR) 292 if (uap->data)
311 ctrlc |= uap->dtr_mask; 293 uap->data->set_mctrl(uap->dev, uap->port.membase, mctrl);
312 else
313 ctrls |= uap->dtr_mask;
314
315 __raw_writel(ctrls, SC_CTRLS);
316 __raw_writel(ctrlc, SC_CTRLC);
317} 294}
318 295
319static void pl010_break_ctl(struct uart_port *port, int break_state) 296static void pl010_break_ctl(struct uart_port *port, int break_state)
@@ -539,38 +516,7 @@ static struct uart_ops amba_pl010_pops = {
539 .verify_port = pl010_verify_port, 516 .verify_port = pl010_verify_port,
540}; 517};
541 518
542static struct uart_amba_port amba_ports[UART_NR] = { 519static struct uart_amba_port *amba_ports[UART_NR];
543 {
544 .port = {
545 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
546 .mapbase = INTEGRATOR_UART0_BASE,
547 .iotype = UPIO_MEM,
548 .irq = IRQ_UARTINT0,
549 .uartclk = 14745600,
550 .fifosize = 16,
551 .ops = &amba_pl010_pops,
552 .flags = UPF_BOOT_AUTOCONF,
553 .line = 0,
554 },
555 .dtr_mask = 1 << 5,
556 .rts_mask = 1 << 4,
557 },
558 {
559 .port = {
560 .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
561 .mapbase = INTEGRATOR_UART1_BASE,
562 .iotype = UPIO_MEM,
563 .irq = IRQ_UARTINT1,
564 .uartclk = 14745600,
565 .fifosize = 16,
566 .ops = &amba_pl010_pops,
567 .flags = UPF_BOOT_AUTOCONF,
568 .line = 1,
569 },
570 .dtr_mask = 1 << 7,
571 .rts_mask = 1 << 6,
572 }
573};
574 520
575#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE 521#ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
576 522
@@ -588,7 +534,7 @@ static void pl010_console_putchar(struct uart_port *port, int ch)
588static void 534static void
589pl010_console_write(struct console *co, const char *s, unsigned int count) 535pl010_console_write(struct console *co, const char *s, unsigned int count)
590{ 536{
591 struct uart_port *port = &amba_ports[co->index].port; 537 struct uart_port *port = &amba_ports[co->index]->port;
592 unsigned int status, old_cr; 538 unsigned int status, old_cr;
593 539
594 /* 540 /*
@@ -651,7 +597,7 @@ static int __init pl010_console_setup(struct console *co, char *options)
651 */ 597 */
652 if (co->index >= UART_NR) 598 if (co->index >= UART_NR)
653 co->index = 0; 599 co->index = 0;
654 port = &amba_ports[co->index].port; 600 port = &amba_ports[co->index]->port;
655 601
656 if (options) 602 if (options)
657 uart_parse_options(options, &baud, &parity, &bits, &flow); 603 uart_parse_options(options, &baud, &parity, &bits, &flow);
@@ -672,24 +618,6 @@ static struct console amba_console = {
672 .data = &amba_reg, 618 .data = &amba_reg,
673}; 619};
674 620
675static int __init amba_console_init(void)
676{
677 /*
678 * All port initializations are done statically
679 */
680 register_console(&amba_console);
681 return 0;
682}
683console_initcall(amba_console_init);
684
685static int __init amba_late_console_init(void)
686{
687 if (!(amba_console.flags & CON_ENABLED))
688 register_console(&amba_console);
689 return 0;
690}
691late_initcall(amba_late_console_init);
692
693#define AMBA_CONSOLE &amba_console 621#define AMBA_CONSOLE &amba_console
694#else 622#else
695#define AMBA_CONSOLE NULL 623#define AMBA_CONSOLE NULL
@@ -707,30 +635,76 @@ static struct uart_driver amba_reg = {
707 635
708static int pl010_probe(struct amba_device *dev, void *id) 636static int pl010_probe(struct amba_device *dev, void *id)
709{ 637{
710 int i; 638 struct uart_amba_port *port;
639 void __iomem *base;
640 int i, ret;
711 641
712 for (i = 0; i < UART_NR; i++) { 642 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
713 if (amba_ports[i].port.mapbase != dev->res.start) 643 if (amba_ports[i] == NULL)
714 continue; 644 break;
715 645
716 amba_ports[i].port.dev = &dev->dev; 646 if (i == ARRAY_SIZE(amba_ports)) {
717 uart_add_one_port(&amba_reg, &amba_ports[i].port); 647 ret = -EBUSY;
718 amba_set_drvdata(dev, &amba_ports[i]); 648 goto out;
719 break;
720 } 649 }
721 650
722 return 0; 651 port = kzalloc(sizeof(struct uart_amba_port), GFP_KERNEL);
652 if (!port) {
653 ret = -ENOMEM;
654 goto out;
655 }
656
657 base = ioremap(dev->res.start, PAGE_SIZE);
658 if (!base) {
659 ret = -ENOMEM;
660 goto free;
661 }
662
663 port->port.dev = &dev->dev;
664 port->port.mapbase = dev->res.start;
665 port->port.membase = base;
666 port->port.iotype = UPIO_MEM;
667 port->port.irq = dev->irq[0];
668 port->port.uartclk = 14745600;
669 port->port.fifosize = 16;
670 port->port.ops = &amba_pl010_pops;
671 port->port.flags = UPF_BOOT_AUTOCONF;
672 port->port.line = i;
673 port->dev = dev;
674 port->data = dev->dev.platform_data;
675
676 amba_ports[i] = port;
677
678 amba_set_drvdata(dev, port);
679 ret = uart_add_one_port(&amba_reg, &port->port);
680 if (ret) {
681 amba_set_drvdata(dev, NULL);
682 amba_ports[i] = NULL;
683 iounmap(base);
684 free:
685 kfree(port);
686 }
687
688 out:
689 return ret;
723} 690}
724 691
725static int pl010_remove(struct amba_device *dev) 692static int pl010_remove(struct amba_device *dev)
726{ 693{
727 struct uart_amba_port *uap = amba_get_drvdata(dev); 694 struct uart_amba_port *port = amba_get_drvdata(dev);
728 695 int i;
729 if (uap)
730 uart_remove_one_port(&amba_reg, &uap->port);
731 696
732 amba_set_drvdata(dev, NULL); 697 amba_set_drvdata(dev, NULL);
733 698
699 uart_remove_one_port(&amba_reg, &port->port);
700
701 for (i = 0; i < ARRAY_SIZE(amba_ports); i++)
702 if (amba_ports[i] == port)
703 amba_ports[i] = NULL;
704
705 iounmap(port->port.membase);
706 kfree(port);
707
734 return 0; 708 return 0;
735} 709}
736 710
diff --git a/drivers/serial/au1x00_uart.c b/drivers/serial/au1x00_uart.c
deleted file mode 100644
index 948880ac5878..000000000000
--- a/drivers/serial/au1x00_uart.c
+++ /dev/null
@@ -1,1287 +0,0 @@
1/*
2 * Driver for 8250/16550-type serial ports
3 *
4 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
5 *
6 * Copyright (C) 2001 Russell King.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * A note about mapbase / membase
14 *
15 * mapbase is the physical address of the IO port. Currently, we don't
16 * support this very well, and it may well be dropped from this driver
17 * in future. As such, mapbase should be NULL.
18 *
19 * membase is an 'ioremapped' cookie. This is compatible with the old
20 * serial.c driver, and is currently the preferred form.
21 */
22#include <linux/config.h>
23#include <linux/module.h>
24#include <linux/tty.h>
25#include <linux/ioport.h>
26#include <linux/init.h>
27#include <linux/console.h>
28#include <linux/sysrq.h>
29#include <linux/serial.h>
30#include <linux/serialP.h>
31#include <linux/delay.h>
32
33#include <asm/serial.h>
34#include <asm/io.h>
35#include <asm/irq.h>
36#include <asm/mach-au1x00/au1000.h>
37
38#if defined(CONFIG_SERIAL_AU1X00_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
39#define SUPPORT_SYSRQ
40#endif
41
42#include <linux/serial_core.h>
43#include "8250.h"
44
45/*
46 * Debugging.
47 */
48#if 0
49#define DEBUG_AUTOCONF(fmt...) printk(fmt)
50#else
51#define DEBUG_AUTOCONF(fmt...) do { } while (0)
52#endif
53
54#if 0
55#define DEBUG_INTR(fmt...) printk(fmt)
56#else
57#define DEBUG_INTR(fmt...) do { } while (0)
58#endif
59
60#define PASS_LIMIT 256
61
62/*
63 * We default to IRQ0 for the "no irq" hack. Some
64 * machine types want others as well - they're free
65 * to redefine this in their header file.
66 */
67#define is_real_interrupt(irq) ((irq) != 0)
68
69static struct old_serial_port old_serial_port[] = {
70 { .baud_base = 0,
71 .iomem_base = (u8 *)UART0_ADDR,
72 .irq = AU1000_UART0_INT,
73 .flags = STD_COM_FLAGS,
74 .iomem_reg_shift = 2,
75 }, {
76 .baud_base = 0,
77 .iomem_base = (u8 *)UART1_ADDR,
78 .irq = AU1000_UART1_INT,
79 .flags = STD_COM_FLAGS,
80 .iomem_reg_shift = 2
81 }, {
82 .baud_base = 0,
83 .iomem_base = (u8 *)UART2_ADDR,
84 .irq = AU1000_UART2_INT,
85 .flags = STD_COM_FLAGS,
86 .iomem_reg_shift = 2
87 }, {
88 .baud_base = 0,
89 .iomem_base = (u8 *)UART3_ADDR,
90 .irq = AU1000_UART3_INT,
91 .flags = STD_COM_FLAGS,
92 .iomem_reg_shift = 2
93 }
94};
95
96#define UART_NR ARRAY_SIZE(old_serial_port)
97
98struct uart_8250_port {
99 struct uart_port port;
100 struct timer_list timer; /* "no irq" timer */
101 struct list_head list; /* ports on this IRQ */
102 unsigned short rev;
103 unsigned char acr;
104 unsigned char ier;
105 unsigned char lcr;
106 unsigned char mcr_mask; /* mask of user bits */
107 unsigned char mcr_force; /* mask of forced bits */
108 unsigned char lsr_break_flag;
109
110 /*
111 * We provide a per-port pm hook.
112 */
113 void (*pm)(struct uart_port *port,
114 unsigned int state, unsigned int old);
115};
116
117struct irq_info {
118 spinlock_t lock;
119 struct list_head *head;
120};
121
122static struct irq_info irq_lists[NR_IRQS];
123
124/*
125 * Here we define the default xmit fifo size used for each type of UART.
126 */
127static const struct serial_uart_config uart_config[PORT_MAX_8250+1] = {
128 { "unknown", 1, 0 },
129 { "8250", 1, 0 },
130 { "16450", 1, 0 },
131 { "16550", 1, 0 },
132 /* PORT_16550A */
133 { "AU1X00_UART",16, UART_CLEAR_FIFO | UART_USE_FIFO },
134};
135
136static unsigned int serial_in(struct uart_8250_port *up, int offset)
137{
138 return au_readl((unsigned long)up->port.membase + offset);
139}
140
141static void serial_out(struct uart_8250_port *up, int offset, int value)
142{
143 au_writel(value, (unsigned long)up->port.membase + offset);
144}
145
146#define serial_inp(up, offset) serial_in(up, offset)
147#define serial_outp(up, offset, value) serial_out(up, offset, value)
148
149/*
150 * This routine is called by rs_init() to initialize a specific serial
151 * port. It determines what type of UART chip this serial port is
152 * using: 8250, 16450, 16550, 16550A. The important question is
153 * whether or not this UART is a 16550A or not, since this will
154 * determine whether or not we can use its FIFO features or not.
155 */
156static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
157{
158 unsigned char save_lcr, save_mcr;
159 unsigned long flags;
160
161 if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
162 return;
163
164 DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%08lx): ",
165 up->port.line, up->port.iobase, up->port.membase);
166
167 /*
168 * We really do need global IRQs disabled here - we're going to
169 * be frobbing the chips IRQ enable register to see if it exists.
170 */
171 spin_lock_irqsave(&up->port.lock, flags);
172// save_flags(flags); cli();
173
174 save_mcr = serial_in(up, UART_MCR);
175 save_lcr = serial_in(up, UART_LCR);
176
177 up->port.type = PORT_16550A;
178 serial_outp(up, UART_LCR, save_lcr);
179
180 up->port.fifosize = uart_config[up->port.type].dfl_xmit_fifo_size;
181
182 if (up->port.type == PORT_UNKNOWN)
183 goto out;
184
185 /*
186 * Reset the UART.
187 */
188 serial_outp(up, UART_MCR, save_mcr);
189 serial_outp(up, UART_FCR, (UART_FCR_ENABLE_FIFO |
190 UART_FCR_CLEAR_RCVR |
191 UART_FCR_CLEAR_XMIT));
192 serial_outp(up, UART_FCR, 0);
193 (void)serial_in(up, UART_RX);
194 serial_outp(up, UART_IER, 0);
195
196 out:
197 spin_unlock_irqrestore(&up->port.lock, flags);
198// restore_flags(flags);
199 DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
200}
201
202static void serial8250_stop_tx(struct uart_port *port)
203{
204 struct uart_8250_port *up = (struct uart_8250_port *)port;
205
206 if (up->ier & UART_IER_THRI) {
207 up->ier &= ~UART_IER_THRI;
208 serial_out(up, UART_IER, up->ier);
209 }
210}
211
212static void serial8250_start_tx(struct uart_port *port)
213{
214 struct uart_8250_port *up = (struct uart_8250_port *)port;
215
216 if (!(up->ier & UART_IER_THRI)) {
217 up->ier |= UART_IER_THRI;
218 serial_out(up, UART_IER, up->ier);
219 }
220}
221
222static void serial8250_stop_rx(struct uart_port *port)
223{
224 struct uart_8250_port *up = (struct uart_8250_port *)port;
225
226 up->ier &= ~UART_IER_RLSI;
227 up->port.read_status_mask &= ~UART_LSR_DR;
228 serial_out(up, UART_IER, up->ier);
229}
230
231static void serial8250_enable_ms(struct uart_port *port)
232{
233 struct uart_8250_port *up = (struct uart_8250_port *)port;
234
235 up->ier |= UART_IER_MSI;
236 serial_out(up, UART_IER, up->ier);
237}
238
239static void
240receive_chars(struct uart_8250_port *up, int *status, struct pt_regs *regs)
241{
242 struct tty_struct *tty = up->port.info->tty;
243 unsigned char ch, flag;
244 int max_count = 256;
245
246 do {
247 ch = serial_inp(up, UART_RX);
248 flag = TTY_NORMAL;
249 up->port.icount.rx++;
250
251 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
252 UART_LSR_FE | UART_LSR_OE))) {
253 /*
254 * For statistics only
255 */
256 if (*status & UART_LSR_BI) {
257 *status &= ~(UART_LSR_FE | UART_LSR_PE);
258 up->port.icount.brk++;
259 /*
260 * We do the SysRQ and SAK checking
261 * here because otherwise the break
262 * may get masked by ignore_status_mask
263 * or read_status_mask.
264 */
265 if (uart_handle_break(&up->port))
266 goto ignore_char;
267 } else if (*status & UART_LSR_PE)
268 up->port.icount.parity++;
269 else if (*status & UART_LSR_FE)
270 up->port.icount.frame++;
271 if (*status & UART_LSR_OE)
272 up->port.icount.overrun++;
273
274 /*
275 * Mask off conditions which should be ingored.
276 */
277 *status &= up->port.read_status_mask;
278
279#ifdef CONFIG_SERIAL_AU1X00_CONSOLE
280 if (up->port.line == up->port.cons->index) {
281 /* Recover the break flag from console xmit */
282 *status |= up->lsr_break_flag;
283 up->lsr_break_flag = 0;
284 }
285#endif
286 if (*status & UART_LSR_BI) {
287 DEBUG_INTR("handling break....");
288 flag = TTY_BREAK;
289 } else if (*status & UART_LSR_PE)
290 flag = TTY_PARITY;
291 else if (*status & UART_LSR_FE)
292 flag = TTY_FRAME;
293 }
294 if (uart_handle_sysrq_char(&up->port, ch, regs))
295 goto ignore_char;
296 if ((*status & up->port.ignore_status_mask) == 0)
297 tty_insert_flip_char(tty, ch, flag);
298 if (*status & UART_LSR_OE)
299 /*
300 * Overrun is special, since it's reported
301 * immediately, and doesn't affect the current
302 * character.
303 */
304 tty_insert_flip_char(tty, 0, TTY_OVERRUN);
305 }
306 ignore_char:
307 *status = serial_inp(up, UART_LSR);
308 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
309 spin_unlock(&up->port.lock);
310 tty_flip_buffer_push(tty);
311 spin_lock(&up->port.lock);
312}
313
314static void transmit_chars(struct uart_8250_port *up)
315{
316 struct circ_buf *xmit = &up->port.info->xmit;
317 int count;
318
319 if (up->port.x_char) {
320 serial_outp(up, UART_TX, up->port.x_char);
321 up->port.icount.tx++;
322 up->port.x_char = 0;
323 return;
324 }
325 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
326 serial8250_stop_tx(&up->port);
327 return;
328 }
329
330 count = up->port.fifosize;
331 do {
332 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
333 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
334 up->port.icount.tx++;
335 if (uart_circ_empty(xmit))
336 break;
337 } while (--count > 0);
338
339 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
340 uart_write_wakeup(&up->port);
341
342 DEBUG_INTR("THRE...");
343
344 if (uart_circ_empty(xmit))
345 serial8250_stop_tx(&up->port);
346}
347
348static void check_modem_status(struct uart_8250_port *up)
349{
350 int status;
351
352 status = serial_in(up, UART_MSR);
353
354 if ((status & UART_MSR_ANY_DELTA) == 0)
355 return;
356
357 if (status & UART_MSR_TERI)
358 up->port.icount.rng++;
359 if (status & UART_MSR_DDSR)
360 up->port.icount.dsr++;
361 if (status & UART_MSR_DDCD)
362 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
363 if (status & UART_MSR_DCTS)
364 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
365
366 wake_up_interruptible(&up->port.info->delta_msr_wait);
367}
368
369/*
370 * This handles the interrupt from one port.
371 */
372static inline void
373serial8250_handle_port(struct uart_8250_port *up, struct pt_regs *regs)
374{
375 unsigned int status = serial_inp(up, UART_LSR);
376
377 DEBUG_INTR("status = %x...", status);
378
379 if (status & UART_LSR_DR)
380 receive_chars(up, &status, regs);
381 check_modem_status(up);
382 if (status & UART_LSR_THRE)
383 transmit_chars(up);
384}
385
386/*
387 * This is the serial driver's interrupt routine.
388 *
389 * Arjan thinks the old way was overly complex, so it got simplified.
390 * Alan disagrees, saying that need the complexity to handle the weird
391 * nature of ISA shared interrupts. (This is a special exception.)
392 *
393 * In order to handle ISA shared interrupts properly, we need to check
394 * that all ports have been serviced, and therefore the ISA interrupt
395 * line has been de-asserted.
396 *
397 * This means we need to loop through all ports. checking that they
398 * don't have an interrupt pending.
399 */
400static irqreturn_t serial8250_interrupt(int irq, void *dev_id, struct pt_regs *regs)
401{
402 struct irq_info *i = dev_id;
403 struct list_head *l, *end = NULL;
404 int pass_counter = 0;
405
406 DEBUG_INTR("serial8250_interrupt(%d)...", irq);
407
408 spin_lock(&i->lock);
409
410 l = i->head;
411 do {
412 struct uart_8250_port *up;
413 unsigned int iir;
414
415 up = list_entry(l, struct uart_8250_port, list);
416
417 iir = serial_in(up, UART_IIR);
418 if (!(iir & UART_IIR_NO_INT)) {
419 spin_lock(&up->port.lock);
420 serial8250_handle_port(up, regs);
421 spin_unlock(&up->port.lock);
422
423 end = NULL;
424 } else if (end == NULL)
425 end = l;
426
427 l = l->next;
428
429 if (l == i->head && pass_counter++ > PASS_LIMIT) {
430 /* If we hit this, we're dead. */
431 printk(KERN_ERR "serial8250: too much work for "
432 "irq%d\n", irq);
433 break;
434 }
435 } while (l != end);
436
437 spin_unlock(&i->lock);
438
439 DEBUG_INTR("end.\n");
440 /* FIXME! Was it really ours? */
441 return IRQ_HANDLED;
442}
443
444/*
445 * To support ISA shared interrupts, we need to have one interrupt
446 * handler that ensures that the IRQ line has been deasserted
447 * before returning. Failing to do this will result in the IRQ
448 * line being stuck active, and, since ISA irqs are edge triggered,
449 * no more IRQs will be seen.
450 */
451static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
452{
453 spin_lock_irq(&i->lock);
454
455 if (!list_empty(i->head)) {
456 if (i->head == &up->list)
457 i->head = i->head->next;
458 list_del(&up->list);
459 } else {
460 BUG_ON(i->head != &up->list);
461 i->head = NULL;
462 }
463
464 spin_unlock_irq(&i->lock);
465}
466
467static int serial_link_irq_chain(struct uart_8250_port *up)
468{
469 struct irq_info *i = irq_lists + up->port.irq;
470 int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? SA_SHIRQ : 0;
471
472 spin_lock_irq(&i->lock);
473
474 if (i->head) {
475 list_add(&up->list, i->head);
476 spin_unlock_irq(&i->lock);
477
478 ret = 0;
479 } else {
480 INIT_LIST_HEAD(&up->list);
481 i->head = &up->list;
482 spin_unlock_irq(&i->lock);
483
484 ret = request_irq(up->port.irq, serial8250_interrupt,
485 irq_flags, "serial", i);
486 if (ret < 0)
487 serial_do_unlink(i, up);
488 }
489
490 return ret;
491}
492
493static void serial_unlink_irq_chain(struct uart_8250_port *up)
494{
495 struct irq_info *i = irq_lists + up->port.irq;
496
497 BUG_ON(i->head == NULL);
498
499 if (list_empty(i->head))
500 free_irq(up->port.irq, i);
501
502 serial_do_unlink(i, up);
503}
504
505/*
506 * This function is used to handle ports that do not have an
507 * interrupt. This doesn't work very well for 16450's, but gives
508 * barely passable results for a 16550A. (Although at the expense
509 * of much CPU overhead).
510 */
511static void serial8250_timeout(unsigned long data)
512{
513 struct uart_8250_port *up = (struct uart_8250_port *)data;
514 unsigned int timeout;
515 unsigned int iir;
516
517 iir = serial_in(up, UART_IIR);
518 if (!(iir & UART_IIR_NO_INT)) {
519 spin_lock(&up->port.lock);
520 serial8250_handle_port(up, NULL);
521 spin_unlock(&up->port.lock);
522 }
523
524 timeout = up->port.timeout;
525 timeout = timeout > 6 ? (timeout / 2 - 2) : 1;
526 mod_timer(&up->timer, jiffies + timeout);
527}
528
529static unsigned int serial8250_tx_empty(struct uart_port *port)
530{
531 struct uart_8250_port *up = (struct uart_8250_port *)port;
532 unsigned long flags;
533 unsigned int ret;
534
535 spin_lock_irqsave(&up->port.lock, flags);
536 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
537 spin_unlock_irqrestore(&up->port.lock, flags);
538
539 return ret;
540}
541
542static unsigned int serial8250_get_mctrl(struct uart_port *port)
543{
544 struct uart_8250_port *up = (struct uart_8250_port *)port;
545 unsigned char status;
546 unsigned int ret;
547
548 status = serial_in(up, UART_MSR);
549
550 ret = 0;
551 if (status & UART_MSR_DCD)
552 ret |= TIOCM_CAR;
553 if (status & UART_MSR_RI)
554 ret |= TIOCM_RNG;
555 if (status & UART_MSR_DSR)
556 ret |= TIOCM_DSR;
557 if (status & UART_MSR_CTS)
558 ret |= TIOCM_CTS;
559 return ret;
560}
561
562static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
563{
564 struct uart_8250_port *up = (struct uart_8250_port *)port;
565 unsigned char mcr = 0;
566
567 if (mctrl & TIOCM_RTS)
568 mcr |= UART_MCR_RTS;
569 if (mctrl & TIOCM_DTR)
570 mcr |= UART_MCR_DTR;
571 if (mctrl & TIOCM_OUT1)
572 mcr |= UART_MCR_OUT1;
573 if (mctrl & TIOCM_OUT2)
574 mcr |= UART_MCR_OUT2;
575 if (mctrl & TIOCM_LOOP)
576 mcr |= UART_MCR_LOOP;
577
578 mcr = (mcr & up->mcr_mask) | up->mcr_force;
579
580 serial_out(up, UART_MCR, mcr);
581}
582
583static void serial8250_break_ctl(struct uart_port *port, int break_state)
584{
585 struct uart_8250_port *up = (struct uart_8250_port *)port;
586 unsigned long flags;
587
588 spin_lock_irqsave(&up->port.lock, flags);
589 if (break_state == -1)
590 up->lcr |= UART_LCR_SBC;
591 else
592 up->lcr &= ~UART_LCR_SBC;
593 serial_out(up, UART_LCR, up->lcr);
594 spin_unlock_irqrestore(&up->port.lock, flags);
595}
596
597static int serial8250_startup(struct uart_port *port)
598{
599 struct uart_8250_port *up = (struct uart_8250_port *)port;
600 unsigned long flags;
601 int retval;
602
603 /*
604 * Clear the FIFO buffers and disable them.
605 * (they will be reeanbled in set_termios())
606 */
607 if (uart_config[up->port.type].flags & UART_CLEAR_FIFO) {
608 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
609 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
610 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
611 serial_outp(up, UART_FCR, 0);
612 }
613
614 /*
615 * Clear the interrupt registers.
616 */
617 (void) serial_inp(up, UART_LSR);
618 (void) serial_inp(up, UART_RX);
619 (void) serial_inp(up, UART_IIR);
620 (void) serial_inp(up, UART_MSR);
621
622 /*
623 * At this point, there's no way the LSR could still be 0xff;
624 * if it is, then bail out, because there's likely no UART
625 * here.
626 */
627 if (!(up->port.flags & UPF_BUGGY_UART) &&
628 (serial_inp(up, UART_LSR) == 0xff)) {
629 printk("ttyS%d: LSR safety check engaged!\n", up->port.line);
630 return -ENODEV;
631 }
632
633 retval = serial_link_irq_chain(up);
634 if (retval)
635 return retval;
636
637 /*
638 * Now, initialize the UART
639 */
640 serial_outp(up, UART_LCR, UART_LCR_WLEN8);
641
642 spin_lock_irqsave(&up->port.lock, flags);
643 if (up->port.flags & UPF_FOURPORT) {
644 if (!is_real_interrupt(up->port.irq))
645 up->port.mctrl |= TIOCM_OUT1;
646 } else
647 /*
648 * Most PC uarts need OUT2 raised to enable interrupts.
649 */
650 if (is_real_interrupt(up->port.irq))
651 up->port.mctrl |= TIOCM_OUT2;
652
653 serial8250_set_mctrl(&up->port, up->port.mctrl);
654 spin_unlock_irqrestore(&up->port.lock, flags);
655
656 /*
657 * Finally, enable interrupts. Note: Modem status interrupts
658 * are set via set_termios(), which will be occurring imminently
659 * anyway, so we don't enable them here.
660 */
661 up->ier = UART_IER_RLSI | UART_IER_RDI;
662 serial_outp(up, UART_IER, up->ier);
663
664 if (up->port.flags & UPF_FOURPORT) {
665 unsigned int icp;
666 /*
667 * Enable interrupts on the AST Fourport board
668 */
669 icp = (up->port.iobase & 0xfe0) | 0x01f;
670 outb_p(0x80, icp);
671 (void) inb_p(icp);
672 }
673
674 /*
675 * And clear the interrupt registers again for luck.
676 */
677 (void) serial_inp(up, UART_LSR);
678 (void) serial_inp(up, UART_RX);
679 (void) serial_inp(up, UART_IIR);
680 (void) serial_inp(up, UART_MSR);
681
682 return 0;
683}
684
685static void serial8250_shutdown(struct uart_port *port)
686{
687 struct uart_8250_port *up = (struct uart_8250_port *)port;
688 unsigned long flags;
689
690 /*
691 * Disable interrupts from this port
692 */
693 up->ier = 0;
694 serial_outp(up, UART_IER, 0);
695
696 spin_lock_irqsave(&up->port.lock, flags);
697 if (up->port.flags & UPF_FOURPORT) {
698 /* reset interrupts on the AST Fourport board */
699 inb((up->port.iobase & 0xfe0) | 0x1f);
700 up->port.mctrl |= TIOCM_OUT1;
701 } else
702 up->port.mctrl &= ~TIOCM_OUT2;
703
704 serial8250_set_mctrl(&up->port, up->port.mctrl);
705 spin_unlock_irqrestore(&up->port.lock, flags);
706
707 /*
708 * Disable break condition and FIFOs
709 */
710 serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
711 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
712 UART_FCR_CLEAR_RCVR |
713 UART_FCR_CLEAR_XMIT);
714 serial_outp(up, UART_FCR, 0);
715
716 /*
717 * Read data port to reset things, and then unlink from
718 * the IRQ chain.
719 */
720 (void) serial_in(up, UART_RX);
721
722 if (!is_real_interrupt(up->port.irq))
723 del_timer_sync(&up->timer);
724 else
725 serial_unlink_irq_chain(up);
726}
727
728static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
729{
730 unsigned int quot;
731
732 /*
733 * Handle magic divisors for baud rates above baud_base on
734 * SMSC SuperIO chips.
735 */
736 if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
737 baud == (port->uartclk/4))
738 quot = 0x8001;
739 else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
740 baud == (port->uartclk/8))
741 quot = 0x8002;
742 else
743 quot = uart_get_divisor(port, baud);
744
745 return quot;
746}
747
748static void
749serial8250_set_termios(struct uart_port *port, struct termios *termios,
750 struct termios *old)
751{
752 struct uart_8250_port *up = (struct uart_8250_port *)port;
753 unsigned char cval, fcr = 0;
754 unsigned long flags;
755 unsigned int baud, quot;
756
757 switch (termios->c_cflag & CSIZE) {
758 case CS5:
759 cval = UART_LCR_WLEN5;
760 break;
761 case CS6:
762 cval = UART_LCR_WLEN6;
763 break;
764 case CS7:
765 cval = UART_LCR_WLEN7;
766 break;
767 default:
768 case CS8:
769 cval = UART_LCR_WLEN8;
770 break;
771 }
772
773 if (termios->c_cflag & CSTOPB)
774 cval |= UART_LCR_STOP;
775 if (termios->c_cflag & PARENB)
776 cval |= UART_LCR_PARITY;
777 if (!(termios->c_cflag & PARODD))
778 cval |= UART_LCR_EPAR;
779#ifdef CMSPAR
780 if (termios->c_cflag & CMSPAR)
781 cval |= UART_LCR_SPAR;
782#endif
783
784 /*
785 * Ask the core to calculate the divisor for us.
786 */
787 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
788 quot = serial8250_get_divisor(port, baud);
789 quot = 0x35; /* FIXME */
790
791 /*
792 * Work around a bug in the Oxford Semiconductor 952 rev B
793 * chip which causes it to seriously miscalculate baud rates
794 * when DLL is 0.
795 */
796 if ((quot & 0xff) == 0 && up->port.type == PORT_16C950 &&
797 up->rev == 0x5201)
798 quot ++;
799
800 if (uart_config[up->port.type].flags & UART_USE_FIFO) {
801 if (baud < 2400)
802 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIGGER_1;
803 else
804 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIGGER_8;
805 }
806
807 /*
808 * Ok, we're now changing the port state. Do it with
809 * interrupts disabled.
810 */
811 spin_lock_irqsave(&up->port.lock, flags);
812
813 /*
814 * Update the per-port timeout.
815 */
816 uart_update_timeout(port, termios->c_cflag, baud);
817
818 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
819 if (termios->c_iflag & INPCK)
820 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
821 if (termios->c_iflag & (BRKINT | PARMRK))
822 up->port.read_status_mask |= UART_LSR_BI;
823
824 /*
825 * Characteres to ignore
826 */
827 up->port.ignore_status_mask = 0;
828 if (termios->c_iflag & IGNPAR)
829 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
830 if (termios->c_iflag & IGNBRK) {
831 up->port.ignore_status_mask |= UART_LSR_BI;
832 /*
833 * If we're ignoring parity and break indicators,
834 * ignore overruns too (for real raw support).
835 */
836 if (termios->c_iflag & IGNPAR)
837 up->port.ignore_status_mask |= UART_LSR_OE;
838 }
839
840 /*
841 * ignore all characters if CREAD is not set
842 */
843 if ((termios->c_cflag & CREAD) == 0)
844 up->port.ignore_status_mask |= UART_LSR_DR;
845
846 /*
847 * CTS flow control flag and modem status interrupts
848 */
849 up->ier &= ~UART_IER_MSI;
850 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
851 up->ier |= UART_IER_MSI;
852
853 serial_out(up, UART_IER, up->ier);
854 serial_outp(up, 0x28, quot & 0xffff);
855 up->lcr = cval; /* Save LCR */
856 if (up->port.type != PORT_16750) {
857 if (fcr & UART_FCR_ENABLE_FIFO) {
858 /* emulated UARTs (Lucent Venus 167x) need two steps */
859 serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
860 }
861 serial_outp(up, UART_FCR, fcr); /* set fcr */
862 }
863 spin_unlock_irqrestore(&up->port.lock, flags);
864}
865
866static void
867serial8250_pm(struct uart_port *port, unsigned int state,
868 unsigned int oldstate)
869{
870 struct uart_8250_port *up = (struct uart_8250_port *)port;
871 if (state) {
872 /* sleep */
873 if (up->pm)
874 up->pm(port, state, oldstate);
875 } else {
876 /* wake */
877 if (up->pm)
878 up->pm(port, state, oldstate);
879 }
880}
881
882/*
883 * Resource handling. This is complicated by the fact that resources
884 * depend on the port type. Maybe we should be claiming the standard
885 * 8250 ports, and then trying to get other resources as necessary?
886 */
887static int
888serial8250_request_std_resource(struct uart_8250_port *up, struct resource **res)
889{
890 unsigned int size = 8 << up->port.regshift;
891 int ret = 0;
892
893 switch (up->port.iotype) {
894 case UPIO_MEM:
895 if (up->port.mapbase) {
896 *res = request_mem_region(up->port.mapbase, size, "serial");
897 if (!*res)
898 ret = -EBUSY;
899 }
900 break;
901
902 case UPIO_HUB6:
903 case UPIO_PORT:
904 *res = request_region(up->port.iobase, size, "serial");
905 if (!*res)
906 ret = -EBUSY;
907 break;
908 }
909 return ret;
910}
911
912
913static void serial8250_release_port(struct uart_port *port)
914{
915 struct uart_8250_port *up = (struct uart_8250_port *)port;
916 unsigned long start, offset = 0, size = 0;
917
918 size <<= up->port.regshift;
919
920 switch (up->port.iotype) {
921 case UPIO_MEM:
922 if (up->port.mapbase) {
923 /*
924 * Unmap the area.
925 */
926 iounmap(up->port.membase);
927 up->port.membase = NULL;
928
929 start = up->port.mapbase;
930
931 if (size)
932 release_mem_region(start + offset, size);
933 release_mem_region(start, 8 << up->port.regshift);
934 }
935 break;
936
937 case UPIO_HUB6:
938 case UPIO_PORT:
939 start = up->port.iobase;
940
941 if (size)
942 release_region(start + offset, size);
943 release_region(start + offset, 8 << up->port.regshift);
944 break;
945
946 default:
947 break;
948 }
949}
950
951static int serial8250_request_port(struct uart_port *port)
952{
953 struct uart_8250_port *up = (struct uart_8250_port *)port;
954 struct resource *res = NULL, *res_rsa = NULL;
955 int ret = 0;
956
957 ret = serial8250_request_std_resource(up, &res);
958
959 /*
960 * If we have a mapbase, then request that as well.
961 */
962 if (ret == 0 && up->port.flags & UPF_IOREMAP) {
963 int size = res->end - res->start + 1;
964
965 up->port.membase = ioremap(up->port.mapbase, size);
966 if (!up->port.membase)
967 ret = -ENOMEM;
968 }
969
970 if (ret < 0) {
971 if (res_rsa)
972 release_resource(res_rsa);
973 if (res)
974 release_resource(res);
975 }
976 return ret;
977}
978
979static void serial8250_config_port(struct uart_port *port, int flags)
980{
981 struct uart_8250_port *up = (struct uart_8250_port *)port;
982 struct resource *res_std = NULL, *res_rsa = NULL;
983 int probeflags = PROBE_ANY;
984
985 probeflags &= ~PROBE_RSA;
986
987 if (flags & UART_CONFIG_TYPE)
988 autoconfig(up, probeflags);
989
990 /*
991 * If the port wasn't an RSA port, release the resource.
992 */
993 if (up->port.type != PORT_RSA && res_rsa)
994 release_resource(res_rsa);
995
996 if (up->port.type == PORT_UNKNOWN && res_std)
997 release_resource(res_std);
998}
999
1000static int
1001serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
1002{
1003 if (ser->irq >= NR_IRQS || ser->irq < 0 ||
1004 ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
1005 ser->type > PORT_MAX_8250 || ser->type == PORT_CIRRUS ||
1006 ser->type == PORT_STARTECH)
1007 return -EINVAL;
1008 return 0;
1009}
1010
1011static const char *
1012serial8250_type(struct uart_port *port)
1013{
1014 int type = port->type;
1015
1016 if (type >= ARRAY_SIZE(uart_config))
1017 type = 0;
1018 return uart_config[type].name;
1019}
1020
1021static struct uart_ops serial8250_pops = {
1022 .tx_empty = serial8250_tx_empty,
1023 .set_mctrl = serial8250_set_mctrl,
1024 .get_mctrl = serial8250_get_mctrl,
1025 .stop_tx = serial8250_stop_tx,
1026 .start_tx = serial8250_start_tx,
1027 .stop_rx = serial8250_stop_rx,
1028 .enable_ms = serial8250_enable_ms,
1029 .break_ctl = serial8250_break_ctl,
1030 .startup = serial8250_startup,
1031 .shutdown = serial8250_shutdown,
1032 .set_termios = serial8250_set_termios,
1033 .pm = serial8250_pm,
1034 .type = serial8250_type,
1035 .release_port = serial8250_release_port,
1036 .request_port = serial8250_request_port,
1037 .config_port = serial8250_config_port,
1038 .verify_port = serial8250_verify_port,
1039};
1040
1041static struct uart_8250_port serial8250_ports[UART_NR];
1042
1043static void __init serial8250_isa_init_ports(void)
1044{
1045 struct uart_8250_port *up;
1046 static int first = 1;
1047 int i;
1048
1049 if (!first)
1050 return;
1051 first = 0;
1052
1053 for (i = 0, up = serial8250_ports; i < ARRAY_SIZE(old_serial_port);
1054 i++, up++) {
1055 up->port.iobase = old_serial_port[i].port;
1056 up->port.irq = old_serial_port[i].irq;
1057 up->port.uartclk = get_au1x00_uart_baud_base();
1058 up->port.flags = old_serial_port[i].flags;
1059 up->port.hub6 = old_serial_port[i].hub6;
1060 up->port.membase = old_serial_port[i].iomem_base;
1061 up->port.iotype = old_serial_port[i].io_type;
1062 up->port.regshift = old_serial_port[i].iomem_reg_shift;
1063 up->port.ops = &serial8250_pops;
1064 }
1065}
1066
1067static void __init serial8250_register_ports(struct uart_driver *drv)
1068{
1069 int i;
1070
1071 serial8250_isa_init_ports();
1072
1073 for (i = 0; i < UART_NR; i++) {
1074 struct uart_8250_port *up = &serial8250_ports[i];
1075
1076 up->port.line = i;
1077 up->port.ops = &serial8250_pops;
1078 init_timer(&up->timer);
1079 up->timer.function = serial8250_timeout;
1080
1081 /*
1082 * ALPHA_KLUDGE_MCR needs to be killed.
1083 */
1084 up->mcr_mask = ~ALPHA_KLUDGE_MCR;
1085 up->mcr_force = ALPHA_KLUDGE_MCR;
1086
1087 uart_add_one_port(drv, &up->port);
1088 }
1089}
1090
1091#ifdef CONFIG_SERIAL_AU1X00_CONSOLE
1092
1093#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
1094
1095/*
1096 * Wait for transmitter & holding register to empty
1097 */
1098static inline void wait_for_xmitr(struct uart_8250_port *up)
1099{
1100 unsigned int status, tmout = 10000;
1101
1102 /* Wait up to 10ms for the character(s) to be sent. */
1103 do {
1104 status = serial_in(up, UART_LSR);
1105
1106 if (status & UART_LSR_BI)
1107 up->lsr_break_flag = UART_LSR_BI;
1108
1109 if (--tmout == 0)
1110 break;
1111 udelay(1);
1112 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
1113
1114 /* Wait up to 1s for flow control if necessary */
1115 if (up->port.flags & UPF_CONS_FLOW) {
1116 tmout = 1000000;
1117 while (--tmout &&
1118 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
1119 udelay(1);
1120 }
1121}
1122
1123static void au1x00_console_putchar(struct uart_port *port, int ch)
1124{
1125 struct uart_8250_port *up = (struct uart_8250_port *)port;
1126
1127 wait_for_xmitr(up);
1128 serial_out(up, UART_TX, ch);
1129}
1130
1131/*
1132 * Print a string to the serial port trying not to disturb
1133 * any possible real use of the port...
1134 *
1135 * The console_lock must be held when we get here.
1136 */
1137static void
1138serial8250_console_write(struct console *co, const char *s, unsigned int count)
1139{
1140 struct uart_8250_port *up = &serial8250_ports[co->index];
1141 unsigned int ier;
1142
1143 /*
1144 * First save the UER then disable the interrupts
1145 */
1146 ier = serial_in(up, UART_IER);
1147 serial_out(up, UART_IER, 0);
1148
1149 uart_console_write(&up->port, s, count, au1x00_console_putchar);
1150
1151 /*
1152 * Finally, wait for transmitter to become empty
1153 * and restore the IER
1154 */
1155 wait_for_xmitr(up);
1156 serial_out(up, UART_IER, ier);
1157}
1158
1159static int __init serial8250_console_setup(struct console *co, char *options)
1160{
1161 struct uart_port *port;
1162 int baud = 9600;
1163 int bits = 8;
1164 int parity = 'n';
1165 int flow = 'n';
1166
1167 /*
1168 * Check whether an invalid uart number has been specified, and
1169 * if so, search for the first available port that does have
1170 * console support.
1171 */
1172 if (co->index >= UART_NR)
1173 co->index = 0;
1174 port = &serial8250_ports[co->index].port;
1175
1176 /*
1177 * Temporary fix.
1178 */
1179 spin_lock_init(&port->lock);
1180
1181 if (options)
1182 uart_parse_options(options, &baud, &parity, &bits, &flow);
1183
1184 return uart_set_options(port, co, baud, parity, bits, flow);
1185}
1186
1187extern struct uart_driver serial8250_reg;
1188static struct console serial8250_console = {
1189 .name = "ttyS",
1190 .write = serial8250_console_write,
1191 .device = uart_console_device,
1192 .setup = serial8250_console_setup,
1193 .flags = CON_PRINTBUFFER,
1194 .index = -1,
1195 .data = &serial8250_reg,
1196};
1197
1198static int __init serial8250_console_init(void)
1199{
1200 serial8250_isa_init_ports();
1201 register_console(&serial8250_console);
1202 return 0;
1203}
1204console_initcall(serial8250_console_init);
1205
1206#define SERIAL8250_CONSOLE &serial8250_console
1207#else
1208#define SERIAL8250_CONSOLE NULL
1209#endif
1210
1211static struct uart_driver serial8250_reg = {
1212 .owner = THIS_MODULE,
1213 .driver_name = "serial",
1214 .devfs_name = "tts/",
1215 .dev_name = "ttyS",
1216 .major = TTY_MAJOR,
1217 .minor = 64,
1218 .nr = UART_NR,
1219 .cons = SERIAL8250_CONSOLE,
1220};
1221
1222int __init early_serial_setup(struct uart_port *port)
1223{
1224 serial8250_isa_init_ports();
1225 serial8250_ports[port->line].port = *port;
1226 serial8250_ports[port->line].port.ops = &serial8250_pops;
1227 return 0;
1228}
1229
1230/**
1231 * serial8250_suspend_port - suspend one serial port
1232 * @line: serial line number
1233 * @level: the level of port suspension, as per uart_suspend_port
1234 *
1235 * Suspend one serial port.
1236 */
1237void serial8250_suspend_port(int line)
1238{
1239 uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
1240}
1241
1242/**
1243 * serial8250_resume_port - resume one serial port
1244 * @line: serial line number
1245 * @level: the level of port resumption, as per uart_resume_port
1246 *
1247 * Resume one serial port.
1248 */
1249void serial8250_resume_port(int line)
1250{
1251 uart_resume_port(&serial8250_reg, &serial8250_ports[line].port);
1252}
1253
1254static int __init serial8250_init(void)
1255{
1256 int ret, i;
1257
1258 printk(KERN_INFO "Serial: Au1x00 driver\n");
1259
1260 for (i = 0; i < NR_IRQS; i++)
1261 spin_lock_init(&irq_lists[i].lock);
1262
1263 ret = uart_register_driver(&serial8250_reg);
1264 if (ret >= 0)
1265 serial8250_register_ports(&serial8250_reg);
1266
1267 return ret;
1268}
1269
1270static void __exit serial8250_exit(void)
1271{
1272 int i;
1273
1274 for (i = 0; i < UART_NR; i++)
1275 uart_remove_one_port(&serial8250_reg, &serial8250_ports[i].port);
1276
1277 uart_unregister_driver(&serial8250_reg);
1278}
1279
1280module_init(serial8250_init);
1281module_exit(serial8250_exit);
1282
1283EXPORT_SYMBOL(serial8250_suspend_port);
1284EXPORT_SYMBOL(serial8250_resume_port);
1285
1286MODULE_LICENSE("GPL");
1287MODULE_DESCRIPTION("Au1x00 serial driver\n");
diff --git a/include/asm-mips/serial.h b/include/asm-mips/serial.h
index e796d75f027e..7b2366412203 100644
--- a/include/asm-mips/serial.h
+++ b/include/asm-mips/serial.h
@@ -103,88 +103,6 @@
103#define IVR_SERIAL_PORT_DEFNS 103#define IVR_SERIAL_PORT_DEFNS
104#endif 104#endif
105 105
106#ifdef CONFIG_SERIAL_AU1X00
107#include <asm/mach-au1x00/au1000.h>
108#ifdef CONFIG_SOC_AU1000
109#define AU1000_SERIAL_PORT_DEFNS \
110 { .baud_base = 0, .port = UART0_ADDR, \
111 .iomem_base = (unsigned char *)UART0_ADDR, \
112 .irq = AU1000_UART0_INT, .flags = STD_COM_FLAGS, \
113 .iomem_reg_shift = 2 }, \
114 { .baud_base = 0, .port = UART1_ADDR, \
115 .iomem_base = (unsigned char *)UART1_ADDR, \
116 .irq = AU1000_UART1_INT, .flags = STD_COM_FLAGS, \
117 .iomem_reg_shift = 2 }, \
118 { .baud_base = 0, .port = UART2_ADDR, \
119 .iomem_base = (unsigned char *)UART2_ADDR, \
120 .irq = AU1000_UART2_INT, .flags = STD_COM_FLAGS, \
121 .iomem_reg_shift = 2 }, \
122 { .baud_base = 0, .port = UART3_ADDR, \
123 .iomem_base = (unsigned char *)UART3_ADDR, \
124 .irq = AU1000_UART3_INT, .flags = STD_COM_FLAGS, \
125 .iomem_reg_shift = 2 },
126#endif
127
128#ifdef CONFIG_SOC_AU1500
129#define AU1000_SERIAL_PORT_DEFNS \
130 { .baud_base = 0, .port = UART0_ADDR, \
131 .iomem_base = (unsigned char *)UART0_ADDR, \
132 .irq = AU1500_UART0_INT, .flags = STD_COM_FLAGS, \
133 .iomem_reg_shift = 2 }, \
134 { .baud_base = 0, .port = UART3_ADDR, \
135 .iomem_base = (unsigned char *)UART3_ADDR, \
136 .irq = AU1500_UART3_INT, .flags = STD_COM_FLAGS, \
137 .iomem_reg_shift = 2 },
138#endif
139
140#ifdef CONFIG_SOC_AU1100
141#define AU1000_SERIAL_PORT_DEFNS \
142 { .baud_base = 0, .port = UART0_ADDR, \
143 .iomem_base = (unsigned char *)UART0_ADDR, \
144 .irq = AU1100_UART0_INT, .flags = STD_COM_FLAGS, \
145 .iomem_reg_shift = 2 }, \
146 { .baud_base = 0, .port = UART1_ADDR, \
147 .iomem_base = (unsigned char *)UART1_ADDR, \
148 .irq = AU1100_UART1_INT, .flags = STD_COM_FLAGS, \
149 .iomem_reg_shift = 2 }, \
150 { .baud_base = 0, .port = UART3_ADDR, \
151 .iomem_base = (unsigned char *)UART3_ADDR, \
152 .irq = AU1100_UART3_INT, .flags = STD_COM_FLAGS, \
153 .iomem_reg_shift = 2 },
154#endif
155
156#ifdef CONFIG_SOC_AU1550
157#define AU1000_SERIAL_PORT_DEFNS \
158 { .baud_base = 0, .port = UART0_ADDR, \
159 .iomem_base = (unsigned char *)UART0_ADDR, \
160 .irq = AU1550_UART0_INT, .flags = STD_COM_FLAGS, \
161 .iomem_reg_shift = 2 }, \
162 { .baud_base = 0, .port = UART1_ADDR, \
163 .iomem_base = (unsigned char *)UART1_ADDR, \
164 .irq = AU1550_UART1_INT, .flags = STD_COM_FLAGS, \
165 .iomem_reg_shift = 2 }, \
166 { .baud_base = 0, .port = UART3_ADDR, \
167 .iomem_base = (unsigned char *)UART3_ADDR, \
168 .irq = AU1550_UART3_INT, .flags = STD_COM_FLAGS,\
169 .iomem_reg_shift = 2 },
170#endif
171
172#ifdef CONFIG_SOC_AU1200
173#define AU1000_SERIAL_PORT_DEFNS \
174 { .baud_base = 0, .port = UART0_ADDR, \
175 .iomem_base = (unsigned char *)UART0_ADDR, \
176 .irq = AU1200_UART0_INT, .flags = STD_COM_FLAGS, \
177 .iomem_reg_shift = 2 }, \
178 { .baud_base = 0, .port = UART1_ADDR, \
179 .iomem_base = (unsigned char *)UART1_ADDR, \
180 .irq = AU1200_UART1_INT, .flags = STD_COM_FLAGS, \
181 .iomem_reg_shift = 2 },
182#endif
183
184#else
185#define AU1000_SERIAL_PORT_DEFNS
186#endif
187
188#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT 106#ifdef CONFIG_HAVE_STD_PC_SERIAL_PORT
189#define STD_SERIAL_PORT_DEFNS \ 107#define STD_SERIAL_PORT_DEFNS \
190 /* UART CLK PORT IRQ FLAGS */ \ 108 /* UART CLK PORT IRQ FLAGS */ \
@@ -331,7 +249,6 @@
331 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \ 249 MOMENCO_OCELOT_G_SERIAL_PORT_DEFNS \
332 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \ 250 MOMENCO_OCELOT_C_SERIAL_PORT_DEFNS \
333 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \ 251 MOMENCO_OCELOT_SERIAL_PORT_DEFNS \
334 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS \ 252 MOMENCO_OCELOT_3_SERIAL_PORT_DEFNS
335 AU1000_SERIAL_PORT_DEFNS
336 253
337#endif /* _ASM_SERIAL_H */ 254#endif /* _ASM_SERIAL_H */
diff --git a/include/linux/amba/serial.h b/include/linux/amba/serial.h
index dc726ffccebd..48ee32a18ac5 100644
--- a/include/linux/amba/serial.h
+++ b/include/linux/amba/serial.h
@@ -158,4 +158,10 @@
158#define UART01x_RSR_ANY (UART01x_RSR_OE|UART01x_RSR_BE|UART01x_RSR_PE|UART01x_RSR_FE) 158#define UART01x_RSR_ANY (UART01x_RSR_OE|UART01x_RSR_BE|UART01x_RSR_PE|UART01x_RSR_FE)
159#define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS) 159#define UART01x_FR_MODEM_ANY (UART01x_FR_DCD|UART01x_FR_DSR|UART01x_FR_CTS)
160 160
161#ifndef __ASSEMBLY__
162struct amba_pl010_data {
163 void (*set_mctrl)(struct amba_device *dev, void __iomem *base, unsigned int mctrl);
164};
165#endif
166
161#endif 167#endif
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 16:47:48 -0500