diff options
author | David Daney <david.daney@cavium.com> | 2014-05-28 17:52:07 -0400 |
---|---|---|
committer | Ralf Baechle <ralf@linux-mips.org> | 2014-05-30 15:01:10 -0400 |
commit | a68d09a156b2a543117bb98df4c8c4cd1b857124 (patch) | |
tree | ea07a66f98fa9ae798b4e9974e7fd5146d60a2c2 | |
parent | 8a837cdb0a51c4b45aca8966cf11af99b397c97d (diff) |
MIPS: Don't use RI/XI with 32-bit kernels on 64-bit CPUs
The TLB handlers cannot handle this case, so disable it for now.
Signed-off-by: David Daney <david.daney@cavium.com>
Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com>
Cc: linux-mips@linux-mips.org
Cc: James Hogan <james.hogan@imgtec.com>
Cc: kvm@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7007/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r-- | arch/mips/include/asm/cpu-features.h | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h index f75dd7055508..c7d8c997d93e 100644 --- a/arch/mips/include/asm/cpu-features.h +++ b/arch/mips/include/asm/cpu-features.h | |||
@@ -110,9 +110,15 @@ | |||
110 | #ifndef cpu_has_smartmips | 110 | #ifndef cpu_has_smartmips |
111 | #define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS) | 111 | #define cpu_has_smartmips (cpu_data[0].ases & MIPS_ASE_SMARTMIPS) |
112 | #endif | 112 | #endif |
113 | |||
113 | #ifndef cpu_has_rixi | 114 | #ifndef cpu_has_rixi |
114 | #define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI) | 115 | # ifdef CONFIG_64BIT |
116 | # define cpu_has_rixi (cpu_data[0].options & MIPS_CPU_RIXI) | ||
117 | # else /* CONFIG_32BIT */ | ||
118 | # define cpu_has_rixi ((cpu_data[0].options & MIPS_CPU_RIXI) && !cpu_has_64bits) | ||
119 | # endif | ||
115 | #endif | 120 | #endif |
121 | |||
116 | #ifndef cpu_has_mmips | 122 | #ifndef cpu_has_mmips |
117 | # ifdef CONFIG_SYS_SUPPORTS_MICROMIPS | 123 | # ifdef CONFIG_SYS_SUPPORTS_MICROMIPS |
118 | # define cpu_has_mmips (cpu_data[0].options & MIPS_CPU_MICROMIPS) | 124 | # define cpu_has_mmips (cpu_data[0].options & MIPS_CPU_MICROMIPS) |
@@ -120,6 +126,7 @@ | |||
120 | # define cpu_has_mmips 0 | 126 | # define cpu_has_mmips 0 |
121 | # endif | 127 | # endif |
122 | #endif | 128 | #endif |
129 | |||
123 | #ifndef cpu_has_vtag_icache | 130 | #ifndef cpu_has_vtag_icache |
124 | #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) | 131 | #define cpu_has_vtag_icache (cpu_data[0].icache.flags & MIPS_CACHE_VTAG) |
125 | #endif | 132 | #endif |