diff options
author | Rafał Miłecki <zajec5@gmail.com> | 2011-04-24 05:04:19 -0400 |
---|---|---|
committer | John W. Linville <linville@tuxdriver.com> | 2011-04-25 14:50:20 -0400 |
commit | 9835a30e980561082beb02ce724f6e555787bc19 (patch) | |
tree | ed934f465f29125162c795e973e9afc741c70f71 | |
parent | 6dde1aabf6759848512f19d76b89ee473584c46a (diff) |
ssb: cc: clear GPIOPULL registers on init
Signed-off-by: Rafał Miłecki <zajec5@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
-rw-r--r-- | drivers/ssb/driver_chipcommon.c | 6 | ||||
-rw-r--r-- | include/linux/ssb/ssb_driver_chipcommon.h | 2 |
2 files changed, 8 insertions, 0 deletions
diff --git a/drivers/ssb/driver_chipcommon.c b/drivers/ssb/driver_chipcommon.c index 7c031fdc8205..b4b3733aefcf 100644 --- a/drivers/ssb/driver_chipcommon.c +++ b/drivers/ssb/driver_chipcommon.c | |||
@@ -260,6 +260,12 @@ void ssb_chipcommon_init(struct ssb_chipcommon *cc) | |||
260 | if (cc->dev->id.revision >= 11) | 260 | if (cc->dev->id.revision >= 11) |
261 | cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT); | 261 | cc->status = chipco_read32(cc, SSB_CHIPCO_CHIPSTAT); |
262 | ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status); | 262 | ssb_dprintk(KERN_INFO PFX "chipcommon status is 0x%x\n", cc->status); |
263 | |||
264 | if (cc->dev->id.revision >= 20) { | ||
265 | chipco_write32(cc, SSB_CHIPCO_GPIOPULLUP, 0); | ||
266 | chipco_write32(cc, SSB_CHIPCO_GPIOPULLDOWN, 0); | ||
267 | } | ||
268 | |||
263 | ssb_pmu_init(cc); | 269 | ssb_pmu_init(cc); |
264 | chipco_powercontrol_init(cc); | 270 | chipco_powercontrol_init(cc); |
265 | ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); | 271 | ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST); |
diff --git a/include/linux/ssb/ssb_driver_chipcommon.h b/include/linux/ssb/ssb_driver_chipcommon.h index 4f2d77a0c021..a08d693d8324 100644 --- a/include/linux/ssb/ssb_driver_chipcommon.h +++ b/include/linux/ssb/ssb_driver_chipcommon.h | |||
@@ -123,6 +123,8 @@ | |||
123 | #define SSB_CHIPCO_FLASHDATA 0x0048 | 123 | #define SSB_CHIPCO_FLASHDATA 0x0048 |
124 | #define SSB_CHIPCO_BCAST_ADDR 0x0050 | 124 | #define SSB_CHIPCO_BCAST_ADDR 0x0050 |
125 | #define SSB_CHIPCO_BCAST_DATA 0x0054 | 125 | #define SSB_CHIPCO_BCAST_DATA 0x0054 |
126 | #define SSB_CHIPCO_GPIOPULLUP 0x0058 /* Rev >= 20 only */ | ||
127 | #define SSB_CHIPCO_GPIOPULLDOWN 0x005C /* Rev >= 20 only */ | ||
126 | #define SSB_CHIPCO_GPIOIN 0x0060 | 128 | #define SSB_CHIPCO_GPIOIN 0x0060 |
127 | #define SSB_CHIPCO_GPIOOUT 0x0064 | 129 | #define SSB_CHIPCO_GPIOOUT 0x0064 |
128 | #define SSB_CHIPCO_GPIOOUTEN 0x0068 | 130 | #define SSB_CHIPCO_GPIOOUTEN 0x0068 |