diff options
author | Thierry Reding <treding@nvidia.com> | 2014-07-07 09:26:30 -0400 |
---|---|---|
committer | Thierry Reding <treding@nvidia.com> | 2015-01-09 08:45:43 -0500 |
commit | 910978e753d0be0b429cf75b5adaed55b90c96b2 (patch) | |
tree | 174f38337a47ae2961d20bdbaba569fb57c765d3 | |
parent | 2b20b6164ec737bec67641564e477aa6e008748b (diff) |
clocksource: Build Tegra timer on 32-bit ARM only
Instead of directly using the ARCH_TEGRA Kconfig symbol to enable this
driver, add a new, non-user-visible Kconfig symbol (TEGRA_TIMER) which
can be selected by the various SoCs.
This is useful to disable building the driver on Tegra132 (64-bit ARM)
where it doesn't currently compile but also isn't needed (yet).
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Thierry Reding <treding@nvidia.com>
-rw-r--r-- | arch/arm/mach-tegra/Kconfig | 4 | ||||
-rw-r--r-- | drivers/clocksource/Kconfig | 3 | ||||
-rw-r--r-- | drivers/clocksource/Makefile | 2 |
3 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index d0be9a1ef6b8..5d1a318f1302 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -27,6 +27,7 @@ config ARCH_TEGRA_2x_SOC | |||
27 | select PINCTRL_TEGRA20 | 27 | select PINCTRL_TEGRA20 |
28 | select PL310_ERRATA_727915 if CACHE_L2X0 | 28 | select PL310_ERRATA_727915 if CACHE_L2X0 |
29 | select PL310_ERRATA_769419 if CACHE_L2X0 | 29 | select PL310_ERRATA_769419 if CACHE_L2X0 |
30 | select TEGRA_TIMER | ||
30 | help | 31 | help |
31 | Support for NVIDIA Tegra AP20 and T20 processors, based on the | 32 | Support for NVIDIA Tegra AP20 and T20 processors, based on the |
32 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 33 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
@@ -37,6 +38,7 @@ config ARCH_TEGRA_3x_SOC | |||
37 | select ARM_ERRATA_764369 if SMP | 38 | select ARM_ERRATA_764369 if SMP |
38 | select PINCTRL_TEGRA30 | 39 | select PINCTRL_TEGRA30 |
39 | select PL310_ERRATA_769419 if CACHE_L2X0 | 40 | select PL310_ERRATA_769419 if CACHE_L2X0 |
41 | select TEGRA_TIMER | ||
40 | help | 42 | help |
41 | Support for NVIDIA Tegra T30 processor family, based on the | 43 | Support for NVIDIA Tegra T30 processor family, based on the |
42 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller | 44 | ARM CortexA9MP CPU and the ARM PL310 L2 cache controller |
@@ -47,6 +49,7 @@ config ARCH_TEGRA_114_SOC | |||
47 | select ARM_L1_CACHE_SHIFT_6 | 49 | select ARM_L1_CACHE_SHIFT_6 |
48 | select HAVE_ARM_ARCH_TIMER | 50 | select HAVE_ARM_ARCH_TIMER |
49 | select PINCTRL_TEGRA114 | 51 | select PINCTRL_TEGRA114 |
52 | select TEGRA_TIMER | ||
50 | help | 53 | help |
51 | Support for NVIDIA Tegra T114 processor family, based on the | 54 | Support for NVIDIA Tegra T114 processor family, based on the |
52 | ARM CortexA15MP CPU | 55 | ARM CortexA15MP CPU |
@@ -56,6 +59,7 @@ config ARCH_TEGRA_124_SOC | |||
56 | select ARM_L1_CACHE_SHIFT_6 | 59 | select ARM_L1_CACHE_SHIFT_6 |
57 | select HAVE_ARM_ARCH_TIMER | 60 | select HAVE_ARM_ARCH_TIMER |
58 | select PINCTRL_TEGRA124 | 61 | select PINCTRL_TEGRA124 |
62 | select TEGRA_TIMER | ||
59 | help | 63 | help |
60 | Support for NVIDIA Tegra T124 processor family, based on the | 64 | Support for NVIDIA Tegra T124 processor family, based on the |
61 | ARM CortexA15MP CPU | 65 | ARM CortexA15MP CPU |
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index fc01ec27d3c8..c062b6105d49 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig | |||
@@ -47,6 +47,9 @@ config SUN5I_HSTIMER | |||
47 | select CLKSRC_MMIO | 47 | select CLKSRC_MMIO |
48 | bool | 48 | bool |
49 | 49 | ||
50 | config TEGRA_TIMER | ||
51 | bool | ||
52 | |||
50 | config VT8500_TIMER | 53 | config VT8500_TIMER |
51 | bool | 54 | bool |
52 | 55 | ||
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index 94d90b24b56b..ba9ebd868ec5 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile | |||
@@ -27,7 +27,7 @@ obj-$(CONFIG_ARCH_U300) += timer-u300.o | |||
27 | obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o | 27 | obj-$(CONFIG_SUN4I_TIMER) += sun4i_timer.o |
28 | obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o | 28 | obj-$(CONFIG_SUN5I_HSTIMER) += timer-sun5i.o |
29 | obj-$(CONFIG_MESON6_TIMER) += meson6_timer.o | 29 | obj-$(CONFIG_MESON6_TIMER) += meson6_timer.o |
30 | obj-$(CONFIG_ARCH_TEGRA) += tegra20_timer.o | 30 | obj-$(CONFIG_TEGRA_TIMER) += tegra20_timer.o |
31 | obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o | 31 | obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o |
32 | obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o | 32 | obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o |
33 | obj-$(CONFIG_ARCH_BCM_MOBILE) += bcm_kona_timer.o | 33 | obj-$(CONFIG_ARCH_BCM_MOBILE) += bcm_kona_timer.o |