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author | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-11 15:24:35 -0500 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2014-02-11 15:24:35 -0500 |
commit | 738b52bb9845da183b6ff46a8f685b56a63379d1 (patch) | |
tree | 6e812400614efd2a3e03bf5412cf23eaeb166828 | |
parent | a87af778d847dc085c06c98b7e6d1ca441f7f087 (diff) | |
parent | a49f56eec54d864ba0fda838e4c8bf5c72f3eb08 (diff) |
Merge tag 'microblaze-3.14-rc3' of git://git.monstr.eu/linux-2.6-microblaze
Pull microblaze fixes from Michal Simek:
- Fix two compilation issues - HZ, readq/writeq
- Fix stack protection support
* tag 'microblaze-3.14-rc3' of git://git.monstr.eu/linux-2.6-microblaze:
microblaze: Fix a typo when disabling stack protection
microblaze: Define readq and writeq IO helper function
microblaze: Fix missing HZ macro
-rw-r--r-- | arch/microblaze/include/asm/delay.h | 2 | ||||
-rw-r--r-- | arch/microblaze/include/asm/io.h | 6 | ||||
-rw-r--r-- | arch/microblaze/kernel/head.S | 2 |
3 files changed, 9 insertions, 1 deletions
diff --git a/arch/microblaze/include/asm/delay.h b/arch/microblaze/include/asm/delay.h index 05b7d39e4391..66fc24c24238 100644 --- a/arch/microblaze/include/asm/delay.h +++ b/arch/microblaze/include/asm/delay.h | |||
@@ -13,6 +13,8 @@ | |||
13 | #ifndef _ASM_MICROBLAZE_DELAY_H | 13 | #ifndef _ASM_MICROBLAZE_DELAY_H |
14 | #define _ASM_MICROBLAZE_DELAY_H | 14 | #define _ASM_MICROBLAZE_DELAY_H |
15 | 15 | ||
16 | #include <linux/param.h> | ||
17 | |||
16 | extern inline void __delay(unsigned long loops) | 18 | extern inline void __delay(unsigned long loops) |
17 | { | 19 | { |
18 | asm volatile ("# __delay \n\t" \ | 20 | asm volatile ("# __delay \n\t" \ |
diff --git a/arch/microblaze/include/asm/io.h b/arch/microblaze/include/asm/io.h index a2cea7206077..3fbb7f1db3bc 100644 --- a/arch/microblaze/include/asm/io.h +++ b/arch/microblaze/include/asm/io.h | |||
@@ -89,6 +89,11 @@ static inline unsigned int readl(const volatile void __iomem *addr) | |||
89 | { | 89 | { |
90 | return le32_to_cpu(*(volatile unsigned int __force *)addr); | 90 | return le32_to_cpu(*(volatile unsigned int __force *)addr); |
91 | } | 91 | } |
92 | #define readq readq | ||
93 | static inline u64 readq(const volatile void __iomem *addr) | ||
94 | { | ||
95 | return le64_to_cpu(__raw_readq(addr)); | ||
96 | } | ||
92 | static inline void writeb(unsigned char v, volatile void __iomem *addr) | 97 | static inline void writeb(unsigned char v, volatile void __iomem *addr) |
93 | { | 98 | { |
94 | *(volatile unsigned char __force *)addr = v; | 99 | *(volatile unsigned char __force *)addr = v; |
@@ -101,6 +106,7 @@ static inline void writel(unsigned int v, volatile void __iomem *addr) | |||
101 | { | 106 | { |
102 | *(volatile unsigned int __force *)addr = cpu_to_le32(v); | 107 | *(volatile unsigned int __force *)addr = cpu_to_le32(v); |
103 | } | 108 | } |
109 | #define writeq(b, addr) __raw_writeq(cpu_to_le64(b), addr) | ||
104 | 110 | ||
105 | /* ioread and iowrite variants. thease are for now same as __raw_ | 111 | /* ioread and iowrite variants. thease are for now same as __raw_ |
106 | * variants of accessors. we might check for endianess in the feature | 112 | * variants of accessors. we might check for endianess in the feature |
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S index b7fb0438458c..17645b2e2f07 100644 --- a/arch/microblaze/kernel/head.S +++ b/arch/microblaze/kernel/head.S | |||
@@ -66,7 +66,7 @@ real_start: | |||
66 | mts rmsr, r0 | 66 | mts rmsr, r0 |
67 | /* Disable stack protection from bootloader */ | 67 | /* Disable stack protection from bootloader */ |
68 | mts rslr, r0 | 68 | mts rslr, r0 |
69 | addi r8, r0, 0xFFFFFFF | 69 | addi r8, r0, 0xFFFFFFFF |
70 | mts rshr, r8 | 70 | mts rshr, r8 |
71 | /* | 71 | /* |
72 | * According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc' | 72 | * According to Xilinx, msrclr instruction behaves like 'mfs rX,rpc' |