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authorUlrich Hecht <ulrich.hecht+renesas@gmail.com>2014-09-24 21:32:14 -0400
committerSimon Horman <horms+renesas@verge.net.au>2014-10-23 21:44:06 -0400
commit7300505a9b60f245c227dadff26c8d12ffb64559 (patch)
tree75a1d6f7cd0981956bc1c53b2dbf8f398b3ef207
parentb97950cf04b32adf0f7521397c5fefa17208e71d (diff)
ARM: shmobile: r8a73a4: sort dtsi file by address
Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> [horms+renesas@verge.net.au: updated for removal of dma-multiplexer base address] Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat
-rw-r--r--arch/arm/boot/dts/r8a73a4.dtsi232
1 files changed, 116 insertions, 116 deletions
diff --git a/arch/arm/boot/dts/r8a73a4.dtsi b/arch/arm/boot/dts/r8a73a4.dtsi
index 8a70dcd1f346..c17afef92e8d 100644
--- a/arch/arm/boot/dts/r8a73a4.dtsi
+++ b/arch/arm/boot/dts/r8a73a4.dtsi
@@ -30,18 +30,6 @@
30 }; 30 };
31 }; 31 };
32 32
33 gic: interrupt-controller@f1001000 {
34 compatible = "arm,cortex-a15-gic";
35 #interrupt-cells = <3>;
36 #address-cells = <0>;
37 interrupt-controller;
38 reg = <0 0xf1001000 0 0x1000>,
39 <0 0xf1002000 0 0x1000>,
40 <0 0xf1004000 0 0x2000>,
41 <0 0xf1006000 0 0x2000>;
42 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
43 };
44
45 timer { 33 timer {
46 compatible = "arm,armv7-timer"; 34 compatible = "arm,armv7-timer";
47 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 35 interrupts = <1 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
@@ -50,6 +38,80 @@
50 <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 38 <1 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
51 }; 39 };
52 40
41 dmac: dma-multiplexer {
42 compatible = "renesas,shdma-mux";
43 #dma-cells = <1>;
44 dma-channels = <20>;
45 dma-requests = <256>;
46 #address-cells = <2>;
47 #size-cells = <2>;
48 ranges;
49
50 dma0: dma-controller@e6700020 {
51 compatible = "renesas,shdma-r8a73a4";
52 reg = <0 0xe6700020 0 0x89e0>;
53 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
54 0 200 IRQ_TYPE_LEVEL_HIGH
55 0 201 IRQ_TYPE_LEVEL_HIGH
56 0 202 IRQ_TYPE_LEVEL_HIGH
57 0 203 IRQ_TYPE_LEVEL_HIGH
58 0 204 IRQ_TYPE_LEVEL_HIGH
59 0 205 IRQ_TYPE_LEVEL_HIGH
60 0 206 IRQ_TYPE_LEVEL_HIGH
61 0 207 IRQ_TYPE_LEVEL_HIGH
62 0 208 IRQ_TYPE_LEVEL_HIGH
63 0 209 IRQ_TYPE_LEVEL_HIGH
64 0 210 IRQ_TYPE_LEVEL_HIGH
65 0 211 IRQ_TYPE_LEVEL_HIGH
66 0 212 IRQ_TYPE_LEVEL_HIGH
67 0 213 IRQ_TYPE_LEVEL_HIGH
68 0 214 IRQ_TYPE_LEVEL_HIGH
69 0 215 IRQ_TYPE_LEVEL_HIGH
70 0 216 IRQ_TYPE_LEVEL_HIGH
71 0 217 IRQ_TYPE_LEVEL_HIGH
72 0 218 IRQ_TYPE_LEVEL_HIGH
73 0 219 IRQ_TYPE_LEVEL_HIGH>;
74 interrupt-names = "error",
75 "ch0", "ch1", "ch2", "ch3",
76 "ch4", "ch5", "ch6", "ch7",
77 "ch8", "ch9", "ch10", "ch11",
78 "ch12", "ch13", "ch14", "ch15",
79 "ch16", "ch17", "ch18", "ch19";
80 };
81 };
82
83 pfc: pfc@e6050000 {
84 compatible = "renesas,pfc-r8a73a4";
85 reg = <0 0xe6050000 0 0x9000>;
86 gpio-controller;
87 #gpio-cells = <2>;
88 interrupts-extended =
89 <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
90 <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
91 <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
92 <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
93 <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
94 <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
95 <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
96 <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
97 <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
98 <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
99 <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
100 <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
101 <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
102 <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
103 <&irqc1 24 0>, <&irqc1 25 0>;
104 };
105
106 i2c5: i2c@e60b0000 {
107 #address-cells = <1>;
108 #size-cells = <0>;
109 compatible = "renesas,rmobile-iic";
110 reg = <0 0xe60b0000 0 0x428>;
111 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
112 status = "disabled";
113 };
114
53 irqc0: interrupt-controller@e61c0000 { 115 irqc0: interrupt-controller@e61c0000 {
54 compatible = "renesas,irqc-r8a73a4", "renesas,irqc"; 116 compatible = "renesas,irqc-r8a73a4", "renesas,irqc";
55 #interrupt-cells = <2>; 117 #interrupt-cells = <2>;
@@ -122,48 +184,6 @@
122 <0 57 IRQ_TYPE_LEVEL_HIGH>; 184 <0 57 IRQ_TYPE_LEVEL_HIGH>;
123 }; 185 };
124 186
125 dmac: dma-multiplexer {
126 compatible = "renesas,shdma-mux";
127 #dma-cells = <1>;
128 dma-channels = <20>;
129 dma-requests = <256>;
130 #address-cells = <2>;
131 #size-cells = <2>;
132 ranges;
133
134 dma0: dma-controller@e6700020 {
135 compatible = "renesas,shdma-r8a73a4";
136 reg = <0 0xe6700020 0 0x89e0>;
137 interrupts = <0 220 IRQ_TYPE_LEVEL_HIGH
138 0 200 IRQ_TYPE_LEVEL_HIGH
139 0 201 IRQ_TYPE_LEVEL_HIGH
140 0 202 IRQ_TYPE_LEVEL_HIGH
141 0 203 IRQ_TYPE_LEVEL_HIGH
142 0 204 IRQ_TYPE_LEVEL_HIGH
143 0 205 IRQ_TYPE_LEVEL_HIGH
144 0 206 IRQ_TYPE_LEVEL_HIGH
145 0 207 IRQ_TYPE_LEVEL_HIGH
146 0 208 IRQ_TYPE_LEVEL_HIGH
147 0 209 IRQ_TYPE_LEVEL_HIGH
148 0 210 IRQ_TYPE_LEVEL_HIGH
149 0 211 IRQ_TYPE_LEVEL_HIGH
150 0 212 IRQ_TYPE_LEVEL_HIGH
151 0 213 IRQ_TYPE_LEVEL_HIGH
152 0 214 IRQ_TYPE_LEVEL_HIGH
153 0 215 IRQ_TYPE_LEVEL_HIGH
154 0 216 IRQ_TYPE_LEVEL_HIGH
155 0 217 IRQ_TYPE_LEVEL_HIGH
156 0 218 IRQ_TYPE_LEVEL_HIGH
157 0 219 IRQ_TYPE_LEVEL_HIGH>;
158 interrupt-names = "error",
159 "ch0", "ch1", "ch2", "ch3",
160 "ch4", "ch5", "ch6", "ch7",
161 "ch8", "ch9", "ch10", "ch11",
162 "ch12", "ch13", "ch14", "ch15",
163 "ch16", "ch17", "ch18", "ch19";
164 };
165 };
166
167 thermal@e61f0000 { 187 thermal@e61f0000 {
168 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal"; 188 compatible = "renesas,thermal-r8a73a4", "renesas,rcar-thermal";
169 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>, 189 reg = <0 0xe61f0000 0 0x14>, <0 0xe61f0100 0 0x38>,
@@ -216,15 +236,6 @@
216 status = "disabled"; 236 status = "disabled";
217 }; 237 };
218 238
219 i2c5: i2c@e60b0000 {
220 #address-cells = <1>;
221 #size-cells = <0>;
222 compatible = "renesas,rmobile-iic";
223 reg = <0 0xe60b0000 0 0x428>;
224 interrupts = <0 179 IRQ_TYPE_LEVEL_HIGH>;
225 status = "disabled";
226 };
227
228 i2c6: i2c@e6550000 { 239 i2c6: i2c@e6550000 {
229 #address-cells = <1>; 240 #address-cells = <1>;
230 #size-cells = <0>; 241 #size-cells = <0>;
@@ -252,20 +263,6 @@
252 status = "disabled"; 263 status = "disabled";
253 }; 264 };
254 265
255 scifa0: serial@e6c40000 {
256 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
257 reg = <0 0xe6c40000 0 0x100>;
258 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
259 status = "disabled";
260 };
261
262 scifa1: serial@e6c50000 {
263 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
264 reg = <0 0xe6c50000 0 0x100>;
265 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
266 status = "disabled";
267 };
268
269 scifb2: serial@e6c20000 { 266 scifb2: serial@e6c20000 {
270 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 267 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
271 reg = <0 0xe6c20000 0 0x100>; 268 reg = <0 0xe6c20000 0 0x100>;
@@ -280,6 +277,20 @@
280 status = "disabled"; 277 status = "disabled";
281 }; 278 };
282 279
280 scifa0: serial@e6c40000 {
281 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
282 reg = <0 0xe6c40000 0 0x100>;
283 interrupts = <0 144 IRQ_TYPE_LEVEL_HIGH>;
284 status = "disabled";
285 };
286
287 scifa1: serial@e6c50000 {
288 compatible = "renesas,scifa-r8a73a4", "renesas,scifa";
289 reg = <0 0xe6c50000 0 0x100>;
290 interrupts = <0 145 IRQ_TYPE_LEVEL_HIGH>;
291 status = "disabled";
292 };
293
283 scifb4: serial@e6ce0000 { 294 scifb4: serial@e6ce0000 {
284 compatible = "renesas,scifb-r8a73a4", "renesas,scifb"; 295 compatible = "renesas,scifb-r8a73a4", "renesas,scifb";
285 reg = <0 0xe6ce0000 0 0x100>; 296 reg = <0 0xe6ce0000 0 0x100>;
@@ -294,45 +305,6 @@
294 status = "disabled"; 305 status = "disabled";
295 }; 306 };
296 307
297 mmcif0: mmc@ee200000 {
298 compatible = "renesas,sh-mmcif";
299 reg = <0 0xee200000 0 0x80>;
300 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
301 reg-io-width = <4>;
302 status = "disabled";
303 };
304
305 mmcif1: mmc@ee220000 {
306 compatible = "renesas,sh-mmcif";
307 reg = <0 0xee220000 0 0x80>;
308 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
309 reg-io-width = <4>;
310 status = "disabled";
311 };
312
313 pfc: pfc@e6050000 {
314 compatible = "renesas,pfc-r8a73a4";
315 reg = <0 0xe6050000 0 0x9000>;
316 gpio-controller;
317 #gpio-cells = <2>;
318 interrupts-extended =
319 <&irqc0 0 0>, <&irqc0 1 0>, <&irqc0 2 0>, <&irqc0 3 0>,
320 <&irqc0 4 0>, <&irqc0 5 0>, <&irqc0 6 0>, <&irqc0 7 0>,
321 <&irqc0 8 0>, <&irqc0 9 0>, <&irqc0 10 0>, <&irqc0 11 0>,
322 <&irqc0 12 0>, <&irqc0 13 0>, <&irqc0 14 0>, <&irqc0 15 0>,
323 <&irqc0 16 0>, <&irqc0 17 0>, <&irqc0 18 0>, <&irqc0 19 0>,
324 <&irqc0 20 0>, <&irqc0 21 0>, <&irqc0 22 0>, <&irqc0 23 0>,
325 <&irqc0 24 0>, <&irqc0 25 0>, <&irqc0 26 0>, <&irqc0 27 0>,
326 <&irqc0 28 0>, <&irqc0 29 0>, <&irqc0 30 0>, <&irqc0 31 0>,
327 <&irqc1 0 0>, <&irqc1 1 0>, <&irqc1 2 0>, <&irqc1 3 0>,
328 <&irqc1 4 0>, <&irqc1 5 0>, <&irqc1 6 0>, <&irqc1 7 0>,
329 <&irqc1 8 0>, <&irqc1 9 0>, <&irqc1 10 0>, <&irqc1 11 0>,
330 <&irqc1 12 0>, <&irqc1 13 0>, <&irqc1 14 0>, <&irqc1 15 0>,
331 <&irqc1 16 0>, <&irqc1 17 0>, <&irqc1 18 0>, <&irqc1 19 0>,
332 <&irqc1 20 0>, <&irqc1 21 0>, <&irqc1 22 0>, <&irqc1 23 0>,
333 <&irqc1 24 0>, <&irqc1 25 0>;
334 };
335
336 sdhi0: sd@ee100000 { 308 sdhi0: sd@ee100000 {
337 compatible = "renesas,sdhi-r8a73a4"; 309 compatible = "renesas,sdhi-r8a73a4";
338 reg = <0 0xee100000 0 0x100>; 310 reg = <0 0xee100000 0 0x100>;
@@ -356,4 +328,32 @@
356 cap-sd-highspeed; 328 cap-sd-highspeed;
357 status = "disabled"; 329 status = "disabled";
358 }; 330 };
331
332 mmcif0: mmc@ee200000 {
333 compatible = "renesas,sh-mmcif";
334 reg = <0 0xee200000 0 0x80>;
335 interrupts = <0 169 IRQ_TYPE_LEVEL_HIGH>;
336 reg-io-width = <4>;
337 status = "disabled";
338 };
339
340 mmcif1: mmc@ee220000 {
341 compatible = "renesas,sh-mmcif";
342 reg = <0 0xee220000 0 0x80>;
343 interrupts = <0 170 IRQ_TYPE_LEVEL_HIGH>;
344 reg-io-width = <4>;
345 status = "disabled";
346 };
347
348 gic: interrupt-controller@f1001000 {
349 compatible = "arm,cortex-a15-gic";
350 #interrupt-cells = <3>;
351 #address-cells = <0>;
352 interrupt-controller;
353 reg = <0 0xf1001000 0 0x1000>,
354 <0 0xf1002000 0 0x1000>,
355 <0 0xf1004000 0 0x2000>,
356 <0 0xf1006000 0 0x2000>;
357 interrupts = <1 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
358 };
359}; 359};
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-06 14:04:32 -0500