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authorMichael S. Tsirkin <mst@mellanox.co.il>2006-10-30 09:31:52 -0500
committerRoland Dreier <rolandd@cisco.com>2006-10-31 13:51:26 -0500
commit68586b67ab1a2fd618f79e29a06f10ae886f4b46 (patch)
tree0a764201c970dc7a97103df7875bbd982bf4ef46
parent0b26c88f29ad8bcf91a2ea8f25a36f2028ebabea (diff)
IB/mthca: Fix MAD extended header format for MAD_IFC firmware command
Several fields in an incoming MAD extended info header were passed into the MAD_IFC firmware command at incorrect offsets (mostly off by 4 bytes). As the result, the HCA will fail to generate traps in which this info is needed (e.g. traps which include the GRH of the incoming packet), in violation of the IB spec. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cmd.c14
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 99a94d710935..768df7265b81 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -1820,11 +1820,11 @@ int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey,
1820 1820
1821#define MAD_IFC_BOX_SIZE 0x400 1821#define MAD_IFC_BOX_SIZE 0x400
1822#define MAD_IFC_MY_QPN_OFFSET 0x100 1822#define MAD_IFC_MY_QPN_OFFSET 0x100
1823#define MAD_IFC_RQPN_OFFSET 0x104 1823#define MAD_IFC_RQPN_OFFSET 0x108
1824#define MAD_IFC_SL_OFFSET 0x108 1824#define MAD_IFC_SL_OFFSET 0x10c
1825#define MAD_IFC_G_PATH_OFFSET 0x109 1825#define MAD_IFC_G_PATH_OFFSET 0x10d
1826#define MAD_IFC_RLID_OFFSET 0x10a 1826#define MAD_IFC_RLID_OFFSET 0x10e
1827#define MAD_IFC_PKEY_OFFSET 0x10e 1827#define MAD_IFC_PKEY_OFFSET 0x112
1828#define MAD_IFC_GRH_OFFSET 0x140 1828#define MAD_IFC_GRH_OFFSET 0x140
1829 1829
1830 inmailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 1830 inmailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
@@ -1862,7 +1862,7 @@ int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey,
1862 1862
1863 val = in_wc->dlid_path_bits | 1863 val = in_wc->dlid_path_bits |
1864 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0); 1864 (in_wc->wc_flags & IB_WC_GRH ? 0x80 : 0);
1865 MTHCA_PUT(inbox, val, MAD_IFC_GRH_OFFSET); 1865 MTHCA_PUT(inbox, val, MAD_IFC_G_PATH_OFFSET);
1866 1866
1867 MTHCA_PUT(inbox, in_wc->slid, MAD_IFC_RLID_OFFSET); 1867 MTHCA_PUT(inbox, in_wc->slid, MAD_IFC_RLID_OFFSET);
1868 MTHCA_PUT(inbox, in_wc->pkey_index, MAD_IFC_PKEY_OFFSET); 1868 MTHCA_PUT(inbox, in_wc->pkey_index, MAD_IFC_PKEY_OFFSET);
@@ -1870,7 +1870,7 @@ int mthca_MAD_IFC(struct mthca_dev *dev, int ignore_mkey, int ignore_bkey,
1870 if (in_grh) 1870 if (in_grh)
1871 memcpy(inbox + MAD_IFC_GRH_OFFSET, in_grh, 40); 1871 memcpy(inbox + MAD_IFC_GRH_OFFSET, in_grh, 40);
1872 1872
1873 op_modifier |= 0x10; 1873 op_modifier |= 0x4;
1874 1874
1875 in_modifier |= in_wc->slid << 16; 1875 in_modifier |= in_wc->slid << 16;
1876 } 1876 }