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authorJohn Crispin <blogic@openwrt.org>2012-04-30 05:33:09 -0400
committerRalf Baechle <ralf@linux-mips.org>2012-05-15 11:49:23 -0400
commit6697c6933048aabe94f0049070f7ec09cd52baa8 (patch)
tree5c155125c4f1daed435c696e5d8aa5bb70d9abd6
parent215ed2009c83615896ee060c08fe574894f084a6 (diff)
MIPS: lantiq: cleanup reset code
Add 2 new soc specifc handlers and remove superflous pr_notice calls. Signed-off-by: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3705/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/include/asm/mach-lantiq/lantiq.h3
-rw-r--r--arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h10
-rw-r--r--arch/mips/lantiq/xway/reset.c48
3 files changed, 48 insertions, 13 deletions
diff --git a/arch/mips/include/asm/mach-lantiq/lantiq.h b/arch/mips/include/asm/mach-lantiq/lantiq.h
index ce2f02929d22..7a90190bc387 100644
--- a/arch/mips/include/asm/mach-lantiq/lantiq.h
+++ b/arch/mips/include/asm/mach-lantiq/lantiq.h
@@ -48,7 +48,8 @@ extern spinlock_t ebu_lock;
48extern void ltq_disable_irq(struct irq_data *data); 48extern void ltq_disable_irq(struct irq_data *data);
49extern void ltq_mask_and_ack_irq(struct irq_data *data); 49extern void ltq_mask_and_ack_irq(struct irq_data *data);
50extern void ltq_enable_irq(struct irq_data *data); 50extern void ltq_enable_irq(struct irq_data *data);
51 51/* find out what bootsource we have */
52extern unsigned char ltq_boot_select(void);
52/* find out what caused the last cpu reset */ 53/* find out what caused the last cpu reset */
53extern int ltq_reset_cause(void); 54extern int ltq_reset_cause(void);
54#define LTQ_RST_CAUSE_WDTRST 0x20 55#define LTQ_RST_CAUSE_WDTRST 0x20
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
index af6c0f063130..15eb4dc6ec03 100644
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
@@ -49,6 +49,16 @@
49#define LTQ_ASC1_BASE_ADDR 0x1E100C00 49#define LTQ_ASC1_BASE_ADDR 0x1E100C00
50#define LTQ_ASC_SIZE 0x400 50#define LTQ_ASC_SIZE 0x400
51 51
52/* BOOT_SEL - find what boot media we have */
53#define BS_EXT_ROM 0x0
54#define BS_FLASH 0x1
55#define BS_MII0 0x2
56#define BS_PCI 0x3
57#define BS_UART1 0x4
58#define BS_SPI 0x5
59#define BS_NAND 0x6
60#define BS_RMII0 0x7
61
52/* 62/*
53 * during early_printk no ioremap is possible 63 * during early_printk no ioremap is possible
54 * lets use KSEG1 instead 64 * lets use KSEG1 instead
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
index 8b66bd87f0c1..3327211746ac 100644
--- a/arch/mips/lantiq/xway/reset.c
+++ b/arch/mips/lantiq/xway/reset.c
@@ -11,19 +11,31 @@
11#include <linux/ioport.h> 11#include <linux/ioport.h>
12#include <linux/pm.h> 12#include <linux/pm.h>
13#include <linux/export.h> 13#include <linux/export.h>
14#include <linux/delay.h>
15#include <linux/of_address.h>
16#include <linux/of_platform.h>
17
14#include <asm/reboot.h> 18#include <asm/reboot.h>
15 19
16#include <lantiq_soc.h> 20#include <lantiq_soc.h>
17 21
22#include "../prom.h"
23
18#define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y)) 24#define ltq_rcu_w32(x, y) ltq_w32((x), ltq_rcu_membase + (y))
19#define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x)) 25#define ltq_rcu_r32(x) ltq_r32(ltq_rcu_membase + (x))
20 26
21/* register definitions */ 27/* reset request register */
22#define LTQ_RCU_RST 0x0010 28#define RCU_RST_REQ 0x0010
23#define LTQ_RCU_RST_ALL 0x40000000 29/* reset status register */
30#define RCU_RST_STAT 0x0014
24 31
25#define LTQ_RCU_RST_STAT 0x0014 32/* reboot bit */
26#define LTQ_RCU_STAT_SHIFT 26 33#define RCU_RD_SRST BIT(30)
34/* reset cause */
35#define RCU_STAT_SHIFT 26
36/* boot selection */
37#define RCU_BOOT_SEL_SHIFT 26
38#define RCU_BOOT_SEL_MASK 0x7
27 39
28static struct resource ltq_rcu_resource = { 40static struct resource ltq_rcu_resource = {
29 .name = "rcu", 41 .name = "rcu",
@@ -38,29 +50,41 @@ static void __iomem *ltq_rcu_membase;
38/* This function is used by the watchdog driver */ 50/* This function is used by the watchdog driver */
39int ltq_reset_cause(void) 51int ltq_reset_cause(void)
40{ 52{
41 u32 val = ltq_rcu_r32(LTQ_RCU_RST_STAT); 53 u32 val = ltq_rcu_r32(RCU_RST_STAT);
42 return val >> LTQ_RCU_STAT_SHIFT; 54 return val >> RCU_STAT_SHIFT;
43} 55}
44EXPORT_SYMBOL_GPL(ltq_reset_cause); 56EXPORT_SYMBOL_GPL(ltq_reset_cause);
45 57
58/* allow platform code to find out what source we booted from */
59unsigned char ltq_boot_select(void)
60{
61 u32 val = ltq_rcu_r32(RCU_RST_STAT);
62 return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK;
63}
64
65/* reset a io domain for u micro seconds */
66void ltq_reset_once(unsigned int module, ulong u)
67{
68 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
69 udelay(u);
70 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ);
71}
72
46static void ltq_machine_restart(char *command) 73static void ltq_machine_restart(char *command)
47{ 74{
48 pr_notice("System restart\n");
49 local_irq_disable(); 75 local_irq_disable();
50 ltq_rcu_w32(ltq_rcu_r32(LTQ_RCU_RST) | LTQ_RCU_RST_ALL, LTQ_RCU_RST); 76 ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | RCU_RD_SRST, RCU_RST_REQ);
51 unreachable(); 77 unreachable();
52} 78}
53 79
54static void ltq_machine_halt(void) 80static void ltq_machine_halt(void)
55{ 81{
56 pr_notice("System halted.\n");
57 local_irq_disable(); 82 local_irq_disable();
58 unreachable(); 83 unreachable();
59} 84}
60 85
61static void ltq_machine_power_off(void) 86static void ltq_machine_power_off(void)
62{ 87{
63 pr_notice("Please turn off the power now.\n");
64 local_irq_disable(); 88 local_irq_disable();
65 unreachable(); 89 unreachable();
66} 90}
@@ -79,7 +103,7 @@ static int __init mips_reboot_setup(void)
79 ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start, 103 ltq_rcu_membase = ioremap_nocache(ltq_rcu_resource.start,
80 resource_size(&ltq_rcu_resource)); 104 resource_size(&ltq_rcu_resource));
81 if (!ltq_rcu_membase) 105 if (!ltq_rcu_membase)
82 panic("Failed to remap rcu memory"); 106 panic("Failed to remap core memory");
83 107
84 _machine_restart = ltq_machine_restart; 108 _machine_restart = ltq_machine_restart;
85 _machine_halt = ltq_machine_halt; 109 _machine_halt = ltq_machine_halt;