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authorChanwoo Choi <cw00.choi@samsung.com>2014-06-25 03:14:44 -0400
committerLee Jones <lee.jones@linaro.org>2014-07-09 09:58:11 -0400
commit54e8827d5f0e66d152ef63e7958030ef4880cd85 (patch)
tree6c8d1f67b3790c53cf00285334607ecc6a705a04
parent10f9edaeaa30468194e1dcd0e47e59b012f4cf8b (diff)
mfd: sec-core: Add support for S2MPU02 device
Add support for Samsung S2MPU02 PMIC device to the MFD sec-core driver. The S2MPU02 device includes PMIC/RTC/Clock devices. Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com> Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat
-rw-r--r--drivers/mfd/sec-core.c46
-rw-r--r--drivers/mfd/sec-irq.c110
-rw-r--r--include/linux/mfd/samsung/core.h1
-rw-r--r--include/linux/mfd/samsung/irq.h24
-rw-r--r--include/linux/mfd/samsung/s2mpu02.h201
5 files changed, 352 insertions, 30 deletions
diff --git a/drivers/mfd/sec-core.c b/drivers/mfd/sec-core.c
index be06d0abbf19..15ba847b3d23 100644
--- a/drivers/mfd/sec-core.c
+++ b/drivers/mfd/sec-core.c
@@ -89,6 +89,15 @@ static const struct mfd_cell s2mpa01_devs[] = {
89 }, 89 },
90}; 90};
91 91
92static const struct mfd_cell s2mpu02_devs[] = {
93 { .name = "s2mpu02-pmic", },
94 { .name = "s2mpu02-rtc", },
95 {
96 .name = "s2mpu02-clk",
97 .of_compatible = "samsung,s2mpu02-clk",
98 }
99};
100
92#ifdef CONFIG_OF 101#ifdef CONFIG_OF
93static const struct of_device_id sec_dt_match[] = { 102static const struct of_device_id sec_dt_match[] = {
94 { .compatible = "samsung,s5m8767-pmic", 103 { .compatible = "samsung,s5m8767-pmic",
@@ -103,6 +112,9 @@ static const struct of_device_id sec_dt_match[] = {
103 .compatible = "samsung,s2mpa01-pmic", 112 .compatible = "samsung,s2mpa01-pmic",
104 .data = (void *)S2MPA01, 113 .data = (void *)S2MPA01,
105 }, { 114 }, {
115 .compatible = "samsung,s2mpu02-pmic",
116 .data = (void *)S2MPU02,
117 }, {
106 /* Sentinel */ 118 /* Sentinel */
107 }, 119 },
108}; 120};
@@ -250,9 +262,10 @@ static int sec_pmic_probe(struct i2c_client *i2c,
250{ 262{
251 struct sec_platform_data *pdata = dev_get_platdata(&i2c->dev); 263 struct sec_platform_data *pdata = dev_get_platdata(&i2c->dev);
252 const struct regmap_config *regmap; 264 const struct regmap_config *regmap;
265 const struct mfd_cell *sec_devs;
253 struct sec_pmic_dev *sec_pmic; 266 struct sec_pmic_dev *sec_pmic;
254 unsigned long device_type; 267 unsigned long device_type;
255 int ret; 268 int ret, num_sec_devs;
256 269
257 sec_pmic = devm_kzalloc(&i2c->dev, sizeof(struct sec_pmic_dev), 270 sec_pmic = devm_kzalloc(&i2c->dev, sizeof(struct sec_pmic_dev),
258 GFP_KERNEL); 271 GFP_KERNEL);
@@ -319,34 +332,39 @@ static int sec_pmic_probe(struct i2c_client *i2c,
319 332
320 switch (sec_pmic->device_type) { 333 switch (sec_pmic->device_type) {
321 case S5M8751X: 334 case S5M8751X:
322 ret = mfd_add_devices(sec_pmic->dev, -1, s5m8751_devs, 335 sec_devs = s5m8751_devs;
323 ARRAY_SIZE(s5m8751_devs), NULL, 0, NULL); 336 num_sec_devs = ARRAY_SIZE(s5m8751_devs);
324 break; 337 break;
325 case S5M8763X: 338 case S5M8763X:
326 ret = mfd_add_devices(sec_pmic->dev, -1, s5m8763_devs, 339 sec_devs = s5m8763_devs;
327 ARRAY_SIZE(s5m8763_devs), NULL, 0, NULL); 340 num_sec_devs = ARRAY_SIZE(s5m8763_devs);
328 break; 341 break;
329 case S5M8767X: 342 case S5M8767X:
330 ret = mfd_add_devices(sec_pmic->dev, -1, s5m8767_devs, 343 sec_devs = s5m8767_devs;
331 ARRAY_SIZE(s5m8767_devs), NULL, 0, NULL); 344 num_sec_devs = ARRAY_SIZE(s5m8767_devs);
332 break; 345 break;
333 case S2MPA01: 346 case S2MPA01:
334 ret = mfd_add_devices(sec_pmic->dev, -1, s2mpa01_devs, 347 sec_devs = s2mpa01_devs;
335 ARRAY_SIZE(s2mpa01_devs), NULL, 0, NULL); 348 num_sec_devs = ARRAY_SIZE(s2mpa01_devs);
336 break; 349 break;
337 case S2MPS11X: 350 case S2MPS11X:
338 ret = mfd_add_devices(sec_pmic->dev, -1, s2mps11_devs, 351 sec_devs = s2mps11_devs;
339 ARRAY_SIZE(s2mps11_devs), NULL, 0, NULL); 352 num_sec_devs = ARRAY_SIZE(s2mps11_devs);
340 break; 353 break;
341 case S2MPS14X: 354 case S2MPS14X:
342 ret = mfd_add_devices(sec_pmic->dev, -1, s2mps14_devs, 355 sec_devs = s2mps14_devs;
343 ARRAY_SIZE(s2mps14_devs), NULL, 0, NULL); 356 num_sec_devs = ARRAY_SIZE(s2mps14_devs);
357 break;
358 case S2MPU02:
359 sec_devs = s2mpu02_devs;
360 num_sec_devs = ARRAY_SIZE(s2mpu02_devs);
344 break; 361 break;
345 default: 362 default:
346 /* If this happens the probe function is problem */ 363 /* If this happens the probe function is problem */
347 BUG(); 364 BUG();
348 } 365 }
349 366 ret = mfd_add_devices(sec_pmic->dev, -1, sec_devs, num_sec_devs, NULL,
367 0, NULL);
350 if (ret) 368 if (ret)
351 goto err_mfd; 369 goto err_mfd;
352 370
diff --git a/drivers/mfd/sec-irq.c b/drivers/mfd/sec-irq.c
index 654e2c1dbf7a..f9a57869e3ec 100644
--- a/drivers/mfd/sec-irq.c
+++ b/drivers/mfd/sec-irq.c
@@ -20,6 +20,7 @@
20#include <linux/mfd/samsung/irq.h> 20#include <linux/mfd/samsung/irq.h>
21#include <linux/mfd/samsung/s2mps11.h> 21#include <linux/mfd/samsung/s2mps11.h>
22#include <linux/mfd/samsung/s2mps14.h> 22#include <linux/mfd/samsung/s2mps14.h>
23#include <linux/mfd/samsung/s2mpu02.h>
23#include <linux/mfd/samsung/s5m8763.h> 24#include <linux/mfd/samsung/s5m8763.h>
24#include <linux/mfd/samsung/s5m8767.h> 25#include <linux/mfd/samsung/s5m8767.h>
25 26
@@ -161,6 +162,77 @@ static const struct regmap_irq s2mps14_irqs[] = {
161 }, 162 },
162}; 163};
163 164
165static const struct regmap_irq s2mpu02_irqs[] = {
166 [S2MPU02_IRQ_PWRONF] = {
167 .reg_offset = 0,
168 .mask = S2MPS11_IRQ_PWRONF_MASK,
169 },
170 [S2MPU02_IRQ_PWRONR] = {
171 .reg_offset = 0,
172 .mask = S2MPS11_IRQ_PWRONR_MASK,
173 },
174 [S2MPU02_IRQ_JIGONBF] = {
175 .reg_offset = 0,
176 .mask = S2MPS11_IRQ_JIGONBF_MASK,
177 },
178 [S2MPU02_IRQ_JIGONBR] = {
179 .reg_offset = 0,
180 .mask = S2MPS11_IRQ_JIGONBR_MASK,
181 },
182 [S2MPU02_IRQ_ACOKBF] = {
183 .reg_offset = 0,
184 .mask = S2MPS11_IRQ_ACOKBF_MASK,
185 },
186 [S2MPU02_IRQ_ACOKBR] = {
187 .reg_offset = 0,
188 .mask = S2MPS11_IRQ_ACOKBR_MASK,
189 },
190 [S2MPU02_IRQ_PWRON1S] = {
191 .reg_offset = 0,
192 .mask = S2MPS11_IRQ_PWRON1S_MASK,
193 },
194 [S2MPU02_IRQ_MRB] = {
195 .reg_offset = 0,
196 .mask = S2MPS11_IRQ_MRB_MASK,
197 },
198 [S2MPU02_IRQ_RTC60S] = {
199 .reg_offset = 1,
200 .mask = S2MPS11_IRQ_RTC60S_MASK,
201 },
202 [S2MPU02_IRQ_RTCA1] = {
203 .reg_offset = 1,
204 .mask = S2MPS11_IRQ_RTCA1_MASK,
205 },
206 [S2MPU02_IRQ_RTCA0] = {
207 .reg_offset = 1,
208 .mask = S2MPS11_IRQ_RTCA0_MASK,
209 },
210 [S2MPU02_IRQ_SMPL] = {
211 .reg_offset = 1,
212 .mask = S2MPS11_IRQ_SMPL_MASK,
213 },
214 [S2MPU02_IRQ_RTC1S] = {
215 .reg_offset = 1,
216 .mask = S2MPS11_IRQ_RTC1S_MASK,
217 },
218 [S2MPU02_IRQ_WTSR] = {
219 .reg_offset = 1,
220 .mask = S2MPS11_IRQ_WTSR_MASK,
221 },
222 [S2MPU02_IRQ_INT120C] = {
223 .reg_offset = 2,
224 .mask = S2MPS11_IRQ_INT120C_MASK,
225 },
226 [S2MPU02_IRQ_INT140C] = {
227 .reg_offset = 2,
228 .mask = S2MPS11_IRQ_INT140C_MASK,
229 },
230 [S2MPU02_IRQ_TSD] = {
231 .reg_offset = 2,
232 .mask = S2MPS14_IRQ_TSD_MASK,
233 },
234};
235
164static const struct regmap_irq s5m8767_irqs[] = { 236static const struct regmap_irq s5m8767_irqs[] = {
165 [S5M8767_IRQ_PWRR] = { 237 [S5M8767_IRQ_PWRR] = {
166 .reg_offset = 0, 238 .reg_offset = 0,
@@ -327,6 +399,16 @@ static const struct regmap_irq_chip s2mps14_irq_chip = {
327 .ack_base = S2MPS14_REG_INT1, 399 .ack_base = S2MPS14_REG_INT1,
328}; 400};
329 401
402static const struct regmap_irq_chip s2mpu02_irq_chip = {
403 .name = "s2mpu02",
404 .irqs = s2mpu02_irqs,
405 .num_irqs = ARRAY_SIZE(s2mpu02_irqs),
406 .num_regs = 3,
407 .status_base = S2MPU02_REG_INT1,
408 .mask_base = S2MPU02_REG_INT1M,
409 .ack_base = S2MPU02_REG_INT1,
410};
411
330static const struct regmap_irq_chip s5m8767_irq_chip = { 412static const struct regmap_irq_chip s5m8767_irq_chip = {
331 .name = "s5m8767", 413 .name = "s5m8767",
332 .irqs = s5m8767_irqs, 414 .irqs = s5m8767_irqs,
@@ -351,6 +433,7 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
351{ 433{
352 int ret = 0; 434 int ret = 0;
353 int type = sec_pmic->device_type; 435 int type = sec_pmic->device_type;
436 const struct regmap_irq_chip *sec_irq_chip;
354 437
355 if (!sec_pmic->irq) { 438 if (!sec_pmic->irq) {
356 dev_warn(sec_pmic->dev, 439 dev_warn(sec_pmic->dev,
@@ -361,28 +444,19 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
361 444
362 switch (type) { 445 switch (type) {
363 case S5M8763X: 446 case S5M8763X:
364 ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq, 447 sec_irq_chip = &s5m8763_irq_chip;
365 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
366 sec_pmic->irq_base, &s5m8763_irq_chip,
367 &sec_pmic->irq_data);
368 break; 448 break;
369 case S5M8767X: 449 case S5M8767X:
370 ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq, 450 sec_irq_chip = &s5m8767_irq_chip;
371 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
372 sec_pmic->irq_base, &s5m8767_irq_chip,
373 &sec_pmic->irq_data);
374 break; 451 break;
375 case S2MPS11X: 452 case S2MPS11X:
376 ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq, 453 sec_irq_chip = &s2mps11_irq_chip;
377 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
378 sec_pmic->irq_base, &s2mps11_irq_chip,
379 &sec_pmic->irq_data);
380 break; 454 break;
381 case S2MPS14X: 455 case S2MPS14X:
382 ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq, 456 sec_irq_chip = &s2mps14_irq_chip;
383 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 457 break;
384 sec_pmic->irq_base, &s2mps14_irq_chip, 458 case S2MPU02:
385 &sec_pmic->irq_data); 459 sec_irq_chip = &s2mpu02_irq_chip;
386 break; 460 break;
387 default: 461 default:
388 dev_err(sec_pmic->dev, "Unknown device type %lu\n", 462 dev_err(sec_pmic->dev, "Unknown device type %lu\n",
@@ -390,6 +464,10 @@ int sec_irq_init(struct sec_pmic_dev *sec_pmic)
390 return -EINVAL; 464 return -EINVAL;
391 } 465 }
392 466
467 ret = regmap_add_irq_chip(sec_pmic->regmap_pmic, sec_pmic->irq,
468 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
469 sec_pmic->irq_base, sec_irq_chip,
470 &sec_pmic->irq_data);
393 if (ret != 0) { 471 if (ret != 0) {
394 dev_err(sec_pmic->dev, "Failed to register IRQ chip: %d\n", ret); 472 dev_err(sec_pmic->dev, "Failed to register IRQ chip: %d\n", ret);
395 return ret; 473 return ret;
diff --git a/include/linux/mfd/samsung/core.h b/include/linux/mfd/samsung/core.h
index 47d84242940b..b5f73de81aad 100644
--- a/include/linux/mfd/samsung/core.h
+++ b/include/linux/mfd/samsung/core.h
@@ -21,6 +21,7 @@ enum sec_device_type {
21 S2MPA01, 21 S2MPA01,
22 S2MPS11X, 22 S2MPS11X,
23 S2MPS14X, 23 S2MPS14X,
24 S2MPU02,
24}; 25};
25 26
26/** 27/**
diff --git a/include/linux/mfd/samsung/irq.h b/include/linux/mfd/samsung/irq.h
index 1224f447356b..f35af7361b60 100644
--- a/include/linux/mfd/samsung/irq.h
+++ b/include/linux/mfd/samsung/irq.h
@@ -129,6 +129,30 @@ enum s2mps14_irq {
129 S2MPS14_IRQ_NR, 129 S2MPS14_IRQ_NR,
130}; 130};
131 131
132enum s2mpu02_irq {
133 S2MPU02_IRQ_PWRONF,
134 S2MPU02_IRQ_PWRONR,
135 S2MPU02_IRQ_JIGONBF,
136 S2MPU02_IRQ_JIGONBR,
137 S2MPU02_IRQ_ACOKBF,
138 S2MPU02_IRQ_ACOKBR,
139 S2MPU02_IRQ_PWRON1S,
140 S2MPU02_IRQ_MRB,
141
142 S2MPU02_IRQ_RTC60S,
143 S2MPU02_IRQ_RTCA1,
144 S2MPU02_IRQ_RTCA0,
145 S2MPU02_IRQ_SMPL,
146 S2MPU02_IRQ_RTC1S,
147 S2MPU02_IRQ_WTSR,
148
149 S2MPU02_IRQ_INT120C,
150 S2MPU02_IRQ_INT140C,
151 S2MPU02_IRQ_TSD,
152
153 S2MPU02_IRQ_NR,
154};
155
132/* Masks for interrupts are the same as in s2mps11 */ 156/* Masks for interrupts are the same as in s2mps11 */
133#define S2MPS14_IRQ_TSD_MASK (1 << 2) 157#define S2MPS14_IRQ_TSD_MASK (1 << 2)
134 158
diff --git a/include/linux/mfd/samsung/s2mpu02.h b/include/linux/mfd/samsung/s2mpu02.h
new file mode 100644
index 000000000000..47ae9bc583a7
--- /dev/null
+++ b/include/linux/mfd/samsung/s2mpu02.h
@@ -0,0 +1,201 @@
1/*
2 * s2mpu02.h
3 *
4 * Copyright (c) 2014 Samsung Electronics Co., Ltd
5 * http://www.samsung.com
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
19#ifndef __LINUX_MFD_S2MPU02_H
20#define __LINUX_MFD_S2MPU02_H
21
22/* S2MPU02 registers */
23enum S2MPU02_reg {
24 S2MPU02_REG_ID,
25 S2MPU02_REG_INT1,
26 S2MPU02_REG_INT2,
27 S2MPU02_REG_INT3,
28 S2MPU02_REG_INT1M,
29 S2MPU02_REG_INT2M,
30 S2MPU02_REG_INT3M,
31 S2MPU02_REG_ST1,
32 S2MPU02_REG_ST2,
33 S2MPU02_REG_PWRONSRC,
34 S2MPU02_REG_OFFSRC,
35 S2MPU02_REG_BU_CHG,
36 S2MPU02_REG_RTCCTRL,
37 S2MPU02_REG_PMCTRL1,
38 S2MPU02_REG_RSVD1,
39 S2MPU02_REG_RSVD2,
40 S2MPU02_REG_RSVD3,
41 S2MPU02_REG_RSVD4,
42 S2MPU02_REG_RSVD5,
43 S2MPU02_REG_RSVD6,
44 S2MPU02_REG_RSVD7,
45 S2MPU02_REG_WRSTEN,
46 S2MPU02_REG_RSVD8,
47 S2MPU02_REG_RSVD9,
48 S2MPU02_REG_RSVD10,
49 S2MPU02_REG_B1CTRL1,
50 S2MPU02_REG_B1CTRL2,
51 S2MPU02_REG_B2CTRL1,
52 S2MPU02_REG_B2CTRL2,
53 S2MPU02_REG_B3CTRL1,
54 S2MPU02_REG_B3CTRL2,
55 S2MPU02_REG_B4CTRL1,
56 S2MPU02_REG_B4CTRL2,
57 S2MPU02_REG_B5CTRL1,
58 S2MPU02_REG_B5CTRL2,
59 S2MPU02_REG_B5CTRL3,
60 S2MPU02_REG_B5CTRL4,
61 S2MPU02_REG_B5CTRL5,
62 S2MPU02_REG_B6CTRL1,
63 S2MPU02_REG_B6CTRL2,
64 S2MPU02_REG_B7CTRL1,
65 S2MPU02_REG_B7CTRL2,
66 S2MPU02_REG_RAMP1,
67 S2MPU02_REG_RAMP2,
68 S2MPU02_REG_L1CTRL,
69 S2MPU02_REG_L2CTRL1,
70 S2MPU02_REG_L2CTRL2,
71 S2MPU02_REG_L2CTRL3,
72 S2MPU02_REG_L2CTRL4,
73 S2MPU02_REG_L3CTRL,
74 S2MPU02_REG_L4CTRL,
75 S2MPU02_REG_L5CTRL,
76 S2MPU02_REG_L6CTRL,
77 S2MPU02_REG_L7CTRL,
78 S2MPU02_REG_L8CTRL,
79 S2MPU02_REG_L9CTRL,
80 S2MPU02_REG_L10CTRL,
81 S2MPU02_REG_L11CTRL,
82 S2MPU02_REG_L12CTRL,
83 S2MPU02_REG_L13CTRL,
84 S2MPU02_REG_L14CTRL,
85 S2MPU02_REG_L15CTRL,
86 S2MPU02_REG_L16CTRL,
87 S2MPU02_REG_L17CTRL,
88 S2MPU02_REG_L18CTRL,
89 S2MPU02_REG_L19CTRL,
90 S2MPU02_REG_L20CTRL,
91 S2MPU02_REG_L21CTRL,
92 S2MPU02_REG_L22CTRL,
93 S2MPU02_REG_L23CTRL,
94 S2MPU02_REG_L24CTRL,
95 S2MPU02_REG_L25CTRL,
96 S2MPU02_REG_L26CTRL,
97 S2MPU02_REG_L27CTRL,
98 S2MPU02_REG_L28CTRL,
99 S2MPU02_REG_LDODSCH1,
100 S2MPU02_REG_LDODSCH2,
101 S2MPU02_REG_LDODSCH3,
102 S2MPU02_REG_LDODSCH4,
103 S2MPU02_REG_SELMIF,
104 S2MPU02_REG_RSVD11,
105 S2MPU02_REG_RSVD12,
106 S2MPU02_REG_RSVD13,
107 S2MPU02_REG_DVSSEL,
108 S2MPU02_REG_DVSPTR,
109 S2MPU02_REG_DVSDATA,
110};
111
112/* S2MPU02 regulator ids */
113enum S2MPU02_regulators {
114 S2MPU02_LDO1,
115 S2MPU02_LDO2,
116 S2MPU02_LDO3,
117 S2MPU02_LDO4,
118 S2MPU02_LDO5,
119 S2MPU02_LDO6,
120 S2MPU02_LDO7,
121 S2MPU02_LDO8,
122 S2MPU02_LDO9,
123 S2MPU02_LDO10,
124 S2MPU02_LDO11,
125 S2MPU02_LDO12,
126 S2MPU02_LDO13,
127 S2MPU02_LDO14,
128 S2MPU02_LDO15,
129 S2MPU02_LDO16,
130 S2MPU02_LDO17,
131 S2MPU02_LDO18,
132 S2MPU02_LDO19,
133 S2MPU02_LDO20,
134 S2MPU02_LDO21,
135 S2MPU02_LDO22,
136 S2MPU02_LDO23,
137 S2MPU02_LDO24,
138 S2MPU02_LDO25,
139 S2MPU02_LDO26,
140 S2MPU02_LDO27,
141 S2MPU02_LDO28,
142 S2MPU02_BUCK1,
143 S2MPU02_BUCK2,
144 S2MPU02_BUCK3,
145 S2MPU02_BUCK4,
146 S2MPU02_BUCK5,
147 S2MPU02_BUCK6,
148 S2MPU02_BUCK7,
149
150 S2MPU02_REGULATOR_MAX,
151};
152
153/* Regulator constraints for BUCKx */
154#define S2MPU02_BUCK1234_MIN_600MV 600000
155#define S2MPU02_BUCK5_MIN_1081_25MV 1081250
156#define S2MPU02_BUCK6_MIN_1700MV 1700000
157#define S2MPU02_BUCK7_MIN_900MV 900000
158
159#define S2MPU02_BUCK1234_STEP_6_25MV 6250
160#define S2MPU02_BUCK5_STEP_6_25MV 6250
161#define S2MPU02_BUCK6_STEP_2_50MV 2500
162#define S2MPU02_BUCK7_STEP_6_25MV 6250
163
164#define S2MPU02_BUCK1234_START_SEL 0x00
165#define S2MPU02_BUCK5_START_SEL 0x4D
166#define S2MPU02_BUCK6_START_SEL 0x28
167#define S2MPU02_BUCK7_START_SEL 0x30
168
169#define S2MPU02_BUCK_RAMP_DELAY 12500
170
171/* Regulator constraints for different types of LDOx */
172#define S2MPU02_LDO_MIN_900MV 900000
173#define S2MPU02_LDO_MIN_1050MV 1050000
174#define S2MPU02_LDO_MIN_1600MV 1600000
175#define S2MPU02_LDO_STEP_12_5MV 12500
176#define S2MPU02_LDO_STEP_25MV 25000
177#define S2MPU02_LDO_STEP_50MV 50000
178
179#define S2MPU02_LDO_GROUP1_START_SEL 0x8
180#define S2MPU02_LDO_GROUP2_START_SEL 0xA
181#define S2MPU02_LDO_GROUP3_START_SEL 0x10
182
183#define S2MPU02_LDO_VSEL_MASK 0x3F
184#define S2MPU02_BUCK_VSEL_MASK 0xFF
185#define S2MPU02_ENABLE_MASK (0x03 << S2MPU02_ENABLE_SHIFT)
186#define S2MPU02_ENABLE_SHIFT 6
187
188/* On/Off controlled by PWREN */
189#define S2MPU02_ENABLE_SUSPEND (0x01 << S2MPU02_ENABLE_SHIFT)
190#define S2MPU02_DISABLE_SUSPEND (0x11 << S2MPU02_ENABLE_SHIFT)
191#define S2MPU02_LDO_N_VOLTAGES (S2MPU02_LDO_VSEL_MASK + 1)
192#define S2MPU02_BUCK_N_VOLTAGES (S2MPU02_BUCK_VSEL_MASK + 1)
193
194/* RAMP delay for BUCK1234*/
195#define S2MPU02_BUCK1_RAMP_SHIFT 6
196#define S2MPU02_BUCK2_RAMP_SHIFT 4
197#define S2MPU02_BUCK3_RAMP_SHIFT 2
198#define S2MPU02_BUCK4_RAMP_SHIFT 0
199#define S2MPU02_BUCK1234_RAMP_MASK 0x3
200
201#endif /* __LINUX_MFD_S2MPU02_H */
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