diff options
author | Ben Dooks <ben-linux@fluff.org> | 2010-01-30 01:02:58 -0500 |
---|---|---|
committer | Ben Dooks <ben-linux@fluff.org> | 2010-01-30 02:25:01 -0500 |
commit | 4ec07bba6945290c48dcc5b789cbd7adeabd7695 (patch) | |
tree | 3f72de5a5a133ece5b5d36220809b32e08425651 | |
parent | 87aef30eb3c5dac0491c83fe3b90bc61f1df24ec (diff) |
ARM: S3C2443: Use common clock gate code
Add common clock gate code for each of the S3C2443 clock gate code. Whether
to move this elsewhere will be decided later.
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
-rw-r--r-- | arch/arm/mach-s3c2443/clock.c | 48 |
1 files changed, 13 insertions, 35 deletions
diff --git a/arch/arm/mach-s3c2443/clock.c b/arch/arm/mach-s3c2443/clock.c index 3eb8b935d64c..5d061ea0c513 100644 --- a/arch/arm/mach-s3c2443/clock.c +++ b/arch/arm/mach-s3c2443/clock.c | |||
@@ -53,55 +53,33 @@ | |||
53 | * set the correct muxing at initialisation | 53 | * set the correct muxing at initialisation |
54 | */ | 54 | */ |
55 | 55 | ||
56 | static int s3c2443_clkcon_enable_h(struct clk *clk, int enable) | 56 | static int s3c2443_gate(void __iomem *reg, struct clk *clk, int enable) |
57 | { | 57 | { |
58 | unsigned int clocks = clk->ctrlbit; | 58 | u32 ctrlbit = clk->ctrlbit; |
59 | unsigned long clkcon; | 59 | u32 con = __raw_readl(reg); |
60 | |||
61 | clkcon = __raw_readl(S3C2443_HCLKCON); | ||
62 | 60 | ||
63 | if (enable) | 61 | if (enable) |
64 | clkcon |= clocks; | 62 | con |= ctrlbit; |
65 | else | 63 | else |
66 | clkcon &= ~clocks; | 64 | con &= ~ctrlbit; |
67 | |||
68 | __raw_writel(clkcon, S3C2443_HCLKCON); | ||
69 | 65 | ||
66 | __raw_writel(con, reg); | ||
70 | return 0; | 67 | return 0; |
71 | } | 68 | } |
72 | 69 | ||
73 | static int s3c2443_clkcon_enable_p(struct clk *clk, int enable) | 70 | static int s3c2443_clkcon_enable_h(struct clk *clk, int enable) |
74 | { | 71 | { |
75 | unsigned int clocks = clk->ctrlbit; | 72 | return s3c2443_gate(S3C2443_HCLKCON, clk, enable); |
76 | unsigned long clkcon; | 73 | } |
77 | |||
78 | clkcon = __raw_readl(S3C2443_PCLKCON); | ||
79 | |||
80 | if (enable) | ||
81 | clkcon |= clocks; | ||
82 | else | ||
83 | clkcon &= ~clocks; | ||
84 | |||
85 | __raw_writel(clkcon, S3C2443_PCLKCON); | ||
86 | 74 | ||
87 | return 0; | 75 | static int s3c2443_clkcon_enable_p(struct clk *clk, int enable) |
76 | { | ||
77 | return s3c2443_gate(S3C2443_PCLKCON, clk, enable); | ||
88 | } | 78 | } |
89 | 79 | ||
90 | static int s3c2443_clkcon_enable_s(struct clk *clk, int enable) | 80 | static int s3c2443_clkcon_enable_s(struct clk *clk, int enable) |
91 | { | 81 | { |
92 | unsigned int clocks = clk->ctrlbit; | 82 | return s3c2443_gate(S3C2443_SCLKCON, clk, enable); |
93 | unsigned long clkcon; | ||
94 | |||
95 | clkcon = __raw_readl(S3C2443_SCLKCON); | ||
96 | |||
97 | if (enable) | ||
98 | clkcon |= clocks; | ||
99 | else | ||
100 | clkcon &= ~clocks; | ||
101 | |||
102 | __raw_writel(clkcon, S3C2443_SCLKCON); | ||
103 | |||
104 | return 0; | ||
105 | } | 83 | } |
106 | 84 | ||
107 | static unsigned long s3c2443_roundrate_clksrc(struct clk *clk, | 85 | static unsigned long s3c2443_roundrate_clksrc(struct clk *clk, |