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authorCliff Wickman <cpw@sgi.com>2011-05-24 14:07:36 -0400
committerIngo Molnar <mingo@elte.hu>2011-05-25 08:20:14 -0400
commitf073cc8f39b48fdf4c8cd9520a6028fe69199b60 (patch)
tree7ab21c251ce91794d429d82aed68a675bb4b5263
parent2a919596c16b4333af851ff473ebf96e289ab90c (diff)
x86, UV: Clean up uv_tlb.c
SGI UV's uv_tlb.c driver has become rather hard to read, with overly large functions, non-standard coding style and (way) too long variable, constant and function names and non-obvious code flow sequences. This patch improves the readability and maintainability of the driver significantly, by doing the following strict code cleanups with no side effects: - Split long functions into shorter logical functions. - Shortened some variable and structure member names. - Added special functions for reads and writes of MMR regs with very long names. - Added the 'tunables' table to shortened tunables_write(). - Added the 'stat_description' table to shorten uv_ptc_proc_write(). - Pass fewer 'stat' arguments where it can be derived from the 'bcp' argument. - Function definitions consistent on one line, and inline in few (short) cases. - Moved some small structures and an atomic inline function to the header file. - Moved some local variables to the blocks where they are used. - Updated the copyright date. - Shortened uv_write_global_mmr64() etc. using some aliasing; no line breaks. Renamed many uv_.. functions that are not exported. - Aligned structure fields. [ note that not all structures are aligned the same way though; I'd like to keep the extensive commenting in some of them. ] - Shortened some long structure names. - Standard pass/fail exit from init_per_cpu() - Vertical alignment for mass initializations. - More separation between blocks of code. Tested on a 16-processor Altix UV. Signed-off-by: Cliff Wickman <cpw@sgi.com> Cc: penberg@kernel.org Link: http://lkml.kernel.org/r/E1QOw12-0004MN-Lp@eag09.americas.sgi.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
Diffstat
-rw-r--r--arch/x86/include/asm/uv/uv_bau.h554
-rw-r--r--arch/x86/platform/uv/tlb_uv.c1444
2 files changed, 1099 insertions, 899 deletions
diff --git a/arch/x86/include/asm/uv/uv_bau.h b/arch/x86/include/asm/uv/uv_bau.h
index 0652a5a9fd62..a291c40efd43 100644
--- a/arch/x86/include/asm/uv/uv_bau.h
+++ b/arch/x86/include/asm/uv/uv_bau.h
@@ -5,7 +5,7 @@
5 * 5 *
6 * SGI UV Broadcast Assist Unit definitions 6 * SGI UV Broadcast Assist Unit definitions
7 * 7 *
8 * Copyright (C) 2008 Silicon Graphics, Inc. All rights reserved. 8 * Copyright (C) 2008-2011 Silicon Graphics, Inc. All rights reserved.
9 */ 9 */
10 10
11#ifndef _ASM_X86_UV_UV_BAU_H 11#ifndef _ASM_X86_UV_UV_BAU_H
@@ -35,9 +35,9 @@
35 35
36#define MAX_CPUS_PER_UVHUB 64 36#define MAX_CPUS_PER_UVHUB 64
37#define MAX_CPUS_PER_SOCKET 32 37#define MAX_CPUS_PER_SOCKET 32
38#define UV_ADP_SIZE 64 /* hardware-provided max. */ 38#define ADP_SZ 64 /* hardware-provided max. */
39#define UV_CPUS_PER_ACT_STATUS 32 /* hardware-provided max. */ 39#define UV_CPUS_PER_AS 32 /* hardware-provided max. */
40#define UV_ITEMS_PER_DESCRIPTOR 8 40#define ITEMS_PER_DESC 8
41/* the 'throttle' to prevent the hardware stay-busy bug */ 41/* the 'throttle' to prevent the hardware stay-busy bug */
42#define MAX_BAU_CONCURRENT 3 42#define MAX_BAU_CONCURRENT 3
43#define UV_ACT_STATUS_MASK 0x3 43#define UV_ACT_STATUS_MASK 0x3
@@ -48,7 +48,7 @@
48#define UV2_NET_ENDPOINT_INTD 0x28 48#define UV2_NET_ENDPOINT_INTD 0x28
49#define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \ 49#define UV_NET_ENDPOINT_INTD (is_uv1_hub() ? \
50 UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD) 50 UV1_NET_ENDPOINT_INTD : UV2_NET_ENDPOINT_INTD)
51#define UV_DESC_BASE_PNODE_SHIFT 49 51#define UV_DESC_PSHIFT 49
52#define UV_PAYLOADQ_PNODE_SHIFT 49 52#define UV_PAYLOADQ_PNODE_SHIFT 49
53#define UV_PTC_BASENAME "sgi_uv/ptc_statistics" 53#define UV_PTC_BASENAME "sgi_uv/ptc_statistics"
54#define UV_BAU_BASENAME "sgi_uv/bau_tunables" 54#define UV_BAU_BASENAME "sgi_uv/bau_tunables"
@@ -56,7 +56,8 @@
56#define UV_BAU_TUNABLES_FILE "bau_tunables" 56#define UV_BAU_TUNABLES_FILE "bau_tunables"
57#define WHITESPACE " \t\n" 57#define WHITESPACE " \t\n"
58#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask)) 58#define uv_physnodeaddr(x) ((__pa((unsigned long)(x)) & uv_mmask))
59 59#define cpubit_isset(cpu, bau_local_cpumask) \
60 test_bit((cpu), (bau_local_cpumask).bits)
60 61
61/* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */ 62/* [19:16] SOFT_ACK timeout period 19: 1 is urgency 7 17:16 1 is multiplier */
62/* 63/*
@@ -72,25 +73,37 @@
72 UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \ 73 UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD : \
73 UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD) 74 UV2_INTD_SOFT_ACK_TIMEOUT_PERIOD)
74 75
75#define BAU_MISC_CONTROL_MULT_MASK 3 76#define BAU_MISC_CONTROL_MULT_MASK 3
76 77
77#define UVH_AGING_PRESCALE_SEL 0x000000b000UL 78#define UVH_AGING_PRESCALE_SEL 0x000000b000UL
78/* [30:28] URGENCY_7 an index into a table of times */ 79/* [30:28] URGENCY_7 an index into a table of times */
79#define BAU_URGENCY_7_SHIFT 28 80#define BAU_URGENCY_7_SHIFT 28
80#define BAU_URGENCY_7_MASK 7 81#define BAU_URGENCY_7_MASK 7
81 82
82#define UVH_TRANSACTION_TIMEOUT 0x000000b200UL 83#define UVH_TRANSACTION_TIMEOUT 0x000000b200UL
83/* [45:40] BAU - BAU transaction timeout select - a multiplier */ 84/* [45:40] BAU - BAU transaction timeout select - a multiplier */
84#define BAU_TRANS_SHIFT 40 85#define BAU_TRANS_SHIFT 40
85#define BAU_TRANS_MASK 0x3f 86#define BAU_TRANS_MASK 0x3f
87
88/*
89 * shorten some awkward names
90 */
91#define AS_PUSH_SHIFT UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT
92#define SOFTACK_MSHIFT UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT
93#define SOFTACK_PSHIFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
94#define SOFTACK_TIMEOUT_PERIOD UV_INTD_SOFT_ACK_TIMEOUT_PERIOD
95#define write_gmmr uv_write_global_mmr64
96#define write_lmmr uv_write_local_mmr
97#define read_lmmr uv_read_local_mmr
98#define read_gmmr uv_read_global_mmr64
86 99
87/* 100/*
88 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1 101 * bits in UVH_LB_BAU_SB_ACTIVATION_STATUS_0/1
89 */ 102 */
90#define DESC_STATUS_IDLE 0 103#define DS_IDLE 0
91#define DESC_STATUS_ACTIVE 1 104#define DS_ACTIVE 1
92#define DESC_STATUS_DESTINATION_TIMEOUT 2 105#define DS_DESTINATION_TIMEOUT 2
93#define DESC_STATUS_SOURCE_TIMEOUT 3 106#define DS_SOURCE_TIMEOUT 3
94/* 107/*
95 * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2 108 * bits put together from HRP_LB_BAU_SB_ACTIVATION_STATUS_0/1/2
96 * values 1 and 5 will not occur 109 * values 1 and 5 will not occur
@@ -111,22 +124,22 @@
111 * threshholds at which to use IPI to free resources 124 * threshholds at which to use IPI to free resources
112 */ 125 */
113/* after this # consecutive 'plugged' timeouts, use IPI to release resources */ 126/* after this # consecutive 'plugged' timeouts, use IPI to release resources */
114#define PLUGSB4RESET 100 127#define PLUGSB4RESET 100
115/* after this many consecutive timeouts, use IPI to release resources */ 128/* after this many consecutive timeouts, use IPI to release resources */
116#define TIMEOUTSB4RESET 1 129#define TIMEOUTSB4RESET 1
117/* at this number uses of IPI to release resources, giveup the request */ 130/* at this number uses of IPI to release resources, giveup the request */
118#define IPI_RESET_LIMIT 1 131#define IPI_RESET_LIMIT 1
119/* after this # consecutive successes, bump up the throttle if it was lowered */ 132/* after this # consecutive successes, bump up the throttle if it was lowered */
120#define COMPLETE_THRESHOLD 5 133#define COMPLETE_THRESHOLD 5
121 134
122#define UV_LB_SUBNODEID 0x10 135#define UV_LB_SUBNODEID 0x10
123 136
124/* these two are the same for UV1 and UV2: */ 137/* these two are the same for UV1 and UV2: */
125#define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT 138#define UV_SA_SHFT UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT
126#define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK 139#define UV_SA_MASK UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_MASK
127/* 4 bits of software ack period */ 140/* 4 bits of software ack period */
128#define UV2_ACK_MASK 0x7UL 141#define UV2_ACK_MASK 0x7UL
129#define UV2_ACK_UNITS_SHFT 3 142#define UV2_ACK_UNITS_SHFT 3
130#define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT 143#define UV2_LEG_SHFT UV2H_LB_BAU_MISC_CONTROL_USE_LEGACY_DESCRIPTOR_FORMATS_SHFT
131#define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT 144#define UV2_EXT_SHFT UV2H_LB_BAU_MISC_CONTROL_ENABLE_EXTENDED_SB_STATUS_SHFT
132 145
@@ -149,9 +162,16 @@
149/* 162/*
150 * tuning the action when the numalink network is extremely delayed 163 * tuning the action when the numalink network is extremely delayed
151 */ 164 */
152#define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in microseconds */ 165#define CONGESTED_RESPONSE_US 1000 /* 'long' response time, in
153#define CONGESTED_REPS 10 /* long delays averaged over this many broadcasts */ 166 microseconds */
154#define CONGESTED_PERIOD 30 /* time for the bau to be disabled, in seconds */ 167#define CONGESTED_REPS 10 /* long delays averaged over
168 this many broadcasts */
169#define CONGESTED_PERIOD 30 /* time for the bau to be
170 disabled, in seconds */
171/* see msg_type: */
172#define MSG_NOOP 0
173#define MSG_REGULAR 1
174#define MSG_RETRY 2
155 175
156/* 176/*
157 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor) 177 * Distribution: 32 bytes (256 bits) (bytes 0-0x1f of descriptor)
@@ -163,8 +183,8 @@
163 * 'base_dest_nasid' field of the header corresponds to the 183 * 'base_dest_nasid' field of the header corresponds to the
164 * destination nodeID associated with that specified bit. 184 * destination nodeID associated with that specified bit.
165 */ 185 */
166struct bau_target_uvhubmask { 186struct bau_targ_hubmask {
167 unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)]; 187 unsigned long bits[BITS_TO_LONGS(UV_DISTRIBUTION_SIZE)];
168}; 188};
169 189
170/* 190/*
@@ -173,7 +193,7 @@ struct bau_target_uvhubmask {
173 * enough bits for max. cpu's per uvhub) 193 * enough bits for max. cpu's per uvhub)
174 */ 194 */
175struct bau_local_cpumask { 195struct bau_local_cpumask {
176 unsigned long bits; 196 unsigned long bits;
177}; 197};
178 198
179/* 199/*
@@ -194,14 +214,14 @@ struct bau_local_cpumask {
194 * The payload is software-defined for INTD transactions 214 * The payload is software-defined for INTD transactions
195 */ 215 */
196struct bau_msg_payload { 216struct bau_msg_payload {
197 unsigned long address; /* signifies a page or all TLB's 217 unsigned long address; /* signifies a page or all
198 of the cpu */ 218 TLB's of the cpu */
199 /* 64 bits */ 219 /* 64 bits */
200 unsigned short sending_cpu; /* filled in by sender */ 220 unsigned short sending_cpu; /* filled in by sender */
201 /* 16 bits */ 221 /* 16 bits */
202 unsigned short acknowledge_count;/* filled in by destination */ 222 unsigned short acknowledge_count; /* filled in by destination */
203 /* 16 bits */ 223 /* 16 bits */
204 unsigned int reserved1:32; /* not usable */ 224 unsigned int reserved1:32; /* not usable */
205}; 225};
206 226
207 227
@@ -210,93 +230,96 @@ struct bau_msg_payload {
210 * see table 4.2.3.0.1 in broacast_assist spec. 230 * see table 4.2.3.0.1 in broacast_assist spec.
211 */ 231 */
212struct bau_msg_header { 232struct bau_msg_header {
213 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */ 233 unsigned int dest_subnodeid:6; /* must be 0x10, for the LB */
214 /* bits 5:0 */ 234 /* bits 5:0 */
215 unsigned int base_dest_nasid:15; /* nasid of the */ 235 unsigned int base_dest_nasid:15; /* nasid of the first bit */
216 /* bits 20:6 */ /* first bit in uvhub map */ 236 /* bits 20:6 */ /* in uvhub map */
217 unsigned int command:8; /* message type */ 237 unsigned int command:8; /* message type */
218 /* bits 28:21 */ 238 /* bits 28:21 */
219 /* 0x38: SN3net EndPoint Message */ 239 /* 0x38: SN3net EndPoint Message */
220 unsigned int rsvd_1:3; /* must be zero */ 240 unsigned int rsvd_1:3; /* must be zero */
221 /* bits 31:29 */ 241 /* bits 31:29 */
222 /* int will align on 32 bits */ 242 /* int will align on 32 bits */
223 unsigned int rsvd_2:9; /* must be zero */ 243 unsigned int rsvd_2:9; /* must be zero */
224 /* bits 40:32 */ 244 /* bits 40:32 */
225 /* Suppl_A is 56-41 */ 245 /* Suppl_A is 56-41 */
226 unsigned int sequence:16;/* message sequence number */ 246 unsigned int sequence:16; /* message sequence number */
227 /* bits 56:41 */ /* becomes bytes 16-17 of msg */ 247 /* bits 56:41 */ /* becomes bytes 16-17 of msg */
228 /* Address field (96:57) is never used as an 248 /* Address field (96:57) is
229 address (these are address bits 42:3) */ 249 never used as an address
230 250 (these are address bits
231 unsigned int rsvd_3:1; /* must be zero */ 251 42:3) */
252
253 unsigned int rsvd_3:1; /* must be zero */
232 /* bit 57 */ 254 /* bit 57 */
233 /* address bits 27:4 are payload */ 255 /* address bits 27:4 are payload */
234 /* these next 24 (58-81) bits become bytes 12-14 of msg */ 256 /* these next 24 (58-81) bits become bytes 12-14 of msg */
235
236 /* bits 65:58 land in byte 12 */ 257 /* bits 65:58 land in byte 12 */
237 unsigned int replied_to:1;/* sent as 0 by the source to byte 12 */ 258 unsigned int replied_to:1; /* sent as 0 by the source to
259 byte 12 */
238 /* bit 58 */ 260 /* bit 58 */
239 unsigned int msg_type:3; /* software type of the message*/ 261 unsigned int msg_type:3; /* software type of the
262 message */
240 /* bits 61:59 */ 263 /* bits 61:59 */
241 unsigned int canceled:1; /* message canceled, resource to be freed*/ 264 unsigned int canceled:1; /* message canceled, resource
265 is to be freed*/
242 /* bit 62 */ 266 /* bit 62 */
243 unsigned int payload_1a:1;/* not currently used */ 267 unsigned int payload_1a:1; /* not currently used */
244 /* bit 63 */ 268 /* bit 63 */
245 unsigned int payload_1b:2;/* not currently used */ 269 unsigned int payload_1b:2; /* not currently used */
246 /* bits 65:64 */ 270 /* bits 65:64 */
247 271
248 /* bits 73:66 land in byte 13 */ 272 /* bits 73:66 land in byte 13 */
249 unsigned int payload_1ca:6;/* not currently used */ 273 unsigned int payload_1ca:6; /* not currently used */
250 /* bits 71:66 */ 274 /* bits 71:66 */
251 unsigned int payload_1c:2;/* not currently used */ 275 unsigned int payload_1c:2; /* not currently used */
252 /* bits 73:72 */ 276 /* bits 73:72 */
253 277
254 /* bits 81:74 land in byte 14 */ 278 /* bits 81:74 land in byte 14 */
255 unsigned int payload_1d:6;/* not currently used */ 279 unsigned int payload_1d:6; /* not currently used */
256 /* bits 79:74 */ 280 /* bits 79:74 */
257 unsigned int payload_1e:2;/* not currently used */ 281 unsigned int payload_1e:2; /* not currently used */
258 /* bits 81:80 */ 282 /* bits 81:80 */
259 283
260 unsigned int rsvd_4:7; /* must be zero */ 284 unsigned int rsvd_4:7; /* must be zero */
261 /* bits 88:82 */ 285 /* bits 88:82 */
262 unsigned int sw_ack_flag:1;/* software acknowledge flag */ 286 unsigned int swack_flag:1; /* software acknowledge flag */
263 /* bit 89 */ 287 /* bit 89 */
264 /* INTD trasactions at destination are to 288 /* INTD trasactions at
265 wait for software acknowledge */ 289 destination are to wait for
266 unsigned int rsvd_5:6; /* must be zero */ 290 software acknowledge */
291 unsigned int rsvd_5:6; /* must be zero */
267 /* bits 95:90 */ 292 /* bits 95:90 */
268 unsigned int rsvd_6:5; /* must be zero */ 293 unsigned int rsvd_6:5; /* must be zero */
269 /* bits 100:96 */ 294 /* bits 100:96 */
270 unsigned int int_both:1;/* if 1, interrupt both sockets on the uvhub */ 295 unsigned int int_both:1; /* if 1, interrupt both sockets
296 on the uvhub */
271 /* bit 101*/ 297 /* bit 101*/
272 unsigned int fairness:3;/* usually zero */ 298 unsigned int fairness:3; /* usually zero */
273 /* bits 104:102 */ 299 /* bits 104:102 */
274 unsigned int multilevel:1; /* multi-level multicast format */ 300 unsigned int multilevel:1; /* multi-level multicast
301 format */
275 /* bit 105 */ 302 /* bit 105 */
276 /* 0 for TLB: endpoint multi-unicast messages */ 303 /* 0 for TLB: endpoint multi-unicast messages */
277 unsigned int chaining:1;/* next descriptor is part of this activation*/ 304 unsigned int chaining:1; /* next descriptor is part of
305 this activation*/
278 /* bit 106 */ 306 /* bit 106 */
279 unsigned int rsvd_7:21; /* must be zero */ 307 unsigned int rsvd_7:21; /* must be zero */
280 /* bits 127:107 */ 308 /* bits 127:107 */
281}; 309};
282 310
283/* see msg_type: */
284#define MSG_NOOP 0
285#define MSG_REGULAR 1
286#define MSG_RETRY 2
287
288/* 311/*
289 * The activation descriptor: 312 * The activation descriptor:
290 * The format of the message to send, plus all accompanying control 313 * The format of the message to send, plus all accompanying control
291 * Should be 64 bytes 314 * Should be 64 bytes
292 */ 315 */
293struct bau_desc { 316struct bau_desc {
294 struct bau_target_uvhubmask distribution; 317 struct bau_targ_hubmask distribution;
295 /* 318 /*
296 * message template, consisting of header and payload: 319 * message template, consisting of header and payload:
297 */ 320 */
298 struct bau_msg_header header; 321 struct bau_msg_header header;
299 struct bau_msg_payload payload; 322 struct bau_msg_payload payload;
300}; 323};
301/* 324/*
302 * -payload-- ---------header------ 325 * -payload-- ---------header------
@@ -315,59 +338,51 @@ struct bau_desc {
315 * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17 338 * are 32 bytes (2 micropackets) (256 bits) in length, but contain only 17
316 * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120) 339 * bytes of usable data, including the sw ack vector in byte 15 (bits 127:120)
317 * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from 340 * (12 bytes come from bau_msg_payload, 3 from payload_1, 2 from
318 * sw_ack_vector and payload_2) 341 * swack_vec and payload_2)
319 * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software 342 * "Enabling Software Acknowledgment mode (see Section 4.3.3 Software
320 * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload 343 * Acknowledge Processing) also selects 32 byte (17 bytes usable) payload
321 * operation." 344 * operation."
322 */ 345 */
323struct bau_payload_queue_entry { 346struct bau_pq_entry {
324 unsigned long address; /* signifies a page or all TLB's 347 unsigned long address; /* signifies a page or all TLB's
325 of the cpu */ 348 of the cpu */
326 /* 64 bits, bytes 0-7 */ 349 /* 64 bits, bytes 0-7 */
327 350 unsigned short sending_cpu; /* cpu that sent the message */
328 unsigned short sending_cpu; /* cpu that sent the message */
329 /* 16 bits, bytes 8-9 */ 351 /* 16 bits, bytes 8-9 */
330 352 unsigned short acknowledge_count; /* filled in by destination */
331 unsigned short acknowledge_count; /* filled in by destination */
332 /* 16 bits, bytes 10-11 */ 353 /* 16 bits, bytes 10-11 */
333
334 /* these next 3 bytes come from bits 58-81 of the message header */ 354 /* these next 3 bytes come from bits 58-81 of the message header */
335 unsigned short replied_to:1; /* sent as 0 by the source */ 355 unsigned short replied_to:1; /* sent as 0 by the source */
336 unsigned short msg_type:3; /* software message type */ 356 unsigned short msg_type:3; /* software message type */
337 unsigned short canceled:1; /* sent as 0 by the source */ 357 unsigned short canceled:1; /* sent as 0 by the source */
338 unsigned short unused1:3; /* not currently using */ 358 unsigned short unused1:3; /* not currently using */
339 /* byte 12 */ 359 /* byte 12 */
340 360 unsigned char unused2a; /* not currently using */
341 unsigned char unused2a; /* not currently using */
342 /* byte 13 */ 361 /* byte 13 */
343 unsigned char unused2; /* not currently using */ 362 unsigned char unused2; /* not currently using */
344 /* byte 14 */ 363 /* byte 14 */
345 364 unsigned char swack_vec; /* filled in by the hardware */
346 unsigned char sw_ack_vector; /* filled in by the hardware */
347 /* byte 15 (bits 127:120) */ 365 /* byte 15 (bits 127:120) */
348 366 unsigned short sequence; /* message sequence number */
349 unsigned short sequence; /* message sequence number */
350 /* bytes 16-17 */ 367 /* bytes 16-17 */
351 unsigned char unused4[2]; /* not currently using bytes 18-19 */ 368 unsigned char unused4[2]; /* not currently using bytes 18-19 */
352 /* bytes 18-19 */ 369 /* bytes 18-19 */
353 370 int number_of_cpus; /* filled in at destination */
354 int number_of_cpus; /* filled in at destination */
355 /* 32 bits, bytes 20-23 (aligned) */ 371 /* 32 bits, bytes 20-23 (aligned) */
356 372 unsigned char unused5[8]; /* not using */
357 unsigned char unused5[8]; /* not using */
358 /* bytes 24-31 */ 373 /* bytes 24-31 */
359}; 374};
360 375
361struct msg_desc { 376struct msg_desc {
362 struct bau_payload_queue_entry *msg; 377 struct bau_pq_entry *msg;
363 int msg_slot; 378 int msg_slot;
364 int sw_ack_slot; 379 int swack_slot;
365 struct bau_payload_queue_entry *va_queue_first; 380 struct bau_pq_entry *queue_first;
366 struct bau_payload_queue_entry *va_queue_last; 381 struct bau_pq_entry *queue_last;
367}; 382};
368 383
369struct reset_args { 384struct reset_args {
370 int sender; 385 int sender;
371}; 386};
372 387
373/* 388/*
@@ -375,112 +390,226 @@ struct reset_args {
375 */ 390 */
376struct ptc_stats { 391struct ptc_stats {
377 /* sender statistics */ 392 /* sender statistics */
378 unsigned long s_giveup; /* number of fall backs to IPI-style flushes */ 393 unsigned long s_giveup; /* number of fall backs to
379 unsigned long s_requestor; /* number of shootdown requests */ 394 IPI-style flushes */
380 unsigned long s_stimeout; /* source side timeouts */ 395 unsigned long s_requestor; /* number of shootdown
381 unsigned long s_dtimeout; /* destination side timeouts */ 396 requests */
382 unsigned long s_time; /* time spent in sending side */ 397 unsigned long s_stimeout; /* source side timeouts */
383 unsigned long s_retriesok; /* successful retries */ 398 unsigned long s_dtimeout; /* destination side timeouts */
384 unsigned long s_ntargcpu; /* total number of cpu's targeted */ 399 unsigned long s_time; /* time spent in sending side */
385 unsigned long s_ntargself; /* times the sending cpu was targeted */ 400 unsigned long s_retriesok; /* successful retries */
386 unsigned long s_ntarglocals; /* targets of cpus on the local blade */ 401 unsigned long s_ntargcpu; /* total number of cpu's
387 unsigned long s_ntargremotes; /* targets of cpus on remote blades */ 402 targeted */
388 unsigned long s_ntarglocaluvhub; /* targets of the local hub */ 403 unsigned long s_ntargself; /* times the sending cpu was
389 unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */ 404 targeted */
390 unsigned long s_ntarguvhub; /* total number of uvhubs targeted */ 405 unsigned long s_ntarglocals; /* targets of cpus on the local
391 unsigned long s_ntarguvhub16; /* number of times target hubs >= 16*/ 406 blade */
392 unsigned long s_ntarguvhub8; /* number of times target hubs >= 8 */ 407 unsigned long s_ntargremotes; /* targets of cpus on remote
393 unsigned long s_ntarguvhub4; /* number of times target hubs >= 4 */ 408 blades */
394 unsigned long s_ntarguvhub2; /* number of times target hubs >= 2 */ 409 unsigned long s_ntarglocaluvhub; /* targets of the local hub */
395 unsigned long s_ntarguvhub1; /* number of times target hubs == 1 */ 410 unsigned long s_ntargremoteuvhub; /* remotes hubs targeted */
396 unsigned long s_resets_plug; /* ipi-style resets from plug state */ 411 unsigned long s_ntarguvhub; /* total number of uvhubs
397 unsigned long s_resets_timeout; /* ipi-style resets from timeouts */ 412 targeted */
398 unsigned long s_busy; /* status stayed busy past s/w timer */ 413 unsigned long s_ntarguvhub16; /* number of times target
399 unsigned long s_throttles; /* waits in throttle */ 414 hubs >= 16*/
400 unsigned long s_retry_messages; /* retry broadcasts */ 415 unsigned long s_ntarguvhub8; /* number of times target
401 unsigned long s_bau_reenabled; /* for bau enable/disable */ 416 hubs >= 8 */
402 unsigned long s_bau_disabled; /* for bau enable/disable */ 417 unsigned long s_ntarguvhub4; /* number of times target
418 hubs >= 4 */
419 unsigned long s_ntarguvhub2; /* number of times target
420 hubs >= 2 */
421 unsigned long s_ntarguvhub1; /* number of times target
422 hubs == 1 */
423 unsigned long s_resets_plug; /* ipi-style resets from plug
424 state */
425 unsigned long s_resets_timeout; /* ipi-style resets from
426 timeouts */
427 unsigned long s_busy; /* status stayed busy past
428 s/w timer */
429 unsigned long s_throttles; /* waits in throttle */
430 unsigned long s_retry_messages; /* retry broadcasts */
431 unsigned long s_bau_reenabled; /* for bau enable/disable */
432 unsigned long s_bau_disabled; /* for bau enable/disable */
403 /* destination statistics */ 433 /* destination statistics */
404 unsigned long d_alltlb; /* times all tlb's on this cpu were flushed */ 434 unsigned long d_alltlb; /* times all tlb's on this
405 unsigned long d_onetlb; /* times just one tlb on this cpu was flushed */ 435 cpu were flushed */
406 unsigned long d_multmsg; /* interrupts with multiple messages */ 436 unsigned long d_onetlb; /* times just one tlb on this
407 unsigned long d_nomsg; /* interrupts with no message */ 437 cpu was flushed */
408 unsigned long d_time; /* time spent on destination side */ 438 unsigned long d_multmsg; /* interrupts with multiple
409 unsigned long d_requestee; /* number of messages processed */ 439 messages */
410 unsigned long d_retries; /* number of retry messages processed */ 440 unsigned long d_nomsg; /* interrupts with no message */
411 unsigned long d_canceled; /* number of messages canceled by retries */ 441 unsigned long d_time; /* time spent on destination
412 unsigned long d_nocanceled; /* retries that found nothing to cancel */ 442 side */
413 unsigned long d_resets; /* number of ipi-style requests processed */ 443 unsigned long d_requestee; /* number of messages
414 unsigned long d_rcanceled; /* number of messages canceled by resets */ 444 processed */
445 unsigned long d_retries; /* number of retry messages
446 processed */
447 unsigned long d_canceled; /* number of messages canceled
448 by retries */
449 unsigned long d_nocanceled; /* retries that found nothing
450 to cancel */
451 unsigned long d_resets; /* number of ipi-style requests
452 processed */
453 unsigned long d_rcanceled; /* number of messages canceled
454 by resets */
455};
456
457struct tunables {
458 int *tunp;
459 int deflt;
415}; 460};
416 461
417struct hub_and_pnode { 462struct hub_and_pnode {
418 short uvhub; 463 short uvhub;
419 short pnode; 464 short pnode;
465};
466
467struct socket_desc {
468 short num_cpus;
469 short cpu_number[MAX_CPUS_PER_SOCKET];
470};
471
472struct uvhub_desc {
473 unsigned short socket_mask;
474 short num_cpus;
475 short uvhub;
476 short pnode;
477 struct socket_desc socket[2];
420}; 478};
479
421/* 480/*
422 * one per-cpu; to locate the software tables 481 * one per-cpu; to locate the software tables
423 */ 482 */
424struct bau_control { 483struct bau_control {
425 struct bau_desc *descriptor_base; 484 struct bau_desc *descriptor_base;
426 struct bau_payload_queue_entry *va_queue_first; 485 struct bau_pq_entry *queue_first;
427 struct bau_payload_queue_entry *va_queue_last; 486 struct bau_pq_entry *queue_last;
428 struct bau_payload_queue_entry *bau_msg_head; 487 struct bau_pq_entry *bau_msg_head;
429 struct bau_control *uvhub_master; 488 struct bau_control *uvhub_master;
430 struct bau_control *socket_master; 489 struct bau_control *socket_master;
431 struct ptc_stats *statp; 490 struct ptc_stats *statp;
432 unsigned long timeout_interval; 491 unsigned long timeout_interval;
433 unsigned long set_bau_on_time; 492 unsigned long set_bau_on_time;
434 atomic_t active_descriptor_count; 493 atomic_t active_descriptor_count;
435 int plugged_tries; 494 int plugged_tries;
436 int timeout_tries; 495 int timeout_tries;
437 int ipi_attempts; 496 int ipi_attempts;
438 int conseccompletes; 497 int conseccompletes;
439 int baudisabled; 498 int baudisabled;
440 int set_bau_off; 499 int set_bau_off;
441 short cpu; 500 short cpu;
442 short osnode; 501 short osnode;
443 short uvhub_cpu; 502 short uvhub_cpu;
444 short uvhub; 503 short uvhub;
445 short cpus_in_socket; 504 short cpus_in_socket;
446 short cpus_in_uvhub; 505 short cpus_in_uvhub;
447 short partition_base_pnode; 506 short partition_base_pnode;
448 unsigned short message_number; 507 unsigned short message_number;
449 unsigned short uvhub_quiesce; 508 unsigned short uvhub_quiesce;
450 short socket_acknowledge_count[DEST_Q_SIZE]; 509 short socket_acknowledge_count[DEST_Q_SIZE];
451 cycles_t send_message; 510 cycles_t send_message;
452 spinlock_t uvhub_lock; 511 spinlock_t uvhub_lock;
453 spinlock_t queue_lock; 512 spinlock_t queue_lock;
454 /* tunables */ 513 /* tunables */
455 int max_bau_concurrent; 514 int max_concurr;
456 int max_bau_concurrent_constant; 515 int max_concurr_const;
457 int plugged_delay; 516 int plugged_delay;
458 int plugsb4reset; 517 int plugsb4reset;
459 int timeoutsb4reset; 518 int timeoutsb4reset;
460 int ipi_reset_limit; 519 int ipi_reset_limit;
461 int complete_threshold; 520 int complete_threshold;
462 int congested_response_us; 521 int cong_response_us;
463 int congested_reps; 522 int cong_reps;
464 int congested_period; 523 int cong_period;
465 cycles_t period_time; 524 cycles_t period_time;
466 long period_requests; 525 long period_requests;
467 struct hub_and_pnode *target_hub_and_pnode; 526 struct hub_and_pnode *thp;
468}; 527};
469 528
470static inline int bau_uvhub_isset(int uvhub, struct bau_target_uvhubmask *dstp) 529static unsigned long read_mmr_uv2_status(void)
530{
531 return read_lmmr(UV2H_LB_BAU_SB_ACTIVATION_STATUS_2);
532}
533
534static void write_mmr_data_broadcast(int pnode, unsigned long mmr_image)
535{
536 write_gmmr(pnode, UVH_BAU_DATA_BROADCAST, mmr_image);
537}
538
539static void write_mmr_descriptor_base(int pnode, unsigned long mmr_image)
540{
541 write_gmmr(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, mmr_image);
542}
543
544static void write_mmr_activation(unsigned long index)
545{
546 write_lmmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index);
547}
548
549static void write_gmmr_activation(int pnode, unsigned long mmr_image)
550{
551 write_gmmr(pnode, UVH_LB_BAU_SB_ACTIVATION_CONTROL, mmr_image);
552}
553
554static void write_mmr_payload_first(int pnode, unsigned long mmr_image)
555{
556 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, mmr_image);
557}
558
559static void write_mmr_payload_tail(int pnode, unsigned long mmr_image)
560{
561 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, mmr_image);
562}
563
564static void write_mmr_payload_last(int pnode, unsigned long mmr_image)
565{
566 write_gmmr(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST, mmr_image);
567}
568
569static void write_mmr_misc_control(int pnode, unsigned long mmr_image)
570{
571 write_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
572}
573
574static unsigned long read_mmr_misc_control(int pnode)
575{
576 return read_gmmr(pnode, UVH_LB_BAU_MISC_CONTROL);
577}
578
579static void write_mmr_sw_ack(unsigned long mr)
580{
581 uv_write_local_mmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, mr);
582}
583
584static unsigned long read_mmr_sw_ack(void)
585{
586 return read_lmmr(UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
587}
588
589static unsigned long read_gmmr_sw_ack(int pnode)
590{
591 return read_gmmr(pnode, UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
592}
593
594static void write_mmr_data_config(int pnode, unsigned long mr)
595{
596 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, mr);
597}
598
599static inline int bau_uvhub_isset(int uvhub, struct bau_targ_hubmask *dstp)
471{ 600{
472 return constant_test_bit(uvhub, &dstp->bits[0]); 601 return constant_test_bit(uvhub, &dstp->bits[0]);
473} 602}
474static inline void bau_uvhub_set(int pnode, struct bau_target_uvhubmask *dstp) 603static inline void bau_uvhub_set(int pnode, struct bau_targ_hubmask *dstp)
475{ 604{
476 __set_bit(pnode, &dstp->bits[0]); 605 __set_bit(pnode, &dstp->bits[0]);
477} 606}
478static inline void bau_uvhubs_clear(struct bau_target_uvhubmask *dstp, 607static inline void bau_uvhubs_clear(struct bau_targ_hubmask *dstp,
479 int nbits) 608 int nbits)
480{ 609{
481 bitmap_zero(&dstp->bits[0], nbits); 610 bitmap_zero(&dstp->bits[0], nbits);
482} 611}
483static inline int bau_uvhub_weight(struct bau_target_uvhubmask *dstp) 612static inline int bau_uvhub_weight(struct bau_targ_hubmask *dstp)
484{ 613{
485 return bitmap_weight((unsigned long *)&dstp->bits[0], 614 return bitmap_weight((unsigned long *)&dstp->bits[0],
486 UV_DISTRIBUTION_SIZE); 615 UV_DISTRIBUTION_SIZE);
@@ -491,9 +620,6 @@ static inline void bau_cpubits_clear(struct bau_local_cpumask *dstp, int nbits)
491 bitmap_zero(&dstp->bits, nbits); 620 bitmap_zero(&dstp->bits, nbits);
492} 621}
493 622
494#define cpubit_isset(cpu, bau_local_cpumask) \
495 test_bit((cpu), (bau_local_cpumask).bits)
496
497extern void uv_bau_message_intr1(void); 623extern void uv_bau_message_intr1(void);
498extern void uv_bau_timeout_intr1(void); 624extern void uv_bau_timeout_intr1(void);
499 625
@@ -501,7 +627,7 @@ struct atomic_short {
501 short counter; 627 short counter;
502}; 628};
503 629
504/** 630/*
505 * atomic_read_short - read a short atomic variable 631 * atomic_read_short - read a short atomic variable
506 * @v: pointer of type atomic_short 632 * @v: pointer of type atomic_short
507 * 633 *
@@ -512,14 +638,14 @@ static inline int atomic_read_short(const struct atomic_short *v)
512 return v->counter; 638 return v->counter;
513} 639}
514 640
515/** 641/*
516 * atomic_add_short_return - add and return a short int 642 * atom_asr - add and return a short int
517 * @i: short value to add 643 * @i: short value to add
518 * @v: pointer of type atomic_short 644 * @v: pointer of type atomic_short
519 * 645 *
520 * Atomically adds @i to @v and returns @i + @v 646 * Atomically adds @i to @v and returns @i + @v
521 */ 647 */
522static inline int atomic_add_short_return(short i, struct atomic_short *v) 648static inline int atom_asr(short i, struct atomic_short *v)
523{ 649{
524 short __i = i; 650 short __i = i;
525 asm volatile(LOCK_PREFIX "xaddw %0, %1" 651 asm volatile(LOCK_PREFIX "xaddw %0, %1"
@@ -528,4 +654,26 @@ static inline int atomic_add_short_return(short i, struct atomic_short *v)
528 return i + __i; 654 return i + __i;
529} 655}
530 656
657/*
658 * conditionally add 1 to *v, unless *v is >= u
659 * return 0 if we cannot add 1 to *v because it is >= u
660 * return 1 if we can add 1 to *v because it is < u
661 * the add is atomic
662 *
663 * This is close to atomic_add_unless(), but this allows the 'u' value
664 * to be lowered below the current 'v'. atomic_add_unless can only stop
665 * on equal.
666 */
667static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
668{
669 spin_lock(lock);
670 if (atomic_read(v) >= u) {
671 spin_unlock(lock);
672 return 0;
673 }
674 atomic_inc(v);
675 spin_unlock(lock);
676 return 1;
677}
678
531#endif /* _ASM_X86_UV_UV_BAU_H */ 679#endif /* _ASM_X86_UV_UV_BAU_H */
diff --git a/arch/x86/platform/uv/tlb_uv.c b/arch/x86/platform/uv/tlb_uv.c
index a9856c09c425..68e467f69fec 100644
--- a/arch/x86/platform/uv/tlb_uv.c
+++ b/arch/x86/platform/uv/tlb_uv.c
@@ -1,7 +1,7 @@
1/* 1/*
2 * SGI UltraViolet TLB flush routines. 2 * SGI UltraViolet TLB flush routines.
3 * 3 *
4 * (c) 2008-2010 Cliff Wickman <cpw@sgi.com>, SGI. 4 * (c) 2008-2011 Cliff Wickman <cpw@sgi.com>, SGI.
5 * 5 *
6 * This code is released under the GNU General Public License version 2 or 6 * This code is released under the GNU General Public License version 2 or
7 * later. 7 * later.
@@ -35,6 +35,7 @@ static int timeout_base_ns[] = {
35 5242880, 35 5242880,
36 167772160 36 167772160
37}; 37};
38
38static int timeout_us; 39static int timeout_us;
39static int nobau; 40static int nobau;
40static int baudisabled; 41static int baudisabled;
@@ -42,20 +43,70 @@ static spinlock_t disable_lock;
42static cycles_t congested_cycles; 43static cycles_t congested_cycles;
43 44
44/* tunables: */ 45/* tunables: */
45static int max_bau_concurrent = MAX_BAU_CONCURRENT; 46static int max_concurr = MAX_BAU_CONCURRENT;
46static int max_bau_concurrent_constant = MAX_BAU_CONCURRENT; 47static int max_concurr_const = MAX_BAU_CONCURRENT;
47static int plugged_delay = PLUGGED_DELAY; 48static int plugged_delay = PLUGGED_DELAY;
48static int plugsb4reset = PLUGSB4RESET; 49static int plugsb4reset = PLUGSB4RESET;
49static int timeoutsb4reset = TIMEOUTSB4RESET; 50static int timeoutsb4reset = TIMEOUTSB4RESET;
50static int ipi_reset_limit = IPI_RESET_LIMIT; 51static int ipi_reset_limit = IPI_RESET_LIMIT;
51static int complete_threshold = COMPLETE_THRESHOLD; 52static int complete_threshold = COMPLETE_THRESHOLD;
52static int congested_response_us = CONGESTED_RESPONSE_US; 53static int congested_respns_us = CONGESTED_RESPONSE_US;
53static int congested_reps = CONGESTED_REPS; 54static int congested_reps = CONGESTED_REPS;
54static int congested_period = CONGESTED_PERIOD; 55static int congested_period = CONGESTED_PERIOD;
56
57static struct tunables tunables[] = {
58 {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
59 {&plugged_delay, PLUGGED_DELAY},
60 {&plugsb4reset, PLUGSB4RESET},
61 {&timeoutsb4reset, TIMEOUTSB4RESET},
62 {&ipi_reset_limit, IPI_RESET_LIMIT},
63 {&complete_threshold, COMPLETE_THRESHOLD},
64 {&congested_respns_us, CONGESTED_RESPONSE_US},
65 {&congested_reps, CONGESTED_REPS},
66 {&congested_period, CONGESTED_PERIOD}
67};
68
55static struct dentry *tunables_dir; 69static struct dentry *tunables_dir;
56static struct dentry *tunables_file; 70static struct dentry *tunables_file;
57 71
58static int __init setup_nobau(char *arg) 72/* these correspond to the statistics printed by ptc_seq_show() */
73static char *stat_description[] = {
74 "sent: number of shootdown messages sent",
75 "stime: time spent sending messages",
76 "numuvhubs: number of hubs targeted with shootdown",
77 "numuvhubs16: number times 16 or more hubs targeted",
78 "numuvhubs8: number times 8 or more hubs targeted",
79 "numuvhubs4: number times 4 or more hubs targeted",
80 "numuvhubs2: number times 2 or more hubs targeted",
81 "numuvhubs1: number times 1 hub targeted",
82 "numcpus: number of cpus targeted with shootdown",
83 "dto: number of destination timeouts",
84 "retries: destination timeout retries sent",
85 "rok: : destination timeouts successfully retried",
86 "resetp: ipi-style resource resets for plugs",
87 "resett: ipi-style resource resets for timeouts",
88 "giveup: fall-backs to ipi-style shootdowns",
89 "sto: number of source timeouts",
90 "bz: number of stay-busy's",
91 "throt: number times spun in throttle",
92 "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
93 "recv: shootdown messages received",
94 "rtime: time spent processing messages",
95 "all: shootdown all-tlb messages",
96 "one: shootdown one-tlb messages",
97 "mult: interrupts that found multiple messages",
98 "none: interrupts that found no messages",
99 "retry: number of retry messages processed",
100 "canc: number messages canceled by retries",
101 "nocan: number retries that found nothing to cancel",
102 "reset: number of ipi-style reset requests processed",
103 "rcan: number messages canceled by reset requests",
104 "disable: number times use of the BAU was disabled",
105 "enable: number times use of the BAU was re-enabled"
106};
107
108static int __init
109setup_nobau(char *arg)
59{ 110{
60 nobau = 1; 111 nobau = 1;
61 return 0; 112 return 0;
@@ -63,7 +114,7 @@ static int __init setup_nobau(char *arg)
63early_param("nobau", setup_nobau); 114early_param("nobau", setup_nobau);
64 115
65/* base pnode in this partition */ 116/* base pnode in this partition */
66static int uv_partition_base_pnode __read_mostly; 117static int uv_base_pnode __read_mostly;
67/* position of pnode (which is nasid>>1): */ 118/* position of pnode (which is nasid>>1): */
68static int uv_nshift __read_mostly; 119static int uv_nshift __read_mostly;
69static unsigned long uv_mmask __read_mostly; 120static unsigned long uv_mmask __read_mostly;
@@ -109,60 +160,52 @@ static int __init uvhub_to_first_apicid(int uvhub)
109 * clear of the Timeout bit (as well) will free the resource. No reply will 160 * clear of the Timeout bit (as well) will free the resource. No reply will
110 * be sent (the hardware will only do one reply per message). 161 * be sent (the hardware will only do one reply per message).
111 */ 162 */
112static inline void uv_reply_to_message(struct msg_desc *mdp, 163static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp)
113 struct bau_control *bcp)
114{ 164{
115 unsigned long dw; 165 unsigned long dw;
116 struct bau_payload_queue_entry *msg; 166 struct bau_pq_entry *msg;
117 167
118 msg = mdp->msg; 168 msg = mdp->msg;
119 if (!msg->canceled) { 169 if (!msg->canceled) {
120 dw = (msg->sw_ack_vector << UV_SW_ACK_NPENDING) | 170 dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
121 msg->sw_ack_vector; 171 write_mmr_sw_ack(dw);
122 uv_write_local_mmr(
123 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, dw);
124 } 172 }
125 msg->replied_to = 1; 173 msg->replied_to = 1;
126 msg->sw_ack_vector = 0; 174 msg->swack_vec = 0;
127} 175}
128 176
129/* 177/*
130 * Process the receipt of a RETRY message 178 * Process the receipt of a RETRY message
131 */ 179 */
132static inline void uv_bau_process_retry_msg(struct msg_desc *mdp, 180static void bau_process_retry_msg(struct msg_desc *mdp,
133 struct bau_control *bcp) 181 struct bau_control *bcp)
134{ 182{
135 int i; 183 int i;
136 int cancel_count = 0; 184 int cancel_count = 0;
137 int slot2;
138 unsigned long msg_res; 185 unsigned long msg_res;
139 unsigned long mmr = 0; 186 unsigned long mmr = 0;
140 struct bau_payload_queue_entry *msg; 187 struct bau_pq_entry *msg = mdp->msg;
141 struct bau_payload_queue_entry *msg2; 188 struct bau_pq_entry *msg2;
142 struct ptc_stats *stat; 189 struct ptc_stats *stat = bcp->statp;
143 190
144 msg = mdp->msg;
145 stat = bcp->statp;
146 stat->d_retries++; 191 stat->d_retries++;
147 /* 192 /*
148 * cancel any message from msg+1 to the retry itself 193 * cancel any message from msg+1 to the retry itself
149 */ 194 */
150 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) { 195 for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
151 if (msg2 > mdp->va_queue_last) 196 if (msg2 > mdp->queue_last)
152 msg2 = mdp->va_queue_first; 197 msg2 = mdp->queue_first;
153 if (msg2 == msg) 198 if (msg2 == msg)
154 break; 199 break;
155 200
156 /* same conditions for cancellation as uv_do_reset */ 201 /* same conditions for cancellation as do_reset */
157 if ((msg2->replied_to == 0) && (msg2->canceled == 0) && 202 if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
158 (msg2->sw_ack_vector) && ((msg2->sw_ack_vector & 203 (msg2->swack_vec) && ((msg2->swack_vec &
159 msg->sw_ack_vector) == 0) && 204 msg->swack_vec) == 0) &&
160 (msg2->sending_cpu == msg->sending_cpu) && 205 (msg2->sending_cpu == msg->sending_cpu) &&
161 (msg2->msg_type != MSG_NOOP)) { 206 (msg2->msg_type != MSG_NOOP)) {
162 slot2 = msg2 - mdp->va_queue_first; 207 mmr = read_mmr_sw_ack();
163 mmr = uv_read_local_mmr 208 msg_res = msg2->swack_vec;
164 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE);
165 msg_res = msg2->sw_ack_vector;
166 /* 209 /*
167 * This is a message retry; clear the resources held 210 * This is a message retry; clear the resources held
168 * by the previous message only if they timed out. 211 * by the previous message only if they timed out.
@@ -170,6 +213,7 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
170 * situation to report. 213 * situation to report.
171 */ 214 */
172 if (mmr & (msg_res << UV_SW_ACK_NPENDING)) { 215 if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
216 unsigned long mr;
173 /* 217 /*
174 * is the resource timed out? 218 * is the resource timed out?
175 * make everyone ignore the cancelled message. 219 * make everyone ignore the cancelled message.
@@ -177,10 +221,8 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
177 msg2->canceled = 1; 221 msg2->canceled = 1;
178 stat->d_canceled++; 222 stat->d_canceled++;
179 cancel_count++; 223 cancel_count++;
180 uv_write_local_mmr( 224 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
181 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS, 225 write_mmr_sw_ack(mr);
182 (msg_res << UV_SW_ACK_NPENDING) |
183 msg_res);
184 } 226 }
185 } 227 }
186 } 228 }
@@ -192,20 +234,19 @@ static inline void uv_bau_process_retry_msg(struct msg_desc *mdp,
192 * Do all the things a cpu should do for a TLB shootdown message. 234 * Do all the things a cpu should do for a TLB shootdown message.
193 * Other cpu's may come here at the same time for this message. 235 * Other cpu's may come here at the same time for this message.
194 */ 236 */
195static void uv_bau_process_message(struct msg_desc *mdp, 237static void bau_process_message(struct msg_desc *mdp,
196 struct bau_control *bcp) 238 struct bau_control *bcp)
197{ 239{
198 int msg_ack_count;
199 short socket_ack_count = 0; 240 short socket_ack_count = 0;
200 struct ptc_stats *stat; 241 short *sp;
201 struct bau_payload_queue_entry *msg; 242 struct atomic_short *asp;
243 struct ptc_stats *stat = bcp->statp;
244 struct bau_pq_entry *msg = mdp->msg;
202 struct bau_control *smaster = bcp->socket_master; 245 struct bau_control *smaster = bcp->socket_master;
203 246
204 /* 247 /*
205 * This must be a normal message, or retry of a normal message 248 * This must be a normal message, or retry of a normal message
206 */ 249 */
207 msg = mdp->msg;
208 stat = bcp->statp;
209 if (msg->address == TLB_FLUSH_ALL) { 250 if (msg->address == TLB_FLUSH_ALL) {
210 local_flush_tlb(); 251 local_flush_tlb();
211 stat->d_alltlb++; 252 stat->d_alltlb++;
@@ -222,30 +263,32 @@ static void uv_bau_process_message(struct msg_desc *mdp,
222 * cpu number. 263 * cpu number.
223 */ 264 */
224 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master) 265 if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
225 uv_bau_process_retry_msg(mdp, bcp); 266 bau_process_retry_msg(mdp, bcp);
226 267
227 /* 268 /*
228 * This is a sw_ack message, so we have to reply to it. 269 * This is a swack message, so we have to reply to it.
229 * Count each responding cpu on the socket. This avoids 270 * Count each responding cpu on the socket. This avoids
230 * pinging the count's cache line back and forth between 271 * pinging the count's cache line back and forth between
231 * the sockets. 272 * the sockets.
232 */ 273 */
233 socket_ack_count = atomic_add_short_return(1, (struct atomic_short *) 274 sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
234 &smaster->socket_acknowledge_count[mdp->msg_slot]); 275 asp = (struct atomic_short *)sp;
276 socket_ack_count = atom_asr(1, asp);
235 if (socket_ack_count == bcp->cpus_in_socket) { 277 if (socket_ack_count == bcp->cpus_in_socket) {
278 int msg_ack_count;
236 /* 279 /*
237 * Both sockets dump their completed count total into 280 * Both sockets dump their completed count total into
238 * the message's count. 281 * the message's count.
239 */ 282 */
240 smaster->socket_acknowledge_count[mdp->msg_slot] = 0; 283 smaster->socket_acknowledge_count[mdp->msg_slot] = 0;
241 msg_ack_count = atomic_add_short_return(socket_ack_count, 284 asp = (struct atomic_short *)&msg->acknowledge_count;
242 (struct atomic_short *)&msg->acknowledge_count); 285 msg_ack_count = atom_asr(socket_ack_count, asp);
243 286
244 if (msg_ack_count == bcp->cpus_in_uvhub) { 287 if (msg_ack_count == bcp->cpus_in_uvhub) {
245 /* 288 /*
246 * All cpus in uvhub saw it; reply 289 * All cpus in uvhub saw it; reply
247 */ 290 */
248 uv_reply_to_message(mdp, bcp); 291 reply_to_message(mdp, bcp);
249 } 292 }
250 } 293 }
251 294
@@ -268,62 +311,51 @@ static int uvhub_to_first_cpu(int uvhub)
268 * Last resort when we get a large number of destination timeouts is 311 * Last resort when we get a large number of destination timeouts is
269 * to clear resources held by a given cpu. 312 * to clear resources held by a given cpu.
270 * Do this with IPI so that all messages in the BAU message queue 313 * Do this with IPI so that all messages in the BAU message queue
271 * can be identified by their nonzero sw_ack_vector field. 314 * can be identified by their nonzero swack_vec field.
272 * 315 *
273 * This is entered for a single cpu on the uvhub. 316 * This is entered for a single cpu on the uvhub.
274 * The sender want's this uvhub to free a specific message's 317 * The sender want's this uvhub to free a specific message's
275 * sw_ack resources. 318 * swack resources.
276 */ 319 */
277static void 320static void do_reset(void *ptr)
278uv_do_reset(void *ptr)
279{ 321{
280 int i; 322 int i;
281 int slot; 323 struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
282 int count = 0; 324 struct reset_args *rap = (struct reset_args *)ptr;
283 unsigned long mmr; 325 struct bau_pq_entry *msg;
284 unsigned long msg_res; 326 struct ptc_stats *stat = bcp->statp;
285 struct bau_control *bcp;
286 struct reset_args *rap;
287 struct bau_payload_queue_entry *msg;
288 struct ptc_stats *stat;
289 327
290 bcp = &per_cpu(bau_control, smp_processor_id());
291 rap = (struct reset_args *)ptr;
292 stat = bcp->statp;
293 stat->d_resets++; 328 stat->d_resets++;
294
295 /* 329 /*
296 * We're looking for the given sender, and 330 * We're looking for the given sender, and
297 * will free its sw_ack resource. 331 * will free its swack resource.
298 * If all cpu's finally responded after the timeout, its 332 * If all cpu's finally responded after the timeout, its
299 * message 'replied_to' was set. 333 * message 'replied_to' was set.
300 */ 334 */
301 for (msg = bcp->va_queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) { 335 for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
302 /* uv_do_reset: same conditions for cancellation as 336 unsigned long msg_res;
303 uv_bau_process_retry_msg() */ 337 /* do_reset: same conditions for cancellation as
338 bau_process_retry_msg() */
304 if ((msg->replied_to == 0) && 339 if ((msg->replied_to == 0) &&
305 (msg->canceled == 0) && 340 (msg->canceled == 0) &&
306 (msg->sending_cpu == rap->sender) && 341 (msg->sending_cpu == rap->sender) &&
307 (msg->sw_ack_vector) && 342 (msg->swack_vec) &&
308 (msg->msg_type != MSG_NOOP)) { 343 (msg->msg_type != MSG_NOOP)) {
344 unsigned long mmr;
345 unsigned long mr;
309 /* 346 /*
310 * make everyone else ignore this message 347 * make everyone else ignore this message
311 */ 348 */
312 msg->canceled = 1; 349 msg->canceled = 1;
313 slot = msg - bcp->va_queue_first;
314 count++;
315 /* 350 /*
316 * only reset the resource if it is still pending 351 * only reset the resource if it is still pending
317 */ 352 */
318 mmr = uv_read_local_mmr 353 mmr = read_mmr_sw_ack();
319 (UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE); 354 msg_res = msg->swack_vec;
320 msg_res = msg->sw_ack_vector; 355 mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
321 if (mmr & msg_res) { 356 if (mmr & msg_res) {
322 stat->d_rcanceled++; 357 stat->d_rcanceled++;
323 uv_write_local_mmr( 358 write_mmr_sw_ack(mr);
324 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE_ALIAS,
325 (msg_res << UV_SW_ACK_NPENDING) |
326 msg_res);
327 } 359 }
328 } 360 }
329 } 361 }
@@ -334,39 +366,38 @@ uv_do_reset(void *ptr)
334 * Use IPI to get all target uvhubs to release resources held by 366 * Use IPI to get all target uvhubs to release resources held by
335 * a given sending cpu number. 367 * a given sending cpu number.
336 */ 368 */
337static void uv_reset_with_ipi(struct bau_target_uvhubmask *distribution, 369static void reset_with_ipi(struct bau_targ_hubmask *distribution, int sender)
338 int sender)
339{ 370{
340 int uvhub; 371 int uvhub;
341 int cpu; 372 int maskbits;
342 cpumask_t mask; 373 cpumask_t mask;
343 struct reset_args reset_args; 374 struct reset_args reset_args;
344 375
345 reset_args.sender = sender; 376 reset_args.sender = sender;
346
347 cpus_clear(mask); 377 cpus_clear(mask);
348 /* find a single cpu for each uvhub in this distribution mask */ 378 /* find a single cpu for each uvhub in this distribution mask */
349 for (uvhub = 0; 379 maskbits = sizeof(struct bau_targ_hubmask) * BITSPERBYTE;
350 uvhub < sizeof(struct bau_target_uvhubmask) * BITSPERBYTE; 380 for (uvhub = 0; uvhub < maskbits; uvhub++) {
351 uvhub++) { 381 int cpu;
352 if (!bau_uvhub_isset(uvhub, distribution)) 382 if (!bau_uvhub_isset(uvhub, distribution))
353 continue; 383 continue;
354 /* find a cpu for this uvhub */ 384 /* find a cpu for this uvhub */
355 cpu = uvhub_to_first_cpu(uvhub); 385 cpu = uvhub_to_first_cpu(uvhub);
356 cpu_set(cpu, mask); 386 cpu_set(cpu, mask);
357 } 387 }
358 /* IPI all cpus; Preemption is already disabled */ 388
359 smp_call_function_many(&mask, uv_do_reset, (void *)&reset_args, 1); 389 /* IPI all cpus; preemption is already disabled */
390 smp_call_function_many(&mask, do_reset, (void *)&reset_args, 1);
360 return; 391 return;
361} 392}
362 393
363static inline unsigned long 394static inline unsigned long cycles_2_us(unsigned long long cyc)
364cycles_2_us(unsigned long long cyc)
365{ 395{
366 unsigned long long ns; 396 unsigned long long ns;
367 unsigned long us; 397 unsigned long us;
368 ns = (cyc * per_cpu(cyc2ns, smp_processor_id())) 398 int cpu = smp_processor_id();
369 >> CYC2NS_SCALE_FACTOR; 399
400 ns = (cyc * per_cpu(cyc2ns, cpu)) >> CYC2NS_SCALE_FACTOR;
370 us = ns / 1000; 401 us = ns / 1000;
371 return us; 402 return us;
372} 403}
@@ -376,21 +407,27 @@ cycles_2_us(unsigned long long cyc)
376 * leaves uvhub_quiesce set so that no new broadcasts are started by 407 * leaves uvhub_quiesce set so that no new broadcasts are started by
377 * bau_flush_send_and_wait() 408 * bau_flush_send_and_wait()
378 */ 409 */
379static inline void 410static inline void quiesce_local_uvhub(struct bau_control *hmaster)
380quiesce_local_uvhub(struct bau_control *hmaster)
381{ 411{
382 atomic_add_short_return(1, (struct atomic_short *) 412 atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
383 &hmaster->uvhub_quiesce);
384} 413}
385 414
386/* 415/*
387 * mark this quiet-requestor as done 416 * mark this quiet-requestor as done
388 */ 417 */
389static inline void 418static inline void end_uvhub_quiesce(struct bau_control *hmaster)
390end_uvhub_quiesce(struct bau_control *hmaster)
391{ 419{
392 atomic_add_short_return(-1, (struct atomic_short *) 420 atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
393 &hmaster->uvhub_quiesce); 421}
422
423static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
424{
425 unsigned long descriptor_status;
426
427 descriptor_status = uv_read_local_mmr(mmr_offset);
428 descriptor_status >>= right_shift;
429 descriptor_status &= UV_ACT_STATUS_MASK;
430 return descriptor_status;
394} 431}
395 432
396/* 433/*
@@ -398,31 +435,28 @@ end_uvhub_quiesce(struct bau_control *hmaster)
398 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP 435 * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
399 */ 436 */
400static int uv1_wait_completion(struct bau_desc *bau_desc, 437static int uv1_wait_completion(struct bau_desc *bau_desc,
401 unsigned long mmr_offset, int right_shift, int this_cpu, 438 unsigned long mmr_offset, int right_shift,
402 struct bau_control *bcp, struct bau_control *smaster, long try) 439 struct bau_control *bcp, long try)
403{ 440{
404 unsigned long descriptor_status; 441 unsigned long descriptor_status;
405 cycles_t ttime; 442 cycles_t ttm;
406 struct ptc_stats *stat = bcp->statp; 443 struct ptc_stats *stat = bcp->statp;
407 444
445 descriptor_status = uv1_read_status(mmr_offset, right_shift);
408 /* spin on the status MMR, waiting for it to go idle */ 446 /* spin on the status MMR, waiting for it to go idle */
409 while ((descriptor_status = (((unsigned long) 447 while ((descriptor_status != DS_IDLE)) {
410 uv_read_local_mmr(mmr_offset) >>
411 right_shift) & UV_ACT_STATUS_MASK)) !=
412 DESC_STATUS_IDLE) {
413 /* 448 /*
414 * Our software ack messages may be blocked because 449 * Our software ack messages may be blocked because
415 * there are no swack resources available. As long 450 * there are no swack resources available. As long
416 * as none of them has timed out hardware will NACK 451 * as none of them has timed out hardware will NACK
417 * our message and its state will stay IDLE. 452 * our message and its state will stay IDLE.
418 */ 453 */
419 if (descriptor_status == DESC_STATUS_SOURCE_TIMEOUT) { 454 if (descriptor_status == DS_SOURCE_TIMEOUT) {
420 stat->s_stimeout++; 455 stat->s_stimeout++;
421 return FLUSH_GIVEUP; 456 return FLUSH_GIVEUP;
422 } else if (descriptor_status == 457 } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
423 DESC_STATUS_DESTINATION_TIMEOUT) {
424 stat->s_dtimeout++; 458 stat->s_dtimeout++;
425 ttime = get_cycles(); 459 ttm = get_cycles();
426 460
427 /* 461 /*
428 * Our retries may be blocked by all destination 462 * Our retries may be blocked by all destination
@@ -430,8 +464,7 @@ static int uv1_wait_completion(struct bau_desc *bau_desc,
430 * pending. In that case hardware returns the 464 * pending. In that case hardware returns the
431 * ERROR that looks like a destination timeout. 465 * ERROR that looks like a destination timeout.
432 */ 466 */
433 if (cycles_2_us(ttime - bcp->send_message) < 467 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
434 timeout_us) {
435 bcp->conseccompletes = 0; 468 bcp->conseccompletes = 0;
436 return FLUSH_RETRY_PLUGGED; 469 return FLUSH_RETRY_PLUGGED;
437 } 470 }
@@ -444,93 +477,106 @@ static int uv1_wait_completion(struct bau_desc *bau_desc,
444 */ 477 */
445 cpu_relax(); 478 cpu_relax();
446 } 479 }
480 descriptor_status = uv1_read_status(mmr_offset, right_shift);
447 } 481 }
448 bcp->conseccompletes++; 482 bcp->conseccompletes++;
449 return FLUSH_COMPLETE; 483 return FLUSH_COMPLETE;
450} 484}
451 485
452static int uv2_wait_completion(struct bau_desc *bau_desc, 486/*
453 unsigned long mmr_offset, int right_shift, int this_cpu, 487 * UV2 has an extra bit of status in the ACTIVATION_STATUS_2 register.
454 struct bau_control *bcp, struct bau_control *smaster, long try) 488 */
489static unsigned long uv2_read_status(unsigned long offset, int rshft, int cpu)
455{ 490{
456 unsigned long descriptor_status; 491 unsigned long descriptor_status;
457 unsigned long descriptor_status2; 492 unsigned long descriptor_status2;
458 int cpu; 493
459 cycles_t ttime; 494 descriptor_status = ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK);
495 descriptor_status2 = (read_mmr_uv2_status() >> cpu) & 0x1UL;
496 descriptor_status = (descriptor_status << 1) | descriptor_status2;
497 return descriptor_status;
498}
499
500static int uv2_wait_completion(struct bau_desc *bau_desc,
501 unsigned long mmr_offset, int right_shift,
502 struct bau_control *bcp, long try)
503{
504 unsigned long descriptor_stat;
505 cycles_t ttm;
506 int cpu = bcp->uvhub_cpu;
460 struct ptc_stats *stat = bcp->statp; 507 struct ptc_stats *stat = bcp->statp;
461 508
462 /* UV2 has an extra bit of status */ 509 descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
463 cpu = bcp->uvhub_cpu; 510
464 /* spin on the status MMR, waiting for it to go idle */ 511 /* spin on the status MMR, waiting for it to go idle */
465 descriptor_status = (((unsigned long)(uv_read_local_mmr 512 while (descriptor_stat != UV2H_DESC_IDLE) {
466 (mmr_offset)) >> right_shift) & UV_ACT_STATUS_MASK);
467 descriptor_status2 = (((unsigned long)uv_read_local_mmr
468 (UV2H_LB_BAU_SB_ACTIVATION_STATUS_2) >> cpu) & 0x1UL);
469 descriptor_status = (descriptor_status << 1) |
470 descriptor_status2;
471 while (descriptor_status != UV2H_DESC_IDLE) {
472 /* 513 /*
473 * Our software ack messages may be blocked because 514 * Our software ack messages may be blocked because
474 * there are no swack resources available. As long 515 * there are no swack resources available. As long
475 * as none of them has timed out hardware will NACK 516 * as none of them has timed out hardware will NACK
476 * our message and its state will stay IDLE. 517 * our message and its state will stay IDLE.
477 */ 518 */
478 if ((descriptor_status == UV2H_DESC_SOURCE_TIMEOUT) || 519 if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT) ||
479 (descriptor_status == UV2H_DESC_DEST_STRONG_NACK) || 520 (descriptor_stat == UV2H_DESC_DEST_STRONG_NACK) ||
480 (descriptor_status == UV2H_DESC_DEST_PUT_ERR)) { 521 (descriptor_stat == UV2H_DESC_DEST_PUT_ERR)) {
481 stat->s_stimeout++; 522 stat->s_stimeout++;
482 return FLUSH_GIVEUP; 523 return FLUSH_GIVEUP;
483 } else if (descriptor_status == UV2H_DESC_DEST_TIMEOUT) { 524 } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
484 stat->s_dtimeout++; 525 stat->s_dtimeout++;
485 ttime = get_cycles(); 526 ttm = get_cycles();
486
487 /* 527 /*
488 * Our retries may be blocked by all destination 528 * Our retries may be blocked by all destination
489 * swack resources being consumed, and a timeout 529 * swack resources being consumed, and a timeout
490 * pending. In that case hardware returns the 530 * pending. In that case hardware returns the
491 * ERROR that looks like a destination timeout. 531 * ERROR that looks like a destination timeout.
492 */ 532 */
493 if (cycles_2_us(ttime - bcp->send_message) < 533 if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
494 timeout_us) {
495 bcp->conseccompletes = 0; 534 bcp->conseccompletes = 0;
496 return FLUSH_RETRY_PLUGGED; 535 return FLUSH_RETRY_PLUGGED;
497 } 536 }
498
499 bcp->conseccompletes = 0; 537 bcp->conseccompletes = 0;
500 return FLUSH_RETRY_TIMEOUT; 538 return FLUSH_RETRY_TIMEOUT;
501 } else { 539 } else {
502 /* 540 /*
503 * descriptor_status is still BUSY 541 * descriptor_stat is still BUSY
504 */ 542 */
505 cpu_relax(); 543 cpu_relax();
506 } 544 }
507 descriptor_status = (((unsigned long)(uv_read_local_mmr 545 descriptor_stat = uv2_read_status(mmr_offset, right_shift, cpu);
508 (mmr_offset)) >> right_shift) &
509 UV_ACT_STATUS_MASK);
510 descriptor_status2 = (((unsigned long)uv_read_local_mmr
511 (UV2H_LB_BAU_SB_ACTIVATION_STATUS_2) >> cpu) &
512 0x1UL);
513 descriptor_status = (descriptor_status << 1) |
514 descriptor_status2;
515 } 546 }
516 bcp->conseccompletes++; 547 bcp->conseccompletes++;
517 return FLUSH_COMPLETE; 548 return FLUSH_COMPLETE;
518} 549}
519 550
520static int uv_wait_completion(struct bau_desc *bau_desc, 551/*
521 unsigned long mmr_offset, int right_shift, int this_cpu, 552 * There are 2 status registers; each and array[32] of 2 bits. Set up for
522 struct bau_control *bcp, struct bau_control *smaster, long try) 553 * which register to read and position in that register based on cpu in
554 * current hub.
555 */
556static int wait_completion(struct bau_desc *bau_desc,
557 struct bau_control *bcp, long try)
523{ 558{
559 int right_shift;
560 unsigned long mmr_offset;
561 int cpu = bcp->uvhub_cpu;
562
563 if (cpu < UV_CPUS_PER_AS) {
564 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
565 right_shift = cpu * UV_ACT_STATUS_SIZE;
566 } else {
567 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
568 right_shift = ((cpu - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
569 }
570
524 if (is_uv1_hub()) 571 if (is_uv1_hub())
525 return uv1_wait_completion(bau_desc, mmr_offset, right_shift, 572 return uv1_wait_completion(bau_desc, mmr_offset, right_shift,
526 this_cpu, bcp, smaster, try); 573 bcp, try);
527 else 574 else
528 return uv2_wait_completion(bau_desc, mmr_offset, right_shift, 575 return uv2_wait_completion(bau_desc, mmr_offset, right_shift,
529 this_cpu, bcp, smaster, try); 576 bcp, try);
530} 577}
531 578
532static inline cycles_t 579static inline cycles_t sec_2_cycles(unsigned long sec)
533sec_2_cycles(unsigned long sec)
534{ 580{
535 unsigned long ns; 581 unsigned long ns;
536 cycles_t cyc; 582 cycles_t cyc;
@@ -541,63 +587,50 @@ sec_2_cycles(unsigned long sec)
541} 587}
542 588
543/* 589/*
544 * conditionally add 1 to *v, unless *v is >= u 590 * Our retries are blocked by all destination sw ack resources being
545 * return 0 if we cannot add 1 to *v because it is >= u
546 * return 1 if we can add 1 to *v because it is < u
547 * the add is atomic
548 *
549 * This is close to atomic_add_unless(), but this allows the 'u' value
550 * to be lowered below the current 'v'. atomic_add_unless can only stop
551 * on equal.
552 */
553static inline int atomic_inc_unless_ge(spinlock_t *lock, atomic_t *v, int u)
554{
555 spin_lock(lock);
556 if (atomic_read(v) >= u) {
557 spin_unlock(lock);
558 return 0;
559 }
560 atomic_inc(v);
561 spin_unlock(lock);
562 return 1;
563}
564
565/*
566 * Our retries are blocked by all destination swack resources being
567 * in use, and a timeout is pending. In that case hardware immediately 591 * in use, and a timeout is pending. In that case hardware immediately
568 * returns the ERROR that looks like a destination timeout. 592 * returns the ERROR that looks like a destination timeout.
569 */ 593 */
570static void 594static void destination_plugged(struct bau_desc *bau_desc,
571destination_plugged(struct bau_desc *bau_desc, struct bau_control *bcp, 595 struct bau_control *bcp,
572 struct bau_control *hmaster, struct ptc_stats *stat) 596 struct bau_control *hmaster, struct ptc_stats *stat)
573{ 597{
574 udelay(bcp->plugged_delay); 598 udelay(bcp->plugged_delay);
575 bcp->plugged_tries++; 599 bcp->plugged_tries++;
600
576 if (bcp->plugged_tries >= bcp->plugsb4reset) { 601 if (bcp->plugged_tries >= bcp->plugsb4reset) {
577 bcp->plugged_tries = 0; 602 bcp->plugged_tries = 0;
603
578 quiesce_local_uvhub(hmaster); 604 quiesce_local_uvhub(hmaster);
605
579 spin_lock(&hmaster->queue_lock); 606 spin_lock(&hmaster->queue_lock);
580 uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu); 607 reset_with_ipi(&bau_desc->distribution, bcp->cpu);
581 spin_unlock(&hmaster->queue_lock); 608 spin_unlock(&hmaster->queue_lock);
609
582 end_uvhub_quiesce(hmaster); 610 end_uvhub_quiesce(hmaster);
611
583 bcp->ipi_attempts++; 612 bcp->ipi_attempts++;
584 stat->s_resets_plug++; 613 stat->s_resets_plug++;
585 } 614 }
586} 615}
587 616
588static void 617static void destination_timeout(struct bau_desc *bau_desc,
589destination_timeout(struct bau_desc *bau_desc, struct bau_control *bcp, 618 struct bau_control *bcp, struct bau_control *hmaster,
590 struct bau_control *hmaster, struct ptc_stats *stat) 619 struct ptc_stats *stat)
591{ 620{
592 hmaster->max_bau_concurrent = 1; 621 hmaster->max_concurr = 1;
593 bcp->timeout_tries++; 622 bcp->timeout_tries++;
594 if (bcp->timeout_tries >= bcp->timeoutsb4reset) { 623 if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
595 bcp->timeout_tries = 0; 624 bcp->timeout_tries = 0;
625
596 quiesce_local_uvhub(hmaster); 626 quiesce_local_uvhub(hmaster);
627
597 spin_lock(&hmaster->queue_lock); 628 spin_lock(&hmaster->queue_lock);
598 uv_reset_with_ipi(&bau_desc->distribution, bcp->cpu); 629 reset_with_ipi(&bau_desc->distribution, bcp->cpu);
599 spin_unlock(&hmaster->queue_lock); 630 spin_unlock(&hmaster->queue_lock);
631
600 end_uvhub_quiesce(hmaster); 632 end_uvhub_quiesce(hmaster);
633
601 bcp->ipi_attempts++; 634 bcp->ipi_attempts++;
602 stat->s_resets_timeout++; 635 stat->s_resets_timeout++;
603 } 636 }
@@ -607,34 +640,104 @@ destination_timeout(struct bau_desc *bau_desc, struct bau_control *bcp,
607 * Completions are taking a very long time due to a congested numalink 640 * Completions are taking a very long time due to a congested numalink
608 * network. 641 * network.
609 */ 642 */
610static void 643static void disable_for_congestion(struct bau_control *bcp,
611disable_for_congestion(struct bau_control *bcp, struct ptc_stats *stat) 644 struct ptc_stats *stat)
612{ 645{
613 int tcpu;
614 struct bau_control *tbcp;
615
616 /* let only one cpu do this disabling */ 646 /* let only one cpu do this disabling */
617 spin_lock(&disable_lock); 647 spin_lock(&disable_lock);
648
618 if (!baudisabled && bcp->period_requests && 649 if (!baudisabled && bcp->period_requests &&
619 ((bcp->period_time / bcp->period_requests) > congested_cycles)) { 650 ((bcp->period_time / bcp->period_requests) > congested_cycles)) {
651 int tcpu;
652 struct bau_control *tbcp;
620 /* it becomes this cpu's job to turn on the use of the 653 /* it becomes this cpu's job to turn on the use of the
621 BAU again */ 654 BAU again */
622 baudisabled = 1; 655 baudisabled = 1;
623 bcp->set_bau_off = 1; 656 bcp->set_bau_off = 1;
624 bcp->set_bau_on_time = get_cycles() + 657 bcp->set_bau_on_time = get_cycles();
625 sec_2_cycles(bcp->congested_period); 658 bcp->set_bau_on_time += sec_2_cycles(bcp->cong_period);
626 stat->s_bau_disabled++; 659 stat->s_bau_disabled++;
627 for_each_present_cpu(tcpu) { 660 for_each_present_cpu(tcpu) {
628 tbcp = &per_cpu(bau_control, tcpu); 661 tbcp = &per_cpu(bau_control, tcpu);
629 tbcp->baudisabled = 1; 662 tbcp->baudisabled = 1;
630 } 663 }
631 } 664 }
665
632 spin_unlock(&disable_lock); 666 spin_unlock(&disable_lock);
633} 667}
634 668
635/** 669static void count_max_concurr(int stat, struct bau_control *bcp,
636 * uv_flush_send_and_wait 670 struct bau_control *hmaster)
637 * 671{
672 bcp->plugged_tries = 0;
673 bcp->timeout_tries = 0;
674 if (stat != FLUSH_COMPLETE)
675 return;
676 if (bcp->conseccompletes <= bcp->complete_threshold)
677 return;
678 if (hmaster->max_concurr >= hmaster->max_concurr_const)
679 return;
680 hmaster->max_concurr++;
681}
682
683static void record_send_stats(cycles_t time1, cycles_t time2,
684 struct bau_control *bcp, struct ptc_stats *stat,
685 int completion_status, int try)
686{
687 cycles_t elapsed;
688
689 if (time2 > time1) {
690 elapsed = time2 - time1;
691 stat->s_time += elapsed;
692
693 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
694 bcp->period_requests++;
695 bcp->period_time += elapsed;
696 if ((elapsed > congested_cycles) &&
697 (bcp->period_requests > bcp->cong_reps))
698 disable_for_congestion(bcp, stat);
699 }
700 } else
701 stat->s_requestor--;
702
703 if (completion_status == FLUSH_COMPLETE && try > 1)
704 stat->s_retriesok++;
705 else if (completion_status == FLUSH_GIVEUP)
706 stat->s_giveup++;
707}
708
709/*
710 * Because of a uv1 hardware bug only a limited number of concurrent
711 * requests can be made.
712 */
713static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
714{
715 spinlock_t *lock = &hmaster->uvhub_lock;
716 atomic_t *v;
717
718 v = &hmaster->active_descriptor_count;
719 if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
720 stat->s_throttles++;
721 do {
722 cpu_relax();
723 } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
724 }
725}
726
727/*
728 * Handle the completion status of a message send.
729 */
730static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
731 struct bau_control *bcp, struct bau_control *hmaster,
732 struct ptc_stats *stat)
733{
734 if (completion_status == FLUSH_RETRY_PLUGGED)
735 destination_plugged(bau_desc, bcp, hmaster, stat);
736 else if (completion_status == FLUSH_RETRY_TIMEOUT)
737 destination_timeout(bau_desc, bcp, hmaster, stat);
738}
739
740/*
638 * Send a broadcast and wait for it to complete. 741 * Send a broadcast and wait for it to complete.
639 * 742 *
640 * The flush_mask contains the cpus the broadcast is to be sent to including 743 * The flush_mask contains the cpus the broadcast is to be sent to including
@@ -645,45 +748,23 @@ disable_for_congestion(struct bau_control *bcp, struct ptc_stats *stat)
645 * returned to the kernel. 748 * returned to the kernel.
646 */ 749 */
647int uv_flush_send_and_wait(struct bau_desc *bau_desc, 750int uv_flush_send_and_wait(struct bau_desc *bau_desc,
648 struct cpumask *flush_mask, struct bau_control *bcp) 751 struct cpumask *flush_mask, struct bau_control *bcp)
649{ 752{
650 int right_shift;
651 int completion_status = 0;
652 int seq_number = 0; 753 int seq_number = 0;
754 int completion_stat = 0;
653 long try = 0; 755 long try = 0;
654 int cpu = bcp->uvhub_cpu;
655 int this_cpu = bcp->cpu;
656 unsigned long mmr_offset;
657 unsigned long index; 756 unsigned long index;
658 cycles_t time1; 757 cycles_t time1;
659 cycles_t time2; 758 cycles_t time2;
660 cycles_t elapsed;
661 struct ptc_stats *stat = bcp->statp; 759 struct ptc_stats *stat = bcp->statp;
662 struct bau_control *smaster = bcp->socket_master;
663 struct bau_control *hmaster = bcp->uvhub_master; 760 struct bau_control *hmaster = bcp->uvhub_master;
664 761
665 if (is_uv1_hub() && 762 if (is_uv1_hub())
666 !atomic_inc_unless_ge(&hmaster->uvhub_lock, 763 uv1_throttle(hmaster, stat);
667 &hmaster->active_descriptor_count, 764
668 hmaster->max_bau_concurrent)) {
669 stat->s_throttles++;
670 do {
671 cpu_relax();
672 } while (!atomic_inc_unless_ge(&hmaster->uvhub_lock,
673 &hmaster->active_descriptor_count,
674 hmaster->max_bau_concurrent));
675 }
676 while (hmaster->uvhub_quiesce) 765 while (hmaster->uvhub_quiesce)
677 cpu_relax(); 766 cpu_relax();
678 767
679 if (cpu < UV_CPUS_PER_ACT_STATUS) {
680 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
681 right_shift = cpu * UV_ACT_STATUS_SIZE;
682 } else {
683 mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
684 right_shift =
685 ((cpu - UV_CPUS_PER_ACT_STATUS) * UV_ACT_STATUS_SIZE);
686 }
687 time1 = get_cycles(); 768 time1 = get_cycles();
688 do { 769 do {
689 if (try == 0) { 770 if (try == 0) {
@@ -693,64 +774,134 @@ int uv_flush_send_and_wait(struct bau_desc *bau_desc,
693 bau_desc->header.msg_type = MSG_RETRY; 774 bau_desc->header.msg_type = MSG_RETRY;
694 stat->s_retry_messages++; 775 stat->s_retry_messages++;
695 } 776 }
777
696 bau_desc->header.sequence = seq_number; 778 bau_desc->header.sequence = seq_number;
697 index = (1UL << UVH_LB_BAU_SB_ACTIVATION_CONTROL_PUSH_SHFT) | 779 index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
698 bcp->uvhub_cpu;
699 bcp->send_message = get_cycles(); 780 bcp->send_message = get_cycles();
700 uv_write_local_mmr(UVH_LB_BAU_SB_ACTIVATION_CONTROL, index); 781
782 write_mmr_activation(index);
783
701 try++; 784 try++;
702 completion_status = uv_wait_completion(bau_desc, mmr_offset, 785 completion_stat = wait_completion(bau_desc, bcp, try);
703 right_shift, this_cpu, bcp, smaster, try); 786
787 handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
704 788
705 if (completion_status == FLUSH_RETRY_PLUGGED) {
706 destination_plugged(bau_desc, bcp, hmaster, stat);
707 } else if (completion_status == FLUSH_RETRY_TIMEOUT) {
708 destination_timeout(bau_desc, bcp, hmaster, stat);
709 }
710 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) { 789 if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
711 bcp->ipi_attempts = 0; 790 bcp->ipi_attempts = 0;
712 completion_status = FLUSH_GIVEUP; 791 completion_stat = FLUSH_GIVEUP;
713 break; 792 break;
714 } 793 }
715 cpu_relax(); 794 cpu_relax();
716 } while ((completion_status == FLUSH_RETRY_PLUGGED) || 795 } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
717 (completion_status == FLUSH_RETRY_TIMEOUT)); 796 (completion_stat == FLUSH_RETRY_TIMEOUT));
797
718 time2 = get_cycles(); 798 time2 = get_cycles();
719 bcp->plugged_tries = 0; 799
720 bcp->timeout_tries = 0; 800 count_max_concurr(completion_stat, bcp, hmaster);
721 if ((completion_status == FLUSH_COMPLETE) && 801
722 (bcp->conseccompletes > bcp->complete_threshold) &&
723 (hmaster->max_bau_concurrent <
724 hmaster->max_bau_concurrent_constant))
725 hmaster->max_bau_concurrent++;
726 while (hmaster->uvhub_quiesce) 802 while (hmaster->uvhub_quiesce)
727 cpu_relax(); 803 cpu_relax();
804
728 atomic_dec(&hmaster->active_descriptor_count); 805 atomic_dec(&hmaster->active_descriptor_count);
729 if (time2 > time1) { 806
730 elapsed = time2 - time1; 807 record_send_stats(time1, time2, bcp, stat, completion_stat, try);
731 stat->s_time += elapsed; 808
732 if ((completion_status == FLUSH_COMPLETE) && (try == 1)) { 809 if (completion_stat == FLUSH_GIVEUP)
733 bcp->period_requests++; 810 return 1;
734 bcp->period_time += elapsed; 811 return 0;
735 if ((elapsed > congested_cycles) && 812}
736 (bcp->period_requests > bcp->congested_reps)) { 813
737 disable_for_congestion(bcp, stat); 814/*
815 * The BAU is disabled. When the disabled time period has expired, the cpu
816 * that disabled it must re-enable it.
817 * Return 0 if it is re-enabled for all cpus.
818 */
819static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
820{
821 int tcpu;
822 struct bau_control *tbcp;
823
824 if (bcp->set_bau_off) {
825 if (get_cycles() >= bcp->set_bau_on_time) {
826 stat->s_bau_reenabled++;
827 baudisabled = 0;
828 for_each_present_cpu(tcpu) {
829 tbcp = &per_cpu(bau_control, tcpu);
830 tbcp->baudisabled = 0;
831 tbcp->period_requests = 0;
832 tbcp->period_time = 0;
738 } 833 }
834 return 0;
739 } 835 }
836 }
837 return -1;
838}
839
840static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
841 int remotes, struct bau_desc *bau_desc)
842{
843 stat->s_requestor++;
844 stat->s_ntargcpu += remotes + locals;
845 stat->s_ntargremotes += remotes;
846 stat->s_ntarglocals += locals;
847
848 /* uvhub statistics */
849 hubs = bau_uvhub_weight(&bau_desc->distribution);
850 if (locals) {
851 stat->s_ntarglocaluvhub++;
852 stat->s_ntargremoteuvhub += (hubs - 1);
740 } else 853 } else
741 stat->s_requestor--; 854 stat->s_ntargremoteuvhub += hubs;
742 if (completion_status == FLUSH_COMPLETE && try > 1) 855
743 stat->s_retriesok++; 856 stat->s_ntarguvhub += hubs;
744 else if (completion_status == FLUSH_GIVEUP) { 857
745 stat->s_giveup++; 858 if (hubs >= 16)
746 return 1; 859 stat->s_ntarguvhub16++;
860 else if (hubs >= 8)
861 stat->s_ntarguvhub8++;
862 else if (hubs >= 4)
863 stat->s_ntarguvhub4++;
864 else if (hubs >= 2)
865 stat->s_ntarguvhub2++;
866 else
867 stat->s_ntarguvhub1++;
868}
869
870/*
871 * Translate a cpu mask to the uvhub distribution mask in the BAU
872 * activation descriptor.
873 */
874static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
875 struct bau_desc *bau_desc, int *localsp, int *remotesp)
876{
877 int cpu;
878 int pnode;
879 int cnt = 0;
880 struct hub_and_pnode *hpp;
881
882 for_each_cpu(cpu, flush_mask) {
883 /*
884 * The distribution vector is a bit map of pnodes, relative
885 * to the partition base pnode (and the partition base nasid
886 * in the header).
887 * Translate cpu to pnode and hub using a local memory array.
888 */
889 hpp = &bcp->socket_master->thp[cpu];
890 pnode = hpp->pnode - bcp->partition_base_pnode;
891 bau_uvhub_set(pnode, &bau_desc->distribution);
892 cnt++;
893 if (hpp->uvhub == bcp->uvhub)
894 (*localsp)++;
895 else
896 (*remotesp)++;
747 } 897 }
898 if (!cnt)
899 return 1;
748 return 0; 900 return 0;
749} 901}
750 902
751/** 903/*
752 * uv_flush_tlb_others - globally purge translation cache of a virtual 904 * globally purge translation cache of a virtual address or all TLB's
753 * address or all TLB's
754 * @cpumask: mask of all cpu's in which the address is to be removed 905 * @cpumask: mask of all cpu's in which the address is to be removed
755 * @mm: mm_struct containing virtual address range 906 * @mm: mm_struct containing virtual address range
756 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu) 907 * @va: virtual address to be removed (or TLB_FLUSH_ALL for all TLB's on cpu)
@@ -774,20 +925,16 @@ int uv_flush_send_and_wait(struct bau_desc *bau_desc,
774 * done. The returned pointer is valid till preemption is re-enabled. 925 * done. The returned pointer is valid till preemption is re-enabled.
775 */ 926 */
776const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask, 927const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
777 struct mm_struct *mm, 928 struct mm_struct *mm, unsigned long va,
778 unsigned long va, unsigned int cpu) 929 unsigned int cpu)
779{ 930{
780 int locals = 0; 931 int locals = 0;
781 int remotes = 0; 932 int remotes = 0;
782 int hubs = 0; 933 int hubs = 0;
783 int tcpu;
784 int tpnode;
785 struct bau_desc *bau_desc; 934 struct bau_desc *bau_desc;
786 struct cpumask *flush_mask; 935 struct cpumask *flush_mask;
787 struct ptc_stats *stat; 936 struct ptc_stats *stat;
788 struct bau_control *bcp; 937 struct bau_control *bcp;
789 struct bau_control *tbcp;
790 struct hub_and_pnode *hpp;
791 938
792 /* kernel was booted 'nobau' */ 939 /* kernel was booted 'nobau' */
793 if (nobau) 940 if (nobau)
@@ -798,20 +945,8 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
798 945
799 /* bau was disabled due to slow response */ 946 /* bau was disabled due to slow response */
800 if (bcp->baudisabled) { 947 if (bcp->baudisabled) {
801 /* the cpu that disabled it must re-enable it */ 948 if (check_enable(bcp, stat))
802 if (bcp->set_bau_off) { 949 return cpumask;
803 if (get_cycles() >= bcp->set_bau_on_time) {
804 stat->s_bau_reenabled++;
805 baudisabled = 0;
806 for_each_present_cpu(tcpu) {
807 tbcp = &per_cpu(bau_control, tcpu);
808 tbcp->baudisabled = 0;
809 tbcp->period_requests = 0;
810 tbcp->period_time = 0;
811 }
812 }
813 }
814 return cpumask;
815 } 950 }
816 951
817 /* 952 /*
@@ -822,59 +957,20 @@ const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
822 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu); 957 flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
823 /* don't actually do a shootdown of the local cpu */ 958 /* don't actually do a shootdown of the local cpu */
824 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu)); 959 cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
960
825 if (cpu_isset(cpu, *cpumask)) 961 if (cpu_isset(cpu, *cpumask))
826 stat->s_ntargself++; 962 stat->s_ntargself++;
827 963
828 bau_desc = bcp->descriptor_base; 964 bau_desc = bcp->descriptor_base;
829 bau_desc += UV_ITEMS_PER_DESCRIPTOR * bcp->uvhub_cpu; 965 bau_desc += ITEMS_PER_DESC * bcp->uvhub_cpu;
830 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE); 966 bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
831 967 if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
832 for_each_cpu(tcpu, flush_mask) {
833 /*
834 * The distribution vector is a bit map of pnodes, relative
835 * to the partition base pnode (and the partition base nasid
836 * in the header).
837 * Translate cpu to pnode and hub using an array stored
838 * in local memory.
839 */
840 hpp = &bcp->socket_master->target_hub_and_pnode[tcpu];
841 tpnode = hpp->pnode - bcp->partition_base_pnode;
842 bau_uvhub_set(tpnode, &bau_desc->distribution);
843 if (hpp->uvhub == bcp->uvhub)
844 locals++;
845 else
846 remotes++;
847 }
848 if ((locals + remotes) == 0)
849 return NULL; 968 return NULL;
850 stat->s_requestor++;
851 stat->s_ntargcpu += remotes + locals;
852 stat->s_ntargremotes += remotes;
853 stat->s_ntarglocals += locals;
854 remotes = bau_uvhub_weight(&bau_desc->distribution);
855 969
856 /* uvhub statistics */ 970 record_send_statistics(stat, locals, hubs, remotes, bau_desc);
857 hubs = bau_uvhub_weight(&bau_desc->distribution);
858 if (locals) {
859 stat->s_ntarglocaluvhub++;
860 stat->s_ntargremoteuvhub += (hubs - 1);
861 } else
862 stat->s_ntargremoteuvhub += hubs;
863 stat->s_ntarguvhub += hubs;
864 if (hubs >= 16)
865 stat->s_ntarguvhub16++;
866 else if (hubs >= 8)
867 stat->s_ntarguvhub8++;
868 else if (hubs >= 4)
869 stat->s_ntarguvhub4++;
870 else if (hubs >= 2)
871 stat->s_ntarguvhub2++;
872 else
873 stat->s_ntarguvhub1++;
874 971
875 bau_desc->payload.address = va; 972 bau_desc->payload.address = va;
876 bau_desc->payload.sending_cpu = cpu; 973 bau_desc->payload.sending_cpu = cpu;
877
878 /* 974 /*
879 * uv_flush_send_and_wait returns 0 if all cpu's were messaged, 975 * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
880 * or 1 if it gave up and the original cpumask should be returned. 976 * or 1 if it gave up and the original cpumask should be returned.
@@ -903,26 +999,31 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
903{ 999{
904 int count = 0; 1000 int count = 0;
905 cycles_t time_start; 1001 cycles_t time_start;
906 struct bau_payload_queue_entry *msg; 1002 struct bau_pq_entry *msg;
907 struct bau_control *bcp; 1003 struct bau_control *bcp;
908 struct ptc_stats *stat; 1004 struct ptc_stats *stat;
909 struct msg_desc msgdesc; 1005 struct msg_desc msgdesc;
910 1006
911 time_start = get_cycles(); 1007 time_start = get_cycles();
1008
912 bcp = &per_cpu(bau_control, smp_processor_id()); 1009 bcp = &per_cpu(bau_control, smp_processor_id());
913 stat = bcp->statp; 1010 stat = bcp->statp;
914 msgdesc.va_queue_first = bcp->va_queue_first; 1011
915 msgdesc.va_queue_last = bcp->va_queue_last; 1012 msgdesc.queue_first = bcp->queue_first;
1013 msgdesc.queue_last = bcp->queue_last;
1014
916 msg = bcp->bau_msg_head; 1015 msg = bcp->bau_msg_head;
917 while (msg->sw_ack_vector) { 1016 while (msg->swack_vec) {
918 count++; 1017 count++;
919 msgdesc.msg_slot = msg - msgdesc.va_queue_first; 1018
920 msgdesc.sw_ack_slot = ffs(msg->sw_ack_vector) - 1; 1019 msgdesc.msg_slot = msg - msgdesc.queue_first;
1020 msgdesc.swack_slot = ffs(msg->swack_vec) - 1;
921 msgdesc.msg = msg; 1021 msgdesc.msg = msg;
922 uv_bau_process_message(&msgdesc, bcp); 1022 bau_process_message(&msgdesc, bcp);
1023
923 msg++; 1024 msg++;
924 if (msg > msgdesc.va_queue_last) 1025 if (msg > msgdesc.queue_last)
925 msg = msgdesc.va_queue_first; 1026 msg = msgdesc.queue_first;
926 bcp->bau_msg_head = msg; 1027 bcp->bau_msg_head = msg;
927 } 1028 }
928 stat->d_time += (get_cycles() - time_start); 1029 stat->d_time += (get_cycles() - time_start);
@@ -930,18 +1031,17 @@ void uv_bau_message_interrupt(struct pt_regs *regs)
930 stat->d_nomsg++; 1031 stat->d_nomsg++;
931 else if (count > 1) 1032 else if (count > 1)
932 stat->d_multmsg++; 1033 stat->d_multmsg++;
1034
933 ack_APIC_irq(); 1035 ack_APIC_irq();
934} 1036}
935 1037
936/* 1038/*
937 * uv_enable_timeouts 1039 * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
938 *
939 * Each target uvhub (i.e. a uvhub that has no cpu's) needs to have
940 * shootdown message timeouts enabled. The timeout does not cause 1040 * shootdown message timeouts enabled. The timeout does not cause
941 * an interrupt, but causes an error message to be returned to 1041 * an interrupt, but causes an error message to be returned to
942 * the sender. 1042 * the sender.
943 */ 1043 */
944static void __init uv_enable_timeouts(void) 1044static void __init enable_timeouts(void)
945{ 1045{
946 int uvhub; 1046 int uvhub;
947 int nuvhubs; 1047 int nuvhubs;
@@ -955,52 +1055,44 @@ static void __init uv_enable_timeouts(void)
955 continue; 1055 continue;
956 1056
957 pnode = uv_blade_to_pnode(uvhub); 1057 pnode = uv_blade_to_pnode(uvhub);
958 mmr_image = 1058 mmr_image = read_mmr_misc_control(pnode);
959 uv_read_global_mmr64(pnode, UVH_LB_BAU_MISC_CONTROL);
960 /* 1059 /*
961 * Set the timeout period and then lock it in, in three 1060 * Set the timeout period and then lock it in, in three
962 * steps; captures and locks in the period. 1061 * steps; captures and locks in the period.
963 * 1062 *
964 * To program the period, the SOFT_ACK_MODE must be off. 1063 * To program the period, the SOFT_ACK_MODE must be off.
965 */ 1064 */
966 mmr_image &= ~((unsigned long)1 << 1065 mmr_image &= ~(1L << SOFTACK_MSHIFT);
967 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT); 1066 write_mmr_misc_control(pnode, mmr_image);
968 uv_write_global_mmr64
969 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
970 /* 1067 /*
971 * Set the 4-bit period. 1068 * Set the 4-bit period.
972 */ 1069 */
973 mmr_image &= ~((unsigned long)0xf << 1070 mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
974 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT); 1071 mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
975 mmr_image |= (UV_INTD_SOFT_ACK_TIMEOUT_PERIOD << 1072 write_mmr_misc_control(pnode, mmr_image);
976 UVH_LB_BAU_MISC_CONTROL_INTD_SOFT_ACK_TIMEOUT_PERIOD_SHFT);
977 uv_write_global_mmr64
978 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
979 /* 1073 /*
980 * UV1: 1074 * UV1:
981 * Subsequent reversals of the timebase bit (3) cause an 1075 * Subsequent reversals of the timebase bit (3) cause an
982 * immediate timeout of one or all INTD resources as 1076 * immediate timeout of one or all INTD resources as
983 * indicated in bits 2:0 (7 causes all of them to timeout). 1077 * indicated in bits 2:0 (7 causes all of them to timeout).
984 */ 1078 */
985 mmr_image |= ((unsigned long)1 << 1079 mmr_image |= (1L << SOFTACK_MSHIFT);
986 UVH_LB_BAU_MISC_CONTROL_ENABLE_INTD_SOFT_ACK_MODE_SHFT);
987 if (is_uv2_hub()) { 1080 if (is_uv2_hub()) {
988 mmr_image |= ((unsigned long)1 << UV2_LEG_SHFT); 1081 mmr_image |= (1L << UV2_LEG_SHFT);
989 mmr_image |= ((unsigned long)1 << UV2_EXT_SHFT); 1082 mmr_image |= (1L << UV2_EXT_SHFT);
990 } 1083 }
991 uv_write_global_mmr64 1084 write_mmr_misc_control(pnode, mmr_image);
992 (pnode, UVH_LB_BAU_MISC_CONTROL, mmr_image);
993 } 1085 }
994} 1086}
995 1087
996static void *uv_ptc_seq_start(struct seq_file *file, loff_t *offset) 1088static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
997{ 1089{
998 if (*offset < num_possible_cpus()) 1090 if (*offset < num_possible_cpus())
999 return offset; 1091 return offset;
1000 return NULL; 1092 return NULL;
1001} 1093}
1002 1094
1003static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset) 1095static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1004{ 1096{
1005 (*offset)++; 1097 (*offset)++;
1006 if (*offset < num_possible_cpus()) 1098 if (*offset < num_possible_cpus())
@@ -1008,12 +1100,11 @@ static void *uv_ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
1008 return NULL; 1100 return NULL;
1009} 1101}
1010 1102
1011static void uv_ptc_seq_stop(struct seq_file *file, void *data) 1103static void ptc_seq_stop(struct seq_file *file, void *data)
1012{ 1104{
1013} 1105}
1014 1106
1015static inline unsigned long long 1107static inline unsigned long long usec_2_cycles(unsigned long microsec)
1016microsec_2_cycles(unsigned long microsec)
1017{ 1108{
1018 unsigned long ns; 1109 unsigned long ns;
1019 unsigned long long cyc; 1110 unsigned long long cyc;
@@ -1024,29 +1115,27 @@ microsec_2_cycles(unsigned long microsec)
1024} 1115}
1025 1116
1026/* 1117/*
1027 * Display the statistics thru /proc. 1118 * Display the statistics thru /proc/sgi_uv/ptc_statistics
1028 * 'data' points to the cpu number 1119 * 'data' points to the cpu number
1120 * Note: see the descriptions in stat_description[].
1029 */ 1121 */
1030static int uv_ptc_seq_show(struct seq_file *file, void *data) 1122static int ptc_seq_show(struct seq_file *file, void *data)
1031{ 1123{
1032 struct ptc_stats *stat; 1124 struct ptc_stats *stat;
1033 int cpu; 1125 int cpu;
1034 1126
1035 cpu = *(loff_t *)data; 1127 cpu = *(loff_t *)data;
1036
1037 if (!cpu) { 1128 if (!cpu) {
1038 seq_printf(file, 1129 seq_printf(file,
1039 "# cpu sent stime self locals remotes ncpus localhub "); 1130 "# cpu sent stime self locals remotes ncpus localhub ");
1040 seq_printf(file, 1131 seq_printf(file,
1041 "remotehub numuvhubs numuvhubs16 numuvhubs8 "); 1132 "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
1042 seq_printf(file, 1133 seq_printf(file,
1043 "numuvhubs4 numuvhubs2 numuvhubs1 dto "); 1134 "numuvhubs4 numuvhubs2 numuvhubs1 dto retries rok ");
1044 seq_printf(file, 1135 seq_printf(file,
1045 "retries rok resetp resett giveup sto bz throt "); 1136 "resetp resett giveup sto bz throt swack recv rtime ");
1046 seq_printf(file, 1137 seq_printf(file,
1047 "sw_ack recv rtime all "); 1138 "all one mult none retry canc nocan reset rcan ");
1048 seq_printf(file,
1049 "one mult none retry canc nocan reset rcan ");
1050 seq_printf(file, 1139 seq_printf(file,
1051 "disable enable\n"); 1140 "disable enable\n");
1052 } 1141 }
@@ -1073,8 +1162,7 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
1073 /* destination side statistics */ 1162 /* destination side statistics */
1074 seq_printf(file, 1163 seq_printf(file,
1075 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ", 1164 "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
1076 uv_read_global_mmr64(uv_cpu_to_pnode(cpu), 1165 read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
1077 UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE),
1078 stat->d_requestee, cycles_2_us(stat->d_time), 1166 stat->d_requestee, cycles_2_us(stat->d_time),
1079 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg, 1167 stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
1080 stat->d_nomsg, stat->d_retries, stat->d_canceled, 1168 stat->d_nomsg, stat->d_retries, stat->d_canceled,
@@ -1083,7 +1171,6 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
1083 seq_printf(file, "%ld %ld\n", 1171 seq_printf(file, "%ld %ld\n",
1084 stat->s_bau_disabled, stat->s_bau_reenabled); 1172 stat->s_bau_disabled, stat->s_bau_reenabled);
1085 } 1173 }
1086
1087 return 0; 1174 return 0;
1088} 1175}
1089 1176
@@ -1091,18 +1178,18 @@ static int uv_ptc_seq_show(struct seq_file *file, void *data)
1091 * Display the tunables thru debugfs 1178 * Display the tunables thru debugfs
1092 */ 1179 */
1093static ssize_t tunables_read(struct file *file, char __user *userbuf, 1180static ssize_t tunables_read(struct file *file, char __user *userbuf,
1094 size_t count, loff_t *ppos) 1181 size_t count, loff_t *ppos)
1095{ 1182{
1096 char *buf; 1183 char *buf;
1097 int ret; 1184 int ret;
1098 1185
1099 buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n", 1186 buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d\n",
1100 "max_bau_concurrent plugged_delay plugsb4reset", 1187 "max_concur plugged_delay plugsb4reset",
1101 "timeoutsb4reset ipi_reset_limit complete_threshold", 1188 "timeoutsb4reset ipi_reset_limit complete_threshold",
1102 "congested_response_us congested_reps congested_period", 1189 "congested_response_us congested_reps congested_period",
1103 max_bau_concurrent, plugged_delay, plugsb4reset, 1190 max_concurr, plugged_delay, plugsb4reset,
1104 timeoutsb4reset, ipi_reset_limit, complete_threshold, 1191 timeoutsb4reset, ipi_reset_limit, complete_threshold,
1105 congested_response_us, congested_reps, congested_period); 1192 congested_respns_us, congested_reps, congested_period);
1106 1193
1107 if (!buf) 1194 if (!buf)
1108 return -ENOMEM; 1195 return -ENOMEM;
@@ -1113,13 +1200,16 @@ static ssize_t tunables_read(struct file *file, char __user *userbuf,
1113} 1200}
1114 1201
1115/* 1202/*
1116 * -1: resetf the statistics 1203 * handle a write to /proc/sgi_uv/ptc_statistics
1204 * -1: reset the statistics
1117 * 0: display meaning of the statistics 1205 * 0: display meaning of the statistics
1118 */ 1206 */
1119static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user, 1207static ssize_t ptc_proc_write(struct file *file, const char __user *user,
1120 size_t count, loff_t *data) 1208 size_t count, loff_t *data)
1121{ 1209{
1122 int cpu; 1210 int cpu;
1211 int i;
1212 int elements;
1123 long input_arg; 1213 long input_arg;
1124 char optstr[64]; 1214 char optstr[64];
1125 struct ptc_stats *stat; 1215 struct ptc_stats *stat;
@@ -1129,79 +1219,18 @@ static ssize_t uv_ptc_proc_write(struct file *file, const char __user *user,
1129 if (copy_from_user(optstr, user, count)) 1219 if (copy_from_user(optstr, user, count))
1130 return -EFAULT; 1220 return -EFAULT;
1131 optstr[count - 1] = '\0'; 1221 optstr[count - 1] = '\0';
1222
1132 if (strict_strtol(optstr, 10, &input_arg) < 0) { 1223 if (strict_strtol(optstr, 10, &input_arg) < 0) {
1133 printk(KERN_DEBUG "%s is invalid\n", optstr); 1224 printk(KERN_DEBUG "%s is invalid\n", optstr);
1134 return -EINVAL; 1225 return -EINVAL;
1135 } 1226 }
1136 1227
1137 if (input_arg == 0) { 1228 if (input_arg == 0) {
1229 elements = sizeof(stat_description)/sizeof(*stat_description);
1138 printk(KERN_DEBUG "# cpu: cpu number\n"); 1230 printk(KERN_DEBUG "# cpu: cpu number\n");
1139 printk(KERN_DEBUG "Sender statistics:\n"); 1231 printk(KERN_DEBUG "Sender statistics:\n");
1140 printk(KERN_DEBUG 1232 for (i = 0; i < elements; i++)
1141 "sent: number of shootdown messages sent\n"); 1233 printk(KERN_DEBUG "%s\n", stat_description[i]);
1142 printk(KERN_DEBUG
1143 "stime: time spent sending messages\n");
1144 printk(KERN_DEBUG
1145 "numuvhubs: number of hubs targeted with shootdown\n");
1146 printk(KERN_DEBUG
1147 "numuvhubs16: number times 16 or more hubs targeted\n");
1148 printk(KERN_DEBUG
1149 "numuvhubs8: number times 8 or more hubs targeted\n");
1150 printk(KERN_DEBUG
1151 "numuvhubs4: number times 4 or more hubs targeted\n");
1152 printk(KERN_DEBUG
1153 "numuvhubs2: number times 2 or more hubs targeted\n");
1154 printk(KERN_DEBUG
1155 "numuvhubs1: number times 1 hub targeted\n");
1156 printk(KERN_DEBUG
1157 "numcpus: number of cpus targeted with shootdown\n");
1158 printk(KERN_DEBUG
1159 "dto: number of destination timeouts\n");
1160 printk(KERN_DEBUG
1161 "retries: destination timeout retries sent\n");
1162 printk(KERN_DEBUG
1163 "rok: : destination timeouts successfully retried\n");
1164 printk(KERN_DEBUG
1165 "resetp: ipi-style resource resets for plugs\n");
1166 printk(KERN_DEBUG
1167 "resett: ipi-style resource resets for timeouts\n");
1168 printk(KERN_DEBUG
1169 "giveup: fall-backs to ipi-style shootdowns\n");
1170 printk(KERN_DEBUG
1171 "sto: number of source timeouts\n");
1172 printk(KERN_DEBUG
1173 "bz: number of stay-busy's\n");
1174 printk(KERN_DEBUG
1175 "throt: number times spun in throttle\n");
1176 printk(KERN_DEBUG "Destination side statistics:\n");
1177 printk(KERN_DEBUG
1178 "sw_ack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE\n");
1179 printk(KERN_DEBUG
1180 "recv: shootdown messages received\n");
1181 printk(KERN_DEBUG
1182 "rtime: time spent processing messages\n");
1183 printk(KERN_DEBUG
1184 "all: shootdown all-tlb messages\n");
1185 printk(KERN_DEBUG
1186 "one: shootdown one-tlb messages\n");
1187 printk(KERN_DEBUG
1188 "mult: interrupts that found multiple messages\n");
1189 printk(KERN_DEBUG
1190 "none: interrupts that found no messages\n");
1191 printk(KERN_DEBUG
1192 "retry: number of retry messages processed\n");
1193 printk(KERN_DEBUG
1194 "canc: number messages canceled by retries\n");
1195 printk(KERN_DEBUG
1196 "nocan: number retries that found nothing to cancel\n");
1197 printk(KERN_DEBUG
1198 "reset: number of ipi-style reset requests processed\n");
1199 printk(KERN_DEBUG
1200 "rcan: number messages canceled by reset requests\n");
1201 printk(KERN_DEBUG
1202 "disable: number times use of the BAU was disabled\n");
1203 printk(KERN_DEBUG
1204 "enable: number times use of the BAU was re-enabled\n");
1205 } else if (input_arg == -1) { 1234 } else if (input_arg == -1) {
1206 for_each_present_cpu(cpu) { 1235 for_each_present_cpu(cpu) {
1207 stat = &per_cpu(ptcstats, cpu); 1236 stat = &per_cpu(ptcstats, cpu);
@@ -1228,27 +1257,18 @@ static int local_atoi(const char *name)
1228} 1257}
1229 1258
1230/* 1259/*
1231 * set the tunables 1260 * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
1232 * 0 values reset them to defaults 1261 * Zero values reset them to defaults.
1233 */ 1262 */
1234static ssize_t tunables_write(struct file *file, const char __user *user, 1263static int parse_tunables_write(struct bau_control *bcp, char *instr,
1235 size_t count, loff_t *data) 1264 int count)
1236{ 1265{
1237 int cpu;
1238 int cnt = 0;
1239 int val;
1240 char *p; 1266 char *p;
1241 char *q; 1267 char *q;
1242 char instr[64]; 1268 int cnt = 0;
1243 struct bau_control *bcp; 1269 int val;
1244 1270 int e = sizeof(tunables) / sizeof(*tunables);
1245 if (count == 0 || count > sizeof(instr)-1)
1246 return -EINVAL;
1247 if (copy_from_user(instr, user, count))
1248 return -EFAULT;
1249 1271
1250 instr[count] = '\0';
1251 /* count the fields */
1252 p = instr + strspn(instr, WHITESPACE); 1272 p = instr + strspn(instr, WHITESPACE);
1253 q = p; 1273 q = p;
1254 for (; *p; p = q + strspn(q, WHITESPACE)) { 1274 for (; *p; p = q + strspn(q, WHITESPACE)) {
@@ -1257,8 +1277,8 @@ static ssize_t tunables_write(struct file *file, const char __user *user,
1257 if (q == p) 1277 if (q == p)
1258 break; 1278 break;
1259 } 1279 }
1260 if (cnt != 9) { 1280 if (cnt != e) {
1261 printk(KERN_INFO "bau tunable error: should be 9 numbers\n"); 1281 printk(KERN_INFO "bau tunable error: should be %d values\n", e);
1262 return -EINVAL; 1282 return -EINVAL;
1263 } 1283 }
1264 1284
@@ -1270,97 +1290,80 @@ static ssize_t tunables_write(struct file *file, const char __user *user,
1270 switch (cnt) { 1290 switch (cnt) {
1271 case 0: 1291 case 0:
1272 if (val == 0) { 1292 if (val == 0) {
1273 max_bau_concurrent = MAX_BAU_CONCURRENT; 1293 max_concurr = MAX_BAU_CONCURRENT;
1274 max_bau_concurrent_constant = 1294 max_concurr_const = MAX_BAU_CONCURRENT;
1275 MAX_BAU_CONCURRENT;
1276 continue; 1295 continue;
1277 } 1296 }
1278 bcp = &per_cpu(bau_control, smp_processor_id());
1279 if (val < 1 || val > bcp->cpus_in_uvhub) { 1297 if (val < 1 || val > bcp->cpus_in_uvhub) {
1280 printk(KERN_DEBUG 1298 printk(KERN_DEBUG
1281 "Error: BAU max concurrent %d is invalid\n", 1299 "Error: BAU max concurrent %d is invalid\n",
1282 val); 1300 val);
1283 return -EINVAL; 1301 return -EINVAL;
1284 } 1302 }
1285 max_bau_concurrent = val; 1303 max_concurr = val;
1286 max_bau_concurrent_constant = val; 1304 max_concurr_const = val;
1287 continue;
1288 case 1:
1289 if (val == 0)
1290 plugged_delay = PLUGGED_DELAY;
1291 else
1292 plugged_delay = val;
1293 continue; 1305 continue;
1294 case 2: 1306 default:
1295 if (val == 0)
1296 plugsb4reset = PLUGSB4RESET;
1297 else
1298 plugsb4reset = val;
1299 continue;
1300 case 3:
1301 if (val == 0)
1302 timeoutsb4reset = TIMEOUTSB4RESET;
1303 else
1304 timeoutsb4reset = val;
1305 continue;
1306 case 4:
1307 if (val == 0)
1308 ipi_reset_limit = IPI_RESET_LIMIT;
1309 else
1310 ipi_reset_limit = val;
1311 continue;
1312 case 5:
1313 if (val == 0)
1314 complete_threshold = COMPLETE_THRESHOLD;
1315 else
1316 complete_threshold = val;
1317 continue;
1318 case 6:
1319 if (val == 0)
1320 congested_response_us = CONGESTED_RESPONSE_US;
1321 else
1322 congested_response_us = val;
1323 continue;
1324 case 7:
1325 if (val == 0)
1326 congested_reps = CONGESTED_REPS;
1327 else
1328 congested_reps = val;
1329 continue;
1330 case 8:
1331 if (val == 0) 1307 if (val == 0)
1332 congested_period = CONGESTED_PERIOD; 1308 *tunables[cnt].tunp = tunables[cnt].deflt;
1333 else 1309 else
1334 congested_period = val; 1310 *tunables[cnt].tunp = val;
1335 continue; 1311 continue;
1336 } 1312 }
1337 if (q == p) 1313 if (q == p)
1338 break; 1314 break;
1339 } 1315 }
1316 return 0;
1317}
1318
1319/*
1320 * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
1321 */
1322static ssize_t tunables_write(struct file *file, const char __user *user,
1323 size_t count, loff_t *data)
1324{
1325 int cpu;
1326 int ret;
1327 char instr[100];
1328 struct bau_control *bcp;
1329
1330 if (count == 0 || count > sizeof(instr)-1)
1331 return -EINVAL;
1332 if (copy_from_user(instr, user, count))
1333 return -EFAULT;
1334
1335 instr[count] = '\0';
1336
1337 bcp = &per_cpu(bau_control, smp_processor_id());
1338
1339 ret = parse_tunables_write(bcp, instr, count);
1340 if (ret)
1341 return ret;
1342
1340 for_each_present_cpu(cpu) { 1343 for_each_present_cpu(cpu) {
1341 bcp = &per_cpu(bau_control, cpu); 1344 bcp = &per_cpu(bau_control, cpu);
1342 bcp->max_bau_concurrent = max_bau_concurrent; 1345 bcp->max_concurr = max_concurr;
1343 bcp->max_bau_concurrent_constant = max_bau_concurrent; 1346 bcp->max_concurr_const = max_concurr;
1344 bcp->plugged_delay = plugged_delay; 1347 bcp->plugged_delay = plugged_delay;
1345 bcp->plugsb4reset = plugsb4reset; 1348 bcp->plugsb4reset = plugsb4reset;
1346 bcp->timeoutsb4reset = timeoutsb4reset; 1349 bcp->timeoutsb4reset = timeoutsb4reset;
1347 bcp->ipi_reset_limit = ipi_reset_limit; 1350 bcp->ipi_reset_limit = ipi_reset_limit;
1348 bcp->complete_threshold = complete_threshold; 1351 bcp->complete_threshold = complete_threshold;
1349 bcp->congested_response_us = congested_response_us; 1352 bcp->cong_response_us = congested_respns_us;
1350 bcp->congested_reps = congested_reps; 1353 bcp->cong_reps = congested_reps;
1351 bcp->congested_period = congested_period; 1354 bcp->cong_period = congested_period;
1352 } 1355 }
1353 return count; 1356 return count;
1354} 1357}
1355 1358
1356static const struct seq_operations uv_ptc_seq_ops = { 1359static const struct seq_operations uv_ptc_seq_ops = {
1357 .start = uv_ptc_seq_start, 1360 .start = ptc_seq_start,
1358 .next = uv_ptc_seq_next, 1361 .next = ptc_seq_next,
1359 .stop = uv_ptc_seq_stop, 1362 .stop = ptc_seq_stop,
1360 .show = uv_ptc_seq_show 1363 .show = ptc_seq_show
1361}; 1364};
1362 1365
1363static int uv_ptc_proc_open(struct inode *inode, struct file *file) 1366static int ptc_proc_open(struct inode *inode, struct file *file)
1364{ 1367{
1365 return seq_open(file, &uv_ptc_seq_ops); 1368 return seq_open(file, &uv_ptc_seq_ops);
1366} 1369}
@@ -1371,9 +1374,9 @@ static int tunables_open(struct inode *inode, struct file *file)
1371} 1374}
1372 1375
1373static const struct file_operations proc_uv_ptc_operations = { 1376static const struct file_operations proc_uv_ptc_operations = {
1374 .open = uv_ptc_proc_open, 1377 .open = ptc_proc_open,
1375 .read = seq_read, 1378 .read = seq_read,
1376 .write = uv_ptc_proc_write, 1379 .write = ptc_proc_write,
1377 .llseek = seq_lseek, 1380 .llseek = seq_lseek,
1378 .release = seq_release, 1381 .release = seq_release,
1379}; 1382};
@@ -1407,7 +1410,7 @@ static int __init uv_ptc_init(void)
1407 return -EINVAL; 1410 return -EINVAL;
1408 } 1411 }
1409 tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600, 1412 tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
1410 tunables_dir, NULL, &tunables_fops); 1413 tunables_dir, NULL, &tunables_fops);
1411 if (!tunables_file) { 1414 if (!tunables_file) {
1412 printk(KERN_ERR "unable to create debugfs file %s\n", 1415 printk(KERN_ERR "unable to create debugfs file %s\n",
1413 UV_BAU_TUNABLES_FILE); 1416 UV_BAU_TUNABLES_FILE);
@@ -1419,24 +1422,24 @@ static int __init uv_ptc_init(void)
1419/* 1422/*
1420 * Initialize the sending side's sending buffers. 1423 * Initialize the sending side's sending buffers.
1421 */ 1424 */
1422static void 1425static void activation_descriptor_init(int node, int pnode, int base_pnode)
1423uv_activation_descriptor_init(int node, int pnode, int base_pnode)
1424{ 1426{
1425 int i; 1427 int i;
1426 int cpu; 1428 int cpu;
1427 unsigned long pa; 1429 unsigned long pa;
1428 unsigned long m; 1430 unsigned long m;
1429 unsigned long n; 1431 unsigned long n;
1432 size_t dsize;
1430 struct bau_desc *bau_desc; 1433 struct bau_desc *bau_desc;
1431 struct bau_desc *bd2; 1434 struct bau_desc *bd2;
1432 struct bau_control *bcp; 1435 struct bau_control *bcp;
1433 1436
1434 /* 1437 /*
1435 * each bau_desc is 64 bytes; there are 8 (UV_ITEMS_PER_DESCRIPTOR) 1438 * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
1436 * per cpu; and one per cpu on the uvhub (UV_ADP_SIZE) 1439 * per cpu; and one per cpu on the uvhub (ADP_SZ)
1437 */ 1440 */
1438 bau_desc = kmalloc_node(sizeof(struct bau_desc) * UV_ADP_SIZE 1441 dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
1439 * UV_ITEMS_PER_DESCRIPTOR, GFP_KERNEL, node); 1442 bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
1440 BUG_ON(!bau_desc); 1443 BUG_ON(!bau_desc);
1441 1444
1442 pa = uv_gpa(bau_desc); /* need the real nasid*/ 1445 pa = uv_gpa(bau_desc); /* need the real nasid*/
@@ -1444,27 +1447,25 @@ uv_activation_descriptor_init(int node, int pnode, int base_pnode)
1444 m = pa & uv_mmask; 1447 m = pa & uv_mmask;
1445 1448
1446 /* the 14-bit pnode */ 1449 /* the 14-bit pnode */
1447 uv_write_global_mmr64(pnode, UVH_LB_BAU_SB_DESCRIPTOR_BASE, 1450 write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
1448 (n << UV_DESC_BASE_PNODE_SHIFT | m));
1449 /* 1451 /*
1450 * Initializing all 8 (UV_ITEMS_PER_DESCRIPTOR) descriptors for each 1452 * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
1451 * cpu even though we only use the first one; one descriptor can 1453 * cpu even though we only use the first one; one descriptor can
1452 * describe a broadcast to 256 uv hubs. 1454 * describe a broadcast to 256 uv hubs.
1453 */ 1455 */
1454 for (i = 0, bd2 = bau_desc; i < (UV_ADP_SIZE*UV_ITEMS_PER_DESCRIPTOR); 1456 for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
1455 i++, bd2++) {
1456 memset(bd2, 0, sizeof(struct bau_desc)); 1457 memset(bd2, 0, sizeof(struct bau_desc));
1457 bd2->header.sw_ack_flag = 1; 1458 bd2->header.swack_flag = 1;
1458 /* 1459 /*
1459 * The base_dest_nasid set in the message header is the nasid 1460 * The base_dest_nasid set in the message header is the nasid
1460 * of the first uvhub in the partition. The bit map will 1461 * of the first uvhub in the partition. The bit map will
1461 * indicate destination pnode numbers relative to that base. 1462 * indicate destination pnode numbers relative to that base.
1462 * They may not be consecutive if nasid striding is being used. 1463 * They may not be consecutive if nasid striding is being used.
1463 */ 1464 */
1464 bd2->header.base_dest_nasid = UV_PNODE_TO_NASID(base_pnode); 1465 bd2->header.base_dest_nasid = UV_PNODE_TO_NASID(base_pnode);
1465 bd2->header.dest_subnodeid = UV_LB_SUBNODEID; 1466 bd2->header.dest_subnodeid = UV_LB_SUBNODEID;
1466 bd2->header.command = UV_NET_ENDPOINT_INTD; 1467 bd2->header.command = UV_NET_ENDPOINT_INTD;
1467 bd2->header.int_both = 1; 1468 bd2->header.int_both = 1;
1468 /* 1469 /*
1469 * all others need to be set to zero: 1470 * all others need to be set to zero:
1470 * fairness chaining multilevel count replied_to 1471 * fairness chaining multilevel count replied_to
@@ -1484,57 +1485,55 @@ uv_activation_descriptor_init(int node, int pnode, int base_pnode)
1484 * - node is first node (kernel memory notion) on the uvhub 1485 * - node is first node (kernel memory notion) on the uvhub
1485 * - pnode is the uvhub's physical identifier 1486 * - pnode is the uvhub's physical identifier
1486 */ 1487 */
1487static void 1488static void pq_init(int node, int pnode)
1488uv_payload_queue_init(int node, int pnode)
1489{ 1489{
1490 int pn;
1491 int cpu; 1490 int cpu;
1491 size_t plsize;
1492 char *cp; 1492 char *cp;
1493 unsigned long pa; 1493 void *vp;
1494 struct bau_payload_queue_entry *pqp; 1494 unsigned long pn;
1495 struct bau_payload_queue_entry *pqp_malloc; 1495 unsigned long first;
1496 unsigned long pn_first;
1497 unsigned long last;
1498 struct bau_pq_entry *pqp;
1496 struct bau_control *bcp; 1499 struct bau_control *bcp;
1497 1500
1498 pqp = kmalloc_node((DEST_Q_SIZE + 1) 1501 plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
1499 * sizeof(struct bau_payload_queue_entry), 1502 vp = kmalloc_node(plsize, GFP_KERNEL, node);
1500 GFP_KERNEL, node); 1503 pqp = (struct bau_pq_entry *)vp;
1501 BUG_ON(!pqp); 1504 BUG_ON(!pqp);
1502 pqp_malloc = pqp;
1503 1505
1504 cp = (char *)pqp + 31; 1506 cp = (char *)pqp + 31;
1505 pqp = (struct bau_payload_queue_entry *)(((unsigned long)cp >> 5) << 5); 1507 pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
1506 1508
1507 for_each_present_cpu(cpu) { 1509 for_each_present_cpu(cpu) {
1508 if (pnode != uv_cpu_to_pnode(cpu)) 1510 if (pnode != uv_cpu_to_pnode(cpu))
1509 continue; 1511 continue;
1510 /* for every cpu on this pnode: */ 1512 /* for every cpu on this pnode: */
1511 bcp = &per_cpu(bau_control, cpu); 1513 bcp = &per_cpu(bau_control, cpu);
1512 bcp->va_queue_first = pqp; 1514 bcp->queue_first = pqp;
1513 bcp->bau_msg_head = pqp; 1515 bcp->bau_msg_head = pqp;
1514 bcp->va_queue_last = pqp + (DEST_Q_SIZE - 1); 1516 bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
1515 } 1517 }
1516 /* 1518 /*
1517 * need the pnode of where the memory was really allocated 1519 * need the pnode of where the memory was really allocated
1518 */ 1520 */
1519 pa = uv_gpa(pqp); 1521 pn = uv_gpa(pqp) >> uv_nshift;
1520 pn = pa >> uv_nshift; 1522 first = uv_physnodeaddr(pqp);
1521 uv_write_global_mmr64(pnode, 1523 pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
1522 UVH_LB_BAU_INTD_PAYLOAD_QUEUE_FIRST, 1524 last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
1523 ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | 1525 write_mmr_payload_first(pnode, pn_first);
1524 uv_physnodeaddr(pqp)); 1526 write_mmr_payload_tail(pnode, first);
1525 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_TAIL, 1527 write_mmr_payload_last(pnode, last);
1526 uv_physnodeaddr(pqp)); 1528
1527 uv_write_global_mmr64(pnode, UVH_LB_BAU_INTD_PAYLOAD_QUEUE_LAST,
1528 (unsigned long)
1529 uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1)));
1530 /* in effect, all msg_type's are set to MSG_NOOP */ 1529 /* in effect, all msg_type's are set to MSG_NOOP */
1531 memset(pqp, 0, sizeof(struct bau_payload_queue_entry) * DEST_Q_SIZE); 1530 memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
1532} 1531}
1533 1532
1534/* 1533/*
1535 * Initialization of each UV hub's structures 1534 * Initialization of each UV hub's structures
1536 */ 1535 */
1537static void __init uv_init_uvhub(int uvhub, int vector, int base_pnode) 1536static void __init init_uvhub(int uvhub, int vector, int base_pnode)
1538{ 1537{
1539 int node; 1538 int node;
1540 int pnode; 1539 int pnode;
@@ -1542,24 +1541,24 @@ static void __init uv_init_uvhub(int uvhub, int vector, int base_pnode)
1542 1541
1543 node = uvhub_to_first_node(uvhub); 1542 node = uvhub_to_first_node(uvhub);
1544 pnode = uv_blade_to_pnode(uvhub); 1543 pnode = uv_blade_to_pnode(uvhub);
1545 uv_activation_descriptor_init(node, pnode, base_pnode); 1544
1546 uv_payload_queue_init(node, pnode); 1545 activation_descriptor_init(node, pnode, base_pnode);
1546
1547 pq_init(node, pnode);
1547 /* 1548 /*
1548 * The below initialization can't be in firmware because the 1549 * The below initialization can't be in firmware because the
1549 * messaging IRQ will be determined by the OS. 1550 * messaging IRQ will be determined by the OS.
1550 */ 1551 */
1551 apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits; 1552 apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
1552 uv_write_global_mmr64(pnode, UVH_BAU_DATA_CONFIG, 1553 write_mmr_data_config(pnode, ((apicid << 32) | vector));
1553 ((apicid << 32) | vector));
1554} 1554}
1555 1555
1556/* 1556/*
1557 * We will set BAU_MISC_CONTROL with a timeout period. 1557 * We will set BAU_MISC_CONTROL with a timeout period.
1558 * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT. 1558 * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
1559 * So the destination timeout period has be be calculated from them. 1559 * So the destination timeout period has to be calculated from them.
1560 */ 1560 */
1561static int 1561static int calculate_destination_timeout(void)
1562calculate_destination_timeout(void)
1563{ 1562{
1564 unsigned long mmr_image; 1563 unsigned long mmr_image;
1565 int mult1; 1564 int mult1;
@@ -1570,8 +1569,7 @@ calculate_destination_timeout(void)
1570 unsigned long ts_ns; 1569 unsigned long ts_ns;
1571 1570
1572 if (is_uv1_hub()) { 1571 if (is_uv1_hub()) {
1573 mult1 = UV1_INTD_SOFT_ACK_TIMEOUT_PERIOD & 1572 mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
1574 BAU_MISC_CONTROL_MULT_MASK;
1575 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL); 1573 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1576 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK; 1574 index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
1577 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT); 1575 mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
@@ -1583,7 +1581,7 @@ calculate_destination_timeout(void)
1583 /* 4 bits 0/1 for 10/80us, 3 bits of multiplier */ 1581 /* 4 bits 0/1 for 10/80us, 3 bits of multiplier */
1584 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL); 1582 mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
1585 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT; 1583 mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
1586 if (mmr_image & ((unsigned long)1 << UV2_ACK_UNITS_SHFT)) 1584 if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
1587 mult1 = 80; 1585 mult1 = 80;
1588 else 1586 else
1589 mult1 = 10; 1587 mult1 = 10;
@@ -1593,62 +1591,69 @@ calculate_destination_timeout(void)
1593 return ret; 1591 return ret;
1594} 1592}
1595 1593
1594static void __init init_per_cpu_tunables(void)
1595{
1596 int cpu;
1597 struct bau_control *bcp;
1598
1599 for_each_present_cpu(cpu) {
1600 bcp = &per_cpu(bau_control, cpu);
1601 bcp->baudisabled = 0;
1602 bcp->statp = &per_cpu(ptcstats, cpu);
1603 /* time interval to catch a hardware stay-busy bug */
1604 bcp->timeout_interval = usec_2_cycles(2*timeout_us);
1605 bcp->max_concurr = max_concurr;
1606 bcp->max_concurr_const = max_concurr;
1607 bcp->plugged_delay = plugged_delay;
1608 bcp->plugsb4reset = plugsb4reset;
1609 bcp->timeoutsb4reset = timeoutsb4reset;
1610 bcp->ipi_reset_limit = ipi_reset_limit;
1611 bcp->complete_threshold = complete_threshold;
1612 bcp->cong_response_us = congested_respns_us;
1613 bcp->cong_reps = congested_reps;
1614 bcp->cong_period = congested_period;
1615 }
1616}
1617
1596/* 1618/*
1597 * initialize the bau_control structure for each cpu 1619 * Scan all cpus to collect blade and socket summaries.
1598 */ 1620 */
1599static int __init uv_init_per_cpu(int nuvhubs, int base_part_pnode) 1621static int __init get_cpu_topology(int base_pnode,
1622 struct uvhub_desc *uvhub_descs,
1623 unsigned char *uvhub_mask)
1600{ 1624{
1601 int i;
1602 int cpu; 1625 int cpu;
1603 int tcpu;
1604 int pnode; 1626 int pnode;
1605 int uvhub; 1627 int uvhub;
1606 int have_hmaster; 1628 int socket;
1607 short socket = 0;
1608 unsigned short socket_mask;
1609 unsigned char *uvhub_mask;
1610 struct bau_control *bcp; 1629 struct bau_control *bcp;
1611 struct uvhub_desc *bdp; 1630 struct uvhub_desc *bdp;
1612 struct socket_desc *sdp; 1631 struct socket_desc *sdp;
1613 struct bau_control *hmaster = NULL;
1614 struct bau_control *smaster = NULL;
1615 struct socket_desc {
1616 short num_cpus;
1617 short cpu_number[MAX_CPUS_PER_SOCKET];
1618 };
1619 struct uvhub_desc {
1620 unsigned short socket_mask;
1621 short num_cpus;
1622 short uvhub;
1623 short pnode;
1624 struct socket_desc socket[2];
1625 };
1626 struct uvhub_desc *uvhub_descs;
1627 1632
1628 timeout_us = calculate_destination_timeout();
1629
1630 uvhub_descs = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1631 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1632 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
1633 for_each_present_cpu(cpu) { 1633 for_each_present_cpu(cpu) {
1634 bcp = &per_cpu(bau_control, cpu); 1634 bcp = &per_cpu(bau_control, cpu);
1635
1635 memset(bcp, 0, sizeof(struct bau_control)); 1636 memset(bcp, 0, sizeof(struct bau_control));
1637
1636 pnode = uv_cpu_hub_info(cpu)->pnode; 1638 pnode = uv_cpu_hub_info(cpu)->pnode;
1637 if ((pnode - base_part_pnode) >= UV_DISTRIBUTION_SIZE) { 1639 if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
1638 printk(KERN_EMERG 1640 printk(KERN_EMERG
1639 "cpu %d pnode %d-%d beyond %d; BAU disabled\n", 1641 "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
1640 cpu, pnode, base_part_pnode, 1642 cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
1641 UV_DISTRIBUTION_SIZE);
1642 return 1; 1643 return 1;
1643 } 1644 }
1645
1644 bcp->osnode = cpu_to_node(cpu); 1646 bcp->osnode = cpu_to_node(cpu);
1645 bcp->partition_base_pnode = uv_partition_base_pnode; 1647 bcp->partition_base_pnode = base_pnode;
1648
1646 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id; 1649 uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1647 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8)); 1650 *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
1648 bdp = &uvhub_descs[uvhub]; 1651 bdp = &uvhub_descs[uvhub];
1652
1649 bdp->num_cpus++; 1653 bdp->num_cpus++;
1650 bdp->uvhub = uvhub; 1654 bdp->uvhub = uvhub;
1651 bdp->pnode = pnode; 1655 bdp->pnode = pnode;
1656
1652 /* kludge: 'assuming' one node per socket, and assuming that 1657 /* kludge: 'assuming' one node per socket, and assuming that
1653 disabling a socket just leaves a gap in node numbers */ 1658 disabling a socket just leaves a gap in node numbers */
1654 socket = bcp->osnode & 1; 1659 socket = bcp->osnode & 1;
@@ -1657,84 +1662,129 @@ static int __init uv_init_per_cpu(int nuvhubs, int base_part_pnode)
1657 sdp->cpu_number[sdp->num_cpus] = cpu; 1662 sdp->cpu_number[sdp->num_cpus] = cpu;
1658 sdp->num_cpus++; 1663 sdp->num_cpus++;
1659 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) { 1664 if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
1660 printk(KERN_EMERG "%d cpus per socket invalid\n", sdp->num_cpus); 1665 printk(KERN_EMERG "%d cpus per socket invalid\n",
1666 sdp->num_cpus);
1661 return 1; 1667 return 1;
1662 } 1668 }
1663 } 1669 }
1670 return 0;
1671}
1672
1673/*
1674 * Each socket is to get a local array of pnodes/hubs.
1675 */
1676static void make_per_cpu_thp(struct bau_control *smaster)
1677{
1678 int cpu;
1679 size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
1680
1681 smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
1682 memset(smaster->thp, 0, hpsz);
1683 for_each_present_cpu(cpu) {
1684 smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
1685 smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
1686 }
1687}
1688
1689/*
1690 * Initialize all the per_cpu information for the cpu's on a given socket,
1691 * given what has been gathered into the socket_desc struct.
1692 * And reports the chosen hub and socket masters back to the caller.
1693 */
1694static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
1695 struct bau_control **smasterp,
1696 struct bau_control **hmasterp)
1697{
1698 int i;
1699 int cpu;
1700 struct bau_control *bcp;
1701
1702 for (i = 0; i < sdp->num_cpus; i++) {
1703 cpu = sdp->cpu_number[i];
1704 bcp = &per_cpu(bau_control, cpu);
1705 bcp->cpu = cpu;
1706 if (i == 0) {
1707 *smasterp = bcp;
1708 if (!(*hmasterp))
1709 *hmasterp = bcp;
1710 }
1711 bcp->cpus_in_uvhub = bdp->num_cpus;
1712 bcp->cpus_in_socket = sdp->num_cpus;
1713 bcp->socket_master = *smasterp;
1714 bcp->uvhub = bdp->uvhub;
1715 bcp->uvhub_master = *hmasterp;
1716 bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->blade_processor_id;
1717 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
1718 printk(KERN_EMERG "%d cpus per uvhub invalid\n",
1719 bcp->uvhub_cpu);
1720 return 1;
1721 }
1722 }
1723 return 0;
1724}
1725
1726/*
1727 * Summarize the blade and socket topology into the per_cpu structures.
1728 */
1729static int __init summarize_uvhub_sockets(int nuvhubs,
1730 struct uvhub_desc *uvhub_descs,
1731 unsigned char *uvhub_mask)
1732{
1733 int socket;
1734 int uvhub;
1735 unsigned short socket_mask;
1736
1664 for (uvhub = 0; uvhub < nuvhubs; uvhub++) { 1737 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1738 struct uvhub_desc *bdp;
1739 struct bau_control *smaster = NULL;
1740 struct bau_control *hmaster = NULL;
1741
1665 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8)))) 1742 if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
1666 continue; 1743 continue;
1667 have_hmaster = 0; 1744
1668 bdp = &uvhub_descs[uvhub]; 1745 bdp = &uvhub_descs[uvhub];
1669 socket_mask = bdp->socket_mask; 1746 socket_mask = bdp->socket_mask;
1670 socket = 0; 1747 socket = 0;
1671 while (socket_mask) { 1748 while (socket_mask) {
1672 if (!(socket_mask & 1)) 1749 struct socket_desc *sdp;
1673 goto nextsocket; 1750 if ((socket_mask & 1)) {
1674 sdp = &bdp->socket[socket]; 1751 sdp = &bdp->socket[socket];
1675 for (i = 0; i < sdp->num_cpus; i++) { 1752 if (scan_sock(sdp, bdp, &smaster, &hmaster))
1676 cpu = sdp->cpu_number[i];
1677 bcp = &per_cpu(bau_control, cpu);
1678 bcp->cpu = cpu;
1679 if (i == 0) {
1680 smaster = bcp;
1681 if (!have_hmaster) {
1682 have_hmaster++;
1683 hmaster = bcp;
1684 }
1685 }
1686 bcp->cpus_in_uvhub = bdp->num_cpus;
1687 bcp->cpus_in_socket = sdp->num_cpus;
1688 bcp->socket_master = smaster;
1689 bcp->uvhub = bdp->uvhub;
1690 bcp->uvhub_master = hmaster;
1691 bcp->uvhub_cpu = uv_cpu_hub_info(cpu)->
1692 blade_processor_id;
1693 if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
1694 printk(KERN_EMERG
1695 "%d cpus per uvhub invalid\n",
1696 bcp->uvhub_cpu);
1697 return 1; 1753 return 1;
1698 }
1699 } 1754 }
1700nextsocket:
1701 socket++; 1755 socket++;
1702 socket_mask = (socket_mask >> 1); 1756 socket_mask = (socket_mask >> 1);
1703 /* each socket gets a local array of pnodes/hubs */ 1757 make_per_cpu_thp(smaster);
1704 bcp = smaster;
1705 bcp->target_hub_and_pnode = kmalloc_node(
1706 sizeof(struct hub_and_pnode) *
1707 num_possible_cpus(), GFP_KERNEL, bcp->osnode);
1708 memset(bcp->target_hub_and_pnode, 0,
1709 sizeof(struct hub_and_pnode) *
1710 num_possible_cpus());
1711 for_each_present_cpu(tcpu) {
1712 bcp->target_hub_and_pnode[tcpu].pnode =
1713 uv_cpu_hub_info(tcpu)->pnode;
1714 bcp->target_hub_and_pnode[tcpu].uvhub =
1715 uv_cpu_hub_info(tcpu)->numa_blade_id;
1716 }
1717 } 1758 }
1718 } 1759 }
1760 return 0;
1761}
1762
1763/*
1764 * initialize the bau_control structure for each cpu
1765 */
1766static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
1767{
1768 unsigned char *uvhub_mask;
1769 void *vp;
1770 struct uvhub_desc *uvhub_descs;
1771
1772 timeout_us = calculate_destination_timeout();
1773
1774 vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
1775 uvhub_descs = (struct uvhub_desc *)vp;
1776 memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
1777 uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
1778
1779 if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
1780 return 1;
1781
1782 if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
1783 return 1;
1784
1719 kfree(uvhub_descs); 1785 kfree(uvhub_descs);
1720 kfree(uvhub_mask); 1786 kfree(uvhub_mask);
1721 for_each_present_cpu(cpu) { 1787 init_per_cpu_tunables();
1722 bcp = &per_cpu(bau_control, cpu);
1723 bcp->baudisabled = 0;
1724 bcp->statp = &per_cpu(ptcstats, cpu);
1725 /* time interval to catch a hardware stay-busy bug */
1726 bcp->timeout_interval = microsec_2_cycles(2*timeout_us);
1727 bcp->max_bau_concurrent = max_bau_concurrent;
1728 bcp->max_bau_concurrent_constant = max_bau_concurrent;
1729 bcp->plugged_delay = plugged_delay;
1730 bcp->plugsb4reset = plugsb4reset;
1731 bcp->timeoutsb4reset = timeoutsb4reset;
1732 bcp->ipi_reset_limit = ipi_reset_limit;
1733 bcp->complete_threshold = complete_threshold;
1734 bcp->congested_response_us = congested_response_us;
1735 bcp->congested_reps = congested_reps;
1736 bcp->congested_period = congested_period;
1737 }
1738 return 0; 1788 return 0;
1739} 1789}
1740 1790
@@ -1747,8 +1797,9 @@ static int __init uv_bau_init(void)
1747 int pnode; 1797 int pnode;
1748 int nuvhubs; 1798 int nuvhubs;
1749 int cur_cpu; 1799 int cur_cpu;
1800 int cpus;
1750 int vector; 1801 int vector;
1751 unsigned long mmr; 1802 cpumask_var_t *mask;
1752 1803
1753 if (!is_uv_system()) 1804 if (!is_uv_system())
1754 return 0; 1805 return 0;
@@ -1756,24 +1807,25 @@ static int __init uv_bau_init(void)
1756 if (nobau) 1807 if (nobau)
1757 return 0; 1808 return 0;
1758 1809
1759 for_each_possible_cpu(cur_cpu) 1810 for_each_possible_cpu(cur_cpu) {
1760 zalloc_cpumask_var_node(&per_cpu(uv_flush_tlb_mask, cur_cpu), 1811 mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
1761 GFP_KERNEL, cpu_to_node(cur_cpu)); 1812 zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
1813 }
1762 1814
1763 uv_nshift = uv_hub_info->m_val; 1815 uv_nshift = uv_hub_info->m_val;
1764 uv_mmask = (1UL << uv_hub_info->m_val) - 1; 1816 uv_mmask = (1UL << uv_hub_info->m_val) - 1;
1765 nuvhubs = uv_num_possible_blades(); 1817 nuvhubs = uv_num_possible_blades();
1766 spin_lock_init(&disable_lock); 1818 spin_lock_init(&disable_lock);
1767 congested_cycles = microsec_2_cycles(congested_response_us); 1819 congested_cycles = usec_2_cycles(congested_respns_us);
1768 1820
1769 uv_partition_base_pnode = 0x7fffffff; 1821 uv_base_pnode = 0x7fffffff;
1770 for (uvhub = 0; uvhub < nuvhubs; uvhub++) { 1822 for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
1771 if (uv_blade_nr_possible_cpus(uvhub) && 1823 cpus = uv_blade_nr_possible_cpus(uvhub);
1772 (uv_blade_to_pnode(uvhub) < uv_partition_base_pnode)) 1824 if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
1773 uv_partition_base_pnode = uv_blade_to_pnode(uvhub); 1825 uv_base_pnode = uv_blade_to_pnode(uvhub);
1774 } 1826 }
1775 1827
1776 if (uv_init_per_cpu(nuvhubs, uv_partition_base_pnode)) { 1828 if (init_per_cpu(nuvhubs, uv_base_pnode)) {
1777 nobau = 1; 1829 nobau = 1;
1778 return 0; 1830 return 0;
1779 } 1831 }
@@ -1781,21 +1833,21 @@ static int __init uv_bau_init(void)
1781 vector = UV_BAU_MESSAGE; 1833 vector = UV_BAU_MESSAGE;
1782 for_each_possible_blade(uvhub) 1834 for_each_possible_blade(uvhub)
1783 if (uv_blade_nr_possible_cpus(uvhub)) 1835 if (uv_blade_nr_possible_cpus(uvhub))
1784 uv_init_uvhub(uvhub, vector, uv_partition_base_pnode); 1836 init_uvhub(uvhub, vector, uv_base_pnode);
1785 1837
1786 uv_enable_timeouts(); 1838 enable_timeouts();
1787 alloc_intr_gate(vector, uv_bau_message_intr1); 1839 alloc_intr_gate(vector, uv_bau_message_intr1);
1788 1840
1789 for_each_possible_blade(uvhub) { 1841 for_each_possible_blade(uvhub) {
1790 if (uv_blade_nr_possible_cpus(uvhub)) { 1842 if (uv_blade_nr_possible_cpus(uvhub)) {
1843 unsigned long val;
1844 unsigned long mmr;
1791 pnode = uv_blade_to_pnode(uvhub); 1845 pnode = uv_blade_to_pnode(uvhub);
1792 /* INIT the bau */ 1846 /* INIT the bau */
1793 uv_write_global_mmr64(pnode, 1847 val = 1L << 63;
1794 UVH_LB_BAU_SB_ACTIVATION_CONTROL, 1848 write_gmmr_activation(pnode, val);
1795 ((unsigned long)1 << 63));
1796 mmr = 1; /* should be 1 to broadcast to both sockets */ 1849 mmr = 1; /* should be 1 to broadcast to both sockets */
1797 uv_write_global_mmr64(pnode, UVH_BAU_DATA_BROADCAST, 1850 write_mmr_data_broadcast(pnode, mmr);
1798 mmr);
1799 } 1851 }
1800 } 1852 }
1801 1853
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-15 08:33:48 -0500