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authorChander Kashyap <chander.kashyap@linaro.org>2013-06-18 11:29:34 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-06-18 15:08:57 -0400
commite6c21cbab5d6ac410676b9db36b9f1915a15a8d9 (patch)
tree99b41982a44127f2e66ae50631c5e2209b3d61a1
parent79d743c177f99d6854e152d9e7fac5bbbeb7c25e (diff)
ARM: dts: fork out common EXYNOS5 nodes
In preparation of adding support for EXYNOS5420, which has many peripherals similar to EXYNOS5250, a new common EXYNOS5 device tree source file is created out of the exising EXYNOS5250 device tree source file. Only the common nodes required for basic boot up on EXYNOS5420 based boards are moved into this new file and the rest of the common nodes would be moved subsequently. EXYNOS5440 SoC is quite different from EXYNOS5250 and EXYNOS5420. Hence it is not possible to reuse "exynos5.dtsi" for EXYNOS5440. Signed-off-by: Chander Kashyap <chander.kashyap@linaro.org> Reviewed-by: Tomasz Figa <t.figa@samsung.com> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
-rw-r--r--arch/arm/boot/dts/exynos5.dtsi111
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi66
2 files changed, 112 insertions, 65 deletions
diff --git a/arch/arm/boot/dts/exynos5.dtsi b/arch/arm/boot/dts/exynos5.dtsi
new file mode 100644
index 000000000000..f65e124c04a6
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5.dtsi
@@ -0,0 +1,111 @@
1/*
2 * Samsung's Exynos5 SoC series common device tree source
3 *
4 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
5 * http://www.samsung.com
6 *
7 * Samsung's Exynos5 SoC series device nodes are listed in this file. Particular
8 * SoCs from Exynos5 series can include this file and provide values for SoCs
9 * specfic bindings.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License version 2 as
13 * published by the Free Software Foundation.
14 */
15
16#include "skeleton.dtsi"
17
18/ {
19 interrupt-parent = <&gic>;
20
21 chipid@10000000 {
22 compatible = "samsung,exynos4210-chipid";
23 reg = <0x10000000 0x100>;
24 };
25
26 combiner:interrupt-controller@10440000 {
27 compatible = "samsung,exynos4210-combiner";
28 #interrupt-cells = <2>;
29 interrupt-controller;
30 samsung,combiner-nr = <32>;
31 reg = <0x10440000 0x1000>;
32 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
33 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
34 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
35 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
36 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
37 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
38 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
39 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
40 };
41
42 gic:interrupt-controller@10481000 {
43 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
44 #interrupt-cells = <3>;
45 interrupt-controller;
46 reg = <0x10481000 0x1000>,
47 <0x10482000 0x1000>,
48 <0x10484000 0x2000>,
49 <0x10486000 0x2000>;
50 interrupts = <1 9 0xf04>;
51 };
52
53 dwmmc_0: dwmmc0@12200000 {
54 compatible = "samsung,exynos5250-dw-mshc";
55 interrupts = <0 75 0>;
56 #address-cells = <1>;
57 #size-cells = <0>;
58 };
59
60 dwmmc_1: dwmmc1@12210000 {
61 compatible = "samsung,exynos5250-dw-mshc";
62 interrupts = <0 76 0>;
63 #address-cells = <1>;
64 #size-cells = <0>;
65 };
66
67 dwmmc_2: dwmmc2@12220000 {
68 compatible = "samsung,exynos5250-dw-mshc";
69 interrupts = <0 77 0>;
70 #address-cells = <1>;
71 #size-cells = <0>;
72 };
73
74 serial@12C00000 {
75 compatible = "samsung,exynos4210-uart";
76 reg = <0x12C00000 0x100>;
77 interrupts = <0 51 0>;
78 };
79
80 serial@12C10000 {
81 compatible = "samsung,exynos4210-uart";
82 reg = <0x12C10000 0x100>;
83 interrupts = <0 52 0>;
84 };
85
86 serial@12C20000 {
87 compatible = "samsung,exynos4210-uart";
88 reg = <0x12C20000 0x100>;
89 interrupts = <0 53 0>;
90 };
91
92 serial@12C30000 {
93 compatible = "samsung,exynos4210-uart";
94 reg = <0x12C30000 0x100>;
95 interrupts = <0 54 0>;
96 };
97
98 rtc {
99 compatible = "samsung,s3c6410-rtc";
100 reg = <0x101E0000 0x100>;
101 interrupts = <0 43 0>, <0 44 0>;
102 status = "disabled";
103 };
104
105 watchdog {
106 compatible = "samsung,s3c2410-wdt";
107 reg = <0x101D0000 0x100>;
108 interrupts = <0 42 0>;
109 status = "disabled";
110 };
111};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 0aa9091ed7c5..1e215fed037b 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -17,14 +17,13 @@
17 * published by the Free Software Foundation. 17 * published by the Free Software Foundation.
18*/ 18*/
19 19
20#include "skeleton.dtsi" 20#include "exynos5.dtsi"
21#include "exynos5250-pinctrl.dtsi" 21#include "exynos5250-pinctrl.dtsi"
22 22
23#include <dt-bindings/clk/exynos-audss-clk.h> 23#include <dt-bindings/clk/exynos-audss-clk.h>
24 24
25/ { 25/ {
26 compatible = "samsung,exynos5250"; 26 compatible = "samsung,exynos5250";
27 interrupt-parent = <&gic>;
28 27
29 aliases { 28 aliases {
30 spi0 = &spi_0; 29 spi0 = &spi_0;
@@ -53,11 +52,6 @@
53 pinctrl3 = &pinctrl_3; 52 pinctrl3 = &pinctrl_3;
54 }; 53 };
55 54
56 chipid@10000000 {
57 compatible = "samsung,exynos4210-chipid";
58 reg = <0x10000000 0x100>;
59 };
60
61 pd_gsc: gsc-power-domain@0x10044000 { 55 pd_gsc: gsc-power-domain@0x10044000 {
62 compatible = "samsung,exynos4210-pd"; 56 compatible = "samsung,exynos4210-pd";
63 reg = <0x10044000 0x20>; 57 reg = <0x10044000 0x20>;
@@ -80,17 +74,6 @@
80 #clock-cells = <1>; 74 #clock-cells = <1>;
81 }; 75 };
82 76
83 gic:interrupt-controller@10481000 {
84 compatible = "arm,cortex-a15-gic", "arm,cortex-a9-gic";
85 #interrupt-cells = <3>;
86 interrupt-controller;
87 reg = <0x10481000 0x1000>,
88 <0x10482000 0x1000>,
89 <0x10484000 0x2000>,
90 <0x10486000 0x2000>;
91 interrupts = <1 9 0xf04>;
92 };
93
94 timer { 77 timer {
95 compatible = "arm,armv7-timer"; 78 compatible = "arm,armv7-timer";
96 interrupts = <1 13 0xf08>, 79 interrupts = <1 13 0xf08>,
@@ -99,22 +82,6 @@
99 <1 10 0xf08>; 82 <1 10 0xf08>;
100 }; 83 };
101 84
102 combiner:interrupt-controller@10440000 {
103 compatible = "samsung,exynos4210-combiner";
104 #interrupt-cells = <2>;
105 interrupt-controller;
106 samsung,combiner-nr = <32>;
107 reg = <0x10440000 0x1000>;
108 interrupts = <0 0 0>, <0 1 0>, <0 2 0>, <0 3 0>,
109 <0 4 0>, <0 5 0>, <0 6 0>, <0 7 0>,
110 <0 8 0>, <0 9 0>, <0 10 0>, <0 11 0>,
111 <0 12 0>, <0 13 0>, <0 14 0>, <0 15 0>,
112 <0 16 0>, <0 17 0>, <0 18 0>, <0 19 0>,
113 <0 20 0>, <0 21 0>, <0 22 0>, <0 23 0>,
114 <0 24 0>, <0 25 0>, <0 26 0>, <0 27 0>,
115 <0 28 0>, <0 29 0>, <0 30 0>, <0 31 0>;
116 };
117
118 mct@101C0000 { 85 mct@101C0000 {
119 compatible = "samsung,exynos4210-mct"; 86 compatible = "samsung,exynos4210-mct";
120 reg = <0x101C0000 0x800>; 87 reg = <0x101C0000 0x800>;
@@ -176,9 +143,6 @@
176 }; 143 };
177 144
178 watchdog { 145 watchdog {
179 compatible = "samsung,s3c2410-wdt";
180 reg = <0x101D0000 0x100>;
181 interrupts = <0 42 0>;
182 clocks = <&clock 336>; 146 clocks = <&clock 336>;
183 clock-names = "watchdog"; 147 clock-names = "watchdog";
184 }; 148 };
@@ -191,12 +155,8 @@
191 }; 155 };
192 156
193 rtc { 157 rtc {
194 compatible = "samsung,s3c6410-rtc";
195 reg = <0x101E0000 0x100>;
196 interrupts = <0 43 0>, <0 44 0>;
197 clocks = <&clock 337>; 158 clocks = <&clock 337>;
198 clock-names = "rtc"; 159 clock-names = "rtc";
199 status = "disabled";
200 }; 160 };
201 161
202 tmu@10060000 { 162 tmu@10060000 {
@@ -208,33 +168,21 @@
208 }; 168 };
209 169
210 serial@12C00000 { 170 serial@12C00000 {
211 compatible = "samsung,exynos4210-uart";
212 reg = <0x12C00000 0x100>;
213 interrupts = <0 51 0>;
214 clocks = <&clock 289>, <&clock 146>; 171 clocks = <&clock 289>, <&clock 146>;
215 clock-names = "uart", "clk_uart_baud0"; 172 clock-names = "uart", "clk_uart_baud0";
216 }; 173 };
217 174
218 serial@12C10000 { 175 serial@12C10000 {
219 compatible = "samsung,exynos4210-uart";
220 reg = <0x12C10000 0x100>;
221 interrupts = <0 52 0>;
222 clocks = <&clock 290>, <&clock 147>; 176 clocks = <&clock 290>, <&clock 147>;
223 clock-names = "uart", "clk_uart_baud0"; 177 clock-names = "uart", "clk_uart_baud0";
224 }; 178 };
225 179
226 serial@12C20000 { 180 serial@12C20000 {
227 compatible = "samsung,exynos4210-uart";
228 reg = <0x12C20000 0x100>;
229 interrupts = <0 53 0>;
230 clocks = <&clock 291>, <&clock 148>; 181 clocks = <&clock 291>, <&clock 148>;
231 clock-names = "uart", "clk_uart_baud0"; 182 clock-names = "uart", "clk_uart_baud0";
232 }; 183 };
233 184
234 serial@12C30000 { 185 serial@12C30000 {
235 compatible = "samsung,exynos4210-uart";
236 reg = <0x12C30000 0x100>;
237 interrupts = <0 54 0>;
238 clocks = <&clock 292>, <&clock 149>; 186 clocks = <&clock 292>, <&clock 149>;
239 clock-names = "uart", "clk_uart_baud0"; 187 clock-names = "uart", "clk_uart_baud0";
240 }; 188 };
@@ -413,31 +361,19 @@
413 }; 361 };
414 362
415 dwmmc_0: dwmmc0@12200000 { 363 dwmmc_0: dwmmc0@12200000 {
416 compatible = "samsung,exynos5250-dw-mshc";
417 reg = <0x12200000 0x1000>; 364 reg = <0x12200000 0x1000>;
418 interrupts = <0 75 0>;
419 #address-cells = <1>;
420 #size-cells = <0>;
421 clocks = <&clock 280>, <&clock 139>; 365 clocks = <&clock 280>, <&clock 139>;
422 clock-names = "biu", "ciu"; 366 clock-names = "biu", "ciu";
423 }; 367 };
424 368
425 dwmmc_1: dwmmc1@12210000 { 369 dwmmc_1: dwmmc1@12210000 {
426 compatible = "samsung,exynos5250-dw-mshc";
427 reg = <0x12210000 0x1000>; 370 reg = <0x12210000 0x1000>;
428 interrupts = <0 76 0>;
429 #address-cells = <1>;
430 #size-cells = <0>;
431 clocks = <&clock 281>, <&clock 140>; 371 clocks = <&clock 281>, <&clock 140>;
432 clock-names = "biu", "ciu"; 372 clock-names = "biu", "ciu";
433 }; 373 };
434 374
435 dwmmc_2: dwmmc2@12220000 { 375 dwmmc_2: dwmmc2@12220000 {
436 compatible = "samsung,exynos5250-dw-mshc";
437 reg = <0x12220000 0x1000>; 376 reg = <0x12220000 0x1000>;
438 interrupts = <0 77 0>;
439 #address-cells = <1>;
440 #size-cells = <0>;
441 clocks = <&clock 282>, <&clock 141>; 377 clocks = <&clock 282>, <&clock 141>;
442 clock-names = "biu", "ciu"; 378 clock-names = "biu", "ciu";
443 }; 379 };