diff options
| author | Scott Wood <scottwood@freescale.com> | 2010-09-30 15:31:27 -0400 |
|---|---|---|
| committer | Marcelo Tosatti <mtosatti@redhat.com> | 2010-11-05 12:42:29 -0400 |
| commit | df8940eadf011db2d4bedecf6eb659d44494edb3 (patch) | |
| tree | 41671049697d45a1b2463f955d3bd25865920720 | |
| parent | bb59e9748f9bc95212c7fe21468ba184938c48cb (diff) | |
KVM: PPC: BookE: Load the lower half of MSR
This was preventing the guest from setting any bits in the
hardware MSR which aren't forced on, such as MSR[SPE].
Signed-off-by: Scott Wood <scottwood@freescale.com>
Signed-off-by: Alexander Graf <agraf@suse.de>
| -rw-r--r-- | arch/powerpc/kvm/booke_interrupts.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S index 049846911ce4..1cc471faac2d 100644 --- a/arch/powerpc/kvm/booke_interrupts.S +++ b/arch/powerpc/kvm/booke_interrupts.S | |||
| @@ -416,7 +416,7 @@ lightweight_exit: | |||
| 416 | lwz r3, VCPU_PC(r4) | 416 | lwz r3, VCPU_PC(r4) |
| 417 | mtsrr0 r3 | 417 | mtsrr0 r3 |
| 418 | lwz r3, VCPU_SHARED(r4) | 418 | lwz r3, VCPU_SHARED(r4) |
| 419 | lwz r3, VCPU_SHARED_MSR(r3) | 419 | lwz r3, (VCPU_SHARED_MSR + 4)(r3) |
| 420 | oris r3, r3, KVMPPC_MSR_MASK@h | 420 | oris r3, r3, KVMPPC_MSR_MASK@h |
| 421 | ori r3, r3, KVMPPC_MSR_MASK@l | 421 | ori r3, r3, KVMPPC_MSR_MASK@l |
| 422 | mtsrr1 r3 | 422 | mtsrr1 r3 |