powerpc: Add TLB size detection for TYPE_3E MMUs

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <michael@ellerman.id.au>
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>

2 files changed, 26 insertions, 1 deletions

diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 17194fcd4040..80d68afb0200 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -137,6 +137,21 @@
 #define MMUCSR0_TLB2PS  0x00078000      /* TLB2 Page Size */
 #define MMUCSR0_TLB3PS  0x00780000      /* TLB3 Page Size */
 
+/* MMUCFG bits */
+#define MMUCFG_MAVN_NASK        0x00000003
+#define MMUCFG_MAVN_V1_0        0x00000000
+#define MMUCFG_MAVN_V2_0        0x00000001
+#define MMUCFG_NTLB_MASK        0x0000000c
+#define MMUCFG_NTLB_SHIFT       2
+#define MMUCFG_PIDSIZE_MASK     0x000007c0
+#define MMUCFG_PIDSIZE_SHIFT    6
+#define MMUCFG_TWC              0x00008000
+#define MMUCFG_LRAT             0x00010000
+#define MMUCFG_RASIZE_MASK      0x00fe0000
+#define MMUCFG_RASIZE_SHIFT     17
+#define MMUCFG_LPIDSIZE_MASK    0x0f000000
+#define MMUCFG_LPIDSIZE_SHIFT   24
+
 /* TLBnCFG encoding */
 #define TLBnCFG_N_ENTRY         0x00000fff      /* number of entries */
 #define TLBnCFG_HES             0x00002000      /* HW select supported */
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index 4d8fa911c73d..336807de550e 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -409,7 +409,17 @@ void __init mmu_context_init(void)
         } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
                 first_context = 1;
                 last_context = 65535;
-        } else {
+        } else
+#ifdef CONFIG_PPC_BOOK3E_MMU
+        if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
+                u32 mmucfg = mfspr(SPRN_MMUCFG);
+                u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
+                                >> MMUCFG_PIDSIZE_SHIFT;
+                first_context = 1;
+                last_context = (1UL << (pid_bits + 1)) - 1;
+        } else
+#endif
+        {
                 first_context = 1;
                 last_context = 255;
         }