diff options
| author | Shaik Ameer Basha <shaik.ameer@samsung.com> | 2012-11-07 01:38:31 -0500 |
|---|---|---|
| committer | Mauro Carvalho Chehab <mchehab@redhat.com> | 2012-11-26 15:43:14 -0500 |
| commit | bca36481e6fdc8e64f5837bc1d7f9752f3437c63 (patch) | |
| tree | b53d1ca43c97cade6b71258de32ea908a80124b2 | |
| parent | 9868018045c555c7a724c0cb7eeb0caeba9d43ff (diff) | |
[media] exynos-gsc: Fix settings for input and output image RGB type
Macros used to set input and output RGB type aren't correct.
Updating the macros as per register manual.
Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
| -rw-r--r-- | drivers/media/platform/exynos-gsc/gsc-regs.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/media/platform/exynos-gsc/gsc-regs.h b/drivers/media/platform/exynos-gsc/gsc-regs.h index 533e9947a925..4678f9a6a4fd 100644 --- a/drivers/media/platform/exynos-gsc/gsc-regs.h +++ b/drivers/media/platform/exynos-gsc/gsc-regs.h | |||
| @@ -40,10 +40,10 @@ | |||
| 40 | #define GSC_IN_ROT_YFLIP (2 << 16) | 40 | #define GSC_IN_ROT_YFLIP (2 << 16) |
| 41 | #define GSC_IN_ROT_XFLIP (1 << 16) | 41 | #define GSC_IN_ROT_XFLIP (1 << 16) |
| 42 | #define GSC_IN_RGB_TYPE_MASK (3 << 14) | 42 | #define GSC_IN_RGB_TYPE_MASK (3 << 14) |
| 43 | #define GSC_IN_RGB_HD_WIDE (3 << 14) | 43 | #define GSC_IN_RGB_HD_NARROW (3 << 14) |
| 44 | #define GSC_IN_RGB_HD_NARROW (2 << 14) | 44 | #define GSC_IN_RGB_HD_WIDE (2 << 14) |
| 45 | #define GSC_IN_RGB_SD_WIDE (1 << 14) | 45 | #define GSC_IN_RGB_SD_NARROW (1 << 14) |
| 46 | #define GSC_IN_RGB_SD_NARROW (0 << 14) | 46 | #define GSC_IN_RGB_SD_WIDE (0 << 14) |
| 47 | #define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13) | 47 | #define GSC_IN_YUV422_1P_ORDER_MASK (1 << 13) |
| 48 | #define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13) | 48 | #define GSC_IN_YUV422_1P_ORDER_LSB_Y (0 << 13) |
| 49 | #define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13) | 49 | #define GSC_IN_YUV422_1P_OEDER_LSB_C (1 << 13) |
| @@ -85,10 +85,10 @@ | |||
| 85 | #define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24) | 85 | #define GSC_OUT_GLOBAL_ALPHA_MASK (0xff << 24) |
| 86 | #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) | 86 | #define GSC_OUT_GLOBAL_ALPHA(x) ((x) << 24) |
| 87 | #define GSC_OUT_RGB_TYPE_MASK (3 << 10) | 87 | #define GSC_OUT_RGB_TYPE_MASK (3 << 10) |
| 88 | #define GSC_OUT_RGB_HD_NARROW (3 << 10) | 88 | #define GSC_OUT_RGB_HD_WIDE (3 << 10) |
| 89 | #define GSC_OUT_RGB_HD_WIDE (2 << 10) | 89 | #define GSC_OUT_RGB_HD_NARROW (2 << 10) |
| 90 | #define GSC_OUT_RGB_SD_NARROW (1 << 10) | 90 | #define GSC_OUT_RGB_SD_WIDE (1 << 10) |
| 91 | #define GSC_OUT_RGB_SD_WIDE (0 << 10) | 91 | #define GSC_OUT_RGB_SD_NARROW (0 << 10) |
| 92 | #define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9) | 92 | #define GSC_OUT_YUV422_1P_ORDER_MASK (1 << 9) |
| 93 | #define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9) | 93 | #define GSC_OUT_YUV422_1P_ORDER_LSB_Y (0 << 9) |
| 94 | #define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9) | 94 | #define GSC_OUT_YUV422_1P_OEDER_LSB_C (1 << 9) |