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authorShawn Guo <shawn.guo@linaro.org>2011-10-16 20:42:17 -0400
committerSascha Hauer <s.hauer@pengutronix.de>2011-10-18 06:43:19 -0400
commit9daaf31a8cc9c98751b7b71198307e47d5bf6a4d (patch)
tree652301a4dd70a11462199237ca869047070e8fea
parent73d2b4cdfc09a7a858b3ea1f32f6218b21439b96 (diff)
arm/mx5: add device tree support for imx51 babbage
It adds device tree support for imx51 babbage board. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Grant Likely <grant.likely@secretlab.ca> Acked-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt4
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts135
-rw-r--r--arch/arm/boot/dts/imx51.dtsi246
-rw-r--r--arch/arm/mach-mx5/Kconfig9
-rw-r--r--arch/arm/mach-mx5/Makefile1
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c9
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c8
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c116
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h2
9 files changed, 528 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index d1e8d6f797ef..e2401cd632ab 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -1,3 +1,7 @@
1i.MX51 Babbage Board
2Required root node properties:
3 - compatible = "fsl,imx51-babbage", "fsl,imx51";
4
1i.MX53 Automotive Reference Design Board 5i.MX53 Automotive Reference Design Board
2Required root node properties: 6Required root node properties:
3 - compatible = "fsl,imx53-ard", "fsl,imx53"; 7 - compatible = "fsl,imx53-ard", "fsl,imx53";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
new file mode 100644
index 000000000000..f8766af11215
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -0,0 +1,135 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx51.dtsi"
15
16/ {
17 model = "Freescale i.MX51 Babbage Board";
18 compatible = "fsl,imx51-babbage", "fsl,imx51";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x90000000 0x20000000>;
26 };
27
28 soc {
29 aips@70000000 { /* aips-1 */
30 spba@70000000 {
31 esdhc@70004000 { /* ESDHC1 */
32 fsl,cd-internal;
33 fsl,wp-internal;
34 status = "okay";
35 };
36
37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
40 status = "okay";
41 };
42
43 uart2: uart@7000c000 { /* UART3 */
44 fsl,uart-has-rtscts;
45 status = "okay";
46 };
47
48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay";
53
54 pmic: mc13892@0 {
55 #address-cells = <1>;
56 #size-cells = <0>;
57 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>;
59 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
61 fsl,mc13xxx-uses-regulator;
62 };
63
64 flash: at45db321d@1 {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
68 spi-max-frequency = <25000000>;
69 reg = <1>;
70
71 partition@0 {
72 label = "U-Boot";
73 reg = <0x0 0x40000>;
74 read-only;
75 };
76
77 partition@40000 {
78 label = "Kernel";
79 reg = <0x40000 0x3c0000>;
80 };
81 };
82 };
83 };
84
85 wdog@73f98000 { /* WDOG1 */
86 status = "okay";
87 };
88
89 iomuxc@73fa8000 {
90 compatible = "fsl,imx51-iomuxc-babbage";
91 reg = <0x73fa8000 0x4000>;
92 };
93
94 uart0: uart@73fbc000 {
95 fsl,uart-has-rtscts;
96 status = "okay";
97 };
98
99 uart1: uart@73fc0000 {
100 status = "okay";
101 };
102 };
103
104 aips@80000000 { /* aips-2 */
105 sdma@83fb0000 {
106 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
107 };
108
109 i2c@83fc4000 { /* I2C2 */
110 status = "okay";
111
112 codec: sgtl5000@0a {
113 compatible = "fsl,sgtl5000";
114 reg = <0x0a>;
115 };
116 };
117
118 fec@83fec000 {
119 phy-mode = "mii";
120 status = "okay";
121 };
122 };
123 };
124
125 gpio-keys {
126 compatible = "gpio-keys";
127
128 power {
129 label = "Power Button";
130 gpios = <&gpio1 21 0>;
131 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup;
133 };
134 };
135};
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
new file mode 100644
index 000000000000..327ab8e3a4c8
--- /dev/null
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -0,0 +1,246 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 aliases {
17 serial0 = &uart0;
18 serial1 = &uart1;
19 serial2 = &uart2;
20 };
21
22 tzic: tz-interrupt-controller@e0000000 {
23 compatible = "fsl,imx51-tzic", "fsl,tzic";
24 interrupt-controller;
25 #interrupt-cells = <1>;
26 reg = <0xe0000000 0x4000>;
27 };
28
29 clocks {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 ckil {
34 compatible = "fsl,imx-ckil", "fixed-clock";
35 clock-frequency = <32768>;
36 };
37
38 ckih1 {
39 compatible = "fsl,imx-ckih1", "fixed-clock";
40 clock-frequency = <22579200>;
41 };
42
43 ckih2 {
44 compatible = "fsl,imx-ckih2", "fixed-clock";
45 clock-frequency = <0>;
46 };
47
48 osc {
49 compatible = "fsl,imx-osc", "fixed-clock";
50 clock-frequency = <24000000>;
51 };
52 };
53
54 soc {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
58 interrupt-parent = <&tzic>;
59 ranges;
60
61 aips@70000000 { /* AIPS1 */
62 compatible = "fsl,aips-bus", "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 reg = <0x70000000 0x10000000>;
66 ranges;
67
68 spba@70000000 {
69 compatible = "fsl,spba-bus", "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 reg = <0x70000000 0x40000>;
73 ranges;
74
75 esdhc@70004000 { /* ESDHC1 */
76 compatible = "fsl,imx51-esdhc";
77 reg = <0x70004000 0x4000>;
78 interrupts = <1>;
79 status = "disabled";
80 };
81
82 esdhc@70008000 { /* ESDHC2 */
83 compatible = "fsl,imx51-esdhc";
84 reg = <0x70008000 0x4000>;
85 interrupts = <2>;
86 status = "disabled";
87 };
88
89 uart2: uart@7000c000 { /* UART3 */
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>;
93 status = "disabled";
94 };
95
96 ecspi@70010000 { /* ECSPI1 */
97 #address-cells = <1>;
98 #size-cells = <0>;
99 compatible = "fsl,imx51-ecspi";
100 reg = <0x70010000 0x4000>;
101 interrupts = <36>;
102 status = "disabled";
103 };
104
105 esdhc@70020000 { /* ESDHC3 */
106 compatible = "fsl,imx51-esdhc";
107 reg = <0x70020000 0x4000>;
108 interrupts = <3>;
109 status = "disabled";
110 };
111
112 esdhc@70024000 { /* ESDHC4 */
113 compatible = "fsl,imx51-esdhc";
114 reg = <0x70024000 0x4000>;
115 interrupts = <4>;
116 status = "disabled";
117 };
118 };
119
120 gpio0: gpio@73f84000 { /* GPIO1 */
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 interrupt-controller;
127 #interrupt-cells = <1>;
128 };
129
130 gpio1: gpio@73f88000 { /* GPIO2 */
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>;
134 gpio-controller;
135 #gpio-cells = <2>;
136 interrupt-controller;
137 #interrupt-cells = <1>;
138 };
139
140 gpio2: gpio@73f8c000 { /* GPIO3 */
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>;
144 gpio-controller;
145 #gpio-cells = <2>;
146 interrupt-controller;
147 #interrupt-cells = <1>;
148 };
149
150 gpio3: gpio@73f90000 { /* GPIO4 */
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>;
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
157 #interrupt-cells = <1>;
158 };
159
160 wdog@73f98000 { /* WDOG1 */
161 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
162 reg = <0x73f98000 0x4000>;
163 interrupts = <58>;
164 status = "disabled";
165 };
166
167 wdog@73f9c000 { /* WDOG2 */
168 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
169 reg = <0x73f9c000 0x4000>;
170 interrupts = <59>;
171 status = "disabled";
172 };
173
174 uart0: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>;
178 status = "disabled";
179 };
180
181 uart1: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>;
185 status = "disabled";
186 };
187 };
188
189 aips@80000000 { /* AIPS2 */
190 compatible = "fsl,aips-bus", "simple-bus";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 reg = <0x80000000 0x10000000>;
194 ranges;
195
196 ecspi@83fac000 { /* ECSPI2 */
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "fsl,imx51-ecspi";
200 reg = <0x83fac000 0x4000>;
201 interrupts = <37>;
202 status = "disabled";
203 };
204
205 sdma@83fb0000 {
206 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
207 reg = <0x83fb0000 0x4000>;
208 interrupts = <6>;
209 };
210
211 cspi@83fc0000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
215 reg = <0x83fc0000 0x4000>;
216 interrupts = <38>;
217 status = "disabled";
218 };
219
220 i2c@83fc4000 { /* I2C2 */
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
224 reg = <0x83fc4000 0x4000>;
225 interrupts = <63>;
226 status = "disabled";
227 };
228
229 i2c@83fc8000 { /* I2C1 */
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
233 reg = <0x83fc8000 0x4000>;
234 interrupts = <62>;
235 status = "disabled";
236 };
237
238 fec@83fec000 {
239 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
240 reg = <0x83fec000 0x4000>;
241 interrupts = <87>;
242 status = "disabled";
243 };
244 };
245 };
246};
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index 0ac676c5256d..bda12e84429a 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -62,6 +62,15 @@ endif # ARCH_MX50_SUPPORTED
62if ARCH_MX51 62if ARCH_MX51
63comment "i.MX51 machines:" 63comment "i.MX51 machines:"
64 64
65config MACH_IMX51_DT
66 bool "Support i.MX51 platforms from device tree"
67 select SOC_IMX51
68 select USE_OF
69 select MACH_MX51_BABBAGE
70 help
71 Include support for Freescale i.MX51 based platforms
72 using the device tree for discovery
73
65config MACH_MX51_BABBAGE 74config MACH_MX51_BABBAGE
66 bool "Support MX51 BABBAGE platforms" 75 bool "Support MX51 BABBAGE platforms"
67 select SOC_IMX51 76 select SOC_IMX51
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 3dbe5e26a51b..a3c75f368f4b 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -23,4 +23,5 @@ obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
23obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o 23obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
24obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o 24obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
25 25
26obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
26obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o 27obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 11b0ff67f89d..5cc28e0ce3e5 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -351,6 +351,12 @@ static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
351 .wp_type = ESDHC_WP_GPIO, 351 .wp_type = ESDHC_WP_GPIO,
352}; 352};
353 353
354void __init imx51_babbage_common_init(void)
355{
356 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
357 ARRAY_SIZE(mx51babbage_pads));
358}
359
354/* 360/*
355 * Board specific initialization. 361 * Board specific initialization.
356 */ 362 */
@@ -365,8 +371,7 @@ static void __init mx51_babbage_init(void)
365#if defined(CONFIG_CPU_FREQ_IMX) 371#if defined(CONFIG_CPU_FREQ_IMX)
366 get_cpu_op = mx51_get_cpu_op; 372 get_cpu_op = mx51_get_cpu_op;
367#endif 373#endif
368 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, 374 imx51_babbage_common_init();
369 ARRAY_SIZE(mx51babbage_pads));
370 375
371 imx51_add_imx_uart(0, &uart_pdata); 376 imx51_add_imx_uart(0, &uart_pdata);
372 imx51_add_imx_uart(1, NULL); 377 imx51_add_imx_uart(1, NULL);
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index d9b03d4dba6d..cc3547c88261 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -1633,6 +1633,14 @@ static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1633 } 1633 }
1634} 1634}
1635 1635
1636int __init mx51_clocks_init_dt(void)
1637{
1638 unsigned long ckil, osc, ckih1, ckih2;
1639
1640 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1641 return mx51_clocks_init(ckil, osc, ckih1, ckih2);
1642}
1643
1636int __init mx53_clocks_init_dt(void) 1644int __init mx53_clocks_init_dt(void)
1637{ 1645{
1638 unsigned long ckil, osc, ckih1, ckih2; 1646 unsigned long ckil, osc, ckih1, ckih2;
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
new file mode 100644
index 000000000000..ccc61585659b
--- /dev/null
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -0,0 +1,116 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h>
17#include <asm/mach/arch.h>
18#include <asm/mach/time.h>
19#include <mach/common.h>
20#include <mach/mx51.h>
21
22/*
23 * Lookup table for attaching a specific name and platform_data pointer to
24 * devices as they get created by of_platform_populate(). Ideally this table
25 * would not exist, but the current clock implementation depends on some devices
26 * having a specific name.
27 */
28static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
29 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
30 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
31 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
32 OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
33 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
38 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
39 OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
43 OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
44 { /* sentinel */ }
45};
46
47static void __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent)
49{
50 irq_domain_add_simple(np, 0);
51}
52
53static void __init imx51_gpio_add_irq_domain(struct device_node *np,
54 struct device_node *interrupt_parent)
55{
56 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
57 32 * 4; /* imx51 gets 4 gpio ports */
58
59 irq_domain_add_simple(np, gpio_irq_base);
60 gpio_irq_base += 32;
61}
62
63static const struct of_device_id imx51_irq_match[] __initconst = {
64 { .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
65 { .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
66 { /* sentinel */ }
67};
68
69static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
70 { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, },
71 { /* sentinel */ }
72};
73
74static void __init imx51_dt_init(void)
75{
76 struct device_node *node;
77 const struct of_device_id *of_id;
78 void (*func)(void);
79
80 of_irq_init(imx51_irq_match);
81
82 node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
83 if (node) {
84 of_id = of_match_node(imx51_iomuxc_of_match, node);
85 func = of_id->data;
86 func();
87 of_node_put(node);
88 }
89
90 of_platform_populate(NULL, of_default_bus_match_table,
91 imx51_auxdata_lookup, NULL);
92}
93
94static void __init imx51_timer_init(void)
95{
96 mx51_clocks_init_dt();
97}
98
99static struct sys_timer imx51_timer = {
100 .init = imx51_timer_init,
101};
102
103static const char *imx51_dt_board_compat[] __initdata = {
104 "fsl,imx51-babbage",
105 NULL
106};
107
108DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
109 .map_io = mx51_map_io,
110 .init_early = imx51_init_early,
111 .init_irq = mx51_init_irq,
112 .handle_irq = imx51_handle_irq,
113 .timer = &imx51_timer,
114 .init_machine = imx51_dt_init,
115 .dt_compat = imx51_dt_board_compat,
116MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index eb3e7c4e2f1a..d19703930ef6 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -64,6 +64,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
64 unsigned long ckih1, unsigned long ckih2); 64 unsigned long ckih1, unsigned long ckih2);
65extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, 65extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
66 unsigned long ckih1, unsigned long ckih2); 66 unsigned long ckih1, unsigned long ckih2);
67extern int mx51_clocks_init_dt(void);
67extern int mx53_clocks_init_dt(void); 68extern int mx53_clocks_init_dt(void);
68extern struct platform_device *mxc_register_gpio(char *name, int id, 69extern struct platform_device *mxc_register_gpio(char *name, int id,
69 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 70 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
@@ -74,6 +75,7 @@ extern void mx51_efikamx_reset(void);
74extern int mx53_revision(void); 75extern int mx53_revision(void);
75extern int mx53_display_revision(void); 76extern int mx53_display_revision(void);
76 77
78extern void imx51_babbage_common_init(void);
77extern void imx53_ard_common_init(void); 79extern void imx53_ard_common_init(void);
78extern void imx53_evk_common_init(void); 80extern void imx53_evk_common_init(void);
79extern void imx53_qsb_common_init(void); 81extern void imx53_qsb_common_init(void);
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-16 05:25:07 -0500