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authorMichael Grzeschik <m.grzeschik@pengutronix.de>2014-09-29 05:55:36 -0400
committerDavid S. Miller <davem@davemloft.net>2014-09-29 14:36:26 -0400
commit8c14f9c70327a6fb75534c4c61d7ea9c82ccf78f (patch)
tree2a5afd10fce0687fbba979d6bf676bfb7ba336a7
parenta0d2e51390622e4dfd9d7bffb768e6fa22fb7daf (diff)
ARCNET: add com20020 PCI IDs with metadata
This patch adds metadata for the com20020 to prepare for devices with multiple io address areas with multi card interfaces. Signed-off-by: Michael Grzeschik <m.grzeschik@pengutronix.de> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat
-rw-r--r--drivers/net/arcnet/com20020-pci.c216
-rw-r--r--include/linux/com20020.h16
2 files changed, 197 insertions, 35 deletions
diff --git a/drivers/net/arcnet/com20020-pci.c b/drivers/net/arcnet/com20020-pci.c
index 7bb292e59559..f9e55527739d 100644
--- a/drivers/net/arcnet/com20020-pci.c
+++ b/drivers/net/arcnet/com20020-pci.c
@@ -63,6 +63,8 @@ MODULE_LICENSE("GPL");
63 63
64static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 64static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
65{ 65{
66 struct com20020_pci_channel_map *cm;
67 struct com20020_pci_card_info *ci;
66 struct net_device *dev; 68 struct net_device *dev;
67 struct arcnet_local *lp; 69 struct arcnet_local *lp;
68 int ioaddr, err; 70 int ioaddr, err;
@@ -75,19 +77,15 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
75 77
76 dev->netdev_ops = &com20020_netdev_ops; 78 dev->netdev_ops = &com20020_netdev_ops;
77 79
80 ci = (struct com20020_pci_card_info *)id->driver_data;
81
78 lp = netdev_priv(dev); 82 lp = netdev_priv(dev);
79 83
80 pci_set_drvdata(pdev, dev); 84 pci_set_drvdata(pdev, dev);
81 85
82 // SOHARD needs PCI base addr 4 86 cm = &ci->chan_map_tbl[0];
83 if (pdev->vendor==0x10B5) { 87 BUGMSG(D_NORMAL, "%s Controls\n", ci->name);
84 BUGMSG(D_NORMAL, "SOHARD\n"); 88 ioaddr = pci_resource_start(pdev, cm->bar);
85 ioaddr = pci_resource_start(pdev, 4);
86 }
87 else {
88 BUGMSG(D_NORMAL, "Contemporary Controls\n");
89 ioaddr = pci_resource_start(pdev, 2);
90 }
91 89
92 if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "com20020-pci")) { 90 if (!request_region(ioaddr, ARCNET_TOTAL_SIZE, "com20020-pci")) {
93 BUGMSG(D_INIT, "IO region %xh-%xh already allocated.\n", 91 BUGMSG(D_INIT, "IO region %xh-%xh already allocated.\n",
@@ -105,7 +103,7 @@ static int com20020pci_probe(struct pci_dev *pdev, const struct pci_device_id *i
105 dev->irq = pdev->irq; 103 dev->irq = pdev->irq;
106 dev->dev_addr[0] = node; 104 dev->dev_addr[0] = node;
107 lp->card_name = "PCI COM20020"; 105 lp->card_name = "PCI COM20020";
108 lp->card_flags = id->driver_data; 106 lp->card_flags = ci->flags;
109 lp->backplane = backplane; 107 lp->backplane = backplane;
110 lp->clockp = clockp & 7; 108 lp->clockp = clockp & 7;
111 lp->clockm = clockm & 3; 109 lp->clockm = clockm & 3;
@@ -144,32 +142,180 @@ static void com20020pci_remove(struct pci_dev *pdev)
144 free_netdev(dev); 142 free_netdev(dev);
145} 143}
146 144
145static struct com20020_pci_card_info card_info_10mbit = {
146 .name = "ARC-PCI",
147 .devcount = 1,
148 .chan_map_tbl = {
149 { 2, 0x00, 0x08 },
150 },
151 .flags = ARC_CAN_10MBIT,
152};
153
154static struct com20020_pci_card_info card_info_5mbit = {
155 .name = "ARC-PCI",
156 .devcount = 1,
157 .chan_map_tbl = {
158 { 2, 0x00, 0x08 },
159 },
160 .flags = ARC_IS_5MBIT,
161};
162
163static struct com20020_pci_card_info card_info_sohard = {
164 .name = "PLX-PCI",
165 .devcount = 1,
166 /* SOHARD needs PCI base addr 4 */
167 .chan_map_tbl = {
168 {4, 0x00, 0x08},
169 },
170 .flags = ARC_CAN_10MBIT,
171};
172
147static const struct pci_device_id com20020pci_id_table[] = { 173static const struct pci_device_id com20020pci_id_table[] = {
148 { 0x1571, 0xa001, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 174 {
149 { 0x1571, 0xa002, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 175 0x1571, 0xa001,
150 { 0x1571, 0xa003, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 176 PCI_ANY_ID, PCI_ANY_ID,
151 { 0x1571, 0xa004, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 177 0, 0,
152 { 0x1571, 0xa005, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 178 0,
153 { 0x1571, 0xa006, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 179 },
154 { 0x1571, 0xa007, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 180 {
155 { 0x1571, 0xa008, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0 }, 181 0x1571, 0xa002,
156 { 0x1571, 0xa009, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 182 PCI_ANY_ID, PCI_ANY_ID,
157 { 0x1571, 0xa00a, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 183 0, 0,
158 { 0x1571, 0xa00b, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 184 0,
159 { 0x1571, 0xa00c, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 185 },
160 { 0x1571, 0xa00d, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 186 {
161 { 0x1571, 0xa00e, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_IS_5MBIT }, 187 0x1571, 0xa003,
162 { 0x1571, 0xa201, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 188 PCI_ANY_ID, PCI_ANY_ID,
163 { 0x1571, 0xa202, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 189 0, 0,
164 { 0x1571, 0xa203, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 190 0
165 { 0x1571, 0xa204, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 191 },
166 { 0x1571, 0xa205, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 192 {
167 { 0x1571, 0xa206, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 193 0x1571, 0xa004,
168 { 0x10B5, 0x9030, 0x10B5, 0x2978, 0, 0, ARC_CAN_10MBIT }, 194 PCI_ANY_ID, PCI_ANY_ID,
169 { 0x10B5, 0x9050, 0x10B5, 0x2273, 0, 0, ARC_CAN_10MBIT }, 195 0, 0,
170 { 0x14BA, 0x6000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 196 0,
171 { 0x10B5, 0x2200, PCI_ANY_ID, PCI_ANY_ID, 0, 0, ARC_CAN_10MBIT }, 197 },
172 {0,} 198 {
199 0x1571, 0xa005,
200 PCI_ANY_ID, PCI_ANY_ID,
201 0, 0,
202 0
203 },
204 {
205 0x1571, 0xa006,
206 PCI_ANY_ID, PCI_ANY_ID,
207 0, 0,
208 0
209 },
210 {
211 0x1571, 0xa007,
212 PCI_ANY_ID, PCI_ANY_ID,
213 0, 0,
214 0
215 },
216 {
217 0x1571, 0xa008,
218 PCI_ANY_ID, PCI_ANY_ID,
219 0, 0,
220 0
221 },
222 {
223 0x1571, 0xa009,
224 PCI_ANY_ID, PCI_ANY_ID,
225 0, 0,
226 (kernel_ulong_t)&card_info_5mbit
227 },
228 {
229 0x1571, 0xa00a,
230 PCI_ANY_ID, PCI_ANY_ID,
231 0, 0,
232 (kernel_ulong_t)&card_info_5mbit
233 },
234 {
235 0x1571, 0xa00b,
236 PCI_ANY_ID, PCI_ANY_ID,
237 0, 0,
238 (kernel_ulong_t)&card_info_5mbit
239 },
240 {
241 0x1571, 0xa00c,
242 PCI_ANY_ID, PCI_ANY_ID,
243 0, 0,
244 (kernel_ulong_t)&card_info_5mbit
245 },
246 {
247 0x1571, 0xa00d,
248 PCI_ANY_ID, PCI_ANY_ID,
249 0, 0,
250 (kernel_ulong_t)&card_info_5mbit
251 },
252 {
253 0x1571, 0xa00e,
254 PCI_ANY_ID, PCI_ANY_ID,
255 0, 0,
256 (kernel_ulong_t)&card_info_5mbit
257 },
258 {
259 0x1571, 0xa201,
260 PCI_ANY_ID, PCI_ANY_ID,
261 0, 0,
262 (kernel_ulong_t)&card_info_10mbit
263 },
264 {
265 0x1571, 0xa202,
266 PCI_ANY_ID, PCI_ANY_ID,
267 0, 0,
268 (kernel_ulong_t)&card_info_10mbit
269 },
270 {
271 0x1571, 0xa203,
272 PCI_ANY_ID, PCI_ANY_ID,
273 0, 0,
274 (kernel_ulong_t)&card_info_10mbit
275 },
276 {
277 0x1571, 0xa204,
278 PCI_ANY_ID, PCI_ANY_ID,
279 0, 0,
280 (kernel_ulong_t)&card_info_10mbit
281 },
282 {
283 0x1571, 0xa205,
284 PCI_ANY_ID, PCI_ANY_ID,
285 0, 0,
286 (kernel_ulong_t)&card_info_10mbit
287 },
288 {
289 0x1571, 0xa206,
290 PCI_ANY_ID, PCI_ANY_ID,
291 0, 0,
292 (kernel_ulong_t)&card_info_10mbit
293 },
294 {
295 0x10B5, 0x9030,
296 0x10B5, 0x2978,
297 0, 0,
298 (kernel_ulong_t)&card_info_sohard
299 },
300 {
301 0x10B5, 0x9050,
302 0x10B5, 0x2273,
303 0, 0,
304 (kernel_ulong_t)&card_info_sohard
305 },
306 {
307 0x14BA, 0x6000,
308 PCI_ANY_ID, PCI_ANY_ID,
309 0, 0,
310 (kernel_ulong_t)&card_info_10mbit
311 },
312 {
313 0x10B5, 0x2200,
314 PCI_ANY_ID, PCI_ANY_ID,
315 0, 0,
316 (kernel_ulong_t)&card_info_10mbit
317 },
318 { 0, }
173}; 319};
174 320
175MODULE_DEVICE_TABLE(pci, com20020pci_id_table); 321MODULE_DEVICE_TABLE(pci, com20020pci_id_table);
diff --git a/include/linux/com20020.h b/include/linux/com20020.h
index 5dcfb944b6ce..6a1ceca61e7f 100644
--- a/include/linux/com20020.h
+++ b/include/linux/com20020.h
@@ -41,6 +41,22 @@ extern const struct net_device_ops com20020_netdev_ops;
41#define BUS_ALIGN 1 41#define BUS_ALIGN 1
42#endif 42#endif
43 43
44#define PLX_PCI_MAX_CARDS 1
45
46struct com20020_pci_channel_map {
47 u32 bar;
48 u32 offset;
49 u32 size; /* 0x00 - auto, e.g. length of entire bar */
50};
51
52struct com20020_pci_card_info {
53 const char *name;
54 int devcount;
55
56 struct com20020_pci_channel_map chan_map_tbl[PLX_PCI_MAX_CARDS];
57
58 unsigned int flags;
59};
44 60
45#define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */ 61#define _INTMASK (ioaddr+BUS_ALIGN*0) /* writable */
46#define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */ 62#define _STATUS (ioaddr+BUS_ALIGN*0) /* readable */
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-26 23:48:14 -0500