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authorMatt Porter <mporter@kernel.crashing.org>2005-09-23 01:31:15 -0400
committerGreg Kroah-Hartman <gregkh@suse.de>2005-10-28 19:47:39 -0400
commit7ff71d6adf81a43505b7cbaa034e4063d3439182 (patch)
treeea7edb953d9fb47f6132e52e1e8d422d8bdae06b
parente9b7bd4ee7f6e3ee002dc72c5211cd97c7186d00 (diff)
[PATCH] EHCI, split out PCI glue
This splits BIOS and PCI specific support out of ehci-hcd.c into ehci-pci.c. It follows the model already used in the OHCI driver so support for non-PCI EHCI controllers can be more easily added. Signed-off-by: Matt Porter <mporter@kernel.crashing.org> Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de> drivers/usb/host/ehci-hcd.c | 543 ++++++-------------------------------------- drivers/usb/host/ehci-pci.c | 414 +++++++++++++++++++++++++++++++++ drivers/usb/host/ehci.h | 1 3 files changed, 492 insertions(+), 466 deletions(-)
Diffstat
-rw-r--r--drivers/usb/host/ehci-hcd.c537
-rw-r--r--drivers/usb/host/ehci-pci.c414
-rw-r--r--drivers/usb/host/ehci.h1
3 files changed, 489 insertions, 463 deletions
diff --git a/drivers/usb/host/ehci-hcd.c b/drivers/usb/host/ehci-hcd.c
index 513fccbb8e43..af3c05eb86fc 100644
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -300,44 +300,6 @@ static void ehci_watchdog (unsigned long param)
300 spin_unlock_irqrestore (&ehci->lock, flags); 300 spin_unlock_irqrestore (&ehci->lock, flags);
301} 301}
302 302
303#ifdef CONFIG_PCI
304
305/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
306 * off the controller (maybe it can boot from highspeed USB disks).
307 */
308static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
309{
310 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
311
312 /* always say Linux will own the hardware */
313 pci_write_config_byte(pdev, where + 3, 1);
314
315 /* maybe wait a while for BIOS to respond */
316 if (cap & (1 << 16)) {
317 int msec = 5000;
318
319 do {
320 msleep(10);
321 msec -= 10;
322 pci_read_config_dword(pdev, where, &cap);
323 } while ((cap & (1 << 16)) && msec);
324 if (cap & (1 << 16)) {
325 ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
326 where, cap);
327 // some BIOS versions seem buggy...
328 // return 1;
329 ehci_warn (ehci, "continuing after BIOS bug...\n");
330 /* disable all SMIs, and clear "BIOS owns" flag */
331 pci_write_config_dword(pdev, where + 4, 0);
332 pci_write_config_byte(pdev, where + 2, 0);
333 } else
334 ehci_dbg(ehci, "BIOS handoff succeeded\n");
335 }
336 return 0;
337}
338
339#endif
340
341/* Reboot notifiers kick in for silicon on any bus (not just pci, etc). 303/* Reboot notifiers kick in for silicon on any bus (not just pci, etc).
342 * This forcibly disables dma and IRQs, helping kexec and other cases 304 * This forcibly disables dma and IRQs, helping kexec and other cases
343 * where the next system software may expect clean state. 305 * where the next system software may expect clean state.
@@ -371,156 +333,90 @@ static void ehci_port_power (struct ehci_hcd *ehci, int is_on)
371 msleep(20); 333 msleep(20);
372} 334}
373 335
336/*-------------------------------------------------------------------------*/
374 337
375/* called by khubd or root hub init threads */ 338/*
339 * ehci_work is called from some interrupts, timers, and so on.
340 * it calls driver completion functions, after dropping ehci->lock.
341 */
342static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
343{
344 timer_action_done (ehci, TIMER_IO_WATCHDOG);
345 if (ehci->reclaim_ready)
346 end_unlink_async (ehci, regs);
347
348 /* another CPU may drop ehci->lock during a schedule scan while
349 * it reports urb completions. this flag guards against bogus
350 * attempts at re-entrant schedule scanning.
351 */
352 if (ehci->scanning)
353 return;
354 ehci->scanning = 1;
355 scan_async (ehci, regs);
356 if (ehci->next_uframe != -1)
357 scan_periodic (ehci, regs);
358 ehci->scanning = 0;
359
360 /* the IO watchdog guards against hardware or driver bugs that
361 * misplace IRQs, and should let us run completely without IRQs.
362 * such lossage has been observed on both VT6202 and VT8235.
363 */
364 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
365 (ehci->async->qh_next.ptr != NULL ||
366 ehci->periodic_sched != 0))
367 timer_action (ehci, TIMER_IO_WATCHDOG);
368}
376 369
377static int ehci_hc_reset (struct usb_hcd *hcd) 370static void ehci_stop (struct usb_hcd *hcd)
378{ 371{
379 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 372 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
380 u32 temp;
381 unsigned count = 256/4;
382 373
383 spin_lock_init (&ehci->lock); 374 ehci_dbg (ehci, "stop\n");
384 375
385 ehci->caps = hcd->regs; 376 /* Turn off port power on all root hub ports. */
386 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase)); 377 ehci_port_power (ehci, 0);
387 dbg_hcs_params (ehci, "reset");
388 dbg_hcc_params (ehci, "reset");
389 378
390 /* cache this readonly data; minimize chip reads */ 379 /* no more interrupts ... */
391 ehci->hcs_params = readl (&ehci->caps->hcs_params); 380 del_timer_sync (&ehci->watchdog);
392 381
393#ifdef CONFIG_PCI 382 spin_lock_irq(&ehci->lock);
394 if (hcd->self.controller->bus == &pci_bus_type) { 383 if (HC_IS_RUNNING (hcd->state))
395 struct pci_dev *pdev = to_pci_dev(hcd->self.controller); 384 ehci_quiesce (ehci);
396 385
397 switch (pdev->vendor) { 386 ehci_reset (ehci);
398 case PCI_VENDOR_ID_TDI: 387 writel (0, &ehci->regs->intr_enable);
399 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) { 388 spin_unlock_irq(&ehci->lock);
400 ehci->is_tdi_rh_tt = 1;
401 tdi_reset (ehci);
402 }
403 break;
404 case PCI_VENDOR_ID_AMD:
405 /* AMD8111 EHCI doesn't work, according to AMD errata */
406 if (pdev->device == 0x7463) {
407 ehci_info (ehci, "ignoring AMD8111 (errata)\n");
408 return -EIO;
409 }
410 break;
411 case PCI_VENDOR_ID_NVIDIA:
412 /* NVidia reports that certain chips don't handle
413 * QH, ITD, or SITD addresses above 2GB. (But TD,
414 * data buffer, and periodic schedule are normal.)
415 */
416 switch (pdev->device) {
417 case 0x003c: /* MCP04 */
418 case 0x005b: /* CK804 */
419 case 0x00d8: /* CK8 */
420 case 0x00e8: /* CK8S */
421 if (pci_set_consistent_dma_mask(pdev,
422 DMA_31BIT_MASK) < 0)
423 ehci_warn (ehci, "can't enable NVidia "
424 "workaround for >2GB RAM\n");
425 break;
426 }
427 break;
428 }
429 389
430 /* optional debug port, normally in the first BAR */ 390 /* let companion controllers work when we aren't */
431 temp = pci_find_capability (pdev, 0x0a); 391 writel (0, &ehci->regs->configured_flag);
432 if (temp) { 392 unregister_reboot_notifier (&ehci->reboot_notifier);
433 pci_read_config_dword(pdev, temp, &temp);
434 temp >>= 16;
435 if ((temp & (3 << 13)) == (1 << 13)) {
436 temp &= 0x1fff;
437 ehci->debug = hcd->regs + temp;
438 temp = readl (&ehci->debug->control);
439 ehci_info (ehci, "debug port %d%s\n",
440 HCS_DEBUG_PORT(ehci->hcs_params),
441 (temp & DBGP_ENABLED)
442 ? " IN USE"
443 : "");
444 if (!(temp & DBGP_ENABLED))
445 ehci->debug = NULL;
446 }
447 }
448 393
449 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params)); 394 remove_debug_files (ehci);
450 } else
451 temp = 0;
452
453 /* EHCI 0.96 and later may have "extended capabilities" */
454 while (temp && count--) {
455 u32 cap;
456
457 pci_read_config_dword (to_pci_dev(hcd->self.controller),
458 temp, &cap);
459 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
460 switch (cap & 0xff) {
461 case 1: /* BIOS/SMM/... handoff */
462 if (bios_handoff (ehci, temp, cap) != 0)
463 return -EOPNOTSUPP;
464 break;
465 case 0: /* illegal reserved capability */
466 ehci_warn (ehci, "illegal capability!\n");
467 cap = 0;
468 /* FALLTHROUGH */
469 default: /* unknown */
470 break;
471 }
472 temp = (cap >> 8) & 0xff;
473 }
474 if (!count) {
475 ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
476 return -EIO;
477 }
478 if (ehci_is_TDI(ehci))
479 ehci_reset (ehci);
480#endif
481 395
482 ehci_port_power (ehci, 0); 396 /* root hub is shut down separately (first, when possible) */
397 spin_lock_irq (&ehci->lock);
398 if (ehci->async)
399 ehci_work (ehci, NULL);
400 spin_unlock_irq (&ehci->lock);
401 ehci_mem_cleanup (ehci);
483 402
484 /* at least the Genesys GL880S needs fixup here */ 403#ifdef EHCI_STATS
485 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params); 404 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
486 temp &= 0x0f; 405 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
487 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) { 406 ehci->stats.lost_iaa);
488 ehci_dbg (ehci, "bogus port configuration: " 407 ehci_dbg (ehci, "complete %ld unlink %ld\n",
489 "cc=%d x pcc=%d < ports=%d\n", 408 ehci->stats.complete, ehci->stats.unlink);
490 HCS_N_CC(ehci->hcs_params),
491 HCS_N_PCC(ehci->hcs_params),
492 HCS_N_PORTS(ehci->hcs_params));
493
494#ifdef CONFIG_PCI
495 if (hcd->self.controller->bus == &pci_bus_type) {
496 struct pci_dev *pdev;
497
498 pdev = to_pci_dev(hcd->self.controller);
499 switch (pdev->vendor) {
500 case 0x17a0: /* GENESYS */
501 /* GL880S: should be PORTS=2 */
502 temp |= (ehci->hcs_params & ~0xf);
503 ehci->hcs_params = temp;
504 break;
505 case PCI_VENDOR_ID_NVIDIA:
506 /* NF4: should be PCC=10 */
507 break;
508 }
509 }
510#endif 409#endif
511 }
512 410
513 /* force HC to halt state */ 411 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
514 return ehci_halt (ehci);
515} 412}
516 413
517static int ehci_start (struct usb_hcd *hcd) 414static int ehci_run (struct usb_hcd *hcd)
518{ 415{
519 struct ehci_hcd *ehci = hcd_to_ehci (hcd); 416 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
520 u32 temp; 417 u32 temp;
521 int retval; 418 int retval;
522 u32 hcc_params; 419 u32 hcc_params;
523 u8 sbrn = 0;
524 int first; 420 int first;
525 421
526 /* skip some things on restart paths */ 422 /* skip some things on restart paths */
@@ -559,27 +455,6 @@ static int ehci_start (struct usb_hcd *hcd)
559 } 455 }
560 writel (ehci->periodic_dma, &ehci->regs->frame_list); 456 writel (ehci->periodic_dma, &ehci->regs->frame_list);
561 457
562#ifdef CONFIG_PCI
563 if (hcd->self.controller->bus == &pci_bus_type) {
564 struct pci_dev *pdev;
565 u16 port_wake;
566
567 pdev = to_pci_dev(hcd->self.controller);
568
569 /* Serial Bus Release Number is at PCI 0x60 offset */
570 pci_read_config_byte(pdev, 0x60, &sbrn);
571
572 /* port wake capability, reported by boot firmware */
573 pci_read_config_word(pdev, 0x62, &port_wake);
574 hcd->can_wakeup = (port_wake & 1) != 0;
575
576 /* help hc dma work well with cachelines */
577 retval = pci_set_mwi(pdev);
578 if (retval)
579 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
580 }
581#endif
582
583 /* 458 /*
584 * dedicate a qh for the async ring head, since we couldn't unlink 459 * dedicate a qh for the async ring head, since we couldn't unlink
585 * a 'real' qh without stopping the async schedule [4.8]. use it 460 * a 'real' qh without stopping the async schedule [4.8]. use it
@@ -675,7 +550,7 @@ static int ehci_start (struct usb_hcd *hcd)
675 temp = HC_VERSION(readl (&ehci->caps->hc_capbase)); 550 temp = HC_VERSION(readl (&ehci->caps->hc_capbase));
676 ehci_info (ehci, 551 ehci_info (ehci,
677 "USB %x.%x %s, EHCI %x.%02x, driver %s\n", 552 "USB %x.%x %s, EHCI %x.%02x, driver %s\n",
678 ((sbrn & 0xf0)>>4), (sbrn & 0x0f), 553 ((ehci->sbrn & 0xf0)>>4), (ehci->sbrn & 0x0f),
679 first ? "initialized" : "restarted", 554 first ? "initialized" : "restarted",
680 temp >> 8, temp & 0xff, DRIVER_VERSION); 555 temp >> 8, temp & 0xff, DRIVER_VERSION);
681 556
@@ -687,188 +562,6 @@ static int ehci_start (struct usb_hcd *hcd)
687 return 0; 562 return 0;
688} 563}
689 564
690/* always called by thread; normally rmmod */
691
692static void ehci_stop (struct usb_hcd *hcd)
693{
694 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
695
696 ehci_dbg (ehci, "stop\n");
697
698 /* Turn off port power on all root hub ports. */
699 ehci_port_power (ehci, 0);
700
701 /* no more interrupts ... */
702 del_timer_sync (&ehci->watchdog);
703
704 spin_lock_irq(&ehci->lock);
705 if (HC_IS_RUNNING (hcd->state))
706 ehci_quiesce (ehci);
707
708 ehci_reset (ehci);
709 writel (0, &ehci->regs->intr_enable);
710 spin_unlock_irq(&ehci->lock);
711
712 /* let companion controllers work when we aren't */
713 writel (0, &ehci->regs->configured_flag);
714 unregister_reboot_notifier (&ehci->reboot_notifier);
715
716 remove_debug_files (ehci);
717
718 /* root hub is shut down separately (first, when possible) */
719 spin_lock_irq (&ehci->lock);
720 if (ehci->async)
721 ehci_work (ehci, NULL);
722 spin_unlock_irq (&ehci->lock);
723 ehci_mem_cleanup (ehci);
724
725#ifdef EHCI_STATS
726 ehci_dbg (ehci, "irq normal %ld err %ld reclaim %ld (lost %ld)\n",
727 ehci->stats.normal, ehci->stats.error, ehci->stats.reclaim,
728 ehci->stats.lost_iaa);
729 ehci_dbg (ehci, "complete %ld unlink %ld\n",
730 ehci->stats.complete, ehci->stats.unlink);
731#endif
732
733 dbg_status (ehci, "ehci_stop completed", readl (&ehci->regs->status));
734}
735
736static int ehci_get_frame (struct usb_hcd *hcd)
737{
738 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
739 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
740}
741
742/*-------------------------------------------------------------------------*/
743
744#ifdef CONFIG_PM
745
746/* suspend/resume, section 4.3 */
747
748/* These routines rely on the bus (pci, platform, etc)
749 * to handle powerdown and wakeup, and currently also on
750 * transceivers that don't need any software attention to set up
751 * the right sort of wakeup.
752 */
753
754static int ehci_suspend (struct usb_hcd *hcd, pm_message_t message)
755{
756 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
757
758 if (time_before (jiffies, ehci->next_statechange))
759 msleep (100);
760
761#ifdef CONFIG_USB_SUSPEND
762 (void) usb_suspend_device (hcd->self.root_hub);
763#else
764 usb_lock_device (hcd->self.root_hub);
765 (void) ehci_hub_suspend (hcd);
766 usb_unlock_device (hcd->self.root_hub);
767#endif
768
769 // save (PCI) FLADJ in case of Vaux power loss
770 // ... we'd only use it to handle clock skew
771
772 return 0;
773}
774
775static int ehci_resume (struct usb_hcd *hcd)
776{
777 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
778 unsigned port;
779 struct usb_device *root = hcd->self.root_hub;
780 int retval = -EINVAL;
781
782 // maybe restore (PCI) FLADJ
783
784 if (time_before (jiffies, ehci->next_statechange))
785 msleep (100);
786
787 /* If any port is suspended (or owned by the companion),
788 * we know we can/must resume the HC (and mustn't reset it).
789 */
790 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
791 u32 status;
792 port--;
793 status = readl (&ehci->regs->port_status [port]);
794 if (!(status & PORT_POWER))
795 continue;
796 if (status & (PORT_SUSPEND | PORT_OWNER)) {
797 down (&hcd->self.root_hub->serialize);
798 retval = ehci_hub_resume (hcd);
799 up (&hcd->self.root_hub->serialize);
800 break;
801 }
802 if (!root->children [port])
803 continue;
804 dbg_port (ehci, __FUNCTION__, port + 1, status);
805 usb_set_device_state (root->children[port],
806 USB_STATE_NOTATTACHED);
807 }
808
809 /* Else reset, to cope with power loss or flush-to-storage
810 * style "resume" having activated BIOS during reboot.
811 */
812 if (port == 0) {
813 (void) ehci_halt (ehci);
814 (void) ehci_reset (ehci);
815 (void) ehci_hc_reset (hcd);
816
817 /* emptying the schedule aborts any urbs */
818 spin_lock_irq (&ehci->lock);
819 if (ehci->reclaim)
820 ehci->reclaim_ready = 1;
821 ehci_work (ehci, NULL);
822 spin_unlock_irq (&ehci->lock);
823
824 /* restart; khubd will disconnect devices */
825 retval = ehci_start (hcd);
826
827 /* here we "know" root ports should always stay powered;
828 * but some controllers may lose all power.
829 */
830 ehci_port_power (ehci, 1);
831 }
832
833 return retval;
834}
835
836#endif
837
838/*-------------------------------------------------------------------------*/
839
840/*
841 * ehci_work is called from some interrupts, timers, and so on.
842 * it calls driver completion functions, after dropping ehci->lock.
843 */
844static void ehci_work (struct ehci_hcd *ehci, struct pt_regs *regs)
845{
846 timer_action_done (ehci, TIMER_IO_WATCHDOG);
847 if (ehci->reclaim_ready)
848 end_unlink_async (ehci, regs);
849
850 /* another CPU may drop ehci->lock during a schedule scan while
851 * it reports urb completions. this flag guards against bogus
852 * attempts at re-entrant schedule scanning.
853 */
854 if (ehci->scanning)
855 return;
856 ehci->scanning = 1;
857 scan_async (ehci, regs);
858 if (ehci->next_uframe != -1)
859 scan_periodic (ehci, regs);
860 ehci->scanning = 0;
861
862 /* the IO watchdog guards against hardware or driver bugs that
863 * misplace IRQs, and should let us run completely without IRQs.
864 * such lossage has been observed on both VT6202 and VT8235.
865 */
866 if (HC_IS_RUNNING (ehci_to_hcd(ehci)->state) &&
867 (ehci->async->qh_next.ptr != NULL ||
868 ehci->periodic_sched != 0))
869 timer_action (ehci, TIMER_IO_WATCHDOG);
870}
871
872/*-------------------------------------------------------------------------*/ 565/*-------------------------------------------------------------------------*/
873 566
874static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs) 567static irqreturn_t ehci_irq (struct usb_hcd *hcd, struct pt_regs *regs)
@@ -1179,106 +872,24 @@ done:
1179 return; 872 return;
1180} 873}
1181 874
1182/*-------------------------------------------------------------------------*/ 875static int ehci_get_frame (struct usb_hcd *hcd)
1183 876{
1184static const struct hc_driver ehci_driver = { 877 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
1185 .description = hcd_name, 878 return (readl (&ehci->regs->frame_index) >> 3) % ehci->periodic_size;
1186 .product_desc = "EHCI Host Controller", 879}
1187 .hcd_priv_size = sizeof(struct ehci_hcd),
1188
1189 /*
1190 * generic hardware linkage
1191 */
1192 .irq = ehci_irq,
1193 .flags = HCD_MEMORY | HCD_USB2,
1194
1195 /*
1196 * basic lifecycle operations
1197 */
1198 .reset = ehci_hc_reset,
1199 .start = ehci_start,
1200#ifdef CONFIG_PM
1201 .suspend = ehci_suspend,
1202 .resume = ehci_resume,
1203#endif
1204 .stop = ehci_stop,
1205
1206 /*
1207 * managing i/o requests and associated device resources
1208 */
1209 .urb_enqueue = ehci_urb_enqueue,
1210 .urb_dequeue = ehci_urb_dequeue,
1211 .endpoint_disable = ehci_endpoint_disable,
1212
1213 /*
1214 * scheduling support
1215 */
1216 .get_frame_number = ehci_get_frame,
1217
1218 /*
1219 * root hub support
1220 */
1221 .hub_status_data = ehci_hub_status_data,
1222 .hub_control = ehci_hub_control,
1223 .hub_suspend = ehci_hub_suspend,
1224 .hub_resume = ehci_hub_resume,
1225};
1226 880
1227/*-------------------------------------------------------------------------*/ 881/*-------------------------------------------------------------------------*/
1228 882
1229/* EHCI 1.0 doesn't require PCI */
1230
1231#ifdef CONFIG_PCI
1232
1233/* PCI driver selection metadata; PCI hotplugging uses this */
1234static const struct pci_device_id pci_ids [] = { {
1235 /* handle any USB 2.0 EHCI controller */
1236 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
1237 .driver_data = (unsigned long) &ehci_driver,
1238 },
1239 { /* end: all zeroes */ }
1240};
1241MODULE_DEVICE_TABLE (pci, pci_ids);
1242
1243/* pci driver glue; this is a "new style" PCI driver module */
1244static struct pci_driver ehci_pci_driver = {
1245 .name = (char *) hcd_name,
1246 .id_table = pci_ids,
1247
1248 .probe = usb_hcd_pci_probe,
1249 .remove = usb_hcd_pci_remove,
1250
1251#ifdef CONFIG_PM
1252 .suspend = usb_hcd_pci_suspend,
1253 .resume = usb_hcd_pci_resume,
1254#endif
1255};
1256
1257#endif /* PCI */
1258
1259
1260#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC 883#define DRIVER_INFO DRIVER_VERSION " " DRIVER_DESC
1261 884
1262MODULE_DESCRIPTION (DRIVER_INFO); 885MODULE_DESCRIPTION (DRIVER_INFO);
1263MODULE_AUTHOR (DRIVER_AUTHOR); 886MODULE_AUTHOR (DRIVER_AUTHOR);
1264MODULE_LICENSE ("GPL"); 887MODULE_LICENSE ("GPL");
1265 888
1266static int __init init (void) 889#ifdef CONFIG_PCI
1267{ 890#include "ehci-pci.c"
1268 if (usb_disabled()) 891#endif
1269 return -ENODEV;
1270
1271 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
1272 hcd_name,
1273 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
1274 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
1275
1276 return pci_register_driver (&ehci_pci_driver);
1277}
1278module_init (init);
1279 892
1280static void __exit cleanup (void) 893#if !defined(CONFIG_PCI)
1281{ 894#error "missing bus glue for ehci-hcd"
1282 pci_unregister_driver (&ehci_pci_driver); 895#endif
1283}
1284module_exit (cleanup);
diff --git a/drivers/usb/host/ehci-pci.c b/drivers/usb/host/ehci-pci.c
new file mode 100644
index 000000000000..66ebf75b2037
--- /dev/null
+++ b/drivers/usb/host/ehci-pci.c
@@ -0,0 +1,414 @@
1/*
2 * EHCI HCD (Host Controller Driver) PCI Bus Glue.
3 *
4 * Copyright (c) 2000-2004 by David Brownell
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful, but
12 * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
13 * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 * for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software Foundation,
18 * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#ifndef CONFIG_PCI
22#error "This file is PCI bus glue. CONFIG_PCI must be defined."
23#endif
24
25/*-------------------------------------------------------------------------*/
26
27/* EHCI 0.96 (and later) section 5.1 says how to kick BIOS/SMM/...
28 * off the controller (maybe it can boot from highspeed USB disks).
29 */
30static int bios_handoff (struct ehci_hcd *ehci, int where, u32 cap)
31{
32 struct pci_dev *pdev = to_pci_dev(ehci_to_hcd(ehci)->self.controller);
33
34 /* always say Linux will own the hardware */
35 pci_write_config_byte(pdev, where + 3, 1);
36
37 /* maybe wait a while for BIOS to respond */
38 if (cap & (1 << 16)) {
39 int msec = 5000;
40
41 do {
42 msleep(10);
43 msec -= 10;
44 pci_read_config_dword(pdev, where, &cap);
45 } while ((cap & (1 << 16)) && msec);
46 if (cap & (1 << 16)) {
47 ehci_err(ehci, "BIOS handoff failed (%d, %08x)\n",
48 where, cap);
49 // some BIOS versions seem buggy...
50 // return 1;
51 ehci_warn (ehci, "continuing after BIOS bug...\n");
52 /* disable all SMIs, and clear "BIOS owns" flag */
53 pci_write_config_dword(pdev, where + 4, 0);
54 pci_write_config_byte(pdev, where + 2, 0);
55 } else
56 ehci_dbg(ehci, "BIOS handoff succeeded\n");
57 }
58 return 0;
59}
60
61/* called by khubd or root hub init threads */
62static int ehci_pci_reset (struct usb_hcd *hcd)
63{
64 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
65 u32 temp;
66 unsigned count = 256/4;
67
68 spin_lock_init (&ehci->lock);
69
70 ehci->caps = hcd->regs;
71 ehci->regs = hcd->regs + HC_LENGTH (readl (&ehci->caps->hc_capbase));
72 dbg_hcs_params (ehci, "reset");
73 dbg_hcc_params (ehci, "reset");
74
75 /* cache this readonly data; minimize chip reads */
76 ehci->hcs_params = readl (&ehci->caps->hcs_params);
77
78 if (hcd->self.controller->bus == &pci_bus_type) {
79 struct pci_dev *pdev = to_pci_dev(hcd->self.controller);
80
81 switch (pdev->vendor) {
82 case PCI_VENDOR_ID_TDI:
83 if (pdev->device == PCI_DEVICE_ID_TDI_EHCI) {
84 ehci->is_tdi_rh_tt = 1;
85 tdi_reset (ehci);
86 }
87 break;
88 case PCI_VENDOR_ID_AMD:
89 /* AMD8111 EHCI doesn't work, according to AMD errata */
90 if (pdev->device == 0x7463) {
91 ehci_info (ehci, "ignoring AMD8111 (errata)\n");
92 return -EIO;
93 }
94 break;
95 case PCI_VENDOR_ID_NVIDIA:
96 /* NVidia reports that certain chips don't handle
97 * QH, ITD, or SITD addresses above 2GB. (But TD,
98 * data buffer, and periodic schedule are normal.)
99 */
100 switch (pdev->device) {
101 case 0x003c: /* MCP04 */
102 case 0x005b: /* CK804 */
103 case 0x00d8: /* CK8 */
104 case 0x00e8: /* CK8S */
105 if (pci_set_consistent_dma_mask(pdev,
106 DMA_31BIT_MASK) < 0)
107 ehci_warn (ehci, "can't enable NVidia "
108 "workaround for >2GB RAM\n");
109 break;
110 }
111 break;
112 }
113
114 /* optional debug port, normally in the first BAR */
115 temp = pci_find_capability (pdev, 0x0a);
116 if (temp) {
117 pci_read_config_dword(pdev, temp, &temp);
118 temp >>= 16;
119 if ((temp & (3 << 13)) == (1 << 13)) {
120 temp &= 0x1fff;
121 ehci->debug = hcd->regs + temp;
122 temp = readl (&ehci->debug->control);
123 ehci_info (ehci, "debug port %d%s\n",
124 HCS_DEBUG_PORT(ehci->hcs_params),
125 (temp & DBGP_ENABLED)
126 ? " IN USE"
127 : "");
128 if (!(temp & DBGP_ENABLED))
129 ehci->debug = NULL;
130 }
131 }
132
133 temp = HCC_EXT_CAPS (readl (&ehci->caps->hcc_params));
134 } else
135 temp = 0;
136
137 /* EHCI 0.96 and later may have "extended capabilities" */
138 while (temp && count--) {
139 u32 cap;
140
141 pci_read_config_dword (to_pci_dev(hcd->self.controller),
142 temp, &cap);
143 ehci_dbg (ehci, "capability %04x at %02x\n", cap, temp);
144 switch (cap & 0xff) {
145 case 1: /* BIOS/SMM/... handoff */
146 if (bios_handoff (ehci, temp, cap) != 0)
147 return -EOPNOTSUPP;
148 break;
149 case 0: /* illegal reserved capability */
150 ehci_warn (ehci, "illegal capability!\n");
151 cap = 0;
152 /* FALLTHROUGH */
153 default: /* unknown */
154 break;
155 }
156 temp = (cap >> 8) & 0xff;
157 }
158 if (!count) {
159 ehci_err (ehci, "bogus capabilities ... PCI problems!\n");
160 return -EIO;
161 }
162 if (ehci_is_TDI(ehci))
163 ehci_reset (ehci);
164
165 ehci_port_power (ehci, 0);
166
167 /* at least the Genesys GL880S needs fixup here */
168 temp = HCS_N_CC(ehci->hcs_params) * HCS_N_PCC(ehci->hcs_params);
169 temp &= 0x0f;
170 if (temp && HCS_N_PORTS(ehci->hcs_params) > temp) {
171 ehci_dbg (ehci, "bogus port configuration: "
172 "cc=%d x pcc=%d < ports=%d\n",
173 HCS_N_CC(ehci->hcs_params),
174 HCS_N_PCC(ehci->hcs_params),
175 HCS_N_PORTS(ehci->hcs_params));
176
177 if (hcd->self.controller->bus == &pci_bus_type) {
178 struct pci_dev *pdev;
179
180 pdev = to_pci_dev(hcd->self.controller);
181 switch (pdev->vendor) {
182 case 0x17a0: /* GENESYS */
183 /* GL880S: should be PORTS=2 */
184 temp |= (ehci->hcs_params & ~0xf);
185 ehci->hcs_params = temp;
186 break;
187 case PCI_VENDOR_ID_NVIDIA:
188 /* NF4: should be PCC=10 */
189 break;
190 }
191 }
192 }
193
194 /* force HC to halt state */
195 return ehci_halt (ehci);
196}
197
198static int ehci_pci_start (struct usb_hcd *hcd)
199{
200 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
201 int result = 0;
202
203 if (hcd->self.controller->bus == &pci_bus_type) {
204 struct pci_dev *pdev;
205 u16 port_wake;
206
207 pdev = to_pci_dev(hcd->self.controller);
208
209 /* Serial Bus Release Number is at PCI 0x60 offset */
210 pci_read_config_byte(pdev, 0x60, &ehci->sbrn);
211
212 /* port wake capability, reported by boot firmware */
213 pci_read_config_word(pdev, 0x62, &port_wake);
214 hcd->can_wakeup = (port_wake & 1) != 0;
215
216 /* help hc dma work well with cachelines */
217 result = pci_set_mwi(pdev);
218 if (result)
219 ehci_dbg(ehci, "unable to enable MWI - not fatal.\n");
220 }
221
222 return ehci_run (hcd);
223}
224
225/* always called by thread; normally rmmod */
226
227static void ehci_pci_stop (struct usb_hcd *hcd)
228{
229 ehci_stop (hcd);
230}
231
232/*-------------------------------------------------------------------------*/
233
234#ifdef CONFIG_PM
235
236/* suspend/resume, section 4.3 */
237
238/* These routines rely on the bus (pci, platform, etc)
239 * to handle powerdown and wakeup, and currently also on
240 * transceivers that don't need any software attention to set up
241 * the right sort of wakeup.
242 */
243
244static int ehci_pci_suspend (struct usb_hcd *hcd, pm_message_t message)
245{
246 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
247
248 if (time_before (jiffies, ehci->next_statechange))
249 msleep (100);
250
251#ifdef CONFIG_USB_SUSPEND
252 (void) usb_suspend_device (hcd->self.root_hub);
253#else
254 usb_lock_device (hcd->self.root_hub);
255 (void) ehci_hub_suspend (hcd);
256 usb_unlock_device (hcd->self.root_hub);
257#endif
258
259 // save (PCI) FLADJ in case of Vaux power loss
260 // ... we'd only use it to handle clock skew
261
262 return 0;
263}
264
265static int ehci_pci_resume (struct usb_hcd *hcd)
266{
267 struct ehci_hcd *ehci = hcd_to_ehci (hcd);
268 unsigned port;
269 struct usb_device *root = hcd->self.root_hub;
270 int retval = -EINVAL;
271
272 // maybe restore (PCI) FLADJ
273
274 if (time_before (jiffies, ehci->next_statechange))
275 msleep (100);
276
277 /* If any port is suspended (or owned by the companion),
278 * we know we can/must resume the HC (and mustn't reset it).
279 */
280 for (port = HCS_N_PORTS (ehci->hcs_params); port > 0; ) {
281 u32 status;
282 port--;
283 status = readl (&ehci->regs->port_status [port]);
284 if (!(status & PORT_POWER))
285 continue;
286 if (status & (PORT_SUSPEND | PORT_OWNER)) {
287 down (&hcd->self.root_hub->serialize);
288 retval = ehci_hub_resume (hcd);
289 up (&hcd->self.root_hub->serialize);
290 break;
291 }
292 if (!root->children [port])
293 continue;
294 dbg_port (ehci, __FUNCTION__, port + 1, status);
295 usb_set_device_state (root->children[port],
296 USB_STATE_NOTATTACHED);
297 }
298
299 /* Else reset, to cope with power loss or flush-to-storage
300 * style "resume" having activated BIOS during reboot.
301 */
302 if (port == 0) {
303 (void) ehci_halt (ehci);
304 (void) ehci_reset (ehci);
305 (void) ehci_pci_reset (hcd);
306
307 /* emptying the schedule aborts any urbs */
308 spin_lock_irq (&ehci->lock);
309 if (ehci->reclaim)
310 ehci->reclaim_ready = 1;
311 ehci_work (ehci, NULL);
312 spin_unlock_irq (&ehci->lock);
313
314 /* restart; khubd will disconnect devices */
315 retval = ehci_run (hcd);
316
317 /* here we "know" root ports should always stay powered;
318 * but some controllers may lose all power.
319 */
320 ehci_port_power (ehci, 1);
321 }
322
323 return retval;
324}
325#endif
326
327static const struct hc_driver ehci_pci_hc_driver = {
328 .description = hcd_name,
329 .product_desc = "EHCI Host Controller",
330 .hcd_priv_size = sizeof(struct ehci_hcd),
331
332 /*
333 * generic hardware linkage
334 */
335 .irq = ehci_irq,
336 .flags = HCD_MEMORY | HCD_USB2,
337
338 /*
339 * basic lifecycle operations
340 */
341 .reset = ehci_pci_reset,
342 .start = ehci_pci_start,
343#ifdef CONFIG_PM
344 .suspend = ehci_pci_suspend,
345 .resume = ehci_pci_resume,
346#endif
347 .stop = ehci_pci_stop,
348
349 /*
350 * managing i/o requests and associated device resources
351 */
352 .urb_enqueue = ehci_urb_enqueue,
353 .urb_dequeue = ehci_urb_dequeue,
354 .endpoint_disable = ehci_endpoint_disable,
355
356 /*
357 * scheduling support
358 */
359 .get_frame_number = ehci_get_frame,
360
361 /*
362 * root hub support
363 */
364 .hub_status_data = ehci_hub_status_data,
365 .hub_control = ehci_hub_control,
366 .hub_suspend = ehci_hub_suspend,
367 .hub_resume = ehci_hub_resume,
368};
369
370/*-------------------------------------------------------------------------*/
371
372/* PCI driver selection metadata; PCI hotplugging uses this */
373static const struct pci_device_id pci_ids [] = { {
374 /* handle any USB 2.0 EHCI controller */
375 PCI_DEVICE_CLASS(((PCI_CLASS_SERIAL_USB << 8) | 0x20), ~0),
376 .driver_data = (unsigned long) &ehci_pci_hc_driver,
377 },
378 { /* end: all zeroes */ }
379};
380MODULE_DEVICE_TABLE (pci, pci_ids);
381
382/* pci driver glue; this is a "new style" PCI driver module */
383static struct pci_driver ehci_pci_driver = {
384 .name = (char *) hcd_name,
385 .id_table = pci_ids,
386
387 .probe = usb_hcd_pci_probe,
388 .remove = usb_hcd_pci_remove,
389
390#ifdef CONFIG_PM
391 .suspend = usb_hcd_pci_suspend,
392 .resume = usb_hcd_pci_resume,
393#endif
394};
395
396static int __init ehci_hcd_pci_init (void)
397{
398 if (usb_disabled())
399 return -ENODEV;
400
401 pr_debug ("%s: block sizes: qh %Zd qtd %Zd itd %Zd sitd %Zd\n",
402 hcd_name,
403 sizeof (struct ehci_qh), sizeof (struct ehci_qtd),
404 sizeof (struct ehci_itd), sizeof (struct ehci_sitd));
405
406 return pci_register_driver (&ehci_pci_driver);
407}
408module_init (ehci_hcd_pci_init);
409
410static void __exit ehci_hcd_pci_cleanup (void)
411{
412 pci_unregister_driver (&ehci_pci_driver);
413}
414module_exit (ehci_hcd_pci_cleanup);
diff --git a/drivers/usb/host/ehci.h b/drivers/usb/host/ehci.h
index f34a0516d35f..18e257c2bdb5 100644
--- a/drivers/usb/host/ehci.h
+++ b/drivers/usb/host/ehci.h
@@ -97,6 +97,7 @@ struct ehci_hcd { /* one per controller */
97#else 97#else
98# define COUNT(x) do {} while (0) 98# define COUNT(x) do {} while (0)
99#endif 99#endif
100 u8 sbrn; /* packed release number */
100}; 101};
101 102
102/* convert between an HCD pointer and the corresponding EHCI_HCD */ 103/* convert between an HCD pointer and the corresponding EHCI_HCD */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-19 02:11:42 -0500