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authorRussell King <rmk+kernel@arm.linux.org.uk>2010-01-17 11:20:56 -0500
committerRussell King <rmk+kernel@arm.linux.org.uk>2010-05-02 04:35:36 -0400
commit6be4826e37122b25cb10b215fc84c3a0b1fe1402 (patch)
tree4aad2c701f4b516e3bb75d23c11e0f4380d760cb
parent5a46334ac688fb538b335599e1ff3b6cfaf769e9 (diff)
ARM: Integrator: move 16-bit timer support to Integrator/AP
Only Integrator/AP has 16-bit timers, so move the support into the Integrator/AP specific support files. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat
-rw-r--r--arch/arm/mach-integrator/common.h1
-rw-r--r--arch/arm/mach-integrator/core.c157
-rw-r--r--arch/arm/mach-integrator/integrator_ap.c158
-rw-r--r--arch/arm/mach-integrator/integrator_cp.c2
4 files changed, 155 insertions, 163 deletions
diff --git a/arch/arm/mach-integrator/common.h b/arch/arm/mach-integrator/common.h
deleted file mode 100644
index cdbe71091516..000000000000
--- a/arch/arm/mach-integrator/common.h
+++ /dev/null
@@ -1 +0,0 @@
1extern void integrator_time_init(u32, unsigned int);
diff --git a/arch/arm/mach-integrator/core.c b/arch/arm/mach-integrator/core.c
index ac2b0c5c991b..b02cfc06e0ae 100644
--- a/arch/arm/mach-integrator/core.c
+++ b/arch/arm/mach-integrator/core.c
@@ -19,8 +19,6 @@
19#include <linux/termios.h> 19#include <linux/termios.h>
20#include <linux/amba/bus.h> 20#include <linux/amba/bus.h>
21#include <linux/amba/serial.h> 21#include <linux/amba/serial.h>
22#include <linux/clocksource.h>
23#include <linux/clockchips.h>
24#include <linux/io.h> 22#include <linux/io.h>
25 23
26#include <asm/clkdev.h> 24#include <asm/clkdev.h>
@@ -28,14 +26,11 @@
28#include <mach/hardware.h> 26#include <mach/hardware.h>
29#include <mach/platform.h> 27#include <mach/platform.h>
30#include <asm/irq.h> 28#include <asm/irq.h>
31#include <asm/hardware/arm_timer.h>
32#include <mach/cm.h> 29#include <mach/cm.h>
33#include <asm/system.h> 30#include <asm/system.h>
34#include <asm/leds.h> 31#include <asm/leds.h>
35#include <asm/mach/time.h> 32#include <asm/mach/time.h>
36 33
37#include "common.h"
38
39static struct amba_pl010_data integrator_uart_data; 34static struct amba_pl010_data integrator_uart_data;
40 35
41static struct amba_device rtc_device = { 36static struct amba_device rtc_device = {
@@ -220,155 +215,3 @@ void cm_control(u32 mask, u32 set)
220} 215}
221 216
222EXPORT_SYMBOL(cm_control); 217EXPORT_SYMBOL(cm_control);
223
224/*
225 * Where is the timer (VA)?
226 */
227#define TIMER0_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER0_BASE)
228#define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE)
229#define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE)
230
231/*
232 * How long is the timer interval?
233 */
234#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
235#if TIMER_INTERVAL >= 0x100000
236#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
237#elif TIMER_INTERVAL >= 0x10000
238#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
239#else
240#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
241#endif
242
243static unsigned long timer_reload;
244
245static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
246
247static cycle_t timersp_read(struct clocksource *cs)
248{
249 return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
250}
251
252static struct clocksource clocksource_timersp = {
253 .name = "timer2",
254 .rating = 200,
255 .read = timersp_read,
256 .mask = CLOCKSOURCE_MASK(16),
257 .shift = 16,
258 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
259};
260
261static void integrator_clocksource_init(u32 khz)
262{
263 struct clocksource *cs = &clocksource_timersp;
264 void __iomem *base = clksrc_base;
265 u32 ctrl = TIMER_CTRL_ENABLE;
266
267 if (khz >= 1500) {
268 khz /= 16;
269 ctrl = TIMER_CTRL_DIV16;
270 }
271
272 writel(ctrl, base + TIMER_CTRL);
273 writel(0xffff, base + TIMER_LOAD);
274
275 cs->mult = clocksource_khz2mult(khz, cs->shift);
276 clocksource_register(cs);
277}
278
279static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
280
281/*
282 * IRQ handler for the timer
283 */
284static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
285{
286 struct clock_event_device *evt = dev_id;
287
288 /* clear the interrupt */
289 writel(1, clkevt_base + TIMER_INTCLR);
290
291 evt->event_handler(evt);
292
293 return IRQ_HANDLED;
294}
295
296static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
297{
298 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
299
300 BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
301
302 if (mode == CLOCK_EVT_MODE_PERIODIC) {
303 writel(ctrl, clkevt_base + TIMER_CTRL);
304 writel(timer_reload, clkevt_base + TIMER_LOAD);
305 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
306 }
307
308 writel(ctrl, clkevt_base + TIMER_CTRL);
309}
310
311static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
312{
313 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
314
315 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
316 writel(next, clkevt_base + TIMER_LOAD);
317 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
318
319 return 0;
320}
321
322static struct clock_event_device integrator_clockevent = {
323 .name = "timer1",
324 .shift = 34,
325 .features = CLOCK_EVT_FEAT_PERIODIC,
326 .set_mode = clkevt_set_mode,
327 .set_next_event = clkevt_set_next_event,
328 .rating = 300,
329 .cpumask = cpu_all_mask,
330};
331
332static struct irqaction integrator_timer_irq = {
333 .name = "timer",
334 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
335 .handler = integrator_timer_interrupt,
336 .dev_id = &integrator_clockevent,
337};
338
339static void integrator_clockevent_init(u32 khz, unsigned int ctrl)
340{
341 struct clock_event_device *evt = &integrator_clockevent;
342
343 if (khz * 1000 > 0x100000 * HZ) {
344 khz /= 256;
345 ctrl |= TIMER_CTRL_DIV256;
346 } else if (khz * 1000 > 0x10000 * HZ) {
347 khz /= 16;
348 ctrl |= TIMER_CTRL_DIV16;
349 }
350
351 timer_reload = khz * 1000 / HZ;
352 writel(ctrl, clkevt_base + TIMER_CTRL);
353
354 evt->irq = IRQ_TIMERINT1;
355 evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
356 evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
357 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
358
359 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
360 clockevents_register_device(evt);
361}
362
363/*
364 * Set up timer(s).
365 */
366void __init integrator_time_init(u32 khz, unsigned int ctrl)
367{
368 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
369 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
370 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
371
372 integrator_clocksource_init(khz);
373 integrator_clockevent_init(khz, ctrl);
374}
diff --git a/arch/arm/mach-integrator/integrator_ap.c b/arch/arm/mach-integrator/integrator_ap.c
index c89b231898e6..227cf4d05088 100644
--- a/arch/arm/mach-integrator/integrator_ap.c
+++ b/arch/arm/mach-integrator/integrator_ap.c
@@ -27,10 +27,14 @@
27#include <linux/sysdev.h> 27#include <linux/sysdev.h>
28#include <linux/amba/bus.h> 28#include <linux/amba/bus.h>
29#include <linux/amba/kmi.h> 29#include <linux/amba/kmi.h>
30#include <linux/clocksource.h>
31#include <linux/clockchips.h>
32#include <linux/interrupt.h>
30#include <linux/io.h> 33#include <linux/io.h>
31 34
32#include <mach/hardware.h> 35#include <mach/hardware.h>
33#include <mach/platform.h> 36#include <mach/platform.h>
37#include <asm/hardware/arm_timer.h>
34#include <asm/irq.h> 38#include <asm/irq.h>
35#include <asm/setup.h> 39#include <asm/setup.h>
36#include <asm/param.h> /* HZ */ 40#include <asm/param.h> /* HZ */
@@ -44,8 +48,6 @@
44#include <asm/mach/map.h> 48#include <asm/mach/map.h>
45#include <asm/mach/time.h> 49#include <asm/mach/time.h>
46 50
47#include "common.h"
48
49/* 51/*
50 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx 52 * All IO addresses are mapped onto VA 0xFFFx.xxxx, where x.xxxx
51 * is the (PA >> 12). 53 * is the (PA >> 12).
@@ -335,9 +337,159 @@ static void __init ap_init(void)
335 } 337 }
336} 338}
337 339
340/*
341 * Where is the timer (VA)?
342 */
343#define TIMER0_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER0_BASE)
344#define TIMER1_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER1_BASE)
345#define TIMER2_VA_BASE IO_ADDRESS(INTEGRATOR_TIMER2_BASE)
346
347/*
348 * How long is the timer interval?
349 */
350#define TIMER_INTERVAL (TICKS_PER_uSEC * mSEC_10)
351#if TIMER_INTERVAL >= 0x100000
352#define TICKS2USECS(x) (256 * (x) / TICKS_PER_uSEC)
353#elif TIMER_INTERVAL >= 0x10000
354#define TICKS2USECS(x) (16 * (x) / TICKS_PER_uSEC)
355#else
356#define TICKS2USECS(x) ((x) / TICKS_PER_uSEC)
357#endif
358
359static unsigned long timer_reload;
360
361static void __iomem * const clksrc_base = (void __iomem *)TIMER2_VA_BASE;
362
363static cycle_t timersp_read(struct clocksource *cs)
364{
365 return ~(readl(clksrc_base + TIMER_VALUE) & 0xffff);
366}
367
368static struct clocksource clocksource_timersp = {
369 .name = "timer2",
370 .rating = 200,
371 .read = timersp_read,
372 .mask = CLOCKSOURCE_MASK(16),
373 .shift = 16,
374 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
375};
376
377static void integrator_clocksource_init(u32 khz)
378{
379 struct clocksource *cs = &clocksource_timersp;
380 void __iomem *base = clksrc_base;
381 u32 ctrl = TIMER_CTRL_ENABLE;
382
383 if (khz >= 1500) {
384 khz /= 16;
385 ctrl = TIMER_CTRL_DIV16;
386 }
387
388 writel(ctrl, base + TIMER_CTRL);
389 writel(0xffff, base + TIMER_LOAD);
390
391 cs->mult = clocksource_khz2mult(khz, cs->shift);
392 clocksource_register(cs);
393}
394
395static void __iomem * const clkevt_base = (void __iomem *)TIMER1_VA_BASE;
396
397/*
398 * IRQ handler for the timer
399 */
400static irqreturn_t integrator_timer_interrupt(int irq, void *dev_id)
401{
402 struct clock_event_device *evt = dev_id;
403
404 /* clear the interrupt */
405 writel(1, clkevt_base + TIMER_INTCLR);
406
407 evt->event_handler(evt);
408
409 return IRQ_HANDLED;
410}
411
412static void clkevt_set_mode(enum clock_event_mode mode, struct clock_event_device *evt)
413{
414 u32 ctrl = readl(clkevt_base + TIMER_CTRL) & ~TIMER_CTRL_ENABLE;
415
416 BUG_ON(mode == CLOCK_EVT_MODE_ONESHOT);
417
418 if (mode == CLOCK_EVT_MODE_PERIODIC) {
419 writel(ctrl, clkevt_base + TIMER_CTRL);
420 writel(timer_reload, clkevt_base + TIMER_LOAD);
421 ctrl |= TIMER_CTRL_PERIODIC | TIMER_CTRL_ENABLE;
422 }
423
424 writel(ctrl, clkevt_base + TIMER_CTRL);
425}
426
427static int clkevt_set_next_event(unsigned long next, struct clock_event_device *evt)
428{
429 unsigned long ctrl = readl(clkevt_base + TIMER_CTRL);
430
431 writel(ctrl & ~TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
432 writel(next, clkevt_base + TIMER_LOAD);
433 writel(ctrl | TIMER_CTRL_ENABLE, clkevt_base + TIMER_CTRL);
434
435 return 0;
436}
437
438static struct clock_event_device integrator_clockevent = {
439 .name = "timer1",
440 .shift = 34,
441 .features = CLOCK_EVT_FEAT_PERIODIC,
442 .set_mode = clkevt_set_mode,
443 .set_next_event = clkevt_set_next_event,
444 .rating = 300,
445 .cpumask = cpu_all_mask,
446};
447
448static struct irqaction integrator_timer_irq = {
449 .name = "timer",
450 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
451 .handler = integrator_timer_interrupt,
452 .dev_id = &integrator_clockevent,
453};
454
455static void integrator_clockevent_init(u32 khz)
456{
457 struct clock_event_device *evt = &integrator_clockevent;
458 unsigned int ctrl = 0;
459
460 if (khz * 1000 > 0x100000 * HZ) {
461 khz /= 256;
462 ctrl |= TIMER_CTRL_DIV256;
463 } else if (khz * 1000 > 0x10000 * HZ) {
464 khz /= 16;
465 ctrl |= TIMER_CTRL_DIV16;
466 }
467
468 timer_reload = khz * 1000 / HZ;
469 writel(ctrl, clkevt_base + TIMER_CTRL);
470
471 evt->irq = IRQ_TIMERINT1;
472 evt->mult = div_sc(khz, NSEC_PER_MSEC, evt->shift);
473 evt->max_delta_ns = clockevent_delta2ns(0xffff, evt);
474 evt->min_delta_ns = clockevent_delta2ns(0xf, evt);
475
476 setup_irq(IRQ_TIMERINT1, &integrator_timer_irq);
477 clockevents_register_device(evt);
478}
479
480/*
481 * Set up timer(s).
482 */
338static void __init ap_init_timer(void) 483static void __init ap_init_timer(void)
339{ 484{
340 integrator_time_init(TICKS_PER_uSEC * 1000, 0); 485 u32 khz = TICKS_PER_uSEC * 1000;
486
487 writel(0, TIMER0_VA_BASE + TIMER_CTRL);
488 writel(0, TIMER1_VA_BASE + TIMER_CTRL);
489 writel(0, TIMER2_VA_BASE + TIMER_CTRL);
490
491 integrator_clocksource_init(khz);
492 integrator_clockevent_init(khz);
341} 493}
342 494
343static struct sys_timer ap_timer = { 495static struct sys_timer ap_timer = {
diff --git a/arch/arm/mach-integrator/integrator_cp.c b/arch/arm/mach-integrator/integrator_cp.c
index a7575c431a22..5a5a8c1c087f 100644
--- a/arch/arm/mach-integrator/integrator_cp.c
+++ b/arch/arm/mach-integrator/integrator_cp.c
@@ -43,8 +43,6 @@
43 43
44#include <plat/timer-sp.h> 44#include <plat/timer-sp.h>
45 45
46#include "common.h"
47
48#define INTCP_PA_FLASH_BASE 0x24000000 46#define INTCP_PA_FLASH_BASE 0x24000000
49#define INTCP_FLASH_SIZE SZ_32M 47#define INTCP_FLASH_SIZE SZ_32M
50 48
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