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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2013-06-13 01:11:46 -0400
committerSimon Horman <horms+renesas@verge.net.au>2013-06-17 03:07:31 -0400
commit53332005bfde9d2e3c9a66030c0e8c2598eaa1d5 (patch)
tree51af67ad4692e9e6e958e63283aa8981c01a1b0a
parentb24bd7e97b3784afca6b808be1e5848e30e637ac (diff)
ARM: shmobile: Remove Bonito board support
Remove board support for the r8a7740 based Bonito board The r8a7740 SoC support code is still kept around since it is in use by the Armadillo800eva board which is basically a more recent board where the design is based on Bonito. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat
-rw-r--r--arch/arm/configs/bonito_defconfig72
-rw-r--r--arch/arm/mach-shmobile/Kconfig6
-rw-r--r--arch/arm/mach-shmobile/Makefile1
-rw-r--r--arch/arm/mach-shmobile/Makefile.boot1
-rw-r--r--arch/arm/mach-shmobile/board-bonito.c502
5 files changed, 0 insertions, 582 deletions
diff --git a/arch/arm/configs/bonito_defconfig b/arch/arm/configs/bonito_defconfig
deleted file mode 100644
index 54571082d920..000000000000
--- a/arch/arm/configs/bonito_defconfig
+++ /dev/null
@@ -1,72 +0,0 @@
1CONFIG_EXPERIMENTAL=y
2CONFIG_SYSVIPC=y
3CONFIG_IKCONFIG=y
4CONFIG_IKCONFIG_PROC=y
5CONFIG_LOG_BUF_SHIFT=16
6# CONFIG_UTS_NS is not set
7# CONFIG_IPC_NS is not set
8# CONFIG_USER_NS is not set
9# CONFIG_PID_NS is not set
10CONFIG_BLK_DEV_INITRD=y
11CONFIG_INITRAMFS_SOURCE=""
12CONFIG_CC_OPTIMIZE_FOR_SIZE=y
13CONFIG_SLAB=y
14CONFIG_MODULES=y
15CONFIG_MODULE_UNLOAD=y
16CONFIG_MODULE_FORCE_UNLOAD=y
17# CONFIG_BLK_DEV_BSG is not set
18# CONFIG_IOSCHED_DEADLINE is not set
19# CONFIG_IOSCHED_CFQ is not set
20CONFIG_ARCH_SHMOBILE=y
21CONFIG_ARCH_R8A7740=y
22CONFIG_MACH_BONITO=y
23# CONFIG_SH_TIMER_TMU is not set
24CONFIG_AEABI=y
25# CONFIG_OABI_COMPAT is not set
26CONFIG_FORCE_MAX_ZONEORDER=12
27CONFIG_ZBOOT_ROM_TEXT=0x0
28CONFIG_ZBOOT_ROM_BSS=0x0
29CONFIG_CMDLINE="console=ttySC5,115200 earlyprintk=sh-sci.5,115200 ignore_loglevel"
30CONFIG_KEXEC=y
31# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
32# CONFIG_SUSPEND is not set
33CONFIG_PM_RUNTIME=y
34CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
35# CONFIG_FIRMWARE_IN_KERNEL is not set
36CONFIG_MTD=y
37CONFIG_MTD_CHAR=y
38CONFIG_MTD_BLOCK=y
39CONFIG_MTD_CFI=y
40CONFIG_MTD_CFI_ADV_OPTIONS=y
41CONFIG_MTD_CFI_INTELEXT=y
42CONFIG_MTD_PHYSMAP=y
43CONFIG_MTD_ARM_INTEGRATOR=y
44CONFIG_MTD_BLOCK2MTD=y
45CONFIG_SCSI=y
46CONFIG_BLK_DEV_SD=y
47# CONFIG_SCSI_LOWLEVEL is not set
48# CONFIG_INPUT_KEYBOARD is not set
49# CONFIG_INPUT_MOUSE is not set
50# CONFIG_LEGACY_PTYS is not set
51CONFIG_SERIAL_SH_SCI=y
52CONFIG_SERIAL_SH_SCI_NR_UARTS=9
53CONFIG_SERIAL_SH_SCI_CONSOLE=y
54# CONFIG_HW_RANDOM is not set
55CONFIG_I2C=y
56CONFIG_I2C_CHARDEV=y
57CONFIG_I2C_SH_MOBILE=y
58CONFIG_GPIO_SYSFS=y
59# CONFIG_HWMON is not set
60# CONFIG_MFD_SUPPORT is not set
61# CONFIG_HID_SUPPORT is not set
62# CONFIG_USB_SUPPORT is not set
63CONFIG_UIO=y
64CONFIG_UIO_PDRV=y
65CONFIG_UIO_PDRV_GENIRQ=y
66# CONFIG_DNOTIFY is not set
67# CONFIG_INOTIFY_USER is not set
68CONFIG_TMPFS=y
69# CONFIG_MISC_FILESYSTEMS is not set
70# CONFIG_ENABLE_WARN_DEPRECATED is not set
71# CONFIG_ENABLE_MUST_CHECK is not set
72# CONFIG_ARM_UNWIND is not set
diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig
index ae1a530c3515..69a31bc07302 100644
--- a/arch/arm/mach-shmobile/Kconfig
+++ b/arch/arm/mach-shmobile/Kconfig
@@ -95,12 +95,6 @@ config MACH_KOTA2
95 select ARCH_REQUIRE_GPIOLIB 95 select ARCH_REQUIRE_GPIOLIB
96 select REGULATOR_FIXED_VOLTAGE if REGULATOR 96 select REGULATOR_FIXED_VOLTAGE if REGULATOR
97 97
98config MACH_BONITO
99 bool "bonito board"
100 depends on ARCH_R8A7740
101 select ARCH_REQUIRE_GPIOLIB
102 select REGULATOR_FIXED_VOLTAGE if REGULATOR
103
104config MACH_ARMADILLO800EVA 98config MACH_ARMADILLO800EVA
105 bool "Armadillo-800 EVA board" 99 bool "Armadillo-800 EVA board"
106 depends on ARCH_R8A7740 100 depends on ARCH_R8A7740
diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile
index aae28f35c92f..76f1639c5945 100644
--- a/arch/arm/mach-shmobile/Makefile
+++ b/arch/arm/mach-shmobile/Makefile
@@ -39,7 +39,6 @@ obj-$(CONFIG_MACH_AG5EVM) += board-ag5evm.o
39obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o 39obj-$(CONFIG_MACH_APE6EVM) += board-ape6evm.o
40obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o 40obj-$(CONFIG_MACH_MACKEREL) += board-mackerel.o
41obj-$(CONFIG_MACH_KOTA2) += board-kota2.o 41obj-$(CONFIG_MACH_KOTA2) += board-kota2.o
42obj-$(CONFIG_MACH_BONITO) += board-bonito.o
43obj-$(CONFIG_MACH_BOCKW) += board-bockw.o 42obj-$(CONFIG_MACH_BOCKW) += board-bockw.o
44obj-$(CONFIG_MACH_MARZEN) += board-marzen.o 43obj-$(CONFIG_MACH_MARZEN) += board-marzen.o
45obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o 44obj-$(CONFIG_MACH_MARZEN_REFERENCE) += board-marzen-reference.o
diff --git a/arch/arm/mach-shmobile/Makefile.boot b/arch/arm/mach-shmobile/Makefile.boot
index 3030673e31d2..84c6868580f0 100644
--- a/arch/arm/mach-shmobile/Makefile.boot
+++ b/arch/arm/mach-shmobile/Makefile.boot
@@ -5,7 +5,6 @@ loadaddr-$(CONFIG_MACH_APE6EVM) += 0x40008000
5loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000 5loadaddr-$(CONFIG_MACH_ARMADILLO800EVA) += 0x40008000
6loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000 6loadaddr-$(CONFIG_MACH_ARMADILLO800EVA_REFERENCE) += 0x40008000
7loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000 7loadaddr-$(CONFIG_MACH_BOCKW) += 0x60008000
8loadaddr-$(CONFIG_MACH_BONITO) += 0x40008000
9loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000 8loadaddr-$(CONFIG_MACH_KOTA2) += 0x41008000
10loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000 9loadaddr-$(CONFIG_MACH_KZM9D) += 0x40008000
11loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000 10loadaddr-$(CONFIG_MACH_KZM9G) += 0x41008000
diff --git a/arch/arm/mach-shmobile/board-bonito.c b/arch/arm/mach-shmobile/board-bonito.c
deleted file mode 100644
index b373e9ced573..000000000000
--- a/arch/arm/mach-shmobile/board-bonito.c
+++ /dev/null
@@ -1,502 +0,0 @@
1/*
2 * bonito board support
3 *
4 * Copyright (C) 2011 Renesas Solutions Corp.
5 * Copyright (C) 2011 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; version 2 of the License.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
19 *
20 */
21
22#include <linux/kernel.h>
23#include <linux/i2c.h>
24#include <linux/init.h>
25#include <linux/interrupt.h>
26#include <linux/irq.h>
27#include <linux/pinctrl/machine.h>
28#include <linux/platform_device.h>
29#include <linux/gpio.h>
30#include <linux/regulator/fixed.h>
31#include <linux/regulator/machine.h>
32#include <linux/smsc911x.h>
33#include <linux/videodev2.h>
34#include <mach/common.h>
35#include <asm/mach-types.h>
36#include <asm/mach/arch.h>
37#include <asm/mach/map.h>
38#include <asm/mach/time.h>
39#include <asm/hardware/cache-l2x0.h>
40#include <mach/r8a7740.h>
41#include <mach/irqs.h>
42#include <video/sh_mobile_lcdc.h>
43
44/*
45 * CS Address device note
46 *----------------------------------------------------------------
47 * 0 0x0000_0000 NOR Flash (64MB) SW12 : bit3 = OFF
48 * 2 0x0800_0000 ExtNOR (64MB) SW12 : bit3 = OFF
49 * 4 -
50 * 5A -
51 * 5B 0x1600_0000 SRAM (8MB)
52 * 6 0x1800_0000 FPGA (64K)
53 * 0x1801_0000 Ether (4KB)
54 * 0x1801_1000 USB (4KB)
55 */
56
57/*
58 * SW12
59 *
60 * bit1 bit2 bit3
61 *----------------------------------------------------------------------------
62 * ON NOR WriteProtect NAND WriteProtect CS0 ExtNOR / CS2 NOR
63 * OFF NOR Not WriteProtect NAND Not WriteProtect CS0 NOR / CS2 ExtNOR
64 */
65
66/*
67 * SCIFA5 (CN42)
68 *
69 * S38.3 = ON
70 * S39.6 = ON
71 * S43.1 = ON
72 */
73
74/*
75 * LCDC0 (CN3/CN4/CN7)
76 *
77 * S38.1 = OFF
78 * S38.2 = OFF
79 */
80
81/* Dummy supplies, where voltage doesn't matter */
82static struct regulator_consumer_supply dummy_supplies[] = {
83 REGULATOR_SUPPLY("vddvario", "smsc911x"),
84 REGULATOR_SUPPLY("vdd33a", "smsc911x"),
85};
86
87/*
88 * FPGA
89 */
90#define IRQSR0 0x0020
91#define IRQSR1 0x0022
92#define IRQMR0 0x0030
93#define IRQMR1 0x0032
94#define BUSSWMR1 0x0070
95#define BUSSWMR2 0x0072
96#define BUSSWMR3 0x0074
97#define BUSSWMR4 0x0076
98
99#define LCDCR 0x10B4
100#define DEVRSTCR1 0x10D0
101#define DEVRSTCR2 0x10D2
102#define A1MDSR 0x10E0
103#define BVERR 0x1100
104
105/* FPGA IRQ */
106#define FPGA_IRQ_BASE (512)
107#define FPGA_IRQ0 (FPGA_IRQ_BASE)
108#define FPGA_IRQ1 (FPGA_IRQ_BASE + 16)
109#define FPGA_ETH_IRQ (FPGA_IRQ0 + 15)
110static u16 bonito_fpga_read(u32 offset)
111{
112 return __raw_readw(IOMEM(0xf0003000) + offset);
113}
114
115static void bonito_fpga_write(u32 offset, u16 val)
116{
117 __raw_writew(val, IOMEM(0xf0003000) + offset);
118}
119
120static void bonito_fpga_irq_disable(struct irq_data *data)
121{
122 unsigned int irq = data->irq;
123 u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
124 int shift = irq % 16;
125
126 bonito_fpga_write(addr, bonito_fpga_read(addr) | (1 << shift));
127}
128
129static void bonito_fpga_irq_enable(struct irq_data *data)
130{
131 unsigned int irq = data->irq;
132 u32 addr = (irq < 1016) ? IRQMR0 : IRQMR1;
133 int shift = irq % 16;
134
135 bonito_fpga_write(addr, bonito_fpga_read(addr) & ~(1 << shift));
136}
137
138static struct irq_chip bonito_fpga_irq_chip __read_mostly = {
139 .name = "bonito FPGA",
140 .irq_mask = bonito_fpga_irq_disable,
141 .irq_unmask = bonito_fpga_irq_enable,
142};
143
144static void bonito_fpga_irq_demux(unsigned int irq, struct irq_desc *desc)
145{
146 u32 val = bonito_fpga_read(IRQSR1) << 16 |
147 bonito_fpga_read(IRQSR0);
148 u32 mask = bonito_fpga_read(IRQMR1) << 16 |
149 bonito_fpga_read(IRQMR0);
150
151 int i;
152
153 val &= ~mask;
154
155 for (i = 0; i < 32; i++) {
156 if (!(val & (1 << i)))
157 continue;
158
159 generic_handle_irq(FPGA_IRQ_BASE + i);
160 }
161}
162
163static void bonito_fpga_init(void)
164{
165 int i;
166
167 bonito_fpga_write(IRQMR0, 0xffff); /* mask all */
168 bonito_fpga_write(IRQMR1, 0xffff); /* mask all */
169
170 /* Device reset */
171 bonito_fpga_write(DEVRSTCR1,
172 (1 << 2)); /* Eth */
173
174 /* FPGA irq require special handling */
175 for (i = FPGA_IRQ_BASE; i < FPGA_IRQ_BASE + 32; i++) {
176 irq_set_chip_and_handler_name(i, &bonito_fpga_irq_chip,
177 handle_level_irq, "level");
178 set_irq_flags(i, IRQF_VALID); /* yuck */
179 }
180
181 irq_set_chained_handler(evt2irq(0x0340), bonito_fpga_irq_demux);
182 irq_set_irq_type(evt2irq(0x0340), IRQ_TYPE_LEVEL_LOW);
183}
184
185/*
186* PMIC settings
187*
188* FIXME
189*
190* bonito board needs some settings by pmic which use i2c access.
191* pmic settings use device_initcall() here for use it.
192*/
193static __u8 *pmic_settings = NULL;
194static __u8 pmic_do_2A[] = {
195 0x1C, 0x09,
196 0x1A, 0x80,
197 0xff, 0xff,
198};
199
200static int __init pmic_init(void)
201{
202 struct i2c_adapter *a = i2c_get_adapter(0);
203 struct i2c_msg msg;
204 __u8 buf[2];
205 int i, ret;
206
207 if (!pmic_settings)
208 return 0;
209 if (!a)
210 return 0;
211
212 msg.addr = 0x46;
213 msg.buf = buf;
214 msg.len = 2;
215 msg.flags = 0;
216
217 for (i = 0; ; i += 2) {
218 buf[0] = pmic_settings[i + 0];
219 buf[1] = pmic_settings[i + 1];
220
221 if ((0xff == buf[0]) && (0xff == buf[1]))
222 break;
223
224 ret = i2c_transfer(a, &msg, 1);
225 if (ret < 0) {
226 pr_err("i2c transfer fail\n");
227 break;
228 }
229 }
230
231 return 0;
232}
233device_initcall(pmic_init);
234
235/*
236 * LCDC0
237 */
238static const struct fb_videomode lcdc0_mode = {
239 .name = "WVGA Panel",
240 .xres = 800,
241 .yres = 480,
242 .left_margin = 88,
243 .right_margin = 40,
244 .hsync_len = 128,
245 .upper_margin = 20,
246 .lower_margin = 5,
247 .vsync_len = 5,
248 .sync = 0,
249};
250
251static struct sh_mobile_lcdc_info lcdc0_info = {
252 .clock_source = LCDC_CLK_BUS,
253 .ch[0] = {
254 .chan = LCDC_CHAN_MAINLCD,
255 .fourcc = V4L2_PIX_FMT_RGB565,
256 .interface_type = RGB24,
257 .clock_divider = 5,
258 .flags = 0,
259 .lcd_modes = &lcdc0_mode,
260 .num_modes = 1,
261 .panel_cfg = {
262 .width = 152,
263 .height = 91,
264 },
265 },
266};
267
268static struct resource lcdc0_resources[] = {
269 [0] = {
270 .name = "LCDC0",
271 .start = 0xfe940000,
272 .end = 0xfe943fff,
273 .flags = IORESOURCE_MEM,
274 },
275 [1] = {
276 .start = intcs_evt2irq(0x0580),
277 .flags = IORESOURCE_IRQ,
278 },
279};
280
281static struct platform_device lcdc0_device = {
282 .name = "sh_mobile_lcdc_fb",
283 .id = 0,
284 .resource = lcdc0_resources,
285 .num_resources = ARRAY_SIZE(lcdc0_resources),
286 .dev = {
287 .platform_data = &lcdc0_info,
288 .coherent_dma_mask = ~0,
289 },
290};
291
292static const struct pinctrl_map lcdc0_pinctrl_map[] = {
293 /* LCD0 */
294 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
295 "lcd0_data24_1", "lcd0"),
296 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
297 "lcd0_lclk_1", "lcd0"),
298 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_lcdc_fb.0", "pfc-r8a7740",
299 "lcd0_sync", "lcd0"),
300};
301
302/*
303 * SMSC 9221
304 */
305static struct resource smsc_resources[] = {
306 [0] = {
307 .start = 0x18010000,
308 .end = 0x18011000 - 1,
309 .flags = IORESOURCE_MEM,
310 },
311 [1] = {
312 .start = FPGA_ETH_IRQ,
313 .flags = IORESOURCE_IRQ,
314 },
315};
316
317static struct smsc911x_platform_config smsc_platdata = {
318 .flags = SMSC911X_USE_16BIT,
319 .phy_interface = PHY_INTERFACE_MODE_MII,
320 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
321 .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
322};
323
324static struct platform_device smsc_device = {
325 .name = "smsc911x",
326 .dev = {
327 .platform_data = &smsc_platdata,
328 },
329 .resource = smsc_resources,
330 .num_resources = ARRAY_SIZE(smsc_resources),
331};
332
333/*
334 * base board devices
335 */
336static struct platform_device *bonito_base_devices[] __initdata = {
337 &lcdc0_device,
338 &smsc_device,
339};
340
341/*
342 * map I/O
343 */
344static struct map_desc bonito_io_desc[] __initdata = {
345 /*
346 * for FPGA (0x1800000-0x19ffffff)
347 * 0x18000000-0x18002000 -> 0xf0003000-0xf0005000
348 */
349 {
350 .virtual = 0xf0003000,
351 .pfn = __phys_to_pfn(0x18000000),
352 .length = PAGE_SIZE * 2,
353 .type = MT_DEVICE_NONSHARED
354 }
355};
356
357static void __init bonito_map_io(void)
358{
359 r8a7740_map_io();
360 iotable_init(bonito_io_desc, ARRAY_SIZE(bonito_io_desc));
361}
362
363/*
364 * board init
365 */
366#define BIT_ON(sw, bit) (sw & (1 << bit))
367#define BIT_OFF(sw, bit) (!(sw & (1 << bit)))
368
369#define VCCQ1CR IOMEM(0xE6058140)
370#define VCCQ1LCDCR IOMEM(0xE6058186)
371
372/*
373 * HACK: The FPGA mappings should be associated with the FPGA device, but we
374 * don't have one at the moment. Associate them with the PFC device to make
375 * sure they will be applied.
376 */
377static const struct pinctrl_map fpga_pinctrl_map[] = {
378 /* FPGA */
379 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
380 "bsc_cs5a_0", "bsc"),
381 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
382 "bsc_cs5b", "bsc"),
383 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
384 "bsc_cs6a", "bsc"),
385 PIN_MAP_MUX_GROUP_DEFAULT("pfc-r8a7740", "pfc-r8a7740",
386 "intc_irq10", "intc"),
387};
388
389static const struct pinctrl_map scifa5_pinctrl_map[] = {
390 /* SCIFA5 */
391 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.5", "pfc-r8a7740",
392 "scifa5_data_2", "scifa5"),
393};
394
395static void __init bonito_init(void)
396{
397 u16 val;
398
399 regulator_register_fixed(0, dummy_supplies, ARRAY_SIZE(dummy_supplies));
400
401 pinctrl_register_mappings(fpga_pinctrl_map,
402 ARRAY_SIZE(fpga_pinctrl_map));
403 r8a7740_pinmux_init();
404 bonito_fpga_init();
405
406 pmic_settings = pmic_do_2A;
407
408 /*
409 * core board settings
410 */
411
412#ifdef CONFIG_CACHE_L2X0
413 /* Early BRESP enable, Shared attribute override enable, 32K*8way */
414 l2x0_init(IOMEM(0xf0002000), 0x40440000, 0x82000fff);
415#endif
416
417 r8a7740_add_standard_devices();
418
419 /*
420 * base board settings
421 */
422 gpio_request_one(176, GPIOF_IN, NULL);
423 if (!gpio_get_value(176)) {
424 u16 bsw2;
425 u16 bsw3;
426 u16 bsw4;
427
428 val = bonito_fpga_read(BVERR);
429 pr_info("bonito version: cpu %02x, base %02x\n",
430 ((val >> 8) & 0xFF),
431 ((val >> 0) & 0xFF));
432
433 bsw2 = bonito_fpga_read(BUSSWMR2);
434 bsw3 = bonito_fpga_read(BUSSWMR3);
435 bsw4 = bonito_fpga_read(BUSSWMR4);
436
437 /*
438 * SCIFA5 (CN42)
439 */
440 if (BIT_OFF(bsw2, 1) && /* S38.3 = ON */
441 BIT_OFF(bsw3, 9) && /* S39.6 = ON */
442 BIT_OFF(bsw4, 4)) { /* S43.1 = ON */
443 pinctrl_register_mappings(scifa5_pinctrl_map,
444 ARRAY_SIZE(scifa5_pinctrl_map));
445 }
446
447 /*
448 * LCDC0 (CN3)
449 */
450 if (BIT_ON(bsw2, 3) && /* S38.1 = OFF */
451 BIT_ON(bsw2, 2)) { /* S38.2 = OFF */
452 pinctrl_register_mappings(lcdc0_pinctrl_map,
453 ARRAY_SIZE(lcdc0_pinctrl_map));
454
455 gpio_request_one(61, GPIOF_OUT_INIT_HIGH,
456 NULL); /* LCDDON */
457
458 /* backlight on */
459 bonito_fpga_write(LCDCR, 1);
460
461 /* drivability Max */
462 __raw_writew(0x00FF , VCCQ1LCDCR);
463 __raw_writew(0xFFFF , VCCQ1CR);
464 }
465
466 platform_add_devices(bonito_base_devices,
467 ARRAY_SIZE(bonito_base_devices));
468 }
469}
470
471static void __init bonito_earlytimer_init(void)
472{
473 u16 val;
474 u8 md_ck = 0;
475
476 /* read MD_CK value */
477 val = bonito_fpga_read(A1MDSR);
478 if (val & (1 << 10))
479 md_ck |= MD_CK2;
480 if (val & (1 << 9))
481 md_ck |= MD_CK1;
482 if (val & (1 << 8))
483 md_ck |= MD_CK0;
484
485 r8a7740_clock_init(md_ck);
486 shmobile_earlytimer_init();
487}
488
489static void __init bonito_add_early_devices(void)
490{
491 r8a7740_add_early_devices();
492}
493
494MACHINE_START(BONITO, "bonito")
495 .map_io = bonito_map_io,
496 .init_early = bonito_add_early_devices,
497 .init_irq = r8a7740_init_irq,
498 .handle_irq = shmobile_handle_irq_intc,
499 .init_machine = bonito_init,
500 .init_late = shmobile_init_late,
501 .init_time = bonito_earlytimer_init,
502MACHINE_END
generated by cgit v1.2.2 (git 2.25.0) at 2025-09-11 07:22:07 -0400