diff options
author | Yuval Mintz <yuvalmin@broadcom.com> | 2012-06-16 16:27:14 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-06-17 02:38:36 -0400 |
commit | 50a2984543aa2581d08580f8468533ce0ade8a62 (patch) | |
tree | 7a14940ef423e7f6f4cdb77248329146cecb339c | |
parent | e8803b6c387129059e04d9e14d49efda250a7361 (diff) |
bnx2x: fix I2C non-respondent issue
When I2C is not responding it's usually due to a previous
unexpected reset during I2C operation. We release it by
powering down and up the SFP+ module.
Signed-off-by: Yaniv Rosner <yaniv.rosner@broadcom.com>
Signed-off-by: Yuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | 52 |
1 files changed, 29 insertions, 23 deletions
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c index a3fb7215cd89..51d7ab6a0276 100644 --- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c +++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c | |||
@@ -40,6 +40,7 @@ | |||
40 | #define I2C_BSC0 0 | 40 | #define I2C_BSC0 0 |
41 | #define I2C_BSC1 1 | 41 | #define I2C_BSC1 1 |
42 | #define I2C_WA_RETRY_CNT 3 | 42 | #define I2C_WA_RETRY_CNT 3 |
43 | #define I2C_WA_PWR_ITER (I2C_WA_RETRY_CNT - 1) | ||
43 | #define MCPR_IMC_COMMAND_READ_OP 1 | 44 | #define MCPR_IMC_COMMAND_READ_OP 1 |
44 | #define MCPR_IMC_COMMAND_WRITE_OP 2 | 45 | #define MCPR_IMC_COMMAND_WRITE_OP 2 |
45 | 46 | ||
@@ -7659,6 +7660,28 @@ static int bnx2x_8726_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7659 | return -EINVAL; | 7660 | return -EINVAL; |
7660 | } | 7661 | } |
7661 | 7662 | ||
7663 | static void bnx2x_warpcore_power_module(struct link_params *params, | ||
7664 | struct bnx2x_phy *phy, | ||
7665 | u8 power) | ||
7666 | { | ||
7667 | u32 pin_cfg; | ||
7668 | struct bnx2x *bp = params->bp; | ||
7669 | |||
7670 | pin_cfg = (REG_RD(bp, params->shmem_base + | ||
7671 | offsetof(struct shmem_region, | ||
7672 | dev_info.port_hw_config[params->port].e3_sfp_ctrl)) & | ||
7673 | PORT_HW_CFG_E3_PWR_DIS_MASK) >> | ||
7674 | PORT_HW_CFG_E3_PWR_DIS_SHIFT; | ||
7675 | |||
7676 | if (pin_cfg == PIN_CFG_NA) | ||
7677 | return; | ||
7678 | DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n", | ||
7679 | power, pin_cfg); | ||
7680 | /* Low ==> corresponding SFP+ module is powered | ||
7681 | * high ==> the SFP+ module is powered down | ||
7682 | */ | ||
7683 | bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1); | ||
7684 | } | ||
7662 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | 7685 | static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, |
7663 | struct link_params *params, | 7686 | struct link_params *params, |
7664 | u16 addr, u8 byte_cnt, | 7687 | u16 addr, u8 byte_cnt, |
@@ -7678,6 +7701,12 @@ static int bnx2x_warpcore_read_sfp_module_eeprom(struct bnx2x_phy *phy, | |||
7678 | /* 4 byte aligned address */ | 7701 | /* 4 byte aligned address */ |
7679 | addr32 = addr & (~0x3); | 7702 | addr32 = addr & (~0x3); |
7680 | do { | 7703 | do { |
7704 | if (cnt == I2C_WA_PWR_ITER) { | ||
7705 | bnx2x_warpcore_power_module(params, phy, 0); | ||
7706 | /* Note that 100us are not enough here */ | ||
7707 | usleep_range(1000,1000); | ||
7708 | bnx2x_warpcore_power_module(params, phy, 1); | ||
7709 | } | ||
7681 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, | 7710 | rc = bnx2x_bsc_read(params, phy, 0xa0, addr32, 0, byte_cnt, |
7682 | data_array); | 7711 | data_array); |
7683 | } while ((rc != 0) && (++cnt < I2C_WA_RETRY_CNT)); | 7712 | } while ((rc != 0) && (++cnt < I2C_WA_RETRY_CNT)); |
@@ -8200,29 +8229,6 @@ static void bnx2x_set_sfp_module_fault_led(struct link_params *params, | |||
8200 | bnx2x_set_e1e2_module_fault_led(params, gpio_mode); | 8229 | bnx2x_set_e1e2_module_fault_led(params, gpio_mode); |
8201 | } | 8230 | } |
8202 | 8231 | ||
8203 | static void bnx2x_warpcore_power_module(struct link_params *params, | ||
8204 | struct bnx2x_phy *phy, | ||
8205 | u8 power) | ||
8206 | { | ||
8207 | u32 pin_cfg; | ||
8208 | struct bnx2x *bp = params->bp; | ||
8209 | |||
8210 | pin_cfg = (REG_RD(bp, params->shmem_base + | ||
8211 | offsetof(struct shmem_region, | ||
8212 | dev_info.port_hw_config[params->port].e3_sfp_ctrl)) & | ||
8213 | PORT_HW_CFG_E3_PWR_DIS_MASK) >> | ||
8214 | PORT_HW_CFG_E3_PWR_DIS_SHIFT; | ||
8215 | |||
8216 | if (pin_cfg == PIN_CFG_NA) | ||
8217 | return; | ||
8218 | DP(NETIF_MSG_LINK, "Setting SFP+ module power to %d using pin cfg %d\n", | ||
8219 | power, pin_cfg); | ||
8220 | /* Low ==> corresponding SFP+ module is powered | ||
8221 | * high ==> the SFP+ module is powered down | ||
8222 | */ | ||
8223 | bnx2x_set_cfg_pin(bp, pin_cfg, power ^ 1); | ||
8224 | } | ||
8225 | |||
8226 | static void bnx2x_warpcore_hw_reset(struct bnx2x_phy *phy, | 8232 | static void bnx2x_warpcore_hw_reset(struct bnx2x_phy *phy, |
8227 | struct link_params *params) | 8233 | struct link_params *params) |
8228 | { | 8234 | { |