diff options
author | Stratos Karafotis <stratosk@semaphore.gr> | 2014-04-25 16:16:25 -0400 |
---|---|---|
committer | Rafael J. Wysocki <rafael.j.wysocki@intel.com> | 2014-04-29 18:06:43 -0400 |
commit | 4966ee4037fedd80871659333172481073ec2fac (patch) | |
tree | c0c45898eedb7f966b368183071092f6d93185e8 | |
parent | fdb56c45a2cadd11b27447f9468c712b59e15b33 (diff) |
mips: lemote 2f: Use cpufreq_for_each_entry macro for iteration
The cpufreq core now supports the cpufreq_for_each_entry macro helper
for iteration over the cpufreq_frequency_table, so use it.
It should have no functional changes.
Signed-off-by: Stratos Karafotis <stratosk@semaphore.gr>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
-rw-r--r-- | arch/mips/loongson/lemote-2f/clock.c | 16 |
1 files changed, 5 insertions, 11 deletions
diff --git a/arch/mips/loongson/lemote-2f/clock.c b/arch/mips/loongson/lemote-2f/clock.c index e1f427f4f5f3..1eed38e28b1e 100644 --- a/arch/mips/loongson/lemote-2f/clock.c +++ b/arch/mips/loongson/lemote-2f/clock.c | |||
@@ -91,9 +91,9 @@ EXPORT_SYMBOL(clk_put); | |||
91 | 91 | ||
92 | int clk_set_rate(struct clk *clk, unsigned long rate) | 92 | int clk_set_rate(struct clk *clk, unsigned long rate) |
93 | { | 93 | { |
94 | struct cpufreq_frequency_table *pos; | ||
94 | int ret = 0; | 95 | int ret = 0; |
95 | int regval; | 96 | int regval; |
96 | int i; | ||
97 | 97 | ||
98 | if (likely(clk->ops && clk->ops->set_rate)) { | 98 | if (likely(clk->ops && clk->ops->set_rate)) { |
99 | unsigned long flags; | 99 | unsigned long flags; |
@@ -106,22 +106,16 @@ int clk_set_rate(struct clk *clk, unsigned long rate) | |||
106 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) | 106 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) |
107 | propagate_rate(clk); | 107 | propagate_rate(clk); |
108 | 108 | ||
109 | for (i = 0; loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END; | 109 | cpufreq_for_each_valid_entry(pos, loongson2_clockmod_table) |
110 | i++) { | 110 | if (rate == pos->frequency) |
111 | if (loongson2_clockmod_table[i].frequency == | ||
112 | CPUFREQ_ENTRY_INVALID) | ||
113 | continue; | ||
114 | if (rate == loongson2_clockmod_table[i].frequency) | ||
115 | break; | 111 | break; |
116 | } | 112 | if (rate != pos->frequency) |
117 | if (rate != loongson2_clockmod_table[i].frequency) | ||
118 | return -ENOTSUPP; | 113 | return -ENOTSUPP; |
119 | 114 | ||
120 | clk->rate = rate; | 115 | clk->rate = rate; |
121 | 116 | ||
122 | regval = LOONGSON_CHIPCFG0; | 117 | regval = LOONGSON_CHIPCFG0; |
123 | regval = (regval & ~0x7) | | 118 | regval = (regval & ~0x7) | (pos->driver_data - 1); |
124 | (loongson2_clockmod_table[i].driver_data - 1); | ||
125 | LOONGSON_CHIPCFG0 = regval; | 119 | LOONGSON_CHIPCFG0 = regval; |
126 | 120 | ||
127 | return ret; | 121 | return ret; |