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authorGregory CLEMENT <gregory.clement@free-electrons.com>2015-05-26 05:44:42 -0400
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-07-21 13:10:04 -0400
commit46afcceeebddd0f6e1d328c9c9c93059adffdf08 (patch)
tree9cd20c457dc470a52a4d0e630447f176983124cf
parent927973d93be4524ad25518e0e3412cd27d425e29 (diff)
spi: orion: Fix maximum baud rates for Armada 370/XP
commit ce2f6ea1cbd41d78224f703af980a6ceeb0eb56a upstream. The commit df59fa7f4bca "spi: orion: support armada extended baud rates" was too optimistic for the maximum baud rate that the Armada SoCs can support. According to the hardware datasheet the maximum frequency supported by the Armada 370 SoC is tclk/4. But for the Armada XP, Armada 38x and Armada 39x SoCs the limitation is 50MHz and for the Armada 375 it is tclk/15. Currently the armada-370-spi compatible is only used by the Armada 370 and the Armada XP device tree. On Armada 370, tclk cannot be higher than 200MHz. In order to be able to handle both SoCs, we can take the minimum of 50MHz and tclk/4. A proper solution is adding a compatible string for each SoC, but it can't be done as a fix for compatibility reason (we can't modify device tree that have been already released) and it will be part of a separate patch. Fixes: df59fa7f4bca (spi: orion: support armada extended baud rates) Reported-by: Kostya Porotchkin <kostap@marvell.com> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r--drivers/spi/spi-orion.c25
1 files changed, 23 insertions, 2 deletions
diff --git a/drivers/spi/spi-orion.c b/drivers/spi/spi-orion.c
index 861664776672..ff97cabdaa81 100644
--- a/drivers/spi/spi-orion.c
+++ b/drivers/spi/spi-orion.c
@@ -61,6 +61,12 @@ enum orion_spi_type {
61 61
62struct orion_spi_dev { 62struct orion_spi_dev {
63 enum orion_spi_type typ; 63 enum orion_spi_type typ;
64 /*
65 * min_divisor and max_hz should be exclusive, the only we can
66 * have both is for managing the armada-370-spi case with old
67 * device tree
68 */
69 unsigned long max_hz;
64 unsigned int min_divisor; 70 unsigned int min_divisor;
65 unsigned int max_divisor; 71 unsigned int max_divisor;
66 u32 prescale_mask; 72 u32 prescale_mask;
@@ -387,8 +393,9 @@ static const struct orion_spi_dev orion_spi_dev_data = {
387 393
388static const struct orion_spi_dev armada_spi_dev_data = { 394static const struct orion_spi_dev armada_spi_dev_data = {
389 .typ = ARMADA_SPI, 395 .typ = ARMADA_SPI,
390 .min_divisor = 1, 396 .min_divisor = 4,
391 .max_divisor = 1920, 397 .max_divisor = 1920,
398 .max_hz = 50000000,
392 .prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK, 399 .prescale_mask = ARMADA_SPI_CLK_PRESCALE_MASK,
393}; 400};
394 401
@@ -454,7 +461,21 @@ static int orion_spi_probe(struct platform_device *pdev)
454 goto out; 461 goto out;
455 462
456 tclk_hz = clk_get_rate(spi->clk); 463 tclk_hz = clk_get_rate(spi->clk);
457 master->max_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->min_divisor); 464
465 /*
466 * With old device tree, armada-370-spi could be used with
467 * Armada XP, however for this SoC the maximum frequency is
468 * 50MHz instead of tclk/4. On Armada 370, tclk cannot be
469 * higher than 200MHz. So, in order to be able to handle both
470 * SoCs, we can take the minimum of 50MHz and tclk/4.
471 */
472 if (of_device_is_compatible(pdev->dev.of_node,
473 "marvell,armada-370-spi"))
474 master->max_speed_hz = min(devdata->max_hz,
475 DIV_ROUND_UP(tclk_hz, devdata->min_divisor));
476 else
477 master->max_speed_hz =
478 DIV_ROUND_UP(tclk_hz, devdata->min_divisor);
458 master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor); 479 master->min_speed_hz = DIV_ROUND_UP(tclk_hz, devdata->max_divisor);
459 480
460 r = platform_get_resource(pdev, IORESOURCE_MEM, 0); 481 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);